]> cloudbase.mooo.com Git - irmp.git/blame - irsnd.c
projects / irmp.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Version 2.1.2:
[irmp.git] / irsnd.c
CommitLineData
4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
f50e01e7 4 * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
7644ac04 6 * Supported mikrocontrollers:\r
7 *\r
476267f4 8 * ATtiny45, ATtiny85\r
9 * ATtiny84\r
7644ac04 10 * ATmega8, ATmega16, ATmega32\r
11 * ATmega162\r
12 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r
13 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
14 *\r
a48187fa 15 * $Id: irsnd.c,v 1.48 2012/02/24 14:24:28 fm Exp $\r
5481e9cd 16 *\r
4225a882 17 * This program is free software; you can redistribute it and/or modify\r
18 * it under the terms of the GNU General Public License as published by\r
19 * the Free Software Foundation; either version 2 of the License, or\r
20 * (at your option) any later version.\r
21 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
22 */\r
23\r
9c86ff1a 24#if defined(__18CXX) \r
25#define PIC_C18 // Microchip C18\r
26#include <p18cxxx.h> // basic P18 lib\r
27#include "timers.h" // timer lib\r
28#include "pwm.h" // pwm lib\r
29#endif \r
30\r
4225a882 31#ifdef unix // test/debug on linux/unix\r
32#include <stdio.h>\r
33#include <unistd.h>\r
34#include <stdlib.h>\r
35#include <string.h>\r
36#include <inttypes.h>\r
37\r
38#define DEBUG\r
39#define F_CPU 8000000L\r
40\r
41#else // not unix:\r
42\r
43#ifdef WIN32 // test/debug on windows\r
44#include <stdio.h>\r
c7a47e89 45#include <stdlib.h>\r
46#include <string.h>\r
47\r
4225a882 48#define F_CPU 8000000L\r
31c1f035 49typedef unsigned char uint8_t;\r
50typedef unsigned short uint16_t;\r
4225a882 51#define DEBUG\r
52\r
53#else\r
54\r
55#ifdef CODEVISION\r
9c86ff1a 56#define COM2A0 6\r
57#define WGM21 1\r
58#define CS20 0\r
59#elif defined(PIC_C18)\r
60 //nothing to do here\r
4225a882 61#else\r
9c86ff1a 62#include <inttypes.h>\r
63#include <avr/io.h>\r
64#include <util/delay.h>\r
65#include <avr/pgmspace.h>\r
4225a882 66#endif // CODEVISION\r
67\r
68#endif // WIN32\r
69#endif // unix\r
70\r
71#include "irmp.h"\r
46dd89b7 72#include "irsndconfig.h"\r
4225a882 73#include "irsnd.h"\r
74\r
1f54e86c 75/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
76 * ATtiny pin definition of OC0A / OC0B\r
77 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
78 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
79 */\r
476267f4 80#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7\r
7644ac04 81#if IRSND_OCx == IRSND_OC0A // OC0A\r
82#define IRSND_PORT PORTB // port B\r
83#define IRSND_DDR DDRB // ddr B\r
84#define IRSND_BIT 2 // OC0A\r
85#elif IRSND_OCx == IRSND_OC0B // OC0B\r
86#define IRSND_PORT PORTA // port A\r
87#define IRSND_DDR DDRA // ddr A\r
88#define IRSND_BIT 7 // OC0B\r
89#else\r
90#error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
91#endif // IRSND_OCx\r
92\r
476267f4 93#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
1f54e86c 94#if IRSND_OCx == IRSND_OC0A // OC0A\r
f50e01e7 95#define IRSND_PORT PORTB // port B\r
96#define IRSND_DDR DDRB // ddr B\r
1f54e86c 97#define IRSND_BIT 0 // OC0A\r
98#elif IRSND_OCx == IRSND_OC0B // OC0B\r
99#define IRSND_PORT PORTB // port B\r
100#define IRSND_DDR DDRB // ddr B\r
101#define IRSND_BIT 1 // OC0B\r
102#else\r
103#error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
104#endif // IRSND_OCx\r
105\r
106#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
107#if IRSND_OCx == IRSND_OC2 // OC0A\r
108#define IRSND_PORT PORTB // port B\r
109#define IRSND_DDR DDRB // ddr B\r
110#define IRSND_BIT 3 // OC0A\r
111#else\r
112#error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
113#endif // IRSND_OCx\r
114\r
f50e01e7 115\r
116#elif defined (__AVR_ATmega16__) \\r
117 || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
1f54e86c 118#if IRSND_OCx == IRSND_OC2 // OC2\r
f50e01e7 119#define IRSND_PORT PORTD // port D\r
120#define IRSND_DDR DDRD // ddr D\r
121#define IRSND_BIT 7 // OC2\r
1f54e86c 122#else\r
123#error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
124#endif // IRSND_OCx\r
f50e01e7 125\r
1f54e86c 126#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
127#if IRSND_OCx == IRSND_OC2 // OC2\r
f50e01e7 128#define IRSND_PORT PORTB // port B\r
129#define IRSND_DDR DDRB // ddr B\r
130#define IRSND_BIT 1 // OC2\r
9c86ff1a 131\r
1f54e86c 132#elif IRSND_OCx == IRSND_OC0 // OC0\r
133#define IRSND_PORT PORTB // port B\r
134#define IRSND_DDR DDRB // ddr B\r
135#define IRSND_BIT 0 // OC0\r
136#else\r
137#error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
138#endif // IRSND_OCx\r
f50e01e7 139\r
140#elif defined (__AVR_ATmega164__) \\r
141 || defined (__AVR_ATmega324__) \\r
142 || defined (__AVR_ATmega644__) \\r
143 || defined (__AVR_ATmega644P__) \\r
0f700c8e 144 || defined (__AVR_ATmega1284__) \\r
145 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
1f54e86c 146#if IRSND_OCx == IRSND_OC2A // OC2A\r
f50e01e7 147#define IRSND_PORT PORTD // port D\r
148#define IRSND_DDR DDRD // ddr D\r
149#define IRSND_BIT 7 // OC2A\r
1f54e86c 150#elif IRSND_OCx == IRSND_OC2B // OC2B\r
f50e01e7 151#define IRSND_PORT PORTD // port D\r
152#define IRSND_DDR DDRD // ddr D\r
153#define IRSND_BIT 6 // OC2B\r
1f54e86c 154#elif IRSND_OCx == IRSND_OC0A // OC0A\r
155#define IRSND_PORT PORTB // port B\r
156#define IRSND_DDR DDRB // ddr B\r
157#define IRSND_BIT 3 // OC0A\r
158#elif IRSND_OCx == IRSND_OC0B // OC0B\r
159#define IRSND_PORT PORTB // port B\r
160#define IRSND_DDR DDRB // ddr B\r
161#define IRSND_BIT 4 // OC0B\r
f50e01e7 162#else\r
1f54e86c 163#error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
164#endif // IRSND_OCx\r
f50e01e7 165\r
166#elif defined (__AVR_ATmega48__) \\r
167 || defined (__AVR_ATmega88__) \\r
7644ac04 168 || defined (__AVR_ATmega88P__) \\r
f50e01e7 169 || defined (__AVR_ATmega168__) \\r
1f54e86c 170 || defined (__AVR_ATmega168P__) \\r
7644ac04 171 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
1f54e86c 172#if IRSND_OCx == IRSND_OC2A // OC2A\r
f50e01e7 173#define IRSND_PORT PORTB // port B\r
174#define IRSND_DDR DDRB // ddr B\r
175#define IRSND_BIT 3 // OC2A\r
1f54e86c 176#elif IRSND_OCx == IRSND_OC2B // OC2B\r
f50e01e7 177#define IRSND_PORT PORTD // port D\r
178#define IRSND_DDR DDRD // ddr D\r
179#define IRSND_BIT 3 // OC2B\r
1f54e86c 180#elif IRSND_OCx == IRSND_OC0A // OC0A\r
181#define IRSND_PORT PORTB // port B\r
182#define IRSND_DDR DDRB // ddr B\r
183#define IRSND_BIT 6 // OC0A\r
184#elif IRSND_OCx == IRSND_OC0B // OC0B\r
185#define IRSND_PORT PORTD // port D\r
186#define IRSND_DDR DDRD // ddr D\r
187#define IRSND_BIT 5 // OC0B\r
f50e01e7 188#else\r
1f54e86c 189#error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
190#endif // IRSND_OCx\r
0f700c8e 191#elif defined (__AVR_ATmega8515__) \r
192#if IRSND_OCx == IRSND_OC0 \r
193#define IRSND_PORT PORTB // port B\r
194#define IRSND_DDR DDRB // ddr B\r
195#define IRSND_BIT 0 // OC0\r
196#elif IRSND_OCx == IRSND_OC1A \r
197#define IRSND_PORT PORTD // port D\r
198#define IRSND_DDR DDRD // ddr D\r
199#define IRSND_BIT 5 // OC1A\r
200#elif IRSND_OCx == IRSND_OC1B \r
201#define IRSND_PORT PORTE // port E\r
202#define IRSND_DDR DDRE // ddr E\r
203#define IRSND_BIT 2 // OC1E\r
204#error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
205#endif // IRSND_OCx\r
f50e01e7 206\r
9c86ff1a 207#elif defined (PIC_C18) //Microchip C18 compiler\r
208 //Nothing here to do here -> See irsndconfig.h\r
209\r
f50e01e7 210#else\r
211#if !defined (unix) && !defined (WIN32)\r
1f54e86c 212#error mikrocontroller not defined, please fill in definitions here.\r
f50e01e7 213#endif // unix, WIN32\r
214#endif // __AVR...\r
215\r
9405f84a 216#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 217 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 218#else\r
9c86ff1a 219 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 220#endif\r
221\r
f50e01e7 222/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
223 * IR timings\r
224 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
225 */\r
4225a882 226#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
227#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
228#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
229#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
230#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
a7054daf 231#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
232#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 233\r
234#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
235#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 236#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 237#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
238#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
239#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
a7054daf 240#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 241\r
242#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
243#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
244#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
245#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
246#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
a7054daf 247#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 248\r
a7054daf 249#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
250#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 251\r
4225a882 252#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
253#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
254#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
255#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
256#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
a7054daf 257#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 258\r
770a1a9d 259#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
260#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
261#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
262#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
263#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
264#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
265#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
266\r
4225a882 267#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
268#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
269#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
270#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
271#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
a7054daf 272#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 273\r
274#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
275#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
a7054daf 276#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 277\r
278#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
279#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
280#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
281#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
a7054daf 282#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 283\r
284#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
285#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
286#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
a7054daf 287#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
288#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 289\r
beda975f 290#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
291#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
292#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
293#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
294#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
295\r
4225a882 296#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
297#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
298#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
299#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
300#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
a7054daf 301#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 302\r
303#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
304#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
305#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
306#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
307#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
308#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
a7054daf 309#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
310#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 311\r
5481e9cd 312#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
313#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
314#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
315#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
316#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
317#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
318#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
319#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
320#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
321#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
322#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
a7054daf 323#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 324\r
9c86ff1a 325#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
326#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
a7054daf 327#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
328#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 329#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 330\r
a48187fa 331#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
332\r
02ccdb69 333#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
334#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
335#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 336\r
9c86ff1a 337\r
338#ifdef PIC_C18\r
a48187fa 339#define IRSND_FREQ_30_KHZ (uint8_t) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
9c86ff1a 340#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
341#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
342#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
343#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
344#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
345#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
346#else // AVR\r
a48187fa 347#define IRSND_FREQ_30_KHZ (uint8_t) ((F_CPU / 30000 / 2) - 1)\r
4225a882 348#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2) - 1)\r
349#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2) - 1)\r
350#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2) - 1)\r
351#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2) - 1)\r
352#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2) - 1)\r
5481e9cd 353#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2) - 1)\r
9c86ff1a 354#endif\r
4225a882 355\r
48664931 356#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
357#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
358#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
359#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
360#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
361#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 362\r
c7c9a4a1 363#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
364#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
365#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
366#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
367#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
368#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
369\r
c7a47e89 370#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
371#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
372#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
373#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
374#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
375#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
376#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
377\r
9405f84a 378#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
379#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
380#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
381#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
382#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
383#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 384#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
385\r
386#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
387#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
388#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
389#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
390#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
391#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
392#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 393\r
9c86ff1a 394static volatile uint8_t irsnd_busy = 0;\r
395static volatile uint8_t irsnd_protocol = 0;\r
396static volatile uint8_t irsnd_buffer[6] = {0};\r
397static volatile uint8_t irsnd_repeat = 0;\r
4225a882 398static volatile uint8_t irsnd_is_on = FALSE;\r
399\r
f50e01e7 400#if IRSND_USE_CALLBACK == 1\r
401static void (*irsnd_callback_ptr) (uint8_t);\r
402#endif // IRSND_USE_CALLBACK == 1\r
403\r
4225a882 404/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
405 * Switch PWM on\r
406 * @details Switches PWM on with a narrow spike on all 3 channels -> leds glowing\r
407 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
408 */\r
409static void\r
410irsnd_on (void)\r
411{\r
412 if (! irsnd_is_on)\r
413 {\r
414#ifndef DEBUG\r
9c86ff1a 415\r
416#if defined(PIC_C18)\r
417 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
418#else\r
419\r
1f54e86c 420#if IRSND_OCx == IRSND_OC2 // use OC2\r
421 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
422#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
f50e01e7 423 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
1f54e86c 424#elif IRSND_OCx == IRSND_OC2B // use OC2B\r
f50e01e7 425 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
1f54e86c 426#elif IRSND_OCx == IRSND_OC0 // use OC0\r
427 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
428#elif IRSND_OCx == IRSND_OC0A // use OC0A\r
429 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
430#elif IRSND_OCx == IRSND_OC0B // use OC0B\r
431 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
432#else\r
433#error wrong value of IRSND_OCx\r
434#endif // IRSND_OCx\r
9c86ff1a 435\r
436#endif //C18\r
4225a882 437#endif // DEBUG\r
f50e01e7 438\r
439#if IRSND_USE_CALLBACK == 1\r
440 if (irsnd_callback_ptr)\r
441 {\r
442 (*irsnd_callback_ptr) (TRUE);\r
443 }\r
444#endif // IRSND_USE_CALLBACK == 1\r
445\r
4225a882 446 irsnd_is_on = TRUE;\r
447 }\r
448}\r
449\r
450/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
451 * Switch PWM off\r
452 * @details Switches PWM off\r
453 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
454 */\r
455static void\r
456irsnd_off (void)\r
457{\r
458 if (irsnd_is_on)\r
459 {\r
460#ifndef DEBUG\r
9c86ff1a 461 \r
462#if defined(PIC_C18)\r
463 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
464#else //AVR\r
465\r
1f54e86c 466#if IRSND_OCx == IRSND_OC2 // use OC2\r
f50e01e7 467 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
1f54e86c 468#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
f50e01e7 469 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
1f54e86c 470#elif IRSND_OCx == IRSND_OC2B // use OC2B\r
f50e01e7 471 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
1f54e86c 472#elif IRSND_OCx == IRSND_OC0 // use OC0\r
473 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
474#elif IRSND_OCx == IRSND_OC0A // use OC0A\r
475 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
476#elif IRSND_OCx == IRSND_OC0B // use OC0B\r
477 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
478#else\r
479#error wrong value of IRSND_OCx\r
480#endif // IRSND_OCx\r
f50e01e7 481 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
9c86ff1a 482#endif //C18\r
4225a882 483#endif // DEBUG\r
f50e01e7 484\r
485#if IRSND_USE_CALLBACK == 1\r
486 if (irsnd_callback_ptr)\r
487 {\r
488 (*irsnd_callback_ptr) (FALSE);\r
489 }\r
490#endif // IRSND_USE_CALLBACK == 1\r
491\r
4225a882 492 irsnd_is_on = FALSE;\r
493 }\r
494}\r
495\r
496/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
497 * Set PWM frequency\r
498 * @details sets pwm frequency\r
499 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
500 */\r
501static void\r
502irsnd_set_freq (uint8_t freq)\r
503{\r
504#ifndef DEBUG\r
9c86ff1a 505\r
506#if defined(PIC_C18)\r
a48187fa 507 OpenPWM(freq); \r
508 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
9c86ff1a 509#else //AVR\r
510\r
1f54e86c 511#if IRSND_OCx == IRSND_OC2\r
f50e01e7 512 OCR2 = freq; // use register OCR2 for OC2\r
1f54e86c 513#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
514 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
515#elif IRSND_OCx == IRSND_OC2B // use OC2B\r
f50e01e7 516 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
1f54e86c 517#elif IRSND_OCx == IRSND_OC0 // use OC0\r
518 OCR0 = freq; // use register OCR2 for OC2\r
519#elif IRSND_OCx == IRSND_OC0A // use OC0A\r
520 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
521#elif IRSND_OCx == IRSND_OC0B // use OC0B\r
522 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
523#else\r
524#error wrong value of IRSND_OCx\r
f50e01e7 525#endif\r
9c86ff1a 526#endif //PIC_C18\r
4225a882 527#endif // DEBUG\r
528}\r
529\r
530/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
531 * Initialize the PWM\r
532 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
533 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
534 */\r
535void\r
536irsnd_init (void)\r
537{\r
538#ifndef DEBUG\r
9c86ff1a 539#if defined(PIC_C18)\r
a48187fa 540 OpenTimer;\r
541 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
542 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
9c86ff1a 543#else\r
4225a882 544 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
545 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
546\r
1f54e86c 547#if IRSND_OCx == IRSND_OC2 // use OC2\r
4225a882 548 TCCR2 = (1<<WGM21); // CTC mode\r
549 TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
1f54e86c 550#elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
4225a882 551 TCCR2A = (1<<WGM21); // CTC mode\r
552 TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
1f54e86c 553#elif IRSND_OCx == IRSND_OC0 // use OC0\r
554 TCCR0 = (1<<WGM01); // CTC mode\r
555 TCCR0 |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
556#elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
557 TCCR0A = (1<<WGM01); // CTC mode\r
558 TCCR0B |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
559#else\r
560#error wrong value of IRSND_OCx\r
561#endif\r
4225a882 562 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
9c86ff1a 563#endif //PIC_C18\r
4225a882 564#endif // DEBUG\r
565}\r
566\r
f50e01e7 567#if IRSND_USE_CALLBACK == 1\r
568void\r
569irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
570{\r
571 irsnd_callback_ptr = cb;\r
572}\r
573#endif // IRSND_USE_CALLBACK == 1\r
574\r
4225a882 575uint8_t\r
576irsnd_is_busy (void)\r
577{\r
578 return irsnd_busy;\r
579}\r
580\r
581static uint16_t\r
582bitsrevervse (uint16_t x, uint8_t len)\r
583{\r
584 uint16_t xx = 0;\r
585\r
586 while(len)\r
587 {\r
588 xx <<= 1;\r
589 if (x & 1)\r
590 {\r
591 xx |= 1;\r
592 }\r
593 x >>= 1;\r
594 len--;\r
595 }\r
596 return xx;\r
597}\r
598\r
599\r
9547ee89 600#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
601static uint8_t sircs_additional_bitlen;\r
602#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
603\r
4225a882 604uint8_t\r
879b06c2 605irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 606{\r
607#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
608 static uint8_t toggle_bit_recs80;\r
609#endif\r
610#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
611 static uint8_t toggle_bit_recs80ext;\r
612#endif\r
613#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
614 static uint8_t toggle_bit_rc5;\r
9547ee89 615#endif\r
779fbc81 616#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 617 static uint8_t toggle_bit_rc6;\r
beda975f 618#endif\r
619#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
620 static uint8_t toggle_bit_thomson;\r
4225a882 621#endif\r
622 uint16_t address;\r
623 uint16_t command;\r
624\r
879b06c2 625 if (do_wait)\r
4225a882 626 {\r
879b06c2 627 while (irsnd_busy)\r
628 {\r
629 // do nothing;\r
630 }\r
631 }\r
632 else if (irsnd_busy)\r
633 {\r
634 return (FALSE);\r
4225a882 635 }\r
636\r
637 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 638 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 639\r
640 switch (irsnd_protocol)\r
641 {\r
642#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
643 case IRMP_SIRCS_PROTOCOL:\r
644 {\r
9547ee89 645 uint8_t sircs_additional_command_len;\r
646 uint8_t sircs_additional_address_len;\r
647\r
648 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
649\r
650 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
651 {\r
652 sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
653 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
654 }\r
655 else\r
656 {\r
657 sircs_additional_command_len = sircs_additional_bitlen;\r
658 sircs_additional_address_len = 0;\r
659 }\r
4225a882 660\r
9547ee89 661 command = bitsrevervse (irmp_data_p->command, 15);\r
662\r
663 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
664 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
665\r
666 if (sircs_additional_address_len > 0)\r
667 {\r
668 address = bitsrevervse (irmp_data_p->address, 5);\r
669 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
670 irsnd_buffer[2] = (address & 0x000F) << 4;\r
671 }\r
4225a882 672 irsnd_busy = TRUE;\r
673 break;\r
674 }\r
675#endif\r
676#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
46dd89b7 677 case IRMP_APPLE_PROTOCOL:\r
c7a47e89 678 {\r
679 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
680 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
681\r
682 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
683 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
684\r
685 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
686\r
7644ac04 687 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
688 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
689 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
690 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
c7a47e89 691 irsnd_busy = TRUE;\r
692 break;\r
693 }\r
694 case IRMP_NEC_PROTOCOL:\r
4225a882 695 {\r
696 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
697 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
698\r
4225a882 699 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
700 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
701 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
7644ac04 702 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
703 irsnd_busy = TRUE;\r
704 break;\r
705 }\r
706#endif\r
707#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
708 case IRMP_NEC16_PROTOCOL:\r
709 {\r
710 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
711 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 712\r
7644ac04 713 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
714 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
715 irsnd_busy = TRUE;\r
716 break;\r
717 }\r
718#endif\r
719#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
720 case IRMP_NEC42_PROTOCOL:\r
721 {\r
722 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
723 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
724\r
725 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
a48187fa 726 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
7644ac04 727 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
728 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
729 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
730 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
4225a882 731 irsnd_busy = TRUE;\r
732 break;\r
733 }\r
734#endif\r
735#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
736 case IRMP_SAMSUNG_PROTOCOL:\r
737 {\r
738 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
739 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
740\r
4225a882 741 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
742 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
743 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
744 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
745 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
746 irsnd_busy = TRUE;\r
747 break;\r
748 }\r
749 case IRMP_SAMSUNG32_PROTOCOL:\r
750 {\r
751 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
752 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
753\r
4225a882 754 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
755 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
756 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
757 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
758 irsnd_busy = TRUE;\r
759 break;\r
760 }\r
761#endif\r
762#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
763 case IRMP_MATSUSHITA_PROTOCOL:\r
764 {\r
765 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
766 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
767\r
4225a882 768 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
769 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
770 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
771 irsnd_busy = TRUE;\r
772 break;\r
773 }\r
774#endif\r
770a1a9d 775#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
776 case IRMP_KASEIKYO_PROTOCOL:\r
777 {\r
778 uint8_t xor;\r
0f700c8e 779 uint16_t genre2;\r
770a1a9d 780\r
781 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
782 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
0f700c8e 783 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 784\r
785 xor = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
786\r
787 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
788 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
789 irsnd_buffer[2] = xor << 4 | (command & 0x000F); // XXXXCCCC\r
0f700c8e 790 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
770a1a9d 791 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
792\r
793 xor = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
794\r
795 irsnd_buffer[5] = xor;\r
796 irsnd_busy = TRUE;\r
797 break;\r
798 }\r
799#endif\r
4225a882 800#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
801 case IRMP_RECS80_PROTOCOL:\r
802 {\r
803 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
804\r
4225a882 805 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
806 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
807 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
808 irsnd_busy = TRUE;\r
809 break;\r
810 }\r
811#endif\r
812#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
813 case IRMP_RECS80EXT_PROTOCOL:\r
814 {\r
815 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
816\r
4225a882 817 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
818 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
819 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
820 irsnd_busy = TRUE;\r
821 break;\r
822 }\r
823#endif\r
824#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
825 case IRMP_RC5_PROTOCOL:\r
826 {\r
827 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
828\r
4225a882 829 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
830 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
831 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
832 irsnd_busy = TRUE;\r
833 break;\r
834 }\r
835#endif\r
9547ee89 836#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
837 case IRMP_RC6_PROTOCOL:\r
838 {\r
839 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
840\r
841 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
842 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
843 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
844 irsnd_busy = TRUE;\r
845 break;\r
846 }\r
847#endif\r
848#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
849 case IRMP_RC6A_PROTOCOL:\r
850 {\r
851 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
852\r
853 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
854 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
855 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
856 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
857 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
858 irsnd_busy = TRUE;\r
859 break;\r
860 }\r
861#endif\r
4225a882 862#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
863 case IRMP_DENON_PROTOCOL:\r
864 {\r
d155e9ab 865 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
866 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
867 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAACCC (2nd frame)\r
868 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // CCCCCCC\r
4225a882 869 irsnd_busy = TRUE;\r
870 break;\r
871 }\r
872#endif\r
beda975f 873#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
874 case IRMP_THOMSON_PROTOCOL:\r
875 {\r
876 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
877\r
878 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
879 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
880 irsnd_busy = TRUE;\r
881 break;\r
882 }\r
883#endif\r
4225a882 884#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
885 case IRMP_NUBERT_PROTOCOL:\r
886 {\r
4225a882 887 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
888 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
889 irsnd_busy = TRUE;\r
890 break;\r
891 }\r
5481e9cd 892#endif\r
893#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
894 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
895 {\r
5481e9cd 896 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
897 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
898 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
899 irsnd_busy = TRUE;\r
900 break;\r
901 }\r
4225a882 902#endif\r
5b437ff6 903#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
904 case IRMP_GRUNDIG_PROTOCOL:\r
905 {\r
906 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r
907\r
d155e9ab 908 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
909 irsnd_buffer[1] = 0xC0; // 11\r
910 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
911 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
912\r
913 irsnd_busy = TRUE;\r
914 break;\r
915 }\r
916#endif\r
a48187fa 917#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
918 case IRMP_IR60_PROTOCOL:\r
919 {\r
920 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
921 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
922 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
923\r
924 irsnd_busy = TRUE;\r
925 break;\r
926 }\r
927#endif\r
d155e9ab 928#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
929 case IRMP_NOKIA_PROTOCOL:\r
930 {\r
931 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
932 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
933\r
934 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
935 irsnd_buffer[1] = 0xFF; // 11111111\r
936 irsnd_buffer[2] = 0x80; // 1\r
937 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
938 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
939 irsnd_buffer[5] = (address << 7); // A\r
5b437ff6 940\r
941 irsnd_busy = TRUE;\r
942 break;\r
943 }\r
944#endif\r
a7054daf 945#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
946 case IRMP_SIEMENS_PROTOCOL:\r
947 {\r
948 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r
949 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r
9405f84a 950 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
951\r
a7054daf 952 irsnd_busy = TRUE;\r
953 break;\r
954 }\r
b5ea7869 955#endif\r
48664931 956#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
957 case IRMP_FDC_PROTOCOL:\r
b5ea7869 958 {\r
48664931 959 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
960 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
b5ea7869 961\r
c7c9a4a1 962 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
963 irsnd_buffer[1] = 0; // 00000000\r
964 irsnd_buffer[2] = 0; // 0000RRRR\r
965 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
966 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
967 irsnd_busy = TRUE;\r
968 break;\r
969 }\r
970#endif\r
971#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
972 case IRMP_RCCAR_PROTOCOL:\r
973 {\r
974 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
975 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
976\r
977 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
978 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
979 \r
b5ea7869 980 irsnd_busy = TRUE;\r
981 break;\r
982 }\r
a7054daf 983#endif\r
c7a47e89 984#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
985 case IRMP_JVC_PROTOCOL:\r
986 {\r
987 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
988 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
989\r
990 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
991 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
992\r
993 irsnd_busy = TRUE;\r
994 break;\r
995 }\r
996#endif\r
9405f84a 997#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
998 case IRMP_NIKON_PROTOCOL:\r
999 {\r
1000 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1001 irsnd_busy = TRUE;\r
1002 break;\r
1003 }\r
f50e01e7 1004#endif\r
1005#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1006 case IRMP_LEGO_PROTOCOL:\r
1007 {\r
1008 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
1009\r
1010 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1011 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1012\r
1013 irsnd_protocol = IRMP_LEGO_PROTOCOL;\r
1014 irsnd_busy = TRUE;\r
1015 break;\r
1016 }\r
9405f84a 1017#endif\r
4225a882 1018 default:\r
1019 {\r
1020 break;\r
1021 }\r
1022 }\r
1023\r
1024 return irsnd_busy;\r
1025}\r
1026\r
beda975f 1027void\r
1028irsnd_stop (void)\r
1029{\r
acf7fb44 1030 irsnd_repeat = 0;\r
beda975f 1031}\r
1032\r
4225a882 1033/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1034 * ISR routine\r
1035 * @details ISR routine, called 10000 times per second\r
1036 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1037 */\r
1038uint8_t\r
1039irsnd_ISR (void)\r
1040{\r
a48187fa 1041 static uint8_t send_trailer = FALSE;\r
1042 static uint8_t current_bit = 0xFF;\r
1043 static uint8_t pulse_counter = 0;\r
1044 static IRSND_PAUSE_LEN pause_counter = 0;\r
1045 static uint8_t startbit_pulse_len = 0;\r
1046 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1047 static uint8_t pulse_1_len = 0;\r
1048 static uint8_t pause_1_len = 0;\r
1049 static uint8_t pulse_0_len = 0;\r
1050 static uint8_t pause_0_len = 0;\r
1051 static uint8_t has_stop_bit = 0;\r
1052 static uint8_t new_frame = TRUE;\r
1053 static uint8_t complete_data_len = 0;\r
1054 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1055 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1056 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1057 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1058 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1059 static uint8_t repeat_counter = 0; // repeat counter\r
1060 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1061 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1062#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1063 static uint8_t last_bit_value;\r
5481e9cd 1064#endif\r
a48187fa 1065 static uint8_t pulse_len = 0xFF;\r
1066 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1067\r
1068 if (irsnd_busy)\r
1069 {\r
1070 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1071 {\r
a7054daf 1072 if (auto_repetition_counter > 0)\r
4225a882 1073 {\r
a7054daf 1074 auto_repetition_pause_counter++;\r
4225a882 1075\r
a7054daf 1076 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
4225a882 1077 {\r
a7054daf 1078 auto_repetition_pause_counter = 0;\r
4225a882 1079\r
a48187fa 1080 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
4225a882 1081 {\r
1082 current_bit = 16;\r
1083 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1084 }\r
a48187fa 1085 else if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
5b437ff6 1086 {\r
1087 current_bit = 15;\r
1088 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1089 }\r
a48187fa 1090 else if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1091 {\r
1092 current_bit = 7;\r
1093 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1094 }\r
1095 else if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
d155e9ab 1096 {\r
a7054daf 1097 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
d155e9ab 1098 {\r
1099 current_bit = 23;\r
1100 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1101 }\r
a7054daf 1102 else // nokia stop frame\r
d155e9ab 1103 {\r
1104 current_bit = 0xFF;\r
1105 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1106 }\r
1107 }\r
4225a882 1108 }\r
1109 else\r
1110 {\r
1111#ifdef DEBUG\r
1112 if (irsnd_is_on)\r
1113 {\r
1114 putchar ('0');\r
1115 }\r
1116 else\r
1117 {\r
1118 putchar ('1');\r
1119 }\r
1120#endif\r
1121 return irsnd_busy;\r
1122 }\r
1123 }\r
beda975f 1124#if 0\r
a7054daf 1125 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1126#else\r
1127 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
1128#endif\r
a7054daf 1129 {\r
1130 packet_repeat_pause_counter++;\r
1131\r
1132#ifdef DEBUG\r
1133 if (irsnd_is_on)\r
1134 {\r
1135 putchar ('0');\r
1136 }\r
1137 else\r
1138 {\r
1139 putchar ('1');\r
1140 }\r
1141#endif\r
1142 return irsnd_busy;\r
1143 }\r
4225a882 1144 else\r
1145 {\r
9c86ff1a 1146 \r
0f700c8e 1147 if (send_trailer)\r
1148 {\r
1149 irsnd_busy = FALSE;\r
6ab7d63c 1150 send_trailer = FALSE;\r
0f700c8e 1151 return irsnd_busy;\r
1152 }\r
9c86ff1a 1153 \r
a7054daf 1154 n_repeat_frames = irsnd_repeat;\r
beda975f 1155\r
1156 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1157 {\r
1158 n_repeat_frames = 255;\r
1159 }\r
1160\r
a7054daf 1161 packet_repeat_pause_counter = 0;\r
1162 pulse_counter = 0;\r
1163 pause_counter = 0;\r
5481e9cd 1164\r
4225a882 1165 switch (irsnd_protocol)\r
1166 {\r
1167#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
1168 case IRMP_SIRCS_PROTOCOL:\r
1169 {\r
a7054daf 1170 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
53c11f07 1171 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1172 pulse_1_len = SIRCS_1_PULSE_LEN;\r
53c11f07 1173 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
a7054daf 1174 pulse_0_len = SIRCS_0_PULSE_LEN;\r
53c11f07 1175 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
a7054daf 1176 has_stop_bit = SIRCS_STOP_BIT;\r
9547ee89 1177 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
a7054daf 1178 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1179 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1180 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1181 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1182 break;\r
1183 }\r
1184#endif\r
1185#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
1186 case IRMP_NEC_PROTOCOL:\r
1187 {\r
a7054daf 1188 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1189\r
1190 if (repeat_counter > 0)\r
1191 {\r
53c11f07 1192 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1193 complete_data_len = 0;\r
1194 }\r
1195 else\r
1196 {\r
53c11f07 1197 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1198 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1199 }\r
1200\r
1201 pulse_1_len = NEC_PULSE_LEN;\r
53c11f07 1202 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
a7054daf 1203 pulse_0_len = NEC_PULSE_LEN;\r
53c11f07 1204 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
a7054daf 1205 has_stop_bit = NEC_STOP_BIT;\r
1206 n_auto_repetitions = 1; // 1 frame\r
1207 auto_repetition_pause_len = 0;\r
1208 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1209 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1210 break;\r
1211 }\r
1212#endif\r
7644ac04 1213#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1214 case IRMP_NEC16_PROTOCOL:\r
1215 {\r
1216 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1217 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1218 pulse_1_len = NEC_PULSE_LEN;\r
1219 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1220 pulse_0_len = NEC_PULSE_LEN;\r
1221 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1222 has_stop_bit = NEC_STOP_BIT;\r
1223 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1224 n_auto_repetitions = 1; // 1 frame\r
1225 auto_repetition_pause_len = 0;\r
1226 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1227 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1228 break;\r
1229 }\r
1230#endif\r
1231#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
1232 case IRMP_NEC42_PROTOCOL:\r
1233 {\r
1234 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1235 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1236 pulse_1_len = NEC_PULSE_LEN;\r
1237 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1238 pulse_0_len = NEC_PULSE_LEN;\r
1239 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1240 has_stop_bit = NEC_STOP_BIT;\r
1241 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1242 n_auto_repetitions = 1; // 1 frame\r
1243 auto_repetition_pause_len = 0;\r
1244 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1245 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1246 break;\r
1247 }\r
1248#endif\r
4225a882 1249#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1250 case IRMP_SAMSUNG_PROTOCOL:\r
1251 {\r
a7054daf 1252 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
53c11f07 1253 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1254 pulse_1_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1255 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
a7054daf 1256 pulse_0_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1257 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
a7054daf 1258 has_stop_bit = SAMSUNG_STOP_BIT;\r
1259 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1260 n_auto_repetitions = 1; // 1 frame\r
1261 auto_repetition_pause_len = 0;\r
1262 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1263 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1264 break;\r
1265 }\r
1266\r
1267 case IRMP_SAMSUNG32_PROTOCOL:\r
1268 {\r
a7054daf 1269 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
53c11f07 1270 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1271 pulse_1_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1272 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
a7054daf 1273 pulse_0_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1274 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
a7054daf 1275 has_stop_bit = SAMSUNG_STOP_BIT;\r
1276 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
1277 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r
1278 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1279 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1280 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1281 break;\r
1282 }\r
1283#endif\r
1284#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
1285 case IRMP_MATSUSHITA_PROTOCOL:\r
1286 {\r
a7054daf 1287 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
53c11f07 1288 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1289 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
53c11f07 1290 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
a7054daf 1291 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
53c11f07 1292 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
a7054daf 1293 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1294 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1295 n_auto_repetitions = 1; // 1 frame\r
1296 auto_repetition_pause_len = 0;\r
1297 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1298 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1299 break;\r
1300 }\r
1301#endif\r
770a1a9d 1302#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
1303 case IRMP_KASEIKYO_PROTOCOL:\r
1304 {\r
1305 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
53c11f07 1306 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
770a1a9d 1307 pulse_1_len = KASEIKYO_PULSE_LEN;\r
53c11f07 1308 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
770a1a9d 1309 pulse_0_len = KASEIKYO_PULSE_LEN;\r
53c11f07 1310 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
770a1a9d 1311 has_stop_bit = KASEIKYO_STOP_BIT;\r
1312 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1313 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1314 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1315 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1316 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1317 break;\r
1318 }\r
1319#endif\r
4225a882 1320#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
1321 case IRMP_RECS80_PROTOCOL:\r
1322 {\r
a7054daf 1323 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
53c11f07 1324 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1325 pulse_1_len = RECS80_PULSE_LEN;\r
53c11f07 1326 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
a7054daf 1327 pulse_0_len = RECS80_PULSE_LEN;\r
53c11f07 1328 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
a7054daf 1329 has_stop_bit = RECS80_STOP_BIT;\r
1330 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1331 n_auto_repetitions = 1; // 1 frame\r
1332 auto_repetition_pause_len = 0;\r
1333 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1334 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1335 break;\r
1336 }\r
1337#endif\r
1338#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
1339 case IRMP_RECS80EXT_PROTOCOL:\r
1340 {\r
a7054daf 1341 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
53c11f07 1342 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1343 pulse_1_len = RECS80EXT_PULSE_LEN;\r
53c11f07 1344 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
a7054daf 1345 pulse_0_len = RECS80EXT_PULSE_LEN;\r
53c11f07 1346 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
a7054daf 1347 has_stop_bit = RECS80EXT_STOP_BIT;\r
1348 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1349 n_auto_repetitions = 1; // 1 frame\r
1350 auto_repetition_pause_len = 0;\r
1351 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1352 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1353 break;\r
1354 }\r
1355#endif\r
1356#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
1357 case IRMP_RC5_PROTOCOL:\r
1358 {\r
a7054daf 1359 startbit_pulse_len = RC5_BIT_LEN;\r
1360 startbit_pause_len = RC5_BIT_LEN;\r
1361 pulse_len = RC5_BIT_LEN;\r
1362 pause_len = RC5_BIT_LEN;\r
1363 has_stop_bit = RC5_STOP_BIT;\r
1364 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1365 n_auto_repetitions = 1; // 1 frame\r
1366 auto_repetition_pause_len = 0;\r
1367 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1368 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1369 break;\r
1370 }\r
1371#endif\r
9547ee89 1372#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
1373 case IRMP_RC6_PROTOCOL:\r
1374 {\r
1375 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
53c11f07 1376 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
9547ee89 1377 pulse_len = RC6_BIT_LEN;\r
1378 pause_len = RC6_BIT_LEN;\r
1379 has_stop_bit = RC6_STOP_BIT;\r
1380 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1381 n_auto_repetitions = 1; // 1 frame\r
1382 auto_repetition_pause_len = 0;\r
1383 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1384 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1385 break;\r
1386 }\r
1387#endif\r
1388#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
1389 case IRMP_RC6A_PROTOCOL:\r
1390 {\r
1391 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
53c11f07 1392 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
9547ee89 1393 pulse_len = RC6_BIT_LEN;\r
1394 pause_len = RC6_BIT_LEN;\r
1395 has_stop_bit = RC6_STOP_BIT;\r
1396 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1397 n_auto_repetitions = 1; // 1 frame\r
1398 auto_repetition_pause_len = 0;\r
1399 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1400 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1401 break;\r
1402 }\r
1403#endif\r
4225a882 1404#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1405 case IRMP_DENON_PROTOCOL:\r
1406 {\r
a7054daf 1407 startbit_pulse_len = 0x00;\r
1408 startbit_pause_len = 0x00;\r
1409 pulse_1_len = DENON_PULSE_LEN;\r
53c11f07 1410 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
a7054daf 1411 pulse_0_len = DENON_PULSE_LEN;\r
53c11f07 1412 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
a7054daf 1413 has_stop_bit = DENON_STOP_BIT;\r
1414 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1415 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1416 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1417 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
779fbc81 1418 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
4225a882 1419 break;\r
1420 }\r
1421#endif\r
beda975f 1422#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
1423 case IRMP_THOMSON_PROTOCOL:\r
1424 {\r
1425 startbit_pulse_len = 0x00;\r
1426 startbit_pause_len = 0x00;\r
1427 pulse_1_len = THOMSON_PULSE_LEN;\r
1428 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1429 pulse_0_len = THOMSON_PULSE_LEN;\r
1430 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1431 has_stop_bit = THOMSON_STOP_BIT;\r
1432 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1433 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1434 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1435 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1436 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1437 break;\r
1438 }\r
1439#endif\r
4225a882 1440#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
1441 case IRMP_NUBERT_PROTOCOL:\r
1442 {\r
a7054daf 1443 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
53c11f07 1444 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1445 pulse_1_len = NUBERT_1_PULSE_LEN;\r
53c11f07 1446 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
a7054daf 1447 pulse_0_len = NUBERT_0_PULSE_LEN;\r
53c11f07 1448 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
a7054daf 1449 has_stop_bit = NUBERT_STOP_BIT;\r
1450 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1451 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1452 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1453 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1454 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1455 break;\r
1456 }\r
5481e9cd 1457#endif\r
1458#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1459 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1460 {\r
a7054daf 1461 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
53c11f07 1462 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
a7054daf 1463 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1464 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
a7054daf 1465 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1466 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
a7054daf 1467 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1468 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1469 n_auto_repetitions = 1; // 1 frame\r
1470 auto_repetition_pause_len = 0;\r
1471 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1472 last_bit_value = 0;\r
5481e9cd 1473 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1474 break;\r
1475 }\r
5b437ff6 1476#endif\r
1477#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
1478 case IRMP_GRUNDIG_PROTOCOL:\r
1479 {\r
89e8cafb 1480 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1481 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1482 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1483 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1484 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
a7054daf 1485 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1486 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1487 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
a48187fa 1488 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
d155e9ab 1489 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
a48187fa 1490 break;\r
1491 }\r
1492#endif\r
1493#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
1494 case IRMP_IR60_PROTOCOL:\r
1495 {\r
1496 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1497 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1498 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1499 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1500 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1501 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1502 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1503 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1504 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1505 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
d155e9ab 1506 break;\r
1507 }\r
1508#endif\r
1509#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1510 case IRMP_NOKIA_PROTOCOL:\r
1511 {\r
89e8cafb 1512 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1513 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1514 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1515 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1516 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
a7054daf 1517 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
f50e01e7 1518 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1519 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1520 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
d155e9ab 1521 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
5b437ff6 1522 break;\r
1523 }\r
a7054daf 1524#endif\r
1525#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
1526 case IRMP_SIEMENS_PROTOCOL:\r
1527 {\r
1528 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1529 startbit_pause_len = SIEMENS_BIT_LEN;\r
1530 pulse_len = SIEMENS_BIT_LEN;\r
1531 pause_len = SIEMENS_BIT_LEN;\r
02ccdb69 1532 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
a7054daf 1533 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r
1534 n_auto_repetitions = 1; // 1 frame\r
1535 auto_repetition_pause_len = 0;\r
1536 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1537 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1538 break;\r
1539 }\r
b5ea7869 1540#endif\r
48664931 1541#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
1542 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1543 {\r
48664931 1544 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
53c11f07 1545 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
48664931 1546 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
1547 pulse_1_len = FDC_PULSE_LEN;\r
53c11f07 1548 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
48664931 1549 pulse_0_len = FDC_PULSE_LEN;\r
53c11f07 1550 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
48664931 1551 has_stop_bit = FDC_STOP_BIT;\r
b5ea7869 1552 n_auto_repetitions = 1; // 1 frame\r
1553 auto_repetition_pause_len = 0;\r
48664931 1554 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
b5ea7869 1555 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1556 break;\r
1557 }\r
c7c9a4a1 1558#endif\r
1559#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1560 case IRMP_RCCAR_PROTOCOL:\r
1561 {\r
1562 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
53c11f07 1563 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
c7c9a4a1 1564 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
1565 pulse_1_len = RCCAR_PULSE_LEN;\r
53c11f07 1566 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
c7c9a4a1 1567 pulse_0_len = RCCAR_PULSE_LEN;\r
53c11f07 1568 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
c7c9a4a1 1569 has_stop_bit = RCCAR_STOP_BIT;\r
1570 n_auto_repetitions = 1; // 1 frame\r
1571 auto_repetition_pause_len = 0;\r
1572 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
1573 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1574 break;\r
1575 }\r
4225a882 1576#endif\r
c7a47e89 1577#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1578 case IRMP_JVC_PROTOCOL:\r
1579 {\r
1580 if (repeat_counter != 0) // skip start bit if repetition frame\r
1581 {\r
1582 current_bit = 0;\r
1583 }\r
1584\r
1585 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
53c11f07 1586 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
c7a47e89 1587 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
1588 pulse_1_len = JVC_PULSE_LEN;\r
53c11f07 1589 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
c7a47e89 1590 pulse_0_len = JVC_PULSE_LEN;\r
53c11f07 1591 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
c7a47e89 1592 has_stop_bit = JVC_STOP_BIT;\r
1593 n_auto_repetitions = 1; // 1 frame\r
1594 auto_repetition_pause_len = 0;\r
1595 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
1596 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
c7a47e89 1597 break;\r
1598 }\r
1599#endif\r
9405f84a 1600#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1601 case IRMP_NIKON_PROTOCOL:\r
1602 {\r
1603 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
53c11f07 1604 startbit_pause_len = 271 - 1; // NIKON_START_BIT_PAUSE_LEN;\r
9405f84a 1605 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
1606 pulse_1_len = NIKON_PULSE_LEN;\r
53c11f07 1607 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
9405f84a 1608 pulse_0_len = NIKON_PULSE_LEN;\r
53c11f07 1609 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
9405f84a 1610 has_stop_bit = NIKON_STOP_BIT;\r
1611 n_auto_repetitions = 1; // 1 frame\r
1612 auto_repetition_pause_len = 0;\r
1613 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
1614 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
9405f84a 1615 break;\r
1616 }\r
1617#endif\r
f50e01e7 1618#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1619 case IRMP_LEGO_PROTOCOL:\r
1620 {\r
1621 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
1622 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
1623 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
1624 pulse_1_len = LEGO_PULSE_LEN;\r
1625 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
1626 pulse_0_len = LEGO_PULSE_LEN;\r
1627 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
1628 has_stop_bit = LEGO_STOP_BIT;\r
1629 n_auto_repetitions = 1; // 1 frame\r
1630 auto_repetition_pause_len = 0;\r
1631 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
1632 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1633 break;\r
1634 }\r
1635#endif\r
4225a882 1636 default:\r
1637 {\r
1638 irsnd_busy = FALSE;\r
1639 break;\r
1640 }\r
1641 }\r
1642 }\r
1643 }\r
1644\r
1645 if (irsnd_busy)\r
1646 {\r
1647 new_frame = FALSE;\r
a7054daf 1648\r
4225a882 1649 switch (irsnd_protocol)\r
1650 {\r
1651#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
1652 case IRMP_SIRCS_PROTOCOL:\r
1653#endif\r
1654#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
1655 case IRMP_NEC_PROTOCOL:\r
1656#endif\r
7644ac04 1657#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1658 case IRMP_NEC16_PROTOCOL:\r
1659#endif\r
1660#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
1661 case IRMP_NEC42_PROTOCOL:\r
1662#endif\r
4225a882 1663#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1664 case IRMP_SAMSUNG_PROTOCOL:\r
1665 case IRMP_SAMSUNG32_PROTOCOL:\r
1666#endif\r
1667#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
1668 case IRMP_MATSUSHITA_PROTOCOL:\r
1669#endif\r
770a1a9d 1670#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
1671 case IRMP_KASEIKYO_PROTOCOL:\r
1672#endif\r
4225a882 1673#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
1674 case IRMP_RECS80_PROTOCOL:\r
1675#endif\r
1676#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
1677 case IRMP_RECS80EXT_PROTOCOL:\r
1678#endif\r
1679#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1680 case IRMP_DENON_PROTOCOL:\r
1681#endif\r
beda975f 1682#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
1683 case IRMP_THOMSON_PROTOCOL:\r
1684#endif\r
4225a882 1685#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
1686 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 1687#endif\r
1688#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1689 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 1690#endif\r
c7c9a4a1 1691#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
48664931 1692 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1693#endif\r
c7c9a4a1 1694#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1695 case IRMP_RCCAR_PROTOCOL:\r
1696#endif\r
c7a47e89 1697#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1698 case IRMP_JVC_PROTOCOL:\r
1699#endif\r
9405f84a 1700#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1701 case IRMP_NIKON_PROTOCOL:\r
1702#endif\r
f50e01e7 1703#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1704 case IRMP_LEGO_PROTOCOL:\r
1705#endif\r
a7054daf 1706\r
1707\r
7644ac04 1708#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
1709 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 1710 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
c7a47e89 1711 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
beda975f 1712 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r
4225a882 1713 {\r
5481e9cd 1714 if (pulse_counter == 0)\r
4225a882 1715 {\r
5481e9cd 1716 if (current_bit == 0xFF) // send start bit\r
1717 {\r
1718 pulse_len = startbit_pulse_len;\r
1719 pause_len = startbit_pause_len;\r
1720 }\r
1721 else if (current_bit < complete_data_len) // send n'th bit\r
4225a882 1722 {\r
5481e9cd 1723#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1724 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
4225a882 1725 {\r
5481e9cd 1726 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
1727 {\r
1728 pulse_len = SAMSUNG_PULSE_LEN;\r
1729 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
53c11f07 1730 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
5481e9cd 1731 }\r
1732 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
1733 {\r
1734 pulse_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1735 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
5481e9cd 1736 }\r
1737 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
1738 {\r
1739 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1740\r
1741 pulse_len = SAMSUNG_PULSE_LEN;\r
1742 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
53c11f07 1743 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
5481e9cd 1744 }\r
4225a882 1745 }\r
5481e9cd 1746 else\r
1747#endif\r
1748\r
7644ac04 1749#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1750 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
1751 {\r
1752 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
1753 {\r
1754 pulse_len = NEC_PULSE_LEN;\r
1755 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1756 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1757 }\r
1758 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
1759 {\r
1760 pulse_len = NEC_PULSE_LEN;\r
1761 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1762 }\r
1763 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
1764 {\r
1765 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1766\r
1767 pulse_len = NEC_PULSE_LEN;\r
1768 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1769 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1770 }\r
1771 }\r
1772 else\r
1773#endif\r
1774\r
5481e9cd 1775#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1776 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
4225a882 1777 {\r
5481e9cd 1778 if (current_bit == 0) // send 2nd start bit\r
1779 {\r
1780 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
53c11f07 1781 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
5481e9cd 1782 }\r
1783 else if (current_bit == 1) // send 3rd start bit\r
1784 {\r
1785 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
53c11f07 1786 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
5481e9cd 1787 }\r
1788 else if (current_bit == 2) // send 4th start bit\r
1789 {\r
1790 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
53c11f07 1791 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
5481e9cd 1792 }\r
1793 else if (current_bit == 19) // send trailer bit\r
1794 {\r
1795 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1796 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
5481e9cd 1797 }\r
1798 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
1799 {\r
1800 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r
1801 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
1802\r
1803 if (cur_bit_value == last_bit_value)\r
1804 {\r
53c11f07 1805 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
5481e9cd 1806 }\r
1807 else\r
1808 {\r
53c11f07 1809 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
5481e9cd 1810 last_bit_value = cur_bit_value;\r
1811 }\r
1812 }\r
4225a882 1813 }\r
5481e9cd 1814 else\r
1815#endif\r
1816 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r
4225a882 1817 {\r
5481e9cd 1818 pulse_len = pulse_1_len;\r
1819 pause_len = pause_1_len;\r
1820 }\r
1821 else\r
1822 {\r
1823 pulse_len = pulse_0_len;\r
1824 pause_len = pause_0_len;\r
4225a882 1825 }\r
1826 }\r
5481e9cd 1827 else if (has_stop_bit) // send stop bit\r
4225a882 1828 {\r
1829 pulse_len = pulse_0_len;\r
4225a882 1830\r
a7054daf 1831 if (auto_repetition_counter < n_auto_repetitions)\r
5481e9cd 1832 {\r
1833 pause_len = pause_0_len;\r
1834 }\r
1835 else\r
1836 {\r
1837 pause_len = 255; // last frame: pause of 255\r
1838 }\r
4225a882 1839 }\r
1840 }\r
1841\r
1842 if (pulse_counter < pulse_len)\r
1843 {\r
1844 if (pulse_counter == 0)\r
1845 {\r
1846 irsnd_on ();\r
1847 }\r
1848 pulse_counter++;\r
1849 }\r
1850 else if (pause_counter < pause_len)\r
1851 {\r
1852 if (pause_counter == 0)\r
1853 {\r
1854 irsnd_off ();\r
1855 }\r
1856 pause_counter++;\r
1857 }\r
1858 else\r
1859 {\r
1860 current_bit++;\r
1861\r
1862 if (current_bit >= complete_data_len + has_stop_bit)\r
1863 {\r
1864 current_bit = 0xFF;\r
a7054daf 1865 auto_repetition_counter++;\r
4225a882 1866\r
a7054daf 1867 if (auto_repetition_counter == n_auto_repetitions)\r
4225a882 1868 {\r
1869 irsnd_busy = FALSE;\r
a7054daf 1870 auto_repetition_counter = 0;\r
4225a882 1871 }\r
1872 new_frame = TRUE;\r
1873 }\r
1874\r
1875 pulse_counter = 0;\r
1876 pause_counter = 0;\r
1877 }\r
1878 break;\r
1879 }\r
a7054daf 1880#endif\r
1881\r
4225a882 1882#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
1883 case IRMP_RC5_PROTOCOL:\r
a7054daf 1884#endif\r
9547ee89 1885#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
1886 case IRMP_RC6_PROTOCOL:\r
1887#endif\r
1888#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
1889 case IRMP_RC6A_PROTOCOL:\r
1890#endif\r
a7054daf 1891#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
1892 case IRMP_SIEMENS_PROTOCOL:\r
1893#endif\r
1894#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
1895 case IRMP_GRUNDIG_PROTOCOL:\r
1896#endif\r
a48187fa 1897#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
1898 case IRMP_IR60_PROTOCOL:\r
1899#endif\r
a7054daf 1900#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1901 case IRMP_NOKIA_PROTOCOL:\r
1902#endif\r
4225a882 1903\r
9547ee89 1904#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
a48187fa 1905 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
a7054daf 1906 {\r
1907 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
4225a882 1908 {\r
a7054daf 1909 current_bit++;\r
4225a882 1910\r
a7054daf 1911 if (current_bit >= complete_data_len)\r
4225a882 1912 {\r
a7054daf 1913 current_bit = 0xFF;\r
1914\r
a48187fa 1915#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1916 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
4225a882 1917 {\r
a7054daf 1918 auto_repetition_counter++;\r
1919\r
1920 if (repeat_counter > 0)\r
1921 { // set 117 msec pause time\r
89e8cafb 1922 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
a7054daf 1923 }\r
1924\r
1925 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
1926 {\r
1927 n_auto_repetitions++; // increment number of auto repetitions\r
1928 repeat_counter++;\r
1929 }\r
1930 else if (auto_repetition_counter == n_auto_repetitions)\r
1931 {\r
1932 irsnd_busy = FALSE;\r
1933 auto_repetition_counter = 0;\r
1934 }\r
4225a882 1935 }\r
a7054daf 1936 else\r
1937#endif\r
4225a882 1938 {\r
a7054daf 1939 irsnd_busy = FALSE;\r
4225a882 1940 }\r
4225a882 1941\r
4225a882 1942 new_frame = TRUE;\r
1943 irsnd_off ();\r
1944 }\r
1945\r
1946 pulse_counter = 0;\r
1947 pause_counter = 0;\r
1948 }\r
5b437ff6 1949\r
a7054daf 1950 if (! new_frame)\r
5b437ff6 1951 {\r
a7054daf 1952 uint8_t first_pulse;\r
5b437ff6 1953\r
a48187fa 1954#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1955 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
5b437ff6 1956 {\r
a7054daf 1957 if (current_bit == 0xFF || // start bit of start-frame\r
1958 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
a48187fa 1959 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
a7054daf 1960 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
5b437ff6 1961 {\r
a7054daf 1962 pulse_len = startbit_pulse_len;\r
1963 pause_len = startbit_pause_len;\r
1964 first_pulse = TRUE;\r
5b437ff6 1965 }\r
a7054daf 1966 else // send n'th bit\r
5b437ff6 1967 {\r
89e8cafb 1968 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1969 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
a7054daf 1970 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
5b437ff6 1971 }\r
5b437ff6 1972 }\r
9547ee89 1973 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
1974 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r
a7054daf 1975#endif\r
5b437ff6 1976 {\r
a7054daf 1977 if (current_bit == 0xFF) // 1 start bit\r
1978 {\r
9547ee89 1979#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
1980 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
1981 {\r
1982 pulse_len = startbit_pulse_len;\r
1983 pause_len = startbit_pause_len;\r
1984 }\r
1985#endif\r
a7054daf 1986 first_pulse = TRUE;\r
1987 }\r
1988 else // send n'th bit\r
1989 {\r
9547ee89 1990#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
1991 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
1992 {\r
1993 pulse_len = RC6_BIT_LEN;\r
1994 pause_len = RC6_BIT_LEN;\r
1995\r
1996 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
1997 {\r
1998 if (current_bit == 4) // toggle bit (double len)\r
1999 {\r
2000 pulse_len = 2 * RC6_BIT_LEN;\r
2001 pause_len = 2 * RC6_BIT_LEN;\r
2002 }\r
2003 }\r
2004 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2005 {\r
2006 if (current_bit == 4) // toggle bit (double len)\r
2007 {\r
2008 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2009 pause_len = 2 * RC6_BIT_LEN;\r
2010 }\r
2011 else if (current_bit == 5) // toggle bit (double len)\r
2012 {\r
2013 pause_len = 2 * RC6_BIT_LEN;\r
2014 }\r
2015 }\r
2016 }\r
2017#endif\r
a7054daf 2018 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2019 }\r
5b437ff6 2020\r
a7054daf 2021 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2022 {\r
2023 first_pulse = first_pulse ? FALSE : TRUE;\r
2024 }\r
2025 }\r
5b437ff6 2026\r
2027 if (first_pulse)\r
2028 {\r
a7054daf 2029 if (pulse_counter < pulse_len)\r
5b437ff6 2030 {\r
2031 if (pulse_counter == 0)\r
2032 {\r
2033 irsnd_on ();\r
2034 }\r
2035 pulse_counter++;\r
2036 }\r
a7054daf 2037 else // if (pause_counter < pause_len)\r
5b437ff6 2038 {\r
2039 if (pause_counter == 0)\r
2040 {\r
2041 irsnd_off ();\r
2042 }\r
2043 pause_counter++;\r
2044 }\r
5b437ff6 2045 }\r
2046 else\r
2047 {\r
a7054daf 2048 if (pause_counter < pause_len)\r
5b437ff6 2049 {\r
2050 if (pause_counter == 0)\r
2051 {\r
2052 irsnd_off ();\r
2053 }\r
2054 pause_counter++;\r
2055 }\r
a7054daf 2056 else // if (pulse_counter < pulse_len)\r
5b437ff6 2057 {\r
2058 if (pulse_counter == 0)\r
2059 {\r
2060 irsnd_on ();\r
2061 }\r
2062 pulse_counter++;\r
2063 }\r
5b437ff6 2064 }\r
2065 }\r
2066 break;\r
2067 }\r
9547ee89 2068#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
a48187fa 2069 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2070\r
4225a882 2071 default:\r
2072 {\r
2073 irsnd_busy = FALSE;\r
2074 break;\r
2075 }\r
2076 }\r
2077 }\r
a7054daf 2078\r
2079 if (! irsnd_busy)\r
2080 {\r
2081 if (repeat_counter < n_repeat_frames)\r
2082 {\r
c7c9a4a1 2083#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
2084 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2085 {\r
2086 irsnd_buffer[2] |= 0x0F;\r
2087 }\r
2088#endif\r
a7054daf 2089 repeat_counter++;\r
2090 irsnd_busy = TRUE;\r
2091 }\r
2092 else\r
2093 {\r
9c86ff1a 2094 irsnd_busy = TRUE; //Rainer\r
0f700c8e 2095 send_trailer = TRUE;\r
a7054daf 2096 n_repeat_frames = 0;\r
2097 repeat_counter = 0;\r
2098 }\r
2099 }\r
4225a882 2100 }\r
2101\r
2102#ifdef DEBUG\r
2103 if (irsnd_is_on)\r
2104 {\r
2105 putchar ('0');\r
2106 }\r
2107 else\r
2108 {\r
2109 putchar ('1');\r
2110 }\r
2111#endif\r
2112\r
2113 return irsnd_busy;\r
2114}\r
2115\r
2116#ifdef DEBUG\r
2117\r
2118// main function - for unix/linux + windows only!\r
2119// AVR: see main.c!\r
2120// Compile it under linux with:\r
2121// cc irsnd.c -o irsnd\r
2122//\r
2123// usage: ./irsnd protocol hex-address hex-command >filename\r
2124\r
2125int\r
2126main (int argc, char ** argv)\r
2127{\r
4225a882 2128 int protocol;\r
2129 int address;\r
2130 int command;\r
4225a882 2131 IRMP_DATA irmp_data;\r
2132\r
a7054daf 2133 if (argc != 4 && argc != 5)\r
4225a882 2134 {\r
a7054daf 2135 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
4225a882 2136 return 1;\r
2137 }\r
2138\r
2139 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
2140 sscanf (argv[2], "%x", &address) == 1 &&\r
2141 sscanf (argv[3], "%x", &command) == 1)\r
2142 {\r
2143 irmp_data.protocol = protocol;\r
2144 irmp_data.address = address;\r
2145 irmp_data.command = command;\r
2146\r
a7054daf 2147 if (argc == 5)\r
2148 {\r
2149 irmp_data.flags = atoi (argv[4]);\r
2150 }\r
2151 else\r
2152 {\r
2153 irmp_data.flags = 0;\r
2154 }\r
2155\r
4225a882 2156 irsnd_init ();\r
2157\r
879b06c2 2158 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2159\r
a7054daf 2160 while (irsnd_busy)\r
2161 {\r
2162 irsnd_ISR ();\r
2163 }\r
beda975f 2164\r
4225a882 2165 putchar ('\n');\r
2166 }\r
2167 else\r
2168 {\r
2169 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2170 return 1;\r
2171 }\r
2172 return 0;\r
2173}\r
2174\r
2175#endif // DEBUG\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)