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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * @file irsnd.c\r | |
3 | *\r | |
f50e01e7 | 4 | * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r |
4225a882 | 5 | *\r |
7644ac04 | 6 | * Supported mikrocontrollers:\r |
7 | *\r | |
476267f4 | 8 | * ATtiny45, ATtiny85\r |
9 | * ATtiny84\r | |
7644ac04 | 10 | * ATmega8, ATmega16, ATmega32\r |
11 | * ATmega162\r | |
12 | * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r | |
13 | * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r | |
14 | *\r | |
cea96148 | 15 | * $Id: irsnd.c,v 1.47 2012/02/16 12:37:30 fm Exp $\r |
5481e9cd | 16 | *\r |
4225a882 | 17 | * This program is free software; you can redistribute it and/or modify\r |
18 | * it under the terms of the GNU General Public License as published by\r | |
19 | * the Free Software Foundation; either version 2 of the License, or\r | |
20 | * (at your option) any later version.\r | |
21 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
22 | */\r | |
23 | \r | |
9c86ff1a | 24 | #if defined(__18CXX) \r |
25 | #define PIC_C18 // Microchip C18\r | |
26 | #include <p18cxxx.h> // basic P18 lib\r | |
27 | #include "timers.h" // timer lib\r | |
28 | #include "pwm.h" // pwm lib\r | |
29 | #endif \r | |
30 | \r | |
4225a882 | 31 | #ifdef unix // test/debug on linux/unix\r |
32 | #include <stdio.h>\r | |
33 | #include <unistd.h>\r | |
34 | #include <stdlib.h>\r | |
35 | #include <string.h>\r | |
36 | #include <inttypes.h>\r | |
37 | \r | |
38 | #define DEBUG\r | |
39 | #define F_CPU 8000000L\r | |
40 | \r | |
41 | #else // not unix:\r | |
42 | \r | |
43 | #ifdef WIN32 // test/debug on windows\r | |
44 | #include <stdio.h>\r | |
c7a47e89 | 45 | #include <stdlib.h>\r |
46 | #include <string.h>\r | |
47 | \r | |
4225a882 | 48 | #define F_CPU 8000000L\r |
31c1f035 | 49 | typedef unsigned char uint8_t;\r |
50 | typedef unsigned short uint16_t;\r | |
4225a882 | 51 | #define DEBUG\r |
52 | \r | |
53 | #else\r | |
54 | \r | |
55 | #ifdef CODEVISION\r | |
9c86ff1a | 56 | #define COM2A0 6\r |
57 | #define WGM21 1\r | |
58 | #define CS20 0\r | |
59 | #elif defined(PIC_C18)\r | |
60 | //nothing to do here\r | |
4225a882 | 61 | #else\r |
9c86ff1a | 62 | #include <inttypes.h>\r |
63 | #include <avr/io.h>\r | |
64 | #include <util/delay.h>\r | |
65 | #include <avr/pgmspace.h>\r | |
4225a882 | 66 | #endif // CODEVISION\r |
67 | \r | |
68 | #endif // WIN32\r | |
69 | #endif // unix\r | |
70 | \r | |
71 | #include "irmp.h"\r | |
46dd89b7 | 72 | #include "irsndconfig.h"\r |
4225a882 | 73 | #include "irsnd.h"\r |
74 | \r | |
1f54e86c | 75 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
76 | * ATtiny pin definition of OC0A / OC0B\r | |
77 | * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r | |
78 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
79 | */\r | |
476267f4 | 80 | #if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7\r |
7644ac04 | 81 | #if IRSND_OCx == IRSND_OC0A // OC0A\r |
82 | #define IRSND_PORT PORTB // port B\r | |
83 | #define IRSND_DDR DDRB // ddr B\r | |
84 | #define IRSND_BIT 2 // OC0A\r | |
85 | #elif IRSND_OCx == IRSND_OC0B // OC0B\r | |
86 | #define IRSND_PORT PORTA // port A\r | |
87 | #define IRSND_DDR DDRA // ddr A\r | |
88 | #define IRSND_BIT 7 // OC0B\r | |
89 | #else\r | |
90 | #error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r | |
91 | #endif // IRSND_OCx\r | |
92 | \r | |
476267f4 | 93 | #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r |
1f54e86c | 94 | #if IRSND_OCx == IRSND_OC0A // OC0A\r |
f50e01e7 | 95 | #define IRSND_PORT PORTB // port B\r |
96 | #define IRSND_DDR DDRB // ddr B\r | |
1f54e86c | 97 | #define IRSND_BIT 0 // OC0A\r |
98 | #elif IRSND_OCx == IRSND_OC0B // OC0B\r | |
99 | #define IRSND_PORT PORTB // port B\r | |
100 | #define IRSND_DDR DDRB // ddr B\r | |
101 | #define IRSND_BIT 1 // OC0B\r | |
102 | #else\r | |
103 | #error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r | |
104 | #endif // IRSND_OCx\r | |
105 | \r | |
106 | #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r | |
107 | #if IRSND_OCx == IRSND_OC2 // OC0A\r | |
108 | #define IRSND_PORT PORTB // port B\r | |
109 | #define IRSND_DDR DDRB // ddr B\r | |
110 | #define IRSND_BIT 3 // OC0A\r | |
111 | #else\r | |
112 | #error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r | |
113 | #endif // IRSND_OCx\r | |
114 | \r | |
f50e01e7 | 115 | \r |
116 | #elif defined (__AVR_ATmega16__) \\r | |
117 | || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r | |
1f54e86c | 118 | #if IRSND_OCx == IRSND_OC2 // OC2\r |
f50e01e7 | 119 | #define IRSND_PORT PORTD // port D\r |
120 | #define IRSND_DDR DDRD // ddr D\r | |
121 | #define IRSND_BIT 7 // OC2\r | |
1f54e86c | 122 | #else\r |
123 | #error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r | |
124 | #endif // IRSND_OCx\r | |
f50e01e7 | 125 | \r |
1f54e86c | 126 | #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r |
127 | #if IRSND_OCx == IRSND_OC2 // OC2\r | |
f50e01e7 | 128 | #define IRSND_PORT PORTB // port B\r |
129 | #define IRSND_DDR DDRB // ddr B\r | |
130 | #define IRSND_BIT 1 // OC2\r | |
9c86ff1a | 131 | \r |
1f54e86c | 132 | #elif IRSND_OCx == IRSND_OC0 // OC0\r |
133 | #define IRSND_PORT PORTB // port B\r | |
134 | #define IRSND_DDR DDRB // ddr B\r | |
135 | #define IRSND_BIT 0 // OC0\r | |
136 | #else\r | |
137 | #error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r | |
138 | #endif // IRSND_OCx\r | |
f50e01e7 | 139 | \r |
140 | #elif defined (__AVR_ATmega164__) \\r | |
141 | || defined (__AVR_ATmega324__) \\r | |
142 | || defined (__AVR_ATmega644__) \\r | |
143 | || defined (__AVR_ATmega644P__) \\r | |
0f700c8e | 144 | || defined (__AVR_ATmega1284__) \\r |
145 | || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r | |
1f54e86c | 146 | #if IRSND_OCx == IRSND_OC2A // OC2A\r |
f50e01e7 | 147 | #define IRSND_PORT PORTD // port D\r |
148 | #define IRSND_DDR DDRD // ddr D\r | |
149 | #define IRSND_BIT 7 // OC2A\r | |
1f54e86c | 150 | #elif IRSND_OCx == IRSND_OC2B // OC2B\r |
f50e01e7 | 151 | #define IRSND_PORT PORTD // port D\r |
152 | #define IRSND_DDR DDRD // ddr D\r | |
153 | #define IRSND_BIT 6 // OC2B\r | |
1f54e86c | 154 | #elif IRSND_OCx == IRSND_OC0A // OC0A\r |
155 | #define IRSND_PORT PORTB // port B\r | |
156 | #define IRSND_DDR DDRB // ddr B\r | |
157 | #define IRSND_BIT 3 // OC0A\r | |
158 | #elif IRSND_OCx == IRSND_OC0B // OC0B\r | |
159 | #define IRSND_PORT PORTB // port B\r | |
160 | #define IRSND_DDR DDRB // ddr B\r | |
161 | #define IRSND_BIT 4 // OC0B\r | |
f50e01e7 | 162 | #else\r |
1f54e86c | 163 | #error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r |
164 | #endif // IRSND_OCx\r | |
f50e01e7 | 165 | \r |
166 | #elif defined (__AVR_ATmega48__) \\r | |
167 | || defined (__AVR_ATmega88__) \\r | |
7644ac04 | 168 | || defined (__AVR_ATmega88P__) \\r |
f50e01e7 | 169 | || defined (__AVR_ATmega168__) \\r |
1f54e86c | 170 | || defined (__AVR_ATmega168P__) \\r |
7644ac04 | 171 | || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r |
1f54e86c | 172 | #if IRSND_OCx == IRSND_OC2A // OC2A\r |
f50e01e7 | 173 | #define IRSND_PORT PORTB // port B\r |
174 | #define IRSND_DDR DDRB // ddr B\r | |
175 | #define IRSND_BIT 3 // OC2A\r | |
1f54e86c | 176 | #elif IRSND_OCx == IRSND_OC2B // OC2B\r |
f50e01e7 | 177 | #define IRSND_PORT PORTD // port D\r |
178 | #define IRSND_DDR DDRD // ddr D\r | |
179 | #define IRSND_BIT 3 // OC2B\r | |
1f54e86c | 180 | #elif IRSND_OCx == IRSND_OC0A // OC0A\r |
181 | #define IRSND_PORT PORTB // port B\r | |
182 | #define IRSND_DDR DDRB // ddr B\r | |
183 | #define IRSND_BIT 6 // OC0A\r | |
184 | #elif IRSND_OCx == IRSND_OC0B // OC0B\r | |
185 | #define IRSND_PORT PORTD // port D\r | |
186 | #define IRSND_DDR DDRD // ddr D\r | |
187 | #define IRSND_BIT 5 // OC0B\r | |
f50e01e7 | 188 | #else\r |
1f54e86c | 189 | #error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r |
190 | #endif // IRSND_OCx\r | |
0f700c8e | 191 | #elif defined (__AVR_ATmega8515__) \r |
192 | #if IRSND_OCx == IRSND_OC0 \r | |
193 | #define IRSND_PORT PORTB // port B\r | |
194 | #define IRSND_DDR DDRB // ddr B\r | |
195 | #define IRSND_BIT 0 // OC0\r | |
196 | #elif IRSND_OCx == IRSND_OC1A \r | |
197 | #define IRSND_PORT PORTD // port D\r | |
198 | #define IRSND_DDR DDRD // ddr D\r | |
199 | #define IRSND_BIT 5 // OC1A\r | |
200 | #elif IRSND_OCx == IRSND_OC1B \r | |
201 | #define IRSND_PORT PORTE // port E\r | |
202 | #define IRSND_DDR DDRE // ddr E\r | |
203 | #define IRSND_BIT 2 // OC1E\r | |
204 | #error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r | |
205 | #endif // IRSND_OCx\r | |
f50e01e7 | 206 | \r |
9c86ff1a | 207 | #elif defined (PIC_C18) //Microchip C18 compiler\r |
208 | //Nothing here to do here -> See irsndconfig.h\r | |
209 | \r | |
f50e01e7 | 210 | #else\r |
211 | #if !defined (unix) && !defined (WIN32)\r | |
1f54e86c | 212 | #error mikrocontroller not defined, please fill in definitions here.\r |
f50e01e7 | 213 | #endif // unix, WIN32\r |
214 | #endif // __AVR...\r | |
215 | \r | |
9405f84a | 216 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
9c86ff1a | 217 | typedef uint16_t IRSND_PAUSE_LEN;\r |
9405f84a | 218 | #else\r |
9c86ff1a | 219 | typedef uint8_t IRSND_PAUSE_LEN;\r |
9405f84a | 220 | #endif\r |
221 | \r | |
f50e01e7 | 222 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
223 | * IR timings\r | |
224 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
225 | */\r | |
4225a882 | 226 | #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r |
227 | #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r | |
228 | #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r | |
229 | #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r | |
230 | #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r | |
a7054daf | 231 | #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
232 | #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
4225a882 | 233 | \r |
234 | #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r | |
235 | #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r | |
a7054daf | 236 | #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r |
4225a882 | 237 | #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r |
238 | #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r | |
239 | #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 240 | #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 241 | \r |
242 | #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r | |
243 | #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r | |
244 | #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r | |
245 | #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r | |
246 | #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 247 | #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 248 | \r |
a7054daf | 249 | #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
250 | #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
5b437ff6 | 251 | \r |
4225a882 | 252 | #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r |
253 | #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r | |
254 | #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r | |
255 | #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r | |
256 | #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 257 | #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 258 | \r |
770a1a9d | 259 | #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r |
260 | #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r | |
261 | #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r | |
262 | #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r | |
263 | #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r | |
264 | #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r | |
265 | #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
266 | \r | |
4225a882 | 267 | #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r |
268 | #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r | |
269 | #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r | |
270 | #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r | |
271 | #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 272 | #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 273 | \r |
274 | #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r | |
275 | #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r | |
a7054daf | 276 | #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 277 | \r |
278 | #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r | |
279 | #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r | |
280 | #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r | |
281 | #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r | |
a7054daf | 282 | #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 283 | \r |
284 | #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r | |
285 | #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r | |
286 | #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 287 | #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
288 | #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
4225a882 | 289 | \r |
beda975f | 290 | #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r |
291 | #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r | |
292 | #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r | |
293 | #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r | |
294 | #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
295 | \r | |
4225a882 | 296 | #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r |
297 | #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r | |
298 | #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r | |
299 | #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r | |
300 | #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 301 | #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 302 | \r |
303 | #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r | |
304 | #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r | |
305 | #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r | |
306 | #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r | |
307 | #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r | |
308 | #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 309 | #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
310 | #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
4225a882 | 311 | \r |
5481e9cd | 312 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r |
313 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r | |
314 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r | |
315 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r | |
316 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r | |
317 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r | |
318 | #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r | |
319 | #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r | |
320 | #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r | |
321 | #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r | |
322 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r | |
a7054daf | 323 | #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
5481e9cd | 324 | \r |
9c86ff1a | 325 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r |
326 | #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r | |
a7054daf | 327 | #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
328 | #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r | |
89e8cafb | 329 | #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
a7054daf | 330 | \r |
02ccdb69 | 331 | #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r |
332 | #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r | |
333 | #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
5b437ff6 | 334 | \r |
9c86ff1a | 335 | \r |
336 | #ifdef PIC_C18\r | |
337 | #define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r | |
338 | #define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r | |
339 | #define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r | |
340 | #define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r | |
341 | #define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r | |
342 | #define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r | |
343 | #else // AVR\r | |
4225a882 | 344 | #define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2) - 1)\r |
345 | #define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2) - 1)\r | |
346 | #define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2) - 1)\r | |
347 | #define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2) - 1)\r | |
348 | #define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2) - 1)\r | |
5481e9cd | 349 | #define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2) - 1)\r |
9c86ff1a | 350 | #endif\r |
4225a882 | 351 | \r |
48664931 | 352 | #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r |
353 | #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r | |
354 | #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r | |
355 | #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r | |
356 | #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r | |
357 | #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
b5ea7869 | 358 | \r |
c7c9a4a1 | 359 | #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r |
360 | #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r | |
361 | #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r | |
362 | #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r | |
363 | #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r | |
364 | #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
365 | \r | |
c7a47e89 | 366 | #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r |
367 | #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r | |
368 | #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r | |
369 | #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r | |
370 | #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r | |
371 | #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r | |
372 | #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
373 | \r | |
9405f84a | 374 | #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r |
375 | #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r | |
376 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r | |
377 | #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r | |
378 | #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r | |
379 | #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r | |
f50e01e7 | 380 | #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
381 | \r | |
382 | #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r | |
383 | #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r | |
384 | #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r | |
385 | #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r | |
386 | #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r | |
387 | #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r | |
388 | #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
9405f84a | 389 | \r |
9c86ff1a | 390 | static volatile uint8_t irsnd_busy = 0;\r |
391 | static volatile uint8_t irsnd_protocol = 0;\r | |
392 | static volatile uint8_t irsnd_buffer[6] = {0};\r | |
393 | static volatile uint8_t irsnd_repeat = 0;\r | |
4225a882 | 394 | static volatile uint8_t irsnd_is_on = FALSE;\r |
395 | \r | |
f50e01e7 | 396 | #if IRSND_USE_CALLBACK == 1\r |
397 | static void (*irsnd_callback_ptr) (uint8_t);\r | |
398 | #endif // IRSND_USE_CALLBACK == 1\r | |
399 | \r | |
4225a882 | 400 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
401 | * Switch PWM on\r | |
402 | * @details Switches PWM on with a narrow spike on all 3 channels -> leds glowing\r | |
403 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
404 | */\r | |
405 | static void\r | |
406 | irsnd_on (void)\r | |
407 | {\r | |
408 | if (! irsnd_is_on)\r | |
409 | {\r | |
410 | #ifndef DEBUG\r | |
9c86ff1a | 411 | \r |
412 | #if defined(PIC_C18)\r | |
413 | IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r | |
414 | #else\r | |
415 | \r | |
416 | \r | |
1f54e86c | 417 | #if IRSND_OCx == IRSND_OC2 // use OC2\r |
418 | TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r | |
419 | #elif IRSND_OCx == IRSND_OC2A // use OC2A\r | |
f50e01e7 | 420 | TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r |
1f54e86c | 421 | #elif IRSND_OCx == IRSND_OC2B // use OC2B\r |
f50e01e7 | 422 | TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r |
1f54e86c | 423 | #elif IRSND_OCx == IRSND_OC0 // use OC0\r |
424 | TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r | |
425 | #elif IRSND_OCx == IRSND_OC0A // use OC0A\r | |
426 | TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r | |
427 | #elif IRSND_OCx == IRSND_OC0B // use OC0B\r | |
428 | TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r | |
429 | #else\r | |
430 | #error wrong value of IRSND_OCx\r | |
431 | #endif // IRSND_OCx\r | |
9c86ff1a | 432 | \r |
433 | #endif //C18\r | |
4225a882 | 434 | #endif // DEBUG\r |
f50e01e7 | 435 | \r |
436 | #if IRSND_USE_CALLBACK == 1\r | |
437 | if (irsnd_callback_ptr)\r | |
438 | {\r | |
439 | (*irsnd_callback_ptr) (TRUE);\r | |
440 | }\r | |
441 | #endif // IRSND_USE_CALLBACK == 1\r | |
442 | \r | |
4225a882 | 443 | irsnd_is_on = TRUE;\r |
444 | }\r | |
445 | }\r | |
446 | \r | |
447 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
448 | * Switch PWM off\r | |
449 | * @details Switches PWM off\r | |
450 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
451 | */\r | |
452 | static void\r | |
453 | irsnd_off (void)\r | |
454 | {\r | |
455 | if (irsnd_is_on)\r | |
456 | {\r | |
457 | #ifndef DEBUG\r | |
9c86ff1a | 458 | \r |
459 | #if defined(PIC_C18)\r | |
460 | IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r | |
461 | #else //AVR\r | |
462 | \r | |
1f54e86c | 463 | #if IRSND_OCx == IRSND_OC2 // use OC2\r |
f50e01e7 | 464 | TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r |
1f54e86c | 465 | #elif IRSND_OCx == IRSND_OC2A // use OC2A\r |
f50e01e7 | 466 | TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r |
1f54e86c | 467 | #elif IRSND_OCx == IRSND_OC2B // use OC2B\r |
f50e01e7 | 468 | TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r |
1f54e86c | 469 | #elif IRSND_OCx == IRSND_OC0 // use OC0\r |
470 | TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r | |
471 | #elif IRSND_OCx == IRSND_OC0A // use OC0A\r | |
472 | TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r | |
473 | #elif IRSND_OCx == IRSND_OC0B // use OC0B\r | |
474 | TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r | |
475 | #else\r | |
476 | #error wrong value of IRSND_OCx\r | |
477 | #endif // IRSND_OCx\r | |
f50e01e7 | 478 | IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r |
9c86ff1a | 479 | #endif //C18\r |
4225a882 | 480 | #endif // DEBUG\r |
f50e01e7 | 481 | \r |
482 | #if IRSND_USE_CALLBACK == 1\r | |
483 | if (irsnd_callback_ptr)\r | |
484 | {\r | |
485 | (*irsnd_callback_ptr) (FALSE);\r | |
486 | }\r | |
487 | #endif // IRSND_USE_CALLBACK == 1\r | |
488 | \r | |
4225a882 | 489 | irsnd_is_on = FALSE;\r |
490 | }\r | |
491 | }\r | |
492 | \r | |
493 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
494 | * Set PWM frequency\r | |
495 | * @details sets pwm frequency\r | |
496 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
497 | */\r | |
498 | static void\r | |
499 | irsnd_set_freq (uint8_t freq)\r | |
500 | {\r | |
501 | #ifndef DEBUG\r | |
9c86ff1a | 502 | \r |
503 | #if defined(PIC_C18)\r | |
504 | OpenPWM(freq); \r | |
505 | SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r | |
506 | #else //AVR\r | |
507 | \r | |
1f54e86c | 508 | #if IRSND_OCx == IRSND_OC2\r |
f50e01e7 | 509 | OCR2 = freq; // use register OCR2 for OC2\r |
1f54e86c | 510 | #elif IRSND_OCx == IRSND_OC2A // use OC2A\r |
511 | OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r | |
512 | #elif IRSND_OCx == IRSND_OC2B // use OC2B\r | |
f50e01e7 | 513 | OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r |
1f54e86c | 514 | #elif IRSND_OCx == IRSND_OC0 // use OC0\r |
515 | OCR0 = freq; // use register OCR2 for OC2\r | |
516 | #elif IRSND_OCx == IRSND_OC0A // use OC0A\r | |
517 | OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r | |
518 | #elif IRSND_OCx == IRSND_OC0B // use OC0B\r | |
519 | OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r | |
520 | #else\r | |
521 | #error wrong value of IRSND_OCx\r | |
f50e01e7 | 522 | #endif\r |
9c86ff1a | 523 | #endif //PIC_C18\r |
4225a882 | 524 | #endif // DEBUG\r |
525 | }\r | |
526 | \r | |
527 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
528 | * Initialize the PWM\r | |
529 | * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r | |
530 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
531 | */\r | |
532 | void\r | |
533 | irsnd_init (void)\r | |
534 | {\r | |
535 | #ifndef DEBUG\r | |
9c86ff1a | 536 | #if defined(PIC_C18)\r |
537 | OpenTimer;\r | |
538 | irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r | |
539 | IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r | |
540 | #else\r | |
541 | \r | |
4225a882 | 542 | IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r |
543 | IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r | |
544 | \r | |
1f54e86c | 545 | #if IRSND_OCx == IRSND_OC2 // use OC2\r |
4225a882 | 546 | TCCR2 = (1<<WGM21); // CTC mode\r |
547 | TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r | |
1f54e86c | 548 | #elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r |
4225a882 | 549 | TCCR2A = (1<<WGM21); // CTC mode\r |
550 | TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r | |
1f54e86c | 551 | #elif IRSND_OCx == IRSND_OC0 // use OC0\r |
552 | TCCR0 = (1<<WGM01); // CTC mode\r | |
553 | TCCR0 |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r | |
554 | #elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r | |
555 | TCCR0A = (1<<WGM01); // CTC mode\r | |
556 | TCCR0B |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r | |
557 | #else\r | |
558 | #error wrong value of IRSND_OCx\r | |
559 | #endif\r | |
4225a882 | 560 | \r |
561 | irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r | |
9c86ff1a | 562 | #endif //PIC_C18\r |
4225a882 | 563 | #endif // DEBUG\r |
564 | }\r | |
565 | \r | |
f50e01e7 | 566 | #if IRSND_USE_CALLBACK == 1\r |
567 | void\r | |
568 | irsnd_set_callback_ptr (void (*cb)(uint8_t))\r | |
569 | {\r | |
570 | irsnd_callback_ptr = cb;\r | |
571 | }\r | |
572 | #endif // IRSND_USE_CALLBACK == 1\r | |
573 | \r | |
4225a882 | 574 | uint8_t\r |
575 | irsnd_is_busy (void)\r | |
576 | {\r | |
577 | return irsnd_busy;\r | |
578 | }\r | |
579 | \r | |
580 | static uint16_t\r | |
581 | bitsrevervse (uint16_t x, uint8_t len)\r | |
582 | {\r | |
583 | uint16_t xx = 0;\r | |
584 | \r | |
585 | while(len)\r | |
586 | {\r | |
587 | xx <<= 1;\r | |
588 | if (x & 1)\r | |
589 | {\r | |
590 | xx |= 1;\r | |
591 | }\r | |
592 | x >>= 1;\r | |
593 | len--;\r | |
594 | }\r | |
595 | return xx;\r | |
596 | }\r | |
597 | \r | |
598 | \r | |
9547ee89 | 599 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r |
600 | static uint8_t sircs_additional_bitlen;\r | |
601 | #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r | |
602 | \r | |
4225a882 | 603 | uint8_t\r |
879b06c2 | 604 | irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r |
4225a882 | 605 | {\r |
606 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r | |
607 | static uint8_t toggle_bit_recs80;\r | |
608 | #endif\r | |
609 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
610 | static uint8_t toggle_bit_recs80ext;\r | |
611 | #endif\r | |
612 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r | |
613 | static uint8_t toggle_bit_rc5;\r | |
9547ee89 | 614 | #endif\r |
779fbc81 | 615 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
9547ee89 | 616 | static uint8_t toggle_bit_rc6;\r |
beda975f | 617 | #endif\r |
618 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r | |
619 | static uint8_t toggle_bit_thomson;\r | |
4225a882 | 620 | #endif\r |
621 | uint16_t address;\r | |
622 | uint16_t command;\r | |
623 | \r | |
879b06c2 | 624 | if (do_wait)\r |
4225a882 | 625 | {\r |
879b06c2 | 626 | while (irsnd_busy)\r |
627 | {\r | |
628 | // do nothing;\r | |
629 | }\r | |
630 | }\r | |
631 | else if (irsnd_busy)\r | |
632 | {\r | |
633 | return (FALSE);\r | |
4225a882 | 634 | }\r |
635 | \r | |
636 | irsnd_protocol = irmp_data_p->protocol;\r | |
beda975f | 637 | irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r |
4225a882 | 638 | \r |
639 | switch (irsnd_protocol)\r | |
640 | {\r | |
641 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r | |
642 | case IRMP_SIRCS_PROTOCOL:\r | |
643 | {\r | |
9547ee89 | 644 | uint8_t sircs_additional_command_len;\r |
645 | uint8_t sircs_additional_address_len;\r | |
646 | \r | |
647 | sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r | |
648 | \r | |
649 | if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r | |
650 | {\r | |
651 | sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r | |
652 | sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r | |
653 | }\r | |
654 | else\r | |
655 | {\r | |
656 | sircs_additional_command_len = sircs_additional_bitlen;\r | |
657 | sircs_additional_address_len = 0;\r | |
658 | }\r | |
4225a882 | 659 | \r |
9547ee89 | 660 | command = bitsrevervse (irmp_data_p->command, 15);\r |
661 | \r | |
662 | irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r | |
663 | irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r | |
664 | \r | |
665 | if (sircs_additional_address_len > 0)\r | |
666 | {\r | |
667 | address = bitsrevervse (irmp_data_p->address, 5);\r | |
668 | irsnd_buffer[1] |= (address & 0x0010) >> 4;\r | |
669 | irsnd_buffer[2] = (address & 0x000F) << 4;\r | |
670 | }\r | |
4225a882 | 671 | irsnd_busy = TRUE;\r |
672 | break;\r | |
673 | }\r | |
674 | #endif\r | |
675 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r | |
46dd89b7 | 676 | case IRMP_APPLE_PROTOCOL:\r |
c7a47e89 | 677 | {\r |
678 | command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r | |
679 | address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r | |
680 | \r | |
681 | address = bitsrevervse (address, NEC_ADDRESS_LEN);\r | |
682 | command = bitsrevervse (command, NEC_COMMAND_LEN);\r | |
683 | \r | |
684 | irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r | |
685 | \r | |
7644ac04 | 686 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
687 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
688 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r | |
689 | irsnd_buffer[3] = 0x8B; // 10001011 (id)\r | |
c7a47e89 | 690 | irsnd_busy = TRUE;\r |
691 | break;\r | |
692 | }\r | |
693 | case IRMP_NEC_PROTOCOL:\r | |
4225a882 | 694 | {\r |
695 | address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r | |
696 | command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r | |
697 | \r | |
4225a882 | 698 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
699 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
700 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r | |
7644ac04 | 701 | irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r |
702 | irsnd_busy = TRUE;\r | |
703 | break;\r | |
704 | }\r | |
705 | #endif\r | |
706 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r | |
707 | case IRMP_NEC16_PROTOCOL:\r | |
708 | {\r | |
709 | address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r | |
710 | command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r | |
46dd89b7 | 711 | \r |
7644ac04 | 712 | irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r |
713 | irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r | |
714 | irsnd_busy = TRUE;\r | |
715 | break;\r | |
716 | }\r | |
717 | #endif\r | |
718 | #if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r | |
719 | case IRMP_NEC42_PROTOCOL:\r | |
720 | {\r | |
721 | address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r | |
722 | command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r | |
723 | \r | |
724 | irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r | |
725 | irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r | |
726 | irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r | |
727 | irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r | |
728 | irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r | |
729 | irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r | |
4225a882 | 730 | irsnd_busy = TRUE;\r |
731 | break;\r | |
732 | }\r | |
733 | #endif\r | |
734 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
735 | case IRMP_SAMSUNG_PROTOCOL:\r | |
736 | {\r | |
737 | address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r | |
738 | command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r | |
739 | \r | |
4225a882 | 740 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
741 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
742 | irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r | |
743 | irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r | |
744 | irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r | |
745 | irsnd_busy = TRUE;\r | |
746 | break;\r | |
747 | }\r | |
748 | case IRMP_SAMSUNG32_PROTOCOL:\r | |
749 | {\r | |
750 | address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r | |
751 | command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r | |
752 | \r | |
4225a882 | 753 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
754 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
755 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r | |
756 | irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r | |
757 | irsnd_busy = TRUE;\r | |
758 | break;\r | |
759 | }\r | |
760 | #endif\r | |
761 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
762 | case IRMP_MATSUSHITA_PROTOCOL:\r | |
763 | {\r | |
764 | address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r | |
765 | command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r | |
766 | \r | |
4225a882 | 767 | irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r |
768 | irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r | |
769 | irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r | |
770 | irsnd_busy = TRUE;\r | |
771 | break;\r | |
772 | }\r | |
773 | #endif\r | |
770a1a9d | 774 | #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
775 | case IRMP_KASEIKYO_PROTOCOL:\r | |
776 | {\r | |
777 | uint8_t xor;\r | |
0f700c8e | 778 | uint16_t genre2;\r |
770a1a9d | 779 | \r |
780 | address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r | |
781 | command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r | |
0f700c8e | 782 | genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r |
770a1a9d | 783 | \r |
784 | xor = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r | |
785 | \r | |
786 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r | |
787 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
788 | irsnd_buffer[2] = xor << 4 | (command & 0x000F); // XXXXCCCC\r | |
0f700c8e | 789 | irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r |
770a1a9d | 790 | irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r |
791 | \r | |
792 | xor = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r | |
793 | \r | |
794 | irsnd_buffer[5] = xor;\r | |
795 | irsnd_busy = TRUE;\r | |
796 | break;\r | |
797 | }\r | |
798 | #endif\r | |
4225a882 | 799 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r |
800 | case IRMP_RECS80_PROTOCOL:\r | |
801 | {\r | |
802 | toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r | |
803 | \r | |
4225a882 | 804 | irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r |
805 | ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r | |
806 | irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r | |
807 | irsnd_busy = TRUE;\r | |
808 | break;\r | |
809 | }\r | |
810 | #endif\r | |
811 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
812 | case IRMP_RECS80EXT_PROTOCOL:\r | |
813 | {\r | |
814 | toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r | |
815 | \r | |
4225a882 | 816 | irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r |
817 | ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r | |
818 | irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r | |
819 | irsnd_busy = TRUE;\r | |
820 | break;\r | |
821 | }\r | |
822 | #endif\r | |
823 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r | |
824 | case IRMP_RC5_PROTOCOL:\r | |
825 | {\r | |
826 | toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r | |
827 | \r | |
4225a882 | 828 | irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r |
829 | ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r | |
830 | irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r | |
831 | irsnd_busy = TRUE;\r | |
832 | break;\r | |
833 | }\r | |
834 | #endif\r | |
9547ee89 | 835 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1\r |
836 | case IRMP_RC6_PROTOCOL:\r | |
837 | {\r | |
838 | toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r | |
839 | \r | |
840 | irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r | |
841 | irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r | |
842 | irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r | |
843 | irsnd_busy = TRUE;\r | |
844 | break;\r | |
845 | }\r | |
846 | #endif\r | |
847 | #if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r | |
848 | case IRMP_RC6A_PROTOCOL:\r | |
849 | {\r | |
850 | toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r | |
851 | \r | |
852 | irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r | |
853 | irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r | |
854 | irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r | |
855 | irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r | |
856 | irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r | |
857 | irsnd_busy = TRUE;\r | |
858 | break;\r | |
859 | }\r | |
860 | #endif\r | |
4225a882 | 861 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
862 | case IRMP_DENON_PROTOCOL:\r | |
863 | {\r | |
d155e9ab | 864 | irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r |
865 | irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r | |
866 | irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAACCC (2nd frame)\r | |
867 | irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // CCCCCCC\r | |
4225a882 | 868 | irsnd_busy = TRUE;\r |
869 | break;\r | |
870 | }\r | |
871 | #endif\r | |
beda975f | 872 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r |
873 | case IRMP_THOMSON_PROTOCOL:\r | |
874 | {\r | |
875 | toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r | |
876 | \r | |
877 | irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r | |
878 | irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r | |
879 | irsnd_busy = TRUE;\r | |
880 | break;\r | |
881 | }\r | |
882 | #endif\r | |
4225a882 | 883 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r |
884 | case IRMP_NUBERT_PROTOCOL:\r | |
885 | {\r | |
4225a882 | 886 | irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r |
887 | irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r | |
888 | irsnd_busy = TRUE;\r | |
889 | break;\r | |
890 | }\r | |
5481e9cd | 891 | #endif\r |
892 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
893 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r | |
894 | {\r | |
5481e9cd | 895 | irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r |
896 | irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r | |
897 | irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r | |
898 | irsnd_busy = TRUE;\r | |
899 | break;\r | |
900 | }\r | |
4225a882 | 901 | #endif\r |
5b437ff6 | 902 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r |
903 | case IRMP_GRUNDIG_PROTOCOL:\r | |
904 | {\r | |
905 | command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r | |
906 | \r | |
d155e9ab | 907 | irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r |
908 | irsnd_buffer[1] = 0xC0; // 11\r | |
909 | irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r | |
910 | irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r | |
911 | \r | |
912 | irsnd_busy = TRUE;\r | |
913 | break;\r | |
914 | }\r | |
915 | #endif\r | |
916 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
917 | case IRMP_NOKIA_PROTOCOL:\r | |
918 | {\r | |
919 | address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r | |
920 | command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r | |
921 | \r | |
922 | irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r | |
923 | irsnd_buffer[1] = 0xFF; // 11111111\r | |
924 | irsnd_buffer[2] = 0x80; // 1\r | |
925 | irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r | |
926 | irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r | |
927 | irsnd_buffer[5] = (address << 7); // A\r | |
5b437ff6 | 928 | \r |
929 | irsnd_busy = TRUE;\r | |
930 | break;\r | |
931 | }\r | |
932 | #endif\r | |
a7054daf | 933 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r |
934 | case IRMP_SIEMENS_PROTOCOL:\r | |
935 | {\r | |
936 | irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r | |
937 | irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r | |
9405f84a | 938 | irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r |
939 | \r | |
a7054daf | 940 | irsnd_busy = TRUE;\r |
941 | break;\r | |
942 | }\r | |
b5ea7869 | 943 | #endif\r |
48664931 | 944 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
945 | case IRMP_FDC_PROTOCOL:\r | |
b5ea7869 | 946 | {\r |
48664931 | 947 | address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r |
948 | command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r | |
b5ea7869 | 949 | \r |
c7c9a4a1 | 950 | irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r |
951 | irsnd_buffer[1] = 0; // 00000000\r | |
952 | irsnd_buffer[2] = 0; // 0000RRRR\r | |
953 | irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r | |
954 | irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r | |
955 | irsnd_busy = TRUE;\r | |
956 | break;\r | |
957 | }\r | |
958 | #endif\r | |
959 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r | |
960 | case IRMP_RCCAR_PROTOCOL:\r | |
961 | {\r | |
962 | address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r | |
963 | command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r | |
964 | \r | |
965 | irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r | |
966 | irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r | |
967 | \r | |
b5ea7869 | 968 | irsnd_busy = TRUE;\r |
969 | break;\r | |
970 | }\r | |
a7054daf | 971 | #endif\r |
c7a47e89 | 972 | #if IRSND_SUPPORT_JVC_PROTOCOL == 1\r |
973 | case IRMP_JVC_PROTOCOL:\r | |
974 | {\r | |
975 | address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r | |
976 | command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r | |
977 | \r | |
978 | irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r | |
979 | irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r | |
980 | \r | |
981 | irsnd_busy = TRUE;\r | |
982 | break;\r | |
983 | }\r | |
984 | #endif\r | |
9405f84a | 985 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
986 | case IRMP_NIKON_PROTOCOL:\r | |
987 | {\r | |
988 | irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r | |
989 | irsnd_busy = TRUE;\r | |
990 | break;\r | |
991 | }\r | |
f50e01e7 | 992 | #endif\r |
993 | #if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r | |
994 | case IRMP_LEGO_PROTOCOL:\r | |
995 | {\r | |
996 | uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r | |
997 | \r | |
998 | irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r | |
999 | irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r | |
1000 | \r | |
1001 | irsnd_protocol = IRMP_LEGO_PROTOCOL;\r | |
1002 | irsnd_busy = TRUE;\r | |
1003 | break;\r | |
1004 | }\r | |
9405f84a | 1005 | #endif\r |
4225a882 | 1006 | default:\r |
1007 | {\r | |
1008 | break;\r | |
1009 | }\r | |
1010 | }\r | |
1011 | \r | |
1012 | return irsnd_busy;\r | |
1013 | }\r | |
1014 | \r | |
beda975f | 1015 | void\r |
1016 | irsnd_stop (void)\r | |
1017 | {\r | |
acf7fb44 | 1018 | irsnd_repeat = 0;\r |
beda975f | 1019 | }\r |
1020 | \r | |
4225a882 | 1021 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
1022 | * ISR routine\r | |
1023 | * @details ISR routine, called 10000 times per second\r | |
1024 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1025 | */\r | |
1026 | uint8_t\r | |
1027 | irsnd_ISR (void)\r | |
1028 | {\r | |
9c86ff1a | 1029 | static uint8_t send_trailer = FALSE;\r |
1030 | static uint8_t current_bit = 0;// 0xFF;\r | |
1031 | static uint8_t pulse_counter = 0;\r | |
1032 | static IRSND_PAUSE_LEN pause_counter = 0;\r | |
1033 | static uint8_t startbit_pulse_len = 0;\r | |
1034 | static IRSND_PAUSE_LEN startbit_pause_len = 0;\r | |
1035 | static uint8_t pulse_1_len = 0;\r | |
1036 | static uint8_t pause_1_len = 0;\r | |
1037 | static uint8_t pulse_0_len = 0;\r | |
1038 | static uint8_t pause_0_len = 0;\r | |
1039 | static uint8_t has_stop_bit = 0;\r | |
4225a882 | 1040 | static uint8_t new_frame = TRUE;\r |
9c86ff1a | 1041 | static uint8_t complete_data_len = 0;\r |
1042 | static uint8_t n_repeat_frames = 0; // number of repetition frames\r | |
1043 | static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r | |
1044 | static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r | |
1045 | static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r | |
1046 | static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r | |
1047 | static uint8_t repeat_counter = 0; // repeat counter\r | |
1048 | static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r | |
1049 | static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r | |
5481e9cd | 1050 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
1051 | static uint8_t last_bit_value;\r | |
1052 | #endif\r | |
1053 | static uint8_t pulse_len = 0xFF;\r | |
9405f84a | 1054 | static IRSND_PAUSE_LEN pause_len = 0xFF;\r |
4225a882 | 1055 | \r |
1056 | if (irsnd_busy)\r | |
1057 | {\r | |
1058 | if (current_bit == 0xFF && new_frame) // start of transmission...\r | |
1059 | {\r | |
a7054daf | 1060 | if (auto_repetition_counter > 0)\r |
4225a882 | 1061 | {\r |
a7054daf | 1062 | auto_repetition_pause_counter++;\r |
4225a882 | 1063 | \r |
a7054daf | 1064 | if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r |
4225a882 | 1065 | {\r |
a7054daf | 1066 | auto_repetition_pause_counter = 0;\r |
4225a882 | 1067 | \r |
1068 | if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r | |
1069 | {\r | |
1070 | current_bit = 16;\r | |
1071 | complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r | |
1072 | }\r | |
a7054daf | 1073 | else if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig info frame\r |
5b437ff6 | 1074 | {\r |
1075 | current_bit = 15;\r | |
1076 | complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r | |
1077 | }\r | |
a7054daf | 1078 | else if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia info frame\r |
d155e9ab | 1079 | {\r |
a7054daf | 1080 | if (auto_repetition_counter + 1 < n_auto_repetitions)\r |
d155e9ab | 1081 | {\r |
1082 | current_bit = 23;\r | |
1083 | complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r | |
1084 | }\r | |
a7054daf | 1085 | else // nokia stop frame\r |
d155e9ab | 1086 | {\r |
1087 | current_bit = 0xFF;\r | |
1088 | complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r | |
1089 | }\r | |
1090 | }\r | |
4225a882 | 1091 | }\r |
1092 | else\r | |
1093 | {\r | |
1094 | #ifdef DEBUG\r | |
1095 | if (irsnd_is_on)\r | |
1096 | {\r | |
1097 | putchar ('0');\r | |
1098 | }\r | |
1099 | else\r | |
1100 | {\r | |
1101 | putchar ('1');\r | |
1102 | }\r | |
1103 | #endif\r | |
1104 | return irsnd_busy;\r | |
1105 | }\r | |
1106 | }\r | |
beda975f | 1107 | #if 0\r |
a7054daf | 1108 | else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r |
beda975f | 1109 | #else\r |
1110 | else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r | |
1111 | #endif\r | |
a7054daf | 1112 | {\r |
1113 | packet_repeat_pause_counter++;\r | |
1114 | \r | |
1115 | #ifdef DEBUG\r | |
1116 | if (irsnd_is_on)\r | |
1117 | {\r | |
1118 | putchar ('0');\r | |
1119 | }\r | |
1120 | else\r | |
1121 | {\r | |
1122 | putchar ('1');\r | |
1123 | }\r | |
1124 | #endif\r | |
1125 | return irsnd_busy;\r | |
1126 | }\r | |
4225a882 | 1127 | else\r |
1128 | {\r | |
9c86ff1a | 1129 | \r |
0f700c8e | 1130 | if (send_trailer)\r |
1131 | {\r | |
1132 | irsnd_busy = FALSE;\r | |
6ab7d63c | 1133 | send_trailer = FALSE;\r |
0f700c8e | 1134 | return irsnd_busy;\r |
1135 | }\r | |
9c86ff1a | 1136 | \r |
0f700c8e | 1137 | \r |
a7054daf | 1138 | n_repeat_frames = irsnd_repeat;\r |
beda975f | 1139 | \r |
1140 | if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r | |
1141 | {\r | |
1142 | n_repeat_frames = 255;\r | |
1143 | }\r | |
1144 | \r | |
a7054daf | 1145 | packet_repeat_pause_counter = 0;\r |
1146 | pulse_counter = 0;\r | |
1147 | pause_counter = 0;\r | |
5481e9cd | 1148 | \r |
4225a882 | 1149 | switch (irsnd_protocol)\r |
1150 | {\r | |
1151 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r | |
1152 | case IRMP_SIRCS_PROTOCOL:\r | |
1153 | {\r | |
a7054daf | 1154 | startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r |
53c11f07 | 1155 | startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1156 | pulse_1_len = SIRCS_1_PULSE_LEN;\r |
53c11f07 | 1157 | pause_1_len = SIRCS_PAUSE_LEN - 1;\r |
a7054daf | 1158 | pulse_0_len = SIRCS_0_PULSE_LEN;\r |
53c11f07 | 1159 | pause_0_len = SIRCS_PAUSE_LEN - 1;\r |
a7054daf | 1160 | has_stop_bit = SIRCS_STOP_BIT;\r |
9547ee89 | 1161 | complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r |
a7054daf | 1162 | n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r |
1163 | auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r | |
1164 | repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1165 | irsnd_set_freq (IRSND_FREQ_40_KHZ);\r |
1166 | break;\r | |
1167 | }\r | |
1168 | #endif\r | |
1169 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r | |
1170 | case IRMP_NEC_PROTOCOL:\r | |
1171 | {\r | |
a7054daf | 1172 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r |
1173 | \r | |
1174 | if (repeat_counter > 0)\r | |
1175 | {\r | |
53c11f07 | 1176 | startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1177 | complete_data_len = 0;\r |
1178 | }\r | |
1179 | else\r | |
1180 | {\r | |
53c11f07 | 1181 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1182 | complete_data_len = NEC_COMPLETE_DATA_LEN;\r |
1183 | }\r | |
1184 | \r | |
1185 | pulse_1_len = NEC_PULSE_LEN;\r | |
53c11f07 | 1186 | pause_1_len = NEC_1_PAUSE_LEN - 1;\r |
a7054daf | 1187 | pulse_0_len = NEC_PULSE_LEN;\r |
53c11f07 | 1188 | pause_0_len = NEC_0_PAUSE_LEN - 1;\r |
a7054daf | 1189 | has_stop_bit = NEC_STOP_BIT;\r |
1190 | n_auto_repetitions = 1; // 1 frame\r | |
1191 | auto_repetition_pause_len = 0;\r | |
1192 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1193 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
1194 | break;\r | |
1195 | }\r | |
1196 | #endif\r | |
7644ac04 | 1197 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r |
1198 | case IRMP_NEC16_PROTOCOL:\r | |
1199 | {\r | |
1200 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r | |
1201 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r | |
1202 | pulse_1_len = NEC_PULSE_LEN;\r | |
1203 | pause_1_len = NEC_1_PAUSE_LEN - 1;\r | |
1204 | pulse_0_len = NEC_PULSE_LEN;\r | |
1205 | pause_0_len = NEC_0_PAUSE_LEN - 1;\r | |
1206 | has_stop_bit = NEC_STOP_BIT;\r | |
1207 | complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r | |
1208 | n_auto_repetitions = 1; // 1 frame\r | |
1209 | auto_repetition_pause_len = 0;\r | |
1210 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r | |
1211 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1212 | break;\r | |
1213 | }\r | |
1214 | #endif\r | |
1215 | #if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r | |
1216 | case IRMP_NEC42_PROTOCOL:\r | |
1217 | {\r | |
1218 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r | |
1219 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r | |
1220 | pulse_1_len = NEC_PULSE_LEN;\r | |
1221 | pause_1_len = NEC_1_PAUSE_LEN - 1;\r | |
1222 | pulse_0_len = NEC_PULSE_LEN;\r | |
1223 | pause_0_len = NEC_0_PAUSE_LEN - 1;\r | |
1224 | has_stop_bit = NEC_STOP_BIT;\r | |
1225 | complete_data_len = NEC42_COMPLETE_DATA_LEN;\r | |
1226 | n_auto_repetitions = 1; // 1 frame\r | |
1227 | auto_repetition_pause_len = 0;\r | |
1228 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r | |
1229 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1230 | break;\r | |
1231 | }\r | |
1232 | #endif\r | |
4225a882 | 1233 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
1234 | case IRMP_SAMSUNG_PROTOCOL:\r | |
1235 | {\r | |
a7054daf | 1236 | startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r |
53c11f07 | 1237 | startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1238 | pulse_1_len = SAMSUNG_PULSE_LEN;\r |
53c11f07 | 1239 | pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r |
a7054daf | 1240 | pulse_0_len = SAMSUNG_PULSE_LEN;\r |
53c11f07 | 1241 | pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r |
a7054daf | 1242 | has_stop_bit = SAMSUNG_STOP_BIT;\r |
1243 | complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r | |
1244 | n_auto_repetitions = 1; // 1 frame\r | |
1245 | auto_repetition_pause_len = 0;\r | |
1246 | repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1247 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
1248 | break;\r | |
1249 | }\r | |
1250 | \r | |
1251 | case IRMP_SAMSUNG32_PROTOCOL:\r | |
1252 | {\r | |
a7054daf | 1253 | startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r |
53c11f07 | 1254 | startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1255 | pulse_1_len = SAMSUNG_PULSE_LEN;\r |
53c11f07 | 1256 | pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r |
a7054daf | 1257 | pulse_0_len = SAMSUNG_PULSE_LEN;\r |
53c11f07 | 1258 | pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r |
a7054daf | 1259 | has_stop_bit = SAMSUNG_STOP_BIT;\r |
1260 | complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
1261 | n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r | |
1262 | auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r | |
1263 | repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1264 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
1265 | break;\r | |
1266 | }\r | |
1267 | #endif\r | |
1268 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
1269 | case IRMP_MATSUSHITA_PROTOCOL:\r | |
1270 | {\r | |
a7054daf | 1271 | startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r |
53c11f07 | 1272 | startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1273 | pulse_1_len = MATSUSHITA_PULSE_LEN;\r |
53c11f07 | 1274 | pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r |
a7054daf | 1275 | pulse_0_len = MATSUSHITA_PULSE_LEN;\r |
53c11f07 | 1276 | pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r |
a7054daf | 1277 | has_stop_bit = MATSUSHITA_STOP_BIT;\r |
1278 | complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r | |
1279 | n_auto_repetitions = 1; // 1 frame\r | |
1280 | auto_repetition_pause_len = 0;\r | |
1281 | repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1282 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
1283 | break;\r | |
1284 | }\r | |
1285 | #endif\r | |
770a1a9d | 1286 | #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
1287 | case IRMP_KASEIKYO_PROTOCOL:\r | |
1288 | {\r | |
1289 | startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r | |
53c11f07 | 1290 | startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r |
770a1a9d | 1291 | pulse_1_len = KASEIKYO_PULSE_LEN;\r |
53c11f07 | 1292 | pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r |
770a1a9d | 1293 | pulse_0_len = KASEIKYO_PULSE_LEN;\r |
53c11f07 | 1294 | pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r |
770a1a9d | 1295 | has_stop_bit = KASEIKYO_STOP_BIT;\r |
1296 | complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r | |
1297 | n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r | |
1298 | auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r | |
1299 | repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r | |
1300 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1301 | break;\r | |
1302 | }\r | |
1303 | #endif\r | |
4225a882 | 1304 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r |
1305 | case IRMP_RECS80_PROTOCOL:\r | |
1306 | {\r | |
a7054daf | 1307 | startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r |
53c11f07 | 1308 | startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1309 | pulse_1_len = RECS80_PULSE_LEN;\r |
53c11f07 | 1310 | pause_1_len = RECS80_1_PAUSE_LEN - 1;\r |
a7054daf | 1311 | pulse_0_len = RECS80_PULSE_LEN;\r |
53c11f07 | 1312 | pause_0_len = RECS80_0_PAUSE_LEN - 1;\r |
a7054daf | 1313 | has_stop_bit = RECS80_STOP_BIT;\r |
1314 | complete_data_len = RECS80_COMPLETE_DATA_LEN;\r | |
1315 | n_auto_repetitions = 1; // 1 frame\r | |
1316 | auto_repetition_pause_len = 0;\r | |
1317 | repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1318 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
1319 | break;\r | |
1320 | }\r | |
1321 | #endif\r | |
1322 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1323 | case IRMP_RECS80EXT_PROTOCOL:\r | |
1324 | {\r | |
a7054daf | 1325 | startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r |
53c11f07 | 1326 | startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1327 | pulse_1_len = RECS80EXT_PULSE_LEN;\r |
53c11f07 | 1328 | pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r |
a7054daf | 1329 | pulse_0_len = RECS80EXT_PULSE_LEN;\r |
53c11f07 | 1330 | pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r |
a7054daf | 1331 | has_stop_bit = RECS80EXT_STOP_BIT;\r |
1332 | complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r | |
1333 | n_auto_repetitions = 1; // 1 frame\r | |
1334 | auto_repetition_pause_len = 0;\r | |
1335 | repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1336 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
1337 | break;\r | |
1338 | }\r | |
1339 | #endif\r | |
1340 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r | |
1341 | case IRMP_RC5_PROTOCOL:\r | |
1342 | {\r | |
a7054daf | 1343 | startbit_pulse_len = RC5_BIT_LEN;\r |
1344 | startbit_pause_len = RC5_BIT_LEN;\r | |
1345 | pulse_len = RC5_BIT_LEN;\r | |
1346 | pause_len = RC5_BIT_LEN;\r | |
1347 | has_stop_bit = RC5_STOP_BIT;\r | |
1348 | complete_data_len = RC5_COMPLETE_DATA_LEN;\r | |
1349 | n_auto_repetitions = 1; // 1 frame\r | |
1350 | auto_repetition_pause_len = 0;\r | |
1351 | repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1352 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
1353 | break;\r | |
1354 | }\r | |
1355 | #endif\r | |
9547ee89 | 1356 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1\r |
1357 | case IRMP_RC6_PROTOCOL:\r | |
1358 | {\r | |
1359 | startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r | |
53c11f07 | 1360 | startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r |
9547ee89 | 1361 | pulse_len = RC6_BIT_LEN;\r |
1362 | pause_len = RC6_BIT_LEN;\r | |
1363 | has_stop_bit = RC6_STOP_BIT;\r | |
1364 | complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r | |
1365 | n_auto_repetitions = 1; // 1 frame\r | |
1366 | auto_repetition_pause_len = 0;\r | |
1367 | repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r | |
1368 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r | |
1369 | break;\r | |
1370 | }\r | |
1371 | #endif\r | |
1372 | #if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r | |
1373 | case IRMP_RC6A_PROTOCOL:\r | |
1374 | {\r | |
1375 | startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r | |
53c11f07 | 1376 | startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r |
9547ee89 | 1377 | pulse_len = RC6_BIT_LEN;\r |
1378 | pause_len = RC6_BIT_LEN;\r | |
1379 | has_stop_bit = RC6_STOP_BIT;\r | |
1380 | complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r | |
1381 | n_auto_repetitions = 1; // 1 frame\r | |
1382 | auto_repetition_pause_len = 0;\r | |
1383 | repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r | |
1384 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r | |
1385 | break;\r | |
1386 | }\r | |
1387 | #endif\r | |
4225a882 | 1388 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
1389 | case IRMP_DENON_PROTOCOL:\r | |
1390 | {\r | |
a7054daf | 1391 | startbit_pulse_len = 0x00;\r |
1392 | startbit_pause_len = 0x00;\r | |
1393 | pulse_1_len = DENON_PULSE_LEN;\r | |
53c11f07 | 1394 | pause_1_len = DENON_1_PAUSE_LEN - 1;\r |
a7054daf | 1395 | pulse_0_len = DENON_PULSE_LEN;\r |
53c11f07 | 1396 | pause_0_len = DENON_0_PAUSE_LEN - 1;\r |
a7054daf | 1397 | has_stop_bit = DENON_STOP_BIT;\r |
1398 | complete_data_len = DENON_COMPLETE_DATA_LEN;\r | |
1399 | n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r | |
1400 | auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r | |
1401 | repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r | |
779fbc81 | 1402 | irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r |
4225a882 | 1403 | break;\r |
1404 | }\r | |
1405 | #endif\r | |
beda975f | 1406 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r |
1407 | case IRMP_THOMSON_PROTOCOL:\r | |
1408 | {\r | |
1409 | startbit_pulse_len = 0x00;\r | |
1410 | startbit_pause_len = 0x00;\r | |
1411 | pulse_1_len = THOMSON_PULSE_LEN;\r | |
1412 | pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r | |
1413 | pulse_0_len = THOMSON_PULSE_LEN;\r | |
1414 | pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r | |
1415 | has_stop_bit = THOMSON_STOP_BIT;\r | |
1416 | complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r | |
1417 | n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r | |
1418 | auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r | |
1419 | repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r | |
1420 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1421 | break;\r | |
1422 | }\r | |
1423 | #endif\r | |
4225a882 | 1424 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r |
1425 | case IRMP_NUBERT_PROTOCOL:\r | |
1426 | {\r | |
a7054daf | 1427 | startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r |
53c11f07 | 1428 | startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r |
a7054daf | 1429 | pulse_1_len = NUBERT_1_PULSE_LEN;\r |
53c11f07 | 1430 | pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r |
a7054daf | 1431 | pulse_0_len = NUBERT_0_PULSE_LEN;\r |
53c11f07 | 1432 | pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r |
a7054daf | 1433 | has_stop_bit = NUBERT_STOP_BIT;\r |
1434 | complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r | |
1435 | n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r | |
1436 | auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r | |
1437 | repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 1438 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
1439 | break;\r | |
1440 | }\r | |
5481e9cd | 1441 | #endif\r |
1442 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
1443 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r | |
1444 | {\r | |
a7054daf | 1445 | startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r |
53c11f07 | 1446 | startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r |
a7054daf | 1447 | pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r |
53c11f07 | 1448 | pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r |
a7054daf | 1449 | pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r |
53c11f07 | 1450 | pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r |
a7054daf | 1451 | has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r |
1452 | complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r | |
1453 | n_auto_repetitions = 1; // 1 frame\r | |
1454 | auto_repetition_pause_len = 0;\r | |
1455 | repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r | |
1456 | last_bit_value = 0;\r | |
5481e9cd | 1457 | irsnd_set_freq (IRSND_FREQ_455_KHZ);\r |
1458 | break;\r | |
1459 | }\r | |
5b437ff6 | 1460 | #endif\r |
1461 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
1462 | case IRMP_GRUNDIG_PROTOCOL:\r | |
1463 | {\r | |
89e8cafb | 1464 | startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
1465 | startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r | |
1466 | pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r | |
1467 | pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r | |
1468 | has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r | |
a7054daf | 1469 | complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r |
1470 | n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r | |
1471 | auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r | |
89e8cafb | 1472 | repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r |
d155e9ab | 1473 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
a7054daf | 1474 | \r |
d155e9ab | 1475 | break;\r |
1476 | }\r | |
1477 | #endif\r | |
1478 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
1479 | case IRMP_NOKIA_PROTOCOL:\r | |
1480 | {\r | |
89e8cafb | 1481 | startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
1482 | startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r | |
1483 | pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r | |
1484 | pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r | |
1485 | has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r | |
a7054daf | 1486 | complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r |
f50e01e7 | 1487 | n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r |
1488 | auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r | |
1489 | repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r | |
d155e9ab | 1490 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
5b437ff6 | 1491 | break;\r |
1492 | }\r | |
a7054daf | 1493 | #endif\r |
1494 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r | |
1495 | case IRMP_SIEMENS_PROTOCOL:\r | |
1496 | {\r | |
1497 | startbit_pulse_len = SIEMENS_BIT_LEN;\r | |
1498 | startbit_pause_len = SIEMENS_BIT_LEN;\r | |
1499 | pulse_len = SIEMENS_BIT_LEN;\r | |
1500 | pause_len = SIEMENS_BIT_LEN;\r | |
02ccdb69 | 1501 | has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r |
a7054daf | 1502 | complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r |
1503 | n_auto_repetitions = 1; // 1 frame\r | |
1504 | auto_repetition_pause_len = 0;\r | |
1505 | repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r | |
1506 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r | |
1507 | break;\r | |
1508 | }\r | |
b5ea7869 | 1509 | #endif\r |
48664931 | 1510 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
1511 | case IRMP_FDC_PROTOCOL:\r | |
b5ea7869 | 1512 | {\r |
48664931 | 1513 | startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r |
53c11f07 | 1514 | startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r |
48664931 | 1515 | complete_data_len = FDC_COMPLETE_DATA_LEN;\r |
1516 | pulse_1_len = FDC_PULSE_LEN;\r | |
53c11f07 | 1517 | pause_1_len = FDC_1_PAUSE_LEN - 1;\r |
48664931 | 1518 | pulse_0_len = FDC_PULSE_LEN;\r |
53c11f07 | 1519 | pause_0_len = FDC_0_PAUSE_LEN - 1;\r |
48664931 | 1520 | has_stop_bit = FDC_STOP_BIT;\r |
b5ea7869 | 1521 | n_auto_repetitions = 1; // 1 frame\r |
1522 | auto_repetition_pause_len = 0;\r | |
48664931 | 1523 | repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r |
b5ea7869 | 1524 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
1525 | break;\r | |
1526 | }\r | |
c7c9a4a1 | 1527 | #endif\r |
1528 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r | |
1529 | case IRMP_RCCAR_PROTOCOL:\r | |
1530 | {\r | |
1531 | startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r | |
53c11f07 | 1532 | startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r |
c7c9a4a1 | 1533 | complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r |
1534 | pulse_1_len = RCCAR_PULSE_LEN;\r | |
53c11f07 | 1535 | pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r |
c7c9a4a1 | 1536 | pulse_0_len = RCCAR_PULSE_LEN;\r |
53c11f07 | 1537 | pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r |
c7c9a4a1 | 1538 | has_stop_bit = RCCAR_STOP_BIT;\r |
1539 | n_auto_repetitions = 1; // 1 frame\r | |
1540 | auto_repetition_pause_len = 0;\r | |
1541 | repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r | |
1542 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1543 | break;\r | |
1544 | }\r | |
4225a882 | 1545 | #endif\r |
c7a47e89 | 1546 | #if IRSND_SUPPORT_JVC_PROTOCOL == 1\r |
1547 | case IRMP_JVC_PROTOCOL:\r | |
1548 | {\r | |
1549 | if (repeat_counter != 0) // skip start bit if repetition frame\r | |
1550 | {\r | |
1551 | current_bit = 0;\r | |
1552 | }\r | |
1553 | \r | |
1554 | startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r | |
53c11f07 | 1555 | startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r |
c7a47e89 | 1556 | complete_data_len = JVC_COMPLETE_DATA_LEN;\r |
1557 | pulse_1_len = JVC_PULSE_LEN;\r | |
53c11f07 | 1558 | pause_1_len = JVC_1_PAUSE_LEN - 1;\r |
c7a47e89 | 1559 | pulse_0_len = JVC_PULSE_LEN;\r |
53c11f07 | 1560 | pause_0_len = JVC_0_PAUSE_LEN - 1;\r |
c7a47e89 | 1561 | has_stop_bit = JVC_STOP_BIT;\r |
1562 | n_auto_repetitions = 1; // 1 frame\r | |
1563 | auto_repetition_pause_len = 0;\r | |
1564 | repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r | |
1565 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1566 | \r | |
1567 | break;\r | |
1568 | }\r | |
1569 | #endif\r | |
9405f84a | 1570 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
1571 | case IRMP_NIKON_PROTOCOL:\r | |
1572 | {\r | |
1573 | startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r | |
53c11f07 | 1574 | startbit_pause_len = 271 - 1; // NIKON_START_BIT_PAUSE_LEN;\r |
9405f84a | 1575 | complete_data_len = NIKON_COMPLETE_DATA_LEN;\r |
1576 | pulse_1_len = NIKON_PULSE_LEN;\r | |
53c11f07 | 1577 | pause_1_len = NIKON_1_PAUSE_LEN - 1;\r |
9405f84a | 1578 | pulse_0_len = NIKON_PULSE_LEN;\r |
53c11f07 | 1579 | pause_0_len = NIKON_0_PAUSE_LEN - 1;\r |
9405f84a | 1580 | has_stop_bit = NIKON_STOP_BIT;\r |
1581 | n_auto_repetitions = 1; // 1 frame\r | |
1582 | auto_repetition_pause_len = 0;\r | |
1583 | repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r | |
1584 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1585 | \r | |
1586 | break;\r | |
1587 | }\r | |
1588 | #endif\r | |
f50e01e7 | 1589 | #if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r |
1590 | case IRMP_LEGO_PROTOCOL:\r | |
1591 | {\r | |
1592 | startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r | |
1593 | startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r | |
1594 | complete_data_len = LEGO_COMPLETE_DATA_LEN;\r | |
1595 | pulse_1_len = LEGO_PULSE_LEN;\r | |
1596 | pause_1_len = LEGO_1_PAUSE_LEN - 1;\r | |
1597 | pulse_0_len = LEGO_PULSE_LEN;\r | |
1598 | pause_0_len = LEGO_0_PAUSE_LEN - 1;\r | |
1599 | has_stop_bit = LEGO_STOP_BIT;\r | |
1600 | n_auto_repetitions = 1; // 1 frame\r | |
1601 | auto_repetition_pause_len = 0;\r | |
1602 | repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r | |
1603 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
1604 | break;\r | |
1605 | }\r | |
1606 | #endif\r | |
4225a882 | 1607 | default:\r |
1608 | {\r | |
1609 | irsnd_busy = FALSE;\r | |
1610 | break;\r | |
1611 | }\r | |
1612 | }\r | |
1613 | }\r | |
1614 | }\r | |
1615 | \r | |
1616 | if (irsnd_busy)\r | |
1617 | {\r | |
1618 | new_frame = FALSE;\r | |
a7054daf | 1619 | \r |
4225a882 | 1620 | switch (irsnd_protocol)\r |
1621 | {\r | |
1622 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r | |
1623 | case IRMP_SIRCS_PROTOCOL:\r | |
1624 | #endif\r | |
1625 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r | |
1626 | case IRMP_NEC_PROTOCOL:\r | |
1627 | #endif\r | |
7644ac04 | 1628 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r |
1629 | case IRMP_NEC16_PROTOCOL:\r | |
1630 | #endif\r | |
1631 | #if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r | |
1632 | case IRMP_NEC42_PROTOCOL:\r | |
1633 | #endif\r | |
4225a882 | 1634 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
1635 | case IRMP_SAMSUNG_PROTOCOL:\r | |
1636 | case IRMP_SAMSUNG32_PROTOCOL:\r | |
1637 | #endif\r | |
1638 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
1639 | case IRMP_MATSUSHITA_PROTOCOL:\r | |
1640 | #endif\r | |
770a1a9d | 1641 | #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
1642 | case IRMP_KASEIKYO_PROTOCOL:\r | |
1643 | #endif\r | |
4225a882 | 1644 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r |
1645 | case IRMP_RECS80_PROTOCOL:\r | |
1646 | #endif\r | |
1647 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1648 | case IRMP_RECS80EXT_PROTOCOL:\r | |
1649 | #endif\r | |
1650 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r | |
1651 | case IRMP_DENON_PROTOCOL:\r | |
1652 | #endif\r | |
beda975f | 1653 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r |
1654 | case IRMP_THOMSON_PROTOCOL:\r | |
1655 | #endif\r | |
4225a882 | 1656 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r |
1657 | case IRMP_NUBERT_PROTOCOL:\r | |
5481e9cd | 1658 | #endif\r |
1659 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
1660 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r | |
4225a882 | 1661 | #endif\r |
c7c9a4a1 | 1662 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
48664931 | 1663 | case IRMP_FDC_PROTOCOL:\r |
b5ea7869 | 1664 | #endif\r |
c7c9a4a1 | 1665 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r |
1666 | case IRMP_RCCAR_PROTOCOL:\r | |
1667 | #endif\r | |
c7a47e89 | 1668 | #if IRSND_SUPPORT_JVC_PROTOCOL == 1\r |
1669 | case IRMP_JVC_PROTOCOL:\r | |
1670 | #endif\r | |
9405f84a | 1671 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
1672 | case IRMP_NIKON_PROTOCOL:\r | |
1673 | #endif\r | |
f50e01e7 | 1674 | #if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r |
1675 | case IRMP_LEGO_PROTOCOL:\r | |
1676 | #endif\r | |
a7054daf | 1677 | \r |
1678 | \r | |
7644ac04 | 1679 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r |
1680 | IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r | |
770a1a9d | 1681 | IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r |
c7a47e89 | 1682 | IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r |
beda975f | 1683 | IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r |
4225a882 | 1684 | {\r |
5481e9cd | 1685 | if (pulse_counter == 0)\r |
4225a882 | 1686 | {\r |
5481e9cd | 1687 | if (current_bit == 0xFF) // send start bit\r |
1688 | {\r | |
1689 | pulse_len = startbit_pulse_len;\r | |
1690 | pause_len = startbit_pause_len;\r | |
1691 | }\r | |
1692 | else if (current_bit < complete_data_len) // send n'th bit\r | |
4225a882 | 1693 | {\r |
5481e9cd | 1694 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
1695 | if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r | |
4225a882 | 1696 | {\r |
5481e9cd | 1697 | if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r |
1698 | {\r | |
1699 | pulse_len = SAMSUNG_PULSE_LEN;\r | |
1700 | pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r | |
53c11f07 | 1701 | (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r |
5481e9cd | 1702 | }\r |
1703 | else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r | |
1704 | {\r | |
1705 | pulse_len = SAMSUNG_PULSE_LEN;\r | |
53c11f07 | 1706 | pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r |
5481e9cd | 1707 | }\r |
1708 | else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r | |
1709 | {\r | |
1710 | uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r | |
1711 | \r | |
1712 | pulse_len = SAMSUNG_PULSE_LEN;\r | |
1713 | pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r | |
53c11f07 | 1714 | (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r |
5481e9cd | 1715 | }\r |
4225a882 | 1716 | }\r |
5481e9cd | 1717 | else\r |
1718 | #endif\r | |
1719 | \r | |
7644ac04 | 1720 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r |
1721 | if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r | |
1722 | {\r | |
1723 | if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r | |
1724 | {\r | |
1725 | pulse_len = NEC_PULSE_LEN;\r | |
1726 | pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r | |
1727 | (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r | |
1728 | }\r | |
1729 | else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r | |
1730 | {\r | |
1731 | pulse_len = NEC_PULSE_LEN;\r | |
1732 | pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r | |
1733 | }\r | |
1734 | else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r | |
1735 | {\r | |
1736 | uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r | |
1737 | \r | |
1738 | pulse_len = NEC_PULSE_LEN;\r | |
1739 | pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r | |
1740 | (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r | |
1741 | }\r | |
1742 | }\r | |
1743 | else\r | |
1744 | #endif\r | |
1745 | \r | |
5481e9cd | 1746 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
1747 | if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
4225a882 | 1748 | {\r |
5481e9cd | 1749 | if (current_bit == 0) // send 2nd start bit\r |
1750 | {\r | |
1751 | pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r | |
53c11f07 | 1752 | pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r |
5481e9cd | 1753 | }\r |
1754 | else if (current_bit == 1) // send 3rd start bit\r | |
1755 | {\r | |
1756 | pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r | |
53c11f07 | 1757 | pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r |
5481e9cd | 1758 | }\r |
1759 | else if (current_bit == 2) // send 4th start bit\r | |
1760 | {\r | |
1761 | pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r | |
53c11f07 | 1762 | pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r |
5481e9cd | 1763 | }\r |
1764 | else if (current_bit == 19) // send trailer bit\r | |
1765 | {\r | |
1766 | pulse_len = BANG_OLUFSEN_PULSE_LEN;\r | |
53c11f07 | 1767 | pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r |
5481e9cd | 1768 | }\r |
1769 | else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r | |
1770 | {\r | |
1771 | uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r | |
1772 | pulse_len = BANG_OLUFSEN_PULSE_LEN;\r | |
1773 | \r | |
1774 | if (cur_bit_value == last_bit_value)\r | |
1775 | {\r | |
53c11f07 | 1776 | pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r |
5481e9cd | 1777 | }\r |
1778 | else\r | |
1779 | {\r | |
53c11f07 | 1780 | pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r |
5481e9cd | 1781 | last_bit_value = cur_bit_value;\r |
1782 | }\r | |
1783 | }\r | |
4225a882 | 1784 | }\r |
5481e9cd | 1785 | else\r |
1786 | #endif\r | |
1787 | if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r | |
4225a882 | 1788 | {\r |
5481e9cd | 1789 | pulse_len = pulse_1_len;\r |
1790 | pause_len = pause_1_len;\r | |
1791 | }\r | |
1792 | else\r | |
1793 | {\r | |
1794 | pulse_len = pulse_0_len;\r | |
1795 | pause_len = pause_0_len;\r | |
4225a882 | 1796 | }\r |
1797 | }\r | |
5481e9cd | 1798 | else if (has_stop_bit) // send stop bit\r |
4225a882 | 1799 | {\r |
1800 | pulse_len = pulse_0_len;\r | |
4225a882 | 1801 | \r |
a7054daf | 1802 | if (auto_repetition_counter < n_auto_repetitions)\r |
5481e9cd | 1803 | {\r |
1804 | pause_len = pause_0_len;\r | |
1805 | }\r | |
1806 | else\r | |
1807 | {\r | |
1808 | pause_len = 255; // last frame: pause of 255\r | |
1809 | }\r | |
4225a882 | 1810 | }\r |
1811 | }\r | |
1812 | \r | |
1813 | if (pulse_counter < pulse_len)\r | |
1814 | {\r | |
1815 | if (pulse_counter == 0)\r | |
1816 | {\r | |
1817 | irsnd_on ();\r | |
1818 | }\r | |
1819 | pulse_counter++;\r | |
1820 | }\r | |
1821 | else if (pause_counter < pause_len)\r | |
1822 | {\r | |
1823 | if (pause_counter == 0)\r | |
1824 | {\r | |
1825 | irsnd_off ();\r | |
1826 | }\r | |
1827 | pause_counter++;\r | |
1828 | }\r | |
1829 | else\r | |
1830 | {\r | |
1831 | current_bit++;\r | |
1832 | \r | |
1833 | if (current_bit >= complete_data_len + has_stop_bit)\r | |
1834 | {\r | |
1835 | current_bit = 0xFF;\r | |
a7054daf | 1836 | auto_repetition_counter++;\r |
4225a882 | 1837 | \r |
a7054daf | 1838 | if (auto_repetition_counter == n_auto_repetitions)\r |
4225a882 | 1839 | {\r |
1840 | irsnd_busy = FALSE;\r | |
a7054daf | 1841 | auto_repetition_counter = 0;\r |
4225a882 | 1842 | }\r |
1843 | new_frame = TRUE;\r | |
1844 | }\r | |
1845 | \r | |
1846 | pulse_counter = 0;\r | |
1847 | pause_counter = 0;\r | |
1848 | }\r | |
1849 | break;\r | |
1850 | }\r | |
a7054daf | 1851 | #endif\r |
1852 | \r | |
4225a882 | 1853 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r |
1854 | case IRMP_RC5_PROTOCOL:\r | |
a7054daf | 1855 | #endif\r |
9547ee89 | 1856 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1\r |
1857 | case IRMP_RC6_PROTOCOL:\r | |
1858 | #endif\r | |
1859 | #if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r | |
1860 | case IRMP_RC6A_PROTOCOL:\r | |
1861 | #endif\r | |
a7054daf | 1862 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r |
1863 | case IRMP_SIEMENS_PROTOCOL:\r | |
1864 | #endif\r | |
1865 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
1866 | case IRMP_GRUNDIG_PROTOCOL:\r | |
1867 | #endif\r | |
1868 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
1869 | case IRMP_NOKIA_PROTOCOL:\r | |
1870 | #endif\r | |
4225a882 | 1871 | \r |
9547ee89 | 1872 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r |
1873 | IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
a7054daf | 1874 | {\r |
1875 | if (pulse_counter == pulse_len && pause_counter == pause_len)\r | |
4225a882 | 1876 | {\r |
a7054daf | 1877 | current_bit++;\r |
4225a882 | 1878 | \r |
a7054daf | 1879 | if (current_bit >= complete_data_len)\r |
4225a882 | 1880 | {\r |
a7054daf | 1881 | current_bit = 0xFF;\r |
1882 | \r | |
1883 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
1884 | if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r | |
4225a882 | 1885 | {\r |
a7054daf | 1886 | auto_repetition_counter++;\r |
1887 | \r | |
1888 | if (repeat_counter > 0)\r | |
1889 | { // set 117 msec pause time\r | |
89e8cafb | 1890 | auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r |
a7054daf | 1891 | }\r |
1892 | \r | |
1893 | if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r | |
1894 | {\r | |
1895 | n_auto_repetitions++; // increment number of auto repetitions\r | |
1896 | repeat_counter++;\r | |
1897 | }\r | |
1898 | else if (auto_repetition_counter == n_auto_repetitions)\r | |
1899 | {\r | |
1900 | irsnd_busy = FALSE;\r | |
1901 | auto_repetition_counter = 0;\r | |
1902 | }\r | |
4225a882 | 1903 | }\r |
a7054daf | 1904 | else\r |
1905 | #endif\r | |
4225a882 | 1906 | {\r |
a7054daf | 1907 | irsnd_busy = FALSE;\r |
4225a882 | 1908 | }\r |
4225a882 | 1909 | \r |
4225a882 | 1910 | new_frame = TRUE;\r |
1911 | irsnd_off ();\r | |
1912 | }\r | |
1913 | \r | |
1914 | pulse_counter = 0;\r | |
1915 | pause_counter = 0;\r | |
1916 | }\r | |
5b437ff6 | 1917 | \r |
a7054daf | 1918 | if (! new_frame)\r |
5b437ff6 | 1919 | {\r |
a7054daf | 1920 | uint8_t first_pulse;\r |
5b437ff6 | 1921 | \r |
a7054daf | 1922 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
1923 | if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r | |
5b437ff6 | 1924 | {\r |
a7054daf | 1925 | if (current_bit == 0xFF || // start bit of start-frame\r |
1926 | (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r | |
1927 | (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r | |
5b437ff6 | 1928 | {\r |
a7054daf | 1929 | pulse_len = startbit_pulse_len;\r |
1930 | pause_len = startbit_pause_len;\r | |
1931 | first_pulse = TRUE;\r | |
5b437ff6 | 1932 | }\r |
a7054daf | 1933 | else // send n'th bit\r |
5b437ff6 | 1934 | {\r |
89e8cafb | 1935 | pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
1936 | pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r | |
a7054daf | 1937 | first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r |
5b437ff6 | 1938 | }\r |
5b437ff6 | 1939 | }\r |
9547ee89 | 1940 | else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r |
1941 | // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r | |
a7054daf | 1942 | #endif\r |
5b437ff6 | 1943 | {\r |
a7054daf | 1944 | if (current_bit == 0xFF) // 1 start bit\r |
1945 | {\r | |
9547ee89 | 1946 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
1947 | if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r | |
1948 | {\r | |
1949 | pulse_len = startbit_pulse_len;\r | |
1950 | pause_len = startbit_pause_len;\r | |
1951 | }\r | |
1952 | #endif\r | |
a7054daf | 1953 | first_pulse = TRUE;\r |
1954 | }\r | |
1955 | else // send n'th bit\r | |
1956 | {\r | |
9547ee89 | 1957 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
1958 | if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r | |
1959 | {\r | |
1960 | pulse_len = RC6_BIT_LEN;\r | |
1961 | pause_len = RC6_BIT_LEN;\r | |
1962 | \r | |
1963 | if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r | |
1964 | {\r | |
1965 | if (current_bit == 4) // toggle bit (double len)\r | |
1966 | {\r | |
1967 | pulse_len = 2 * RC6_BIT_LEN;\r | |
1968 | pause_len = 2 * RC6_BIT_LEN;\r | |
1969 | }\r | |
1970 | }\r | |
1971 | else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r | |
1972 | {\r | |
1973 | if (current_bit == 4) // toggle bit (double len)\r | |
1974 | {\r | |
1975 | pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r | |
1976 | pause_len = 2 * RC6_BIT_LEN;\r | |
1977 | }\r | |
1978 | else if (current_bit == 5) // toggle bit (double len)\r | |
1979 | {\r | |
1980 | pause_len = 2 * RC6_BIT_LEN;\r | |
1981 | }\r | |
1982 | }\r | |
1983 | }\r | |
1984 | #endif\r | |
a7054daf | 1985 | first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r |
1986 | }\r | |
5b437ff6 | 1987 | \r |
a7054daf | 1988 | if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r |
1989 | {\r | |
1990 | first_pulse = first_pulse ? FALSE : TRUE;\r | |
1991 | }\r | |
1992 | }\r | |
5b437ff6 | 1993 | \r |
1994 | if (first_pulse)\r | |
1995 | {\r | |
a7054daf | 1996 | if (pulse_counter < pulse_len)\r |
5b437ff6 | 1997 | {\r |
1998 | if (pulse_counter == 0)\r | |
1999 | {\r | |
2000 | irsnd_on ();\r | |
2001 | }\r | |
2002 | pulse_counter++;\r | |
2003 | }\r | |
a7054daf | 2004 | else // if (pause_counter < pause_len)\r |
5b437ff6 | 2005 | {\r |
2006 | if (pause_counter == 0)\r | |
2007 | {\r | |
2008 | irsnd_off ();\r | |
2009 | }\r | |
2010 | pause_counter++;\r | |
2011 | }\r | |
5b437ff6 | 2012 | }\r |
2013 | else\r | |
2014 | {\r | |
a7054daf | 2015 | if (pause_counter < pause_len)\r |
5b437ff6 | 2016 | {\r |
2017 | if (pause_counter == 0)\r | |
2018 | {\r | |
2019 | irsnd_off ();\r | |
2020 | }\r | |
2021 | pause_counter++;\r | |
2022 | }\r | |
a7054daf | 2023 | else // if (pulse_counter < pulse_len)\r |
5b437ff6 | 2024 | {\r |
2025 | if (pulse_counter == 0)\r | |
2026 | {\r | |
2027 | irsnd_on ();\r | |
2028 | }\r | |
2029 | pulse_counter++;\r | |
2030 | }\r | |
5b437ff6 | 2031 | }\r |
2032 | }\r | |
2033 | break;\r | |
2034 | }\r | |
9547ee89 | 2035 | #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r |
2036 | // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
5b437ff6 | 2037 | \r |
4225a882 | 2038 | default:\r |
2039 | {\r | |
2040 | irsnd_busy = FALSE;\r | |
2041 | break;\r | |
2042 | }\r | |
2043 | }\r | |
2044 | }\r | |
a7054daf | 2045 | \r |
2046 | if (! irsnd_busy)\r | |
2047 | {\r | |
2048 | if (repeat_counter < n_repeat_frames)\r | |
2049 | {\r | |
c7c9a4a1 | 2050 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
2051 | if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r | |
2052 | {\r | |
2053 | irsnd_buffer[2] |= 0x0F;\r | |
2054 | }\r | |
2055 | #endif\r | |
a7054daf | 2056 | repeat_counter++;\r |
2057 | irsnd_busy = TRUE;\r | |
2058 | }\r | |
2059 | else\r | |
2060 | {\r | |
9c86ff1a | 2061 | irsnd_busy = TRUE; //Rainer\r |
0f700c8e | 2062 | send_trailer = TRUE;\r |
a7054daf | 2063 | n_repeat_frames = 0;\r |
2064 | repeat_counter = 0;\r | |
2065 | }\r | |
2066 | }\r | |
4225a882 | 2067 | }\r |
2068 | \r | |
2069 | #ifdef DEBUG\r | |
2070 | if (irsnd_is_on)\r | |
2071 | {\r | |
2072 | putchar ('0');\r | |
2073 | }\r | |
2074 | else\r | |
2075 | {\r | |
2076 | putchar ('1');\r | |
2077 | }\r | |
2078 | #endif\r | |
2079 | \r | |
2080 | return irsnd_busy;\r | |
2081 | }\r | |
2082 | \r | |
2083 | #ifdef DEBUG\r | |
2084 | \r | |
2085 | // main function - for unix/linux + windows only!\r | |
2086 | // AVR: see main.c!\r | |
2087 | // Compile it under linux with:\r | |
2088 | // cc irsnd.c -o irsnd\r | |
2089 | //\r | |
2090 | // usage: ./irsnd protocol hex-address hex-command >filename\r | |
2091 | \r | |
2092 | int\r | |
2093 | main (int argc, char ** argv)\r | |
2094 | {\r | |
4225a882 | 2095 | int protocol;\r |
2096 | int address;\r | |
2097 | int command;\r | |
4225a882 | 2098 | IRMP_DATA irmp_data;\r |
2099 | \r | |
a7054daf | 2100 | if (argc != 4 && argc != 5)\r |
4225a882 | 2101 | {\r |
a7054daf | 2102 | fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r |
4225a882 | 2103 | return 1;\r |
2104 | }\r | |
2105 | \r | |
2106 | if (sscanf (argv[1], "%d", &protocol) == 1 &&\r | |
2107 | sscanf (argv[2], "%x", &address) == 1 &&\r | |
2108 | sscanf (argv[3], "%x", &command) == 1)\r | |
2109 | {\r | |
2110 | irmp_data.protocol = protocol;\r | |
2111 | irmp_data.address = address;\r | |
2112 | irmp_data.command = command;\r | |
2113 | \r | |
a7054daf | 2114 | if (argc == 5)\r |
2115 | {\r | |
2116 | irmp_data.flags = atoi (argv[4]);\r | |
2117 | }\r | |
2118 | else\r | |
2119 | {\r | |
2120 | irmp_data.flags = 0;\r | |
2121 | }\r | |
2122 | \r | |
4225a882 | 2123 | irsnd_init ();\r |
2124 | \r | |
879b06c2 | 2125 | (void) irsnd_send_data (&irmp_data, TRUE);\r |
4225a882 | 2126 | \r |
a7054daf | 2127 | while (irsnd_busy)\r |
2128 | {\r | |
2129 | irsnd_ISR ();\r | |
2130 | }\r | |
beda975f | 2131 | \r |
4225a882 | 2132 | putchar ('\n');\r |
2133 | }\r | |
2134 | else\r | |
2135 | {\r | |
2136 | fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r | |
2137 | return 1;\r | |
2138 | }\r | |
2139 | return 0;\r | |
2140 | }\r | |
2141 | \r | |
2142 | #endif // DEBUG\r |