main.c

   1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
   2  * main.c - demo main module to test irmp decoder
   3  *
   4  * Copyright (c) 2009-2015 Frank Meyer - frank(at)fli4l.de
   5  *
   6  * $Id: main.c,v 1.24 2015/01/26 13:09:28 fm Exp $
   7  *
   8  * This demo module is runnable on AVRs and LM4F120 Launchpad (ARM Cortex M4)
   9  *
  10  * ATMEGA88 @ 8 MHz internal RC      Osc with BODLEVEL 4.3V: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9
  11  * ATMEGA88 @ 8 MHz external Crystal Osc with BODLEVEL 4.3V: lfuse: 0xFF hfuse: 0xDC efuse: 0xF9
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *---------------------------------------------------------------------------------------------------------------------------------------------------
  18  */
  19
  20 #include "irmp.h"
  21
  22 #ifndef F_CPU
  23 #error F_CPU unknown
  24 #endif
  25
  26 /*---------------------------------------------------------------------------------------------------------------------------------------------------
  27  * ATMEL AVR part:
  28  *---------------------------------------------------------------------------------------------------------------------------------------------------
  29  */
  30 #if defined (ATMEL_AVR)
  31
  32 #include "irmp.h"
  33 #define BAUD  9600L
  34 #include <util/setbaud.h>
  35
  36 #ifdef UBRR0H
  37
  38 #define UART0_UBRRH                             UBRR0H
  39 #define UART0_UBRRL                             UBRR0L
  40 #define UART0_UCSRA                             UCSR0A
  41 #define UART0_UCSRB                             UCSR0B
  42 #define UART0_UCSRC                             UCSR0C
  43 #define UART0_UDRE_BIT_VALUE                    (1<<UDRE0)
  44 #define UART0_UCSZ1_BIT_VALUE                   (1<<UCSZ01)
  45 #define UART0_UCSZ0_BIT_VALUE                   (1<<UCSZ00)
  46 #ifdef URSEL0
  47 #define UART0_URSEL_BIT_VALUE                   (1<<URSEL0)
  48 #else
  49 #define UART0_URSEL_BIT_VALUE                   (0)
  50 #endif
  51 #define UART0_TXEN_BIT_VALUE                    (1<<TXEN0)
  52 #define UART0_UDR                               UDR0
  53 #define UART0_U2X                               U2X0
  54
  55 #else
  56
  57 #define UART0_UBRRH                             UBRRH
  58 #define UART0_UBRRL                             UBRRL
  59 #define UART0_UCSRA                             UCSRA
  60 #define UART0_UCSRB                             UCSRB
  61 #define UART0_UCSRC                             UCSRC
  62 #define UART0_UDRE_BIT_VALUE                    (1<<UDRE)
  63 #define UART0_UCSZ1_BIT_VALUE                   (1<<UCSZ1)
  64 #define UART0_UCSZ0_BIT_VALUE                   (1<<UCSZ0)
  65 #ifdef URSEL
  66 #define UART0_URSEL_BIT_VALUE                   (1<<URSEL)
  67 #else
  68 #define UART0_URSEL_BIT_VALUE                   (0)
  69 #endif
  70 #define UART0_TXEN_BIT_VALUE                    (1<<TXEN)
  71 #define UART0_UDR                               UDR
  72 #define UART0_U2X                               U2X
  73
  74 #endif //UBRR0H
  75
  76 static void
  77 uart_init (void)
  78 {
  79     UART0_UBRRH = UBRRH_VALUE;                                                                      // set baud rate
  80     UART0_UBRRL = UBRRL_VALUE;
  81
  82 #if USE_2X
  83     UART0_UCSRA |= (1<<UART0_U2X);
  84 #else
  85     UART0_UCSRA &= ~(1<<UART0_U2X);
  86 #endif
  87
  88     UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;
  89     UART0_UCSRB |= UART0_TXEN_BIT_VALUE;                                                            // enable UART TX
  90 }
  91
  92 static void
  93 uart_putc (unsigned char ch)
  94 {
  95     while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))
  96     {
  97         ;
  98     }
  99
 100     UART0_UDR = ch;
 101 }
 102
 103 static void
 104 uart_puts (char * s)
 105 {
 106     while (*s)
 107     {
 108         uart_putc (*s);
 109         s++;
 110     }
 111 }
 112
 113 static void
 114 uart_puts_P (PGM_P s)
 115 {
 116     uint8_t ch;
 117
 118     while ((ch = pgm_read_byte(s)) != '\0')
 119     {
 120         uart_putc (ch);
 121         s++;
 122     }
 123 }
 124
 125 static uint8_t
 126 itox (uint8_t val)
 127 {
 128     uint8_t rtc;
 129
 130     val &= 0x0F;
 131
 132     if (val <= 9)
 133     {
 134         rtc = val + '0';
 135     }
 136     else
 137     {
 138         rtc = val - 10 + 'A';
 139     }
 140     return (rtc);
 141 }
 142
 143 static void
 144 itoxx (char * xx, unsigned char i)
 145 {
 146     *xx++ = itox (i >> 4);
 147     *xx++ = itox (i & 0x0F);
 148     *xx = '\0';
 149 }
 150
 151 static void
 152 timer1_init (void)
 153 {
 154 #if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__)                // ATtiny45 / ATtiny85:
 155
 156 #if F_CPU >= 16000000L
 157     OCR1C   =  (F_CPU / F_INTERRUPTS / 8) - 1;                              // compare value: 1/15000 of CPU frequency, presc = 8
 158     TCCR1   = (1 << CTC1) | (1 << CS12);                                    // switch CTC Mode on, set prescaler to 8
 159 #else
 160     OCR1C   =  (F_CPU / F_INTERRUPTS / 4) - 1;                              // compare value: 1/15000 of CPU frequency, presc = 4
 161     TCCR1   = (1 << CTC1) | (1 << CS11) | (1 << CS10);                      // switch CTC Mode on, set prescaler to 4
 162 #endif
 163
 164 #else                                                                       // ATmegaXX:
 165     OCR1A   =  (F_CPU / F_INTERRUPTS) - 1;                                  // compare value: 1/15000 of CPU frequency
 166     TCCR1B  = (1 << WGM12) | (1 << CS10);                                   // switch CTC Mode on, set prescaler to 1
 167 #endif
 168
 169 #ifdef TIMSK1
 170     TIMSK1  = 1 << OCIE1A;                                                  // OCIE1A: Interrupt by timer compare
 171 #else
 172     TIMSK   = 1 << OCIE1A;                                                  // OCIE1A: Interrupt by timer compare
 173 #endif
 174 }
 175
 176 #ifdef TIM1_COMPA_vect                                                      // ATtiny84
 177 #define COMPA_VECT  TIM1_COMPA_vect
 178 #else
 179 #define COMPA_VECT  TIMER1_COMPA_vect                                       // ATmega
 180 #endif
 181
 182 ISR(COMPA_VECT)                                                             // Timer1 output compare A interrupt service routine, called every 1/15000 sec
 183 {
 184   (void) irmp_ISR();                                                        // call irmp ISR
 185   // call other timer interrupt routines...
 186 }
 187
 188 int
 189 main (void)
 190 {
 191     IRMP_DATA   irmp_data;
 192     char        buf[3];
 193
 194     irmp_init();                                                            // initialize irmp
 195     timer1_init();                                                          // initialize timer1
 196     uart_init();                                                            // initialize uart
 197
 198     sei ();                                                                 // enable interrupts
 199
 200     for (;;)
 201     {
 202         if (irmp_get_data (&irmp_data))
 203         {
 204             uart_puts_P (PSTR("protocol: 0x"));
 205             itoxx (buf, irmp_data.protocol);
 206             uart_puts (buf);
 207
 208 #if IRMP_PROTOCOL_NAMES == 1
 209             uart_puts_P (PSTR("   "));
 210             uart_puts_P (pgm_read_word (&(irmp_protocol_names[irmp_data.protocol])));
 211 #endif
 212
 213             uart_puts_P (PSTR("   address: 0x"));
 214             itoxx (buf, irmp_data.address >> 8);
 215             uart_puts (buf);
 216             itoxx (buf, irmp_data.address & 0xFF);
 217             uart_puts (buf);
 218
 219             uart_puts_P (PSTR("   command: 0x"));
 220             itoxx (buf, irmp_data.command >> 8);
 221             uart_puts (buf);
 222             itoxx (buf, irmp_data.command & 0xFF);
 223             uart_puts (buf);
 224
 225             uart_puts_P (PSTR("   flags: 0x"));
 226             itoxx (buf, irmp_data.flags);
 227             uart_puts (buf);
 228
 229             uart_puts_P (PSTR("\r\n"));
 230         }
 231     }
 232 }
 233
 234 /*---------------------------------------------------------------------------------------------------------------------------------------------------
 235  * LM4F120 Launchpad (ARM Cortex M4):
 236  *---------------------------------------------------------------------------------------------------------------------------------------------------
 237  */
 238 #elif defined(STELLARIS_ARM_CORTEX_M4)
 239
 240 void
 241 timer1_init (void)
 242 {
 243     SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);
 244     TimerConfigure(TIMER1_BASE, TIMER_CFG_32_BIT_PER);
 245
 246     TimerLoadSet(TIMER1_BASE, TIMER_A, (F_CPU / F_INTERRUPTS) -1);
 247     IntEnable(INT_TIMER1A);
 248     TimerIntEnable(TIMER1_BASE, TIMER_TIMA_TIMEOUT);
 249     TimerEnable(TIMER1_BASE, TIMER_A);
 250     // Important: Timer1IntHandler has to be configured in startup_ccs.c !
 251 }
 252
 253 void
 254 Timer1IntHandler(void)                                                      // Timer1 Interrupt Handler
 255 {
 256   (void) irmp_ISR();                                                        // call irmp ISR
 257   // call other timer interrupt routines...
 258 }
 259
 260 int
 261 main (void)
 262 {
 263     IRMP_DATA irmp_data;
 264
 265     ROM_FPUEnable();
 266     ROM_FPUStackingEnable();
 267     ROM_SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN);
 268
 269     irmp_init();                                                            // initialize irmp
 270     timer1_init();                                                          // initialize timer1
 271     sei ();                                                                 // enable interrupts
 272
 273     for (;;)
 274     {
 275         if (irmp_get_data (&irmp_data))
 276         {
 277             // ir signal decoded, do something here...
 278             // irmp_data.protocol is the protocol, see irmp.h
 279             // irmp_data.address is the address/manufacturer code of ir sender
 280             // irmp_data.command is the command code
 281             // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)
 282         }
 283     }
 284 }
 285
 286 /*---------------------------------------------------------------------------------------------------------------------------------------------------
 287  * PIC18F4520 with XC8 compiler:
 288  *---------------------------------------------------------------------------------------------------------------------------------------------------
 289  */
 290 #elif defined (__XC8)
 291
 292 #define _XTAL_FREQ  32000000UL                                              // 32MHz clock
 293 #define FOSC        _XTAL_FREQ
 294 #define FCY         FOSC / 4UL                                              // --> 8MHz
 295
 296 #define BAUDRATE 19200UL
 297 #define BRG (( FCY  16  BAUDRATE ) -1UL)
 298
 299 #include <stdio.h>
 300 #include <stdlib.h>
 301
 302 int
 303 main (void)
 304 {
 305     IRMP_DATA irmp_data;
 306
 307     irmp_init();                                                            // initialize irmp
 308
 309     // infinite loop, interrupts will blink PORTD pins and handle UART communications.
 310     while (1)
 311     {
 312         LATBbits.LATB0 = ~LATBbits.LATB0;
 313
 314         if (irmp_get_data (&irmp_data))
 315         {
 316             // ir signal decoded, do something here...
 317             // irmp_data.protocol is the protocol, see irmp.h
 318             // irmp_data.address is the address/manufacturer code of ir sender
 319             // irmp_data.command is the command code
 320             // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)
 321             printf("proto %d addr %d cmd %d\n", irmp_data.protocol, irmp_data.address, irmp_data.command );
 322         }
 323     }
 324 }
 325
 326 void interrupt high_priority high_isr(void)
 327 {
 328     if (TMR2IF)
 329     {
 330         TMR2IF = 0;                                                         // clear Timer 0 interrupt flag
 331         irmp_ISR();
 332     }
 333 }
 334
 335 /*---------------------------------------------------------------------------------------------------------------------------------------------------
 336  * STM32:
 337  *---------------------------------------------------------------------------------------------------------------------------------------------------
 338  */
 339 #elif defined(ARM_STM32)
 340
 341 uint32_t
 342 SysCtlClockGet(void)
 343 {
 344     RCC_ClocksTypeDef RCC_ClocksStatus;
 345     RCC_GetClocksFreq(&RCC_ClocksStatus);
 346     return RCC_ClocksStatus.SYSCLK_Frequency;
 347 }
 348
 349 void
 350 timer2_init (void)
 351 {
 352     TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
 353     NVIC_InitTypeDef NVIC_InitStructure;
 354     RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
 355
 356     TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
 357     TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
 358     TIM_TimeBaseStructure.TIM_Period = 7;
 359     TIM_TimeBaseStructure.TIM_Prescaler = ((F_CPU / F_INTERRUPTS)/8) - 1;
 360     TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
 361
 362     TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
 363
 364     NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
 365     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
 366     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
 367     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
 368     NVIC_Init(&NVIC_InitStructure);
 369
 370     TIM_Cmd(TIM2, ENABLE);
 371 }
 372
 373 void
 374 TIM2_IRQHandler(void)                                                  // Timer2 Interrupt Handler
 375 {
 376   TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
 377   (void) irmp_ISR();                                                        // call irmp ISR
 378   // call other timer interrupt routines...
 379 }
 380
 381 int
 382 main (void)
 383 {
 384     IRMP_DATA irmp_data;
 385
 386     irmp_init();                                                            // initialize irmp
 387     timer2_init();                                                          // initialize timer2
 388
 389     for (;;)
 390     {
 391         if (irmp_get_data (&irmp_data))
 392         {
 393             // ir signal decoded, do something here...
 394             // irmp_data.protocol is the protocol, see irmp.h
 395             // irmp_data.address is the address/manufacturer code of ir sender
 396             // irmp_data.command is the command code
 397             // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)
 398         }
 399     }
 400 }
 401 #endif