irmp-main-avr-uart.c

   1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
   2  * irmp-main-avr-uart.cpp - demo main module to test IRMP decoder on AVR with UART
   3  *
   4  * Copyright (c) 2009-2016 Frank Meyer - frank(at)fli4l.de
   5  *
   6  * $Id: irmp-main-avr-uart.c,v 1.1 2016/01/12 11:55:05 fm Exp $
   7  *
   8  * This demo module is runnable on AVRs with UART
   9  *
  10  * ATMEGA88 @ 8 MHz internal RC      Osc with BODLEVEL 4.3V: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9
  11  * ATMEGA88 @ 8 MHz external Crystal Osc with BODLEVEL 4.3V: lfuse: 0xFF hfuse: 0xDC efuse: 0xF9
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *---------------------------------------------------------------------------------------------------------------------------------------------------
  18  */
  19
  20 #include "irmp.h"
  21
  22 #ifndef F_CPU
  23 #error F_CPU unknown
  24 #endif
  25
  26 /*---------------------------------------------------------------------------------------------------------------------------------------------------
  27  * ATMEL AVR part:
  28  *---------------------------------------------------------------------------------------------------------------------------------------------------
  29  */
  30 #define BAUD  9600L
  31 #include <util/setbaud.h>
  32
  33 #ifdef UBRR0H
  34
  35 #define UART0_UBRRH                             UBRR0H
  36 #define UART0_UBRRL                             UBRR0L
  37 #define UART0_UCSRA                             UCSR0A
  38 #define UART0_UCSRB                             UCSR0B
  39 #define UART0_UCSRC                             UCSR0C
  40 #define UART0_UDRE_BIT_VALUE                    (1<<UDRE0)
  41 #define UART0_UCSZ1_BIT_VALUE                   (1<<UCSZ01)
  42 #define UART0_UCSZ0_BIT_VALUE                   (1<<UCSZ00)
  43 #ifdef URSEL0
  44 #define UART0_URSEL_BIT_VALUE                   (1<<URSEL0)
  45 #else
  46 #define UART0_URSEL_BIT_VALUE                   (0)
  47 #endif
  48 #define UART0_TXEN_BIT_VALUE                    (1<<TXEN0)
  49 #define UART0_UDR                               UDR0
  50 #define UART0_U2X                               U2X0
  51
  52 #else
  53
  54 #define UART0_UBRRH                             UBRRH
  55 #define UART0_UBRRL                             UBRRL
  56 #define UART0_UCSRA                             UCSRA
  57 #define UART0_UCSRB                             UCSRB
  58 #define UART0_UCSRC                             UCSRC
  59 #define UART0_UDRE_BIT_VALUE                    (1<<UDRE)
  60 #define UART0_UCSZ1_BIT_VALUE                   (1<<UCSZ1)
  61 #define UART0_UCSZ0_BIT_VALUE                   (1<<UCSZ0)
  62 #ifdef URSEL
  63 #define UART0_URSEL_BIT_VALUE                   (1<<URSEL)
  64 #else
  65 #define UART0_URSEL_BIT_VALUE                   (0)
  66 #endif
  67 #define UART0_TXEN_BIT_VALUE                    (1<<TXEN)
  68 #define UART0_UDR                               UDR
  69 #define UART0_U2X                               U2X
  70
  71 #endif //UBRR0H
  72
  73 static void
  74 uart_init (void)
  75 {
  76     UART0_UBRRH = UBRRH_VALUE;                                                                      // set baud rate
  77     UART0_UBRRL = UBRRL_VALUE;
  78
  79 #if USE_2X
  80     UART0_UCSRA |= (1<<UART0_U2X);
  81 #else
  82     UART0_UCSRA &= ~(1<<UART0_U2X);
  83 #endif
  84
  85     UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;
  86     UART0_UCSRB |= UART0_TXEN_BIT_VALUE;                                                            // enable UART TX
  87 }
  88
  89 static void
  90 uart_putc (unsigned char ch)
  91 {
  92     while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))
  93     {
  94         ;
  95     }
  96
  97     UART0_UDR = ch;
  98 }
  99
 100 static void
 101 uart_puts (char * s)
 102 {
 103     while (*s)
 104     {
 105         uart_putc (*s);
 106         s++;
 107     }
 108 }
 109
 110 static void
 111 uart_puts_P (PGM_P s)
 112 {
 113     uint8_t ch;
 114
 115     while ((ch = pgm_read_byte(s)) != '\0')
 116     {
 117         uart_putc (ch);
 118         s++;
 119     }
 120 }
 121
 122 static char *
 123 itoh (char * buf, uint8_t digits, uint16_t number)
 124 {
 125     for (buf[digits] = 0; digits--; number >>= 4)
 126     {
 127         buf[digits] = "0123456789ABCDEF"[number & 0x0F];
 128     }
 129     return buf;
 130 }
 131
 132 static void
 133 timer1_init (void)
 134 {
 135 #if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__)                // ATtiny45 / ATtiny85:
 136
 137 #if F_CPU >= 16000000L
 138     OCR1C   =  (F_CPU / F_INTERRUPTS / 8) - 1;                              // compare value: 1/15000 of CPU frequency, presc = 8
 139     TCCR1   = (1 << CTC1) | (1 << CS12);                                    // switch CTC Mode on, set prescaler to 8
 140 #else
 141     OCR1C   =  (F_CPU / F_INTERRUPTS / 4) - 1;                              // compare value: 1/15000 of CPU frequency, presc = 4
 142     TCCR1   = (1 << CTC1) | (1 << CS11) | (1 << CS10);                      // switch CTC Mode on, set prescaler to 4
 143 #endif
 144
 145 #else                                                                       // ATmegaXX:
 146     OCR1A   =  (F_CPU / F_INTERRUPTS) - 1;                                  // compare value: 1/15000 of CPU frequency
 147     TCCR1B  = (1 << WGM12) | (1 << CS10);                                   // switch CTC Mode on, set prescaler to 1
 148 #endif
 149
 150 #ifdef TIMSK1
 151     TIMSK1  = 1 << OCIE1A;                                                  // OCIE1A: Interrupt by timer compare
 152 #else
 153     TIMSK   = 1 << OCIE1A;                                                  // OCIE1A: Interrupt by timer compare
 154 #endif
 155 }
 156
 157 #ifdef TIM1_COMPA_vect                                                      // ATtiny84
 158 #define COMPA_VECT  TIM1_COMPA_vect
 159 #else
 160 #define COMPA_VECT  TIMER1_COMPA_vect                                       // ATmega
 161 #endif
 162
 163 ISR(COMPA_VECT)                                                             // Timer1 output compare A interrupt service routine, called every 1/15000 sec
 164 {
 165   (void) irmp_ISR();                                                        // call irmp ISR
 166   // call other timer interrupt routines...
 167 }
 168
 169 int
 170 main (void)
 171 {
 172     IRMP_DATA   irmp_data;
 173     char        buf[3];
 174
 175     irmp_init();                                                            // initialize irmp
 176     timer1_init();                                                          // initialize timer1
 177     uart_init();                                                            // initialize uart
 178
 179     sei ();                                                                 // enable interrupts
 180
 181     for (;;)
 182     {
 183         if (irmp_get_data (&irmp_data))
 184         {
 185             uart_puts_P (PSTR("protocol: 0x"));
 186             itoh (buf, 2, irmp_data.protocol);
 187             uart_puts (buf);
 188
 189 #if IRMP_PROTOCOL_NAMES == 1
 190             uart_puts_P (PSTR("   "));
 191             uart_puts_P (pgm_read_word (&(irmp_protocol_names[irmp_data.protocol])));
 192 #endif
 193
 194             uart_puts_P (PSTR("   address: 0x"));
 195             itoh (buf, 4, irmp_data.address);
 196             uart_puts (buf);
 197
 198             uart_puts_P (PSTR("   command: 0x"));
 199             itoh (buf, 4, irmp_data.command);
 200             uart_puts (buf);
 201
 202             uart_puts_P (PSTR("   flags: 0x"));
 203             itoh (buf, 2, irmp_data.flags);
 204             uart_puts (buf);
 205
 206             uart_puts_P (PSTR("\r\n"));
 207         }
 208     }
 209 }