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Version 2.6.7: corrected minor bug: missing newline before #else
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported AVR mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.82 2014/09/15 10:27:38 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
47 # if IRSND_OCx == IRSND_OC0A // OC0A
48 # define IRSND_PORT_LETTER B
49 # define IRSND_BIT_NUMBER 0
50 # elif IRSND_OCx == IRSND_OC0B // OC0B
51 # define IRSND_PORT_LETTER B
52 # define IRSND_BIT_NUMBER 1
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT_LETTER A
59 # define IRSND_BIT_NUMBER 2
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
64 # if IRSND_OCx == IRSND_OC2 // OC0A
65 # define IRSND_PORT_LETTER B
66 # define IRSND_BIT_NUMBER 3
67 # else
68 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
69 # endif // IRSND_OCx
70 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
71 # if IRSND_OCx == IRSND_OC2 // OC2
72 # define IRSND_PORT_LETTER D
73 # define IRSND_BIT_NUMBER 7
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
76 # endif // IRSND_OCx
77 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
78 # if IRSND_OCx == IRSND_OC2 // OC2
79 # define IRSND_PORT_LETTER B
80 # define IRSND_BIT_NUMBER 1
81 # elif IRSND_OCx == IRSND_OC0 // OC0
82 # define IRSND_PORT_LETTER B
83 # define IRSND_BIT_NUMBER 0
84 # else
85 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
86 # endif // IRSND_OCx
87 #elif defined (__AVR_ATmega164__) \
88 || defined (__AVR_ATmega324__) \
89 || defined (__AVR_ATmega644__) \
90 || defined (__AVR_ATmega644P__) \
91 || defined (__AVR_ATmega1284__) \
92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
93 # if IRSND_OCx == IRSND_OC2A // OC2A
94 # define IRSND_PORT_LETTER D
95 # define IRSND_BIT_NUMBER 7
96 # elif IRSND_OCx == IRSND_OC2B // OC2B
97 # define IRSND_PORT_LETTER D
98 # define IRSND_BIT_NUMBER 6
99 # elif IRSND_OCx == IRSND_OC0A // OC0A
100 # define IRSND_PORT_LETTER B
101 # define IRSND_BIT_NUMBER 3
102 # elif IRSND_OCx == IRSND_OC0B // OC0B
103 # define IRSND_PORT_LETTER B
104 # define IRSND_BIT_NUMBER 4
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT_LETTER B
116 # define IRSND_BIT_NUMBER 3
117 # elif IRSND_OCx == IRSND_OC2B // OC2B
118 # define IRSND_PORT_LETTER D
119 # define IRSND_BIT_NUMBER 3
120 # elif IRSND_OCx == IRSND_OC0A // OC0A
121 # define IRSND_PORT_LETTER D
122 # define IRSND_BIT_NUMBER 6
123 # elif IRSND_OCx == IRSND_OC0B // OC0B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 5
126 # else
127 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
128 # endif // IRSND_OCx
129 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
130 # if IRSND_OCx == IRSND_OC0
131 # define IRSND_PORT_LETTER B
132 # define IRSND_BIT_NUMBER 0
133 # elif IRSND_OCx == IRSND_OC1A
134 # define IRSND_PORT_LETTER D
135 # define IRSND_BIT_NUMBER 5
136 # elif IRSND_OCx == IRSND_OC1B
137 # define IRSND_PORT_LETTER E
138 # define IRSND_BIT_NUMBER 2
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (PIC_C18) //Microchip C18 compiler
143 //Nothing here to do here -> See irsndconfig.h
144 #elif defined (ARM_STM32) //STM32
145 //Nothing here to do here -> See irsndconfig.h
146 #else
147 # if !defined (unix) && !defined (WIN32)
148 # error mikrocontroller not defined, please fill in definitions here.
149 # endif // unix, WIN32
150 #endif // __AVR...
151
152 #if defined(ATMEL_AVR)
153 # define _CONCAT(a,b) a##b
154 # define CONCAT(a,b) _CONCAT(a,b)
155 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
156 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
157 # define IRSND_BIT IRSND_BIT_NUMBER
158 #endif
159
160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
161 typedef uint16_t IRSND_PAUSE_LEN;
162 #else
163 typedef uint8_t IRSND_PAUSE_LEN;
164 #endif
165
166 /*---------------------------------------------------------------------------------------------------------------------------------------------------
167 * IR timings
168 *---------------------------------------------------------------------------------------------------------------------------------------------------
169 */
170 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
171 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
172 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
173 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
174 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
175 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
176 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
177
178 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
179 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
181 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
182 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
183 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
184 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
187 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
188 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
189 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
190 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
191 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
192
193 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
194 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
195
196 #define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
197 #define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
198
199 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
200 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
201 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
202 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
203 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
204 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
205
206 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
207 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
208 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
209 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
210 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
211 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
212 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
213
214 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
215 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
216 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
217 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
218 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
219 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
220
221 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
222 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
223 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
224
225 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
226 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
227 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
228 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
229 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
230
231 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
232 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
233 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
234 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
235 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
236
237 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
238 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
239 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
240 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
241 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
242
243 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
244 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
245 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
246 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
247 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
248 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
249
250 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
251 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
252 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
253 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
254 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
255 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
256 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
257
258 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
259 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
260 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
261 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
262 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
263 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
264 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
265 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
266
267 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
268 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
269 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
270 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
271 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
272 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
273 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
274 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
275
276 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
277 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
278 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
279 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
280 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
281 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
282 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
283 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
284 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
285 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
286 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
287 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
288
289 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
290 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
291 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
292 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
293 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
294
295 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
296
297 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
298 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
299 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
300
301 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
302 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
303 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
304 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
305 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
306
307 #ifdef PIC_C18 // PIC C18
308 # define IRSND_FREQ_TYPE uint8_t
309 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
310 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
311 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
312 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
313 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
314 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
315 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
316 #elif defined (ARM_STM32) // STM32
317 # define IRSND_FREQ_TYPE uint32_t
318 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
319 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
320 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
321 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
322 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
323 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
324 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
325 #else // AVR
326 # if F_CPU >= 16000000L
327 # define AVR_PRESCALER 8
328 # else
329 # define AVR_PRESCALER 1
330 # endif
331 # define IRSND_FREQ_TYPE uint8_t
332 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
333 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
334 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
335 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
336 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
337 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
338 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
339 #endif
340
341 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
342 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
343 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
344 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
345 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
346 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
347
348 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
349 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
350 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
351 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
352 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
353 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
354
355 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
356 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
357 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
358 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
359 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
360 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
361 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
362
363 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
364 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
365 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
366 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
367 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
368 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
369 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
370
371 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
372 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
373 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
374 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
375 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
376 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
377 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
378
379 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
380 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
381 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
382 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
383 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
384 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
385
386 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
387 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
388 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
389 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
390 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
391 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
392 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
393
394 static volatile uint8_t irsnd_busy = 0;
395 static volatile uint8_t irsnd_protocol = 0;
396 static volatile uint8_t irsnd_buffer[6] = {0};
397 static volatile uint8_t irsnd_repeat = 0;
398 static volatile uint8_t irsnd_is_on = FALSE;
399
400 #if IRSND_USE_CALLBACK == 1
401 static void (*irsnd_callback_ptr) (uint8_t);
402 #endif // IRSND_USE_CALLBACK == 1
403
404 /*---------------------------------------------------------------------------------------------------------------------------------------------------
405 * Switch PWM on
406 *---------------------------------------------------------------------------------------------------------------------------------------------------
407 */
408 static void
409 irsnd_on (void)
410 {
411 if (! irsnd_is_on)
412 {
413 #ifndef ANALYZE
414 # if defined(PIC_C18) // PIC C18
415 PWMon();
416 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
417 # elif defined (ARM_STM32) // STM32
418 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
419 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
420 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
421 # else // AVR
422 # if IRSND_OCx == IRSND_OC2 // use OC2
423 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
424 # elif IRSND_OCx == IRSND_OC2A // use OC2A
425 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
426 # elif IRSND_OCx == IRSND_OC2B // use OC2B
427 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
428 # elif IRSND_OCx == IRSND_OC0 // use OC0
429 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
430 # elif IRSND_OCx == IRSND_OC0A // use OC0A
431 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
432 # elif IRSND_OCx == IRSND_OC0B // use OC0B
433 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
434 # else
435 # error wrong value of IRSND_OCx
436 # endif // IRSND_OCx
437 # endif // C18
438 #endif // ANALYZE
439
440 #if IRSND_USE_CALLBACK == 1
441 if (irsnd_callback_ptr)
442 {
443 (*irsnd_callback_ptr) (TRUE);
444 }
445 #endif // IRSND_USE_CALLBACK == 1
446
447 irsnd_is_on = TRUE;
448 }
449 }
450
451 /*---------------------------------------------------------------------------------------------------------------------------------------------------
452 * Switch PWM off
453 * @details Switches PWM off
454 *---------------------------------------------------------------------------------------------------------------------------------------------------
455 */
456 static void
457 irsnd_off (void)
458 {
459 if (irsnd_is_on)
460 {
461 #ifndef ANALYZE
462
463 # if defined(PIC_C18) // PIC C18
464 PWMoff();
465 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
466 # elif defined (ARM_STM32) // STM32
467 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
468 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
469 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
470 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
471 # else //AVR
472
473 # if IRSND_OCx == IRSND_OC2 // use OC2
474 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
475 # elif IRSND_OCx == IRSND_OC2A // use OC2A
476 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
477 # elif IRSND_OCx == IRSND_OC2B // use OC2B
478 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
479 # elif IRSND_OCx == IRSND_OC0 // use OC0
480 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
481 # elif IRSND_OCx == IRSND_OC0A // use OC0A
482 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
483 # elif IRSND_OCx == IRSND_OC0B // use OC0B
484 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
485 # else
486 # error wrong value of IRSND_OCx
487 # endif // IRSND_OCx
488 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
489 # endif //C18
490 #endif // ANALYZE
491
492 #if IRSND_USE_CALLBACK == 1
493 if (irsnd_callback_ptr)
494 {
495 (*irsnd_callback_ptr) (FALSE);
496 }
497 #endif // IRSND_USE_CALLBACK == 1
498
499 irsnd_is_on = FALSE;
500 }
501 }
502
503 /*---------------------------------------------------------------------------------------------------------------------------------------------------
504 * Set PWM frequency
505 * @details sets pwm frequency
506 *---------------------------------------------------------------------------------------------------------------------------------------------------
507 */
508 #if defined(__12F1840)
509 extern void pwm_init(uint16_t freq);
510 #include <stdio.h>
511 #endif
512
513 static void
514 irsnd_set_freq (IRSND_FREQ_TYPE freq)
515 {
516 #ifndef ANALYZE
517 # if defined(PIC_C18) // PIC C18 or XC8
518 # if defined(__12F1840) // XC8
519 TRISA2=0;
520 PR2=freq;
521 CCP1M0=1;
522 CCP1M1=1;
523 CCP1M2=1;
524 CCP1M3=1;
525 DC1B0=1;
526 DC1B1=0;
527 CCPR1L = 0b01101001;
528 TMR2IF = 0;
529 TMR2ON=1;
530 CCP1CON &=(~0b0011); // p 197 "active high"
531 # else // PIC C18
532 OpenPWM(freq);
533 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
534 # endif
535 PWMoff();
536 # elif defined (ARM_STM32) // STM32
537 static uint32_t TimeBaseFreq = 0;
538
539 if (TimeBaseFreq == 0)
540 {
541 RCC_ClocksTypeDef RCC_ClocksStructure;
542 /* Get system clocks and store timer clock in variable */
543 RCC_GetClocksFreq(&RCC_ClocksStructure);
544 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
545 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
546 {
547 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
548 }
549 else
550 {
551 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
552 }
553 # else
554 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
555 {
556 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
557 }
558 else
559 {
560 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
561 }
562 # endif
563 }
564
565 freq = TimeBaseFreq/freq;
566
567 /* Set frequency */
568 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
569 /* Set duty cycle */
570 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
571 # else // AVR
572
573 # if IRSND_OCx == IRSND_OC2
574 OCR2 = freq; // use register OCR2 for OC2
575 # elif IRSND_OCx == IRSND_OC2A // use OC2A
576 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
577 # elif IRSND_OCx == IRSND_OC2B // use OC2B
578 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
579 # elif IRSND_OCx == IRSND_OC0 // use OC0
580 OCR0 = freq; // use register OCR2 for OC2
581 # elif IRSND_OCx == IRSND_OC0A // use OC0A
582 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
583 # elif IRSND_OCx == IRSND_OC0B // use OC0B
584 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
585 # else
586 # error wrong value of IRSND_OCx
587 # endif
588 # endif //PIC_C18
589 #endif // ANALYZE
590 }
591
592 /*---------------------------------------------------------------------------------------------------------------------------------------------------
593 * Initialize the PWM
594 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
595 *---------------------------------------------------------------------------------------------------------------------------------------------------
596 */
597 void
598 irsnd_init (void)
599 {
600 #ifndef ANALYZE
601 # if defined(PIC_C18) // PIC C18 or XC8 compiler
602 # if ! defined(__12F1840) // only C18:
603 OpenTimer;
604 # endif
605 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
606 IRSND_PIN = 0; // set IO to outout
607 PWMoff();
608 # elif defined (ARM_STM32) // STM32
609 GPIO_InitTypeDef GPIO_InitStructure;
610 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
611 TIM_OCInitTypeDef TIM_OCInitStructure;
612
613 /* GPIOx clock enable */
614 # if defined (ARM_STM32L1XX)
615 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
616 # elif defined (ARM_STM32F10X)
617 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
618 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping
619 # elif defined (ARM_STM32F4XX)
620 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
621 # endif
622
623 /* GPIO Configuration */
624 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
625 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
626 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
627 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
628 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
629 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
630 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
631 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
632 # elif defined (ARM_STM32F10X)
633 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
634 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
635 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
636 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping
637 # endif
638
639 /* TIMx clock enable */
640 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
641 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
642 # else
643 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
644 # endif
645
646 /* Time base configuration */
647 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
648 TIM_TimeBaseStructure.TIM_Prescaler = 0;
649 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
650 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
651 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
652
653 /* PWM1 Mode configuration */
654 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
655 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
656 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
657 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
658 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
659
660 /* Preload configuration */
661 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
662 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
663
664 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
665 # else // AVR
666 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
667 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
668
669 # if IRSND_OCx == IRSND_OC2 // use OC2
670 TCCR2 = (1<<WGM21); // CTC mode
671 # if AVR_PRESCALER == 8
672 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
673 # else
674 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
675 # endif
676 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
677 TCCR2A = (1<<WGM21); // CTC mode
678 # if AVR_PRESCALER == 8
679 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
680 # else
681 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
682 # endif
683 # elif IRSND_OCx == IRSND_OC0 // use OC0
684 TCCR0 = (1<<WGM01); // CTC mode
685 # if AVR_PRESCALER == 8
686 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
687 # else
688 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
689 # endif
690 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
691 TCCR0A = (1<<WGM01); // CTC mode
692 # if AVR_PRESCALER == 8
693 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
694 # else
695 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
696 # endif
697 # else
698 # error wrong value of IRSND_OCx
699 # endif
700 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
701 # endif //PIC_C18
702 #endif // ANALYZE
703 }
704
705 #if IRSND_USE_CALLBACK == 1
706 void
707 irsnd_set_callback_ptr (void (*cb)(uint8_t))
708 {
709 irsnd_callback_ptr = cb;
710 }
711 #endif // IRSND_USE_CALLBACK == 1
712
713 uint8_t
714 irsnd_is_busy (void)
715 {
716 return irsnd_busy;
717 }
718
719 static uint16_t
720 bitsrevervse (uint16_t x, uint8_t len)
721 {
722 uint16_t xx = 0;
723
724 while(len)
725 {
726 xx <<= 1;
727 if (x & 1)
728 {
729 xx |= 1;
730 }
731 x >>= 1;
732 len--;
733 }
734 return xx;
735 }
736
737
738 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
739 static uint8_t sircs_additional_bitlen;
740 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
741
742 uint8_t
743 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
744 {
745 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
746 static uint8_t toggle_bit_recs80;
747 #endif
748 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
749 static uint8_t toggle_bit_recs80ext;
750 #endif
751 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
752 static uint8_t toggle_bit_rc5;
753 #endif
754 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
755 static uint8_t toggle_bit_rc6;
756 #endif
757 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
758 static uint8_t toggle_bit_thomson;
759 #endif
760 uint16_t address;
761 uint16_t command;
762
763 if (do_wait)
764 {
765 while (irsnd_busy)
766 {
767 // do nothing;
768 }
769 }
770 else if (irsnd_busy)
771 {
772 return (FALSE);
773 }
774
775 irsnd_protocol = irmp_data_p->protocol;
776 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
777
778 switch (irsnd_protocol)
779 {
780 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
781 case IRMP_SIRCS_PROTOCOL:
782 {
783 // uint8_t sircs_additional_command_len;
784 uint8_t sircs_additional_address_len;
785
786 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
787
788 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
789 {
790 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
791 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
792 }
793 else
794 {
795 // sircs_additional_command_len = sircs_additional_bitlen;
796 sircs_additional_address_len = 0;
797 }
798
799 command = bitsrevervse (irmp_data_p->command, 15);
800
801 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
802 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
803
804 if (sircs_additional_address_len > 0)
805 {
806 address = bitsrevervse (irmp_data_p->address, 5);
807 irsnd_buffer[1] |= (address & 0x0010) >> 4;
808 irsnd_buffer[2] = (address & 0x000F) << 4;
809 }
810 irsnd_busy = TRUE;
811 break;
812 }
813 #endif
814 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
815 case IRMP_APPLE_PROTOCOL:
816 {
817 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
818 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
819
820 address = bitsrevervse (address, NEC_ADDRESS_LEN);
821 command = bitsrevervse (command, NEC_COMMAND_LEN);
822
823 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
824
825 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
826 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
827 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
828 irsnd_buffer[3] = 0x8B; // 10001011 (id)
829 irsnd_busy = TRUE;
830 break;
831 }
832 case IRMP_NEC_PROTOCOL:
833 {
834 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
835 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
836
837 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
838 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
839 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
840 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
841 irsnd_busy = TRUE;
842 break;
843 }
844 #endif
845 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
846 case IRMP_NEC16_PROTOCOL:
847 {
848 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
849 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
850
851 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
852 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
853 irsnd_busy = TRUE;
854 break;
855 }
856 #endif
857 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
858 case IRMP_NEC42_PROTOCOL:
859 {
860 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
861 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
862
863 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
864 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
865 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
866 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
867 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
868 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
869 irsnd_busy = TRUE;
870 break;
871 }
872 #endif
873 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
874 case IRMP_LGAIR_PROTOCOL:
875 {
876 address = irmp_data_p->address;
877 command = irmp_data_p->command;
878
879 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
880 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
881 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
882 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
883 ((command & 0x0F00) >> 8) +
884 ((command & 0x00F0) >>4 ) +
885 ((command & 0x000F))) & 0x000F) << 4;
886 irsnd_busy = TRUE;
887 break;
888 }
889 #endif
890 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
891 case IRMP_SAMSUNG_PROTOCOL:
892 {
893 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
894 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
895
896 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
897 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
898 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
899 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
900 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
901 irsnd_busy = TRUE;
902 break;
903 }
904 case IRMP_SAMSUNG32_PROTOCOL:
905 {
906 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
907 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
908
909 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
910 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
911 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
912 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
913 irsnd_busy = TRUE;
914 break;
915 }
916 #endif
917 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
918 case IRMP_SAMSUNG48_PROTOCOL:
919 {
920 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
921 command = bitsrevervse (irmp_data_p->command, 16);
922
923 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
924 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
925 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC
926 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
927 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC
928 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc
929 irsnd_busy = TRUE;
930 break;
931 }
932 #endif
933 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
934 case IRMP_MATSUSHITA_PROTOCOL:
935 {
936 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
937 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
938
939 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
940 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
941 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
942 irsnd_busy = TRUE;
943 break;
944 }
945 #endif
946 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
947 case IRMP_KASEIKYO_PROTOCOL:
948 {
949 uint8_t xor_value;
950 uint16_t genre2;
951
952 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
953 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
954 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
955
956 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
957
958 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
959 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
960 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
961 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
962 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
963
964 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
965
966 irsnd_buffer[5] = xor_value;
967 irsnd_busy = TRUE;
968 break;
969 }
970 #endif
971 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
972 case IRMP_RECS80_PROTOCOL:
973 {
974 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
975
976 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
977 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
978 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
979 irsnd_busy = TRUE;
980 break;
981 }
982 #endif
983 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
984 case IRMP_RECS80EXT_PROTOCOL:
985 {
986 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
987
988 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
989 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
990 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
991 irsnd_busy = TRUE;
992 break;
993 }
994 #endif
995 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
996 case IRMP_RC5_PROTOCOL:
997 {
998 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
999
1000 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
1001 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
1002 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
1003 irsnd_busy = TRUE;
1004 break;
1005 }
1006 #endif
1007 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1008 case IRMP_RC6_PROTOCOL:
1009 {
1010 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1011
1012 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
1013 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
1014 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
1015 irsnd_busy = TRUE;
1016 break;
1017 }
1018 #endif
1019 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1020 case IRMP_RC6A_PROTOCOL:
1021 {
1022 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1023
1024 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
1025 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
1026 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
1027 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1028 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
1029 irsnd_busy = TRUE;
1030 break;
1031 }
1032 #endif
1033 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1034 case IRMP_DENON_PROTOCOL:
1035 {
1036 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
1037 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
1038 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
1039 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
1040 irsnd_busy = TRUE;
1041 break;
1042 }
1043 #endif
1044 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1045 case IRMP_THOMSON_PROTOCOL:
1046 {
1047 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1048
1049 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1050 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1051 irsnd_busy = TRUE;
1052 break;
1053 }
1054 #endif
1055 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1056 case IRMP_NUBERT_PROTOCOL:
1057 {
1058 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1059 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1060 irsnd_busy = TRUE;
1061 break;
1062 }
1063 #endif
1064 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1065 case IRMP_SPEAKER_PROTOCOL:
1066 {
1067 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1068 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1069 irsnd_busy = TRUE;
1070 break;
1071 }
1072 #endif
1073 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1074 case IRMP_BANG_OLUFSEN_PROTOCOL:
1075 {
1076 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1077 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1078 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1079 irsnd_busy = TRUE;
1080 break;
1081 }
1082 #endif
1083 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1084 case IRMP_GRUNDIG_PROTOCOL:
1085 {
1086 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1087
1088 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1089 irsnd_buffer[1] = 0xC0; // 11
1090 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1091 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1092
1093 irsnd_busy = TRUE;
1094 break;
1095 }
1096 #endif
1097 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1098 case IRMP_TELEFUNKEN_PROTOCOL:
1099 {
1100 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1101 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1102
1103 irsnd_busy = TRUE;
1104 break;
1105 }
1106 #endif
1107 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1108 case IRMP_IR60_PROTOCOL:
1109 {
1110 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1111 #if 0
1112 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1113 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1114 #else
1115 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1116 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1117 #endif
1118
1119 irsnd_busy = TRUE;
1120 break;
1121 }
1122 #endif
1123 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1124 case IRMP_NOKIA_PROTOCOL:
1125 {
1126 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1127 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1128
1129 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1130 irsnd_buffer[1] = 0xFF; // 11111111
1131 irsnd_buffer[2] = 0x80; // 1
1132 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1133 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1134 irsnd_buffer[5] = (address << 7); // A
1135
1136 irsnd_busy = TRUE;
1137 break;
1138 }
1139 #endif
1140 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1141 case IRMP_SIEMENS_PROTOCOL:
1142 {
1143 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1144 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1145 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1146
1147 irsnd_busy = TRUE;
1148 break;
1149 }
1150 #endif
1151 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1152 case IRMP_RUWIDO_PROTOCOL:
1153 {
1154 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1155 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1156 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1157 irsnd_busy = TRUE;
1158 break;
1159 }
1160 #endif
1161 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1162 case IRMP_FDC_PROTOCOL:
1163 {
1164 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1165 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1166
1167 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1168 irsnd_buffer[1] = 0; // 00000000
1169 irsnd_buffer[2] = 0; // 0000RRRR
1170 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1171 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1172 irsnd_busy = TRUE;
1173 break;
1174 }
1175 #endif
1176 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1177 case IRMP_RCCAR_PROTOCOL:
1178 {
1179 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1180 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1181
1182 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1183 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1184
1185 irsnd_busy = TRUE;
1186 break;
1187 }
1188 #endif
1189 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1190 case IRMP_JVC_PROTOCOL:
1191 {
1192 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1193 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1194
1195 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1196 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1197
1198 irsnd_busy = TRUE;
1199 break;
1200 }
1201 #endif
1202 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1203 case IRMP_NIKON_PROTOCOL:
1204 {
1205 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1206 irsnd_busy = TRUE;
1207 break;
1208 }
1209 #endif
1210 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1211 case IRMP_LEGO_PROTOCOL:
1212 {
1213 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1214
1215 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1216 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1217 irsnd_busy = TRUE;
1218 break;
1219 }
1220 #endif
1221 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1222 case IRMP_A1TVBOX_PROTOCOL:
1223 {
1224 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1225 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1226 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1227
1228 irsnd_busy = TRUE;
1229 break;
1230 }
1231 #endif
1232 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1233 case IRMP_ROOMBA_PROTOCOL:
1234 {
1235
1236 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1237 irsnd_busy = TRUE;
1238 break;
1239 }
1240 #endif
1241 default:
1242 {
1243 break;
1244 }
1245 }
1246
1247 return irsnd_busy;
1248 }
1249
1250 void
1251 irsnd_stop (void)
1252 {
1253 irsnd_repeat = 0;
1254 }
1255
1256 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1257 * ISR routine
1258 * @details ISR routine, called 10000 times per second
1259 *---------------------------------------------------------------------------------------------------------------------------------------------------
1260 */
1261 uint8_t
1262 irsnd_ISR (void)
1263 {
1264 static uint8_t send_trailer = FALSE;
1265 static uint8_t current_bit = 0xFF;
1266 static uint8_t pulse_counter = 0;
1267 static IRSND_PAUSE_LEN pause_counter = 0;
1268 static uint8_t startbit_pulse_len = 0;
1269 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1270 static uint8_t pulse_1_len = 0;
1271 static uint8_t pause_1_len = 0;
1272 static uint8_t pulse_0_len = 0;
1273 static uint8_t pause_0_len = 0;
1274 static uint8_t has_stop_bit = 0;
1275 static uint8_t new_frame = TRUE;
1276 static uint8_t complete_data_len = 0;
1277 static uint8_t n_repeat_frames = 0; // number of repetition frames
1278 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1279 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1280 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1281 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1282 static uint8_t repeat_counter = 0; // repeat counter
1283 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1284 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1285 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1286 static uint8_t last_bit_value;
1287 #endif
1288 static uint8_t pulse_len = 0xFF;
1289 static IRSND_PAUSE_LEN pause_len = 0xFF;
1290
1291 if (irsnd_busy)
1292 {
1293 if (current_bit == 0xFF && new_frame) // start of transmission...
1294 {
1295 if (auto_repetition_counter > 0)
1296 {
1297 auto_repetition_pause_counter++;
1298
1299 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1300 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1301 {
1302 repeat_frame_pause_len--;
1303 }
1304 #endif
1305
1306 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1307 {
1308 auto_repetition_pause_counter = 0;
1309
1310 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1311 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1312 {
1313 current_bit = 16;
1314 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1315 }
1316 else
1317 #endif
1318 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1319 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1320 {
1321 current_bit = 15;
1322 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1323 }
1324 else
1325 #endif
1326 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1327 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1328 {
1329 current_bit = 7;
1330 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1331 }
1332 else
1333 #endif
1334 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1335 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1336 {
1337 if (auto_repetition_counter + 1 < n_auto_repetitions)
1338 {
1339 current_bit = 23;
1340 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1341 }
1342 else // nokia stop frame
1343 {
1344 current_bit = 0xFF;
1345 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1346 }
1347 }
1348 else
1349 #endif
1350 {
1351 ;
1352 }
1353 }
1354 else
1355 {
1356 #ifdef ANALYZE
1357 if (irsnd_is_on)
1358 {
1359 putchar ('0');
1360 }
1361 else
1362 {
1363 putchar ('1');
1364 }
1365 #endif
1366 return irsnd_busy;
1367 }
1368 }
1369 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1370 {
1371 packet_repeat_pause_counter++;
1372 #ifdef ANALYZE
1373 if (irsnd_is_on)
1374 {
1375 putchar ('0');
1376 }
1377 else
1378 {
1379 putchar ('1');
1380 }
1381 #endif
1382 return irsnd_busy;
1383 }
1384 else
1385 {
1386 if (send_trailer)
1387 {
1388 irsnd_busy = FALSE;
1389 send_trailer = FALSE;
1390 return irsnd_busy;
1391 }
1392
1393 n_repeat_frames = irsnd_repeat;
1394
1395 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1396 {
1397 n_repeat_frames = 255;
1398 }
1399
1400 packet_repeat_pause_counter = 0;
1401 pulse_counter = 0;
1402 pause_counter = 0;
1403
1404 switch (irsnd_protocol)
1405 {
1406 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1407 case IRMP_SIRCS_PROTOCOL:
1408 {
1409 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1410 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1411 pulse_1_len = SIRCS_1_PULSE_LEN;
1412 pause_1_len = SIRCS_PAUSE_LEN - 1;
1413 pulse_0_len = SIRCS_0_PULSE_LEN;
1414 pause_0_len = SIRCS_PAUSE_LEN - 1;
1415 has_stop_bit = SIRCS_STOP_BIT;
1416 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1417 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1418 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1419 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1420 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1421 break;
1422 }
1423 #endif
1424 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1425 case IRMP_NEC_PROTOCOL:
1426 {
1427 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1428
1429 if (repeat_counter > 0)
1430 {
1431 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1432 complete_data_len = 0;
1433 }
1434 else
1435 {
1436 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1437 complete_data_len = NEC_COMPLETE_DATA_LEN;
1438 }
1439
1440 pulse_1_len = NEC_PULSE_LEN;
1441 pause_1_len = NEC_1_PAUSE_LEN - 1;
1442 pulse_0_len = NEC_PULSE_LEN;
1443 pause_0_len = NEC_0_PAUSE_LEN - 1;
1444 has_stop_bit = NEC_STOP_BIT;
1445 n_auto_repetitions = 1; // 1 frame
1446 auto_repetition_pause_len = 0;
1447 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1448 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1449 break;
1450 }
1451 #endif
1452 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1453 case IRMP_NEC16_PROTOCOL:
1454 {
1455 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1456 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1457 pulse_1_len = NEC_PULSE_LEN;
1458 pause_1_len = NEC_1_PAUSE_LEN - 1;
1459 pulse_0_len = NEC_PULSE_LEN;
1460 pause_0_len = NEC_0_PAUSE_LEN - 1;
1461 has_stop_bit = NEC_STOP_BIT;
1462 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1463 n_auto_repetitions = 1; // 1 frame
1464 auto_repetition_pause_len = 0;
1465 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1466 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1467 break;
1468 }
1469 #endif
1470 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1471 case IRMP_NEC42_PROTOCOL:
1472 {
1473 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1474 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1475 pulse_1_len = NEC_PULSE_LEN;
1476 pause_1_len = NEC_1_PAUSE_LEN - 1;
1477 pulse_0_len = NEC_PULSE_LEN;
1478 pause_0_len = NEC_0_PAUSE_LEN - 1;
1479 has_stop_bit = NEC_STOP_BIT;
1480 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1481 n_auto_repetitions = 1; // 1 frame
1482 auto_repetition_pause_len = 0;
1483 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1484 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1485 break;
1486 }
1487 #endif
1488 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1489 case IRMP_LGAIR_PROTOCOL:
1490 {
1491 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1492 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1493 pulse_1_len = NEC_PULSE_LEN;
1494 pause_1_len = NEC_1_PAUSE_LEN - 1;
1495 pulse_0_len = NEC_PULSE_LEN;
1496 pause_0_len = NEC_0_PAUSE_LEN - 1;
1497 has_stop_bit = NEC_STOP_BIT;
1498 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1499 n_auto_repetitions = 1; // 1 frame
1500 auto_repetition_pause_len = 0;
1501 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1502 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1503 break;
1504 }
1505 #endif
1506 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1507 case IRMP_SAMSUNG_PROTOCOL:
1508 {
1509 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1510 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1511 pulse_1_len = SAMSUNG_PULSE_LEN;
1512 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1513 pulse_0_len = SAMSUNG_PULSE_LEN;
1514 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1515 has_stop_bit = SAMSUNG_STOP_BIT;
1516 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1517 n_auto_repetitions = 1; // 1 frame
1518 auto_repetition_pause_len = 0;
1519 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1520 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1521 break;
1522 }
1523
1524 case IRMP_SAMSUNG32_PROTOCOL:
1525 {
1526 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1527 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1528 pulse_1_len = SAMSUNG_PULSE_LEN;
1529 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1530 pulse_0_len = SAMSUNG_PULSE_LEN;
1531 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1532 has_stop_bit = SAMSUNG_STOP_BIT;
1533 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1534 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame
1535 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1536 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1537 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1538 break;
1539 }
1540 #endif
1541 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1542 case IRMP_SAMSUNG48_PROTOCOL:
1543 {
1544 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1545 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1546 pulse_1_len = SAMSUNG_PULSE_LEN;
1547 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1548 pulse_0_len = SAMSUNG_PULSE_LEN;
1549 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1550 has_stop_bit = SAMSUNG_STOP_BIT;
1551 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;
1552 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame
1553 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1554 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;
1555 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1556 break;
1557 }
1558 #endif
1559 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1560 case IRMP_MATSUSHITA_PROTOCOL:
1561 {
1562 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1563 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1564 pulse_1_len = MATSUSHITA_PULSE_LEN;
1565 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1566 pulse_0_len = MATSUSHITA_PULSE_LEN;
1567 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1568 has_stop_bit = MATSUSHITA_STOP_BIT;
1569 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1570 n_auto_repetitions = 1; // 1 frame
1571 auto_repetition_pause_len = 0;
1572 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1573 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1574 break;
1575 }
1576 #endif
1577 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1578 case IRMP_KASEIKYO_PROTOCOL:
1579 {
1580 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1581 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1582 pulse_1_len = KASEIKYO_PULSE_LEN;
1583 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1584 pulse_0_len = KASEIKYO_PULSE_LEN;
1585 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1586 has_stop_bit = KASEIKYO_STOP_BIT;
1587 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1588 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1589 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1590 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1591 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1592 break;
1593 }
1594 #endif
1595 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1596 case IRMP_RECS80_PROTOCOL:
1597 {
1598 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1599 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1600 pulse_1_len = RECS80_PULSE_LEN;
1601 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1602 pulse_0_len = RECS80_PULSE_LEN;
1603 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1604 has_stop_bit = RECS80_STOP_BIT;
1605 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1606 n_auto_repetitions = 1; // 1 frame
1607 auto_repetition_pause_len = 0;
1608 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1609 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1610 break;
1611 }
1612 #endif
1613 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1614 case IRMP_RECS80EXT_PROTOCOL:
1615 {
1616 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1617 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1618 pulse_1_len = RECS80EXT_PULSE_LEN;
1619 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1620 pulse_0_len = RECS80EXT_PULSE_LEN;
1621 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1622 has_stop_bit = RECS80EXT_STOP_BIT;
1623 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1624 n_auto_repetitions = 1; // 1 frame
1625 auto_repetition_pause_len = 0;
1626 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1627 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1628 break;
1629 }
1630 #endif
1631 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1632 case IRMP_TELEFUNKEN_PROTOCOL:
1633 {
1634 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1635 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1636 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1637 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1638 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1639 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1640 has_stop_bit = TELEFUNKEN_STOP_BIT;
1641 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1642 n_auto_repetitions = 1; // 1 frames
1643 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1644 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1645 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1646 break;
1647 }
1648 #endif
1649 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1650 case IRMP_RC5_PROTOCOL:
1651 {
1652 startbit_pulse_len = RC5_BIT_LEN;
1653 startbit_pause_len = RC5_BIT_LEN;
1654 pulse_len = RC5_BIT_LEN;
1655 pause_len = RC5_BIT_LEN;
1656 has_stop_bit = RC5_STOP_BIT;
1657 complete_data_len = RC5_COMPLETE_DATA_LEN;
1658 n_auto_repetitions = 1; // 1 frame
1659 auto_repetition_pause_len = 0;
1660 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1661 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1662 break;
1663 }
1664 #endif
1665 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1666 case IRMP_RC6_PROTOCOL:
1667 {
1668 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1669 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1670 pulse_len = RC6_BIT_LEN;
1671 pause_len = RC6_BIT_LEN;
1672 has_stop_bit = RC6_STOP_BIT;
1673 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1674 n_auto_repetitions = 1; // 1 frame
1675 auto_repetition_pause_len = 0;
1676 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1677 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1678 break;
1679 }
1680 #endif
1681 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1682 case IRMP_RC6A_PROTOCOL:
1683 {
1684 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1685 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1686 pulse_len = RC6_BIT_LEN;
1687 pause_len = RC6_BIT_LEN;
1688 has_stop_bit = RC6_STOP_BIT;
1689 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1690 n_auto_repetitions = 1; // 1 frame
1691 auto_repetition_pause_len = 0;
1692 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1693 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1694 break;
1695 }
1696 #endif
1697 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1698 case IRMP_DENON_PROTOCOL:
1699 {
1700 startbit_pulse_len = 0x00;
1701 startbit_pause_len = 0x00;
1702 pulse_1_len = DENON_PULSE_LEN;
1703 pause_1_len = DENON_1_PAUSE_LEN - 1;
1704 pulse_0_len = DENON_PULSE_LEN;
1705 pause_0_len = DENON_0_PAUSE_LEN - 1;
1706 has_stop_bit = DENON_STOP_BIT;
1707 complete_data_len = DENON_COMPLETE_DATA_LEN;
1708 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1709 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1710 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1711 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1712 break;
1713 }
1714 #endif
1715 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1716 case IRMP_THOMSON_PROTOCOL:
1717 {
1718 startbit_pulse_len = 0x00;
1719 startbit_pause_len = 0x00;
1720 pulse_1_len = THOMSON_PULSE_LEN;
1721 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1722 pulse_0_len = THOMSON_PULSE_LEN;
1723 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1724 has_stop_bit = THOMSON_STOP_BIT;
1725 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1726 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1727 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1728 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1729 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1730 break;
1731 }
1732 #endif
1733 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1734 case IRMP_NUBERT_PROTOCOL:
1735 {
1736 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1737 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1738 pulse_1_len = NUBERT_1_PULSE_LEN;
1739 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1740 pulse_0_len = NUBERT_0_PULSE_LEN;
1741 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1742 has_stop_bit = NUBERT_STOP_BIT;
1743 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1744 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1745 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1746 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1747 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1748 break;
1749 }
1750 #endif
1751 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1752 case IRMP_SPEAKER_PROTOCOL:
1753 {
1754 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1755 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1756 pulse_1_len = SPEAKER_1_PULSE_LEN;
1757 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1758 pulse_0_len = SPEAKER_0_PULSE_LEN;
1759 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1760 has_stop_bit = SPEAKER_STOP_BIT;
1761 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1762 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1763 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1764 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1765 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1766 break;
1767 }
1768 #endif
1769 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1770 case IRMP_BANG_OLUFSEN_PROTOCOL:
1771 {
1772 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1773 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1774 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1775 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1776 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1777 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1778 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1779 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1780 n_auto_repetitions = 1; // 1 frame
1781 auto_repetition_pause_len = 0;
1782 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1783 last_bit_value = 0;
1784 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1785 break;
1786 }
1787 #endif
1788 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1789 case IRMP_GRUNDIG_PROTOCOL:
1790 {
1791 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1792 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1793 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1794 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1795 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1796 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1797 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1798 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1799 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1800 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1801 break;
1802 }
1803 #endif
1804 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1805 case IRMP_IR60_PROTOCOL:
1806 {
1807 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1808 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1809 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1810 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1811 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1812 complete_data_len = IR60_COMPLETE_DATA_LEN;
1813 n_auto_repetitions = IR60_FRAMES; // 2 frames
1814 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1815 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1816 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1817 break;
1818 }
1819 #endif
1820 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1821 case IRMP_NOKIA_PROTOCOL:
1822 {
1823 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1824 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1825 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1826 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1827 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1828 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1829 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1830 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1831 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1832 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1833 break;
1834 }
1835 #endif
1836 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1837 case IRMP_SIEMENS_PROTOCOL:
1838 {
1839 startbit_pulse_len = SIEMENS_BIT_LEN;
1840 startbit_pause_len = SIEMENS_BIT_LEN;
1841 pulse_len = SIEMENS_BIT_LEN;
1842 pause_len = SIEMENS_BIT_LEN;
1843 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1844 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1845 n_auto_repetitions = 1; // 1 frame
1846 auto_repetition_pause_len = 0;
1847 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1848 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1849 break;
1850 }
1851 #endif
1852 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1853 case IRMP_RUWIDO_PROTOCOL:
1854 {
1855 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1856 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1857 pulse_len = RUWIDO_BIT_PULSE_LEN;
1858 pause_len = RUWIDO_BIT_PAUSE_LEN;
1859 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1860 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1861 n_auto_repetitions = 1; // 1 frame
1862 auto_repetition_pause_len = 0;
1863 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
1864 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1865 break;
1866 }
1867 #endif
1868 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1869 case IRMP_FDC_PROTOCOL:
1870 {
1871 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1872 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1873 complete_data_len = FDC_COMPLETE_DATA_LEN;
1874 pulse_1_len = FDC_PULSE_LEN;
1875 pause_1_len = FDC_1_PAUSE_LEN - 1;
1876 pulse_0_len = FDC_PULSE_LEN;
1877 pause_0_len = FDC_0_PAUSE_LEN - 1;
1878 has_stop_bit = FDC_STOP_BIT;
1879 n_auto_repetitions = 1; // 1 frame
1880 auto_repetition_pause_len = 0;
1881 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1882 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1883 break;
1884 }
1885 #endif
1886 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1887 case IRMP_RCCAR_PROTOCOL:
1888 {
1889 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1890 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1891 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1892 pulse_1_len = RCCAR_PULSE_LEN;
1893 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1894 pulse_0_len = RCCAR_PULSE_LEN;
1895 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1896 has_stop_bit = RCCAR_STOP_BIT;
1897 n_auto_repetitions = 1; // 1 frame
1898 auto_repetition_pause_len = 0;
1899 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1900 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1901 break;
1902 }
1903 #endif
1904 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1905 case IRMP_JVC_PROTOCOL:
1906 {
1907 if (repeat_counter != 0) // skip start bit if repetition frame
1908 {
1909 current_bit = 0;
1910 }
1911
1912 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1913 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1914 complete_data_len = JVC_COMPLETE_DATA_LEN;
1915 pulse_1_len = JVC_PULSE_LEN;
1916 pause_1_len = JVC_1_PAUSE_LEN - 1;
1917 pulse_0_len = JVC_PULSE_LEN;
1918 pause_0_len = JVC_0_PAUSE_LEN - 1;
1919 has_stop_bit = JVC_STOP_BIT;
1920 n_auto_repetitions = 1; // 1 frame
1921 auto_repetition_pause_len = 0;
1922 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1923 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1924 break;
1925 }
1926 #endif
1927 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1928 case IRMP_NIKON_PROTOCOL:
1929 {
1930 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1931 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
1932 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1933 pulse_1_len = NIKON_PULSE_LEN;
1934 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1935 pulse_0_len = NIKON_PULSE_LEN;
1936 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1937 has_stop_bit = NIKON_STOP_BIT;
1938 n_auto_repetitions = 1; // 1 frame
1939 auto_repetition_pause_len = 0;
1940 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1941 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1942 break;
1943 }
1944 #endif
1945 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1946 case IRMP_LEGO_PROTOCOL:
1947 {
1948 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1949 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1950 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1951 pulse_1_len = LEGO_PULSE_LEN;
1952 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1953 pulse_0_len = LEGO_PULSE_LEN;
1954 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1955 has_stop_bit = LEGO_STOP_BIT;
1956 n_auto_repetitions = 1; // 1 frame
1957 auto_repetition_pause_len = 0;
1958 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1959 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1960 break;
1961 }
1962 #endif
1963 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1964 case IRMP_A1TVBOX_PROTOCOL:
1965 {
1966 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
1967 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
1968 pulse_len = A1TVBOX_BIT_PULSE_LEN;
1969 pause_len = A1TVBOX_BIT_PAUSE_LEN;
1970 has_stop_bit = A1TVBOX_STOP_BIT;
1971 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
1972 n_auto_repetitions = 1; // 1 frame
1973 auto_repetition_pause_len = 0;
1974 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
1975 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1976 break;
1977 }
1978 #endif
1979 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1980 case IRMP_ROOMBA_PROTOCOL:
1981 {
1982 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
1983 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
1984 pulse_1_len = ROOMBA_1_PULSE_LEN;
1985 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
1986 pulse_0_len = ROOMBA_0_PULSE_LEN;
1987 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
1988 has_stop_bit = ROOMBA_STOP_BIT;
1989 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
1990 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
1991 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1992 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1993 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1994 break;
1995 }
1996 #endif
1997 default:
1998 {
1999 irsnd_busy = FALSE;
2000 break;
2001 }
2002 }
2003 }
2004 }
2005
2006 if (irsnd_busy)
2007 {
2008 new_frame = FALSE;
2009
2010 switch (irsnd_protocol)
2011 {
2012 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
2013 case IRMP_SIRCS_PROTOCOL:
2014 #endif
2015 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
2016 case IRMP_NEC_PROTOCOL:
2017 #endif
2018 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2019 case IRMP_NEC16_PROTOCOL:
2020 #endif
2021 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
2022 case IRMP_NEC42_PROTOCOL:
2023 #endif
2024 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
2025 case IRMP_LGAIR_PROTOCOL:
2026 #endif
2027 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2028 case IRMP_SAMSUNG_PROTOCOL:
2029 case IRMP_SAMSUNG32_PROTOCOL:
2030 #endif
2031 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
2032 case IRMP_SAMSUNG48_PROTOCOL:
2033 #endif
2034 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2035 case IRMP_MATSUSHITA_PROTOCOL:
2036 #endif
2037 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
2038 case IRMP_KASEIKYO_PROTOCOL:
2039 #endif
2040 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
2041 case IRMP_RECS80_PROTOCOL:
2042 #endif
2043 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
2044 case IRMP_RECS80EXT_PROTOCOL:
2045 #endif
2046 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2047 case IRMP_TELEFUNKEN_PROTOCOL:
2048 #endif
2049 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2050 case IRMP_DENON_PROTOCOL:
2051 #endif
2052 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2053 case IRMP_NUBERT_PROTOCOL:
2054 #endif
2055 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2056 case IRMP_SPEAKER_PROTOCOL:
2057 #endif
2058 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2059 case IRMP_BANG_OLUFSEN_PROTOCOL:
2060 #endif
2061 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2062 case IRMP_FDC_PROTOCOL:
2063 #endif
2064 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2065 case IRMP_RCCAR_PROTOCOL:
2066 #endif
2067 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2068 case IRMP_JVC_PROTOCOL:
2069 #endif
2070 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2071 case IRMP_NIKON_PROTOCOL:
2072 #endif
2073 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2074 case IRMP_LEGO_PROTOCOL:
2075 #endif
2076 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2077 case IRMP_THOMSON_PROTOCOL:
2078 #endif
2079 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2080 case IRMP_ROOMBA_PROTOCOL:
2081 #endif
2082
2083 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2084 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
2085 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2086 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
2087 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \
2088 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2089 {
2090 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2091 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
2092 {
2093 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
2094 {
2095 auto_repetition_pause_len--;
2096 }
2097
2098 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
2099 {
2100 repeat_frame_pause_len--;
2101 }
2102 }
2103 #endif
2104
2105 if (pulse_counter == 0)
2106 {
2107 if (current_bit == 0xFF) // send start bit
2108 {
2109 pulse_len = startbit_pulse_len;
2110 pause_len = startbit_pause_len;
2111 }
2112 else if (current_bit < complete_data_len) // send n'th bit
2113 {
2114 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2115 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2116 {
2117 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2118 {
2119 pulse_len = SAMSUNG_PULSE_LEN;
2120 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2121 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2122 }
2123 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2124 {
2125 pulse_len = SAMSUNG_PULSE_LEN;
2126 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2127 }
2128 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2129 {
2130 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2131
2132 pulse_len = SAMSUNG_PULSE_LEN;
2133 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2134 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2135 }
2136 }
2137 else
2138 #endif
2139
2140 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2141 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2142 {
2143 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2144 {
2145 pulse_len = NEC_PULSE_LEN;
2146 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2147 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2148 }
2149 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2150 {
2151 pulse_len = NEC_PULSE_LEN;
2152 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2153 }
2154 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2155 {
2156 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2157
2158 pulse_len = NEC_PULSE_LEN;
2159 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2160 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2161 }
2162 }
2163 else
2164 #endif
2165
2166 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2167 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2168 {
2169 if (current_bit == 0) // send 2nd start bit
2170 {
2171 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2172 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2173 }
2174 else if (current_bit == 1) // send 3rd start bit
2175 {
2176 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2177 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2178 }
2179 else if (current_bit == 2) // send 4th start bit
2180 {
2181 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2182 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2183 }
2184 else if (current_bit == 19) // send trailer bit
2185 {
2186 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2187 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2188 }
2189 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2190 {
2191 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;
2192 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2193
2194 if (cur_bit_value == last_bit_value)
2195 {
2196 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2197 }
2198 else
2199 {
2200 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2201 last_bit_value = cur_bit_value;
2202 }
2203 }
2204 }
2205 else
2206 #endif
2207 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))
2208 {
2209 pulse_len = pulse_1_len;
2210 pause_len = pause_1_len;
2211 }
2212 else
2213 {
2214 pulse_len = pulse_0_len;
2215 pause_len = pause_0_len;
2216 }
2217 }
2218 else if (has_stop_bit) // send stop bit
2219 {
2220 pulse_len = pulse_0_len;
2221
2222 if (auto_repetition_counter < n_auto_repetitions)
2223 {
2224 pause_len = pause_0_len;
2225 }
2226 else
2227 {
2228 pause_len = 255; // last frame: pause of 255
2229 }
2230 }
2231 }
2232
2233 if (pulse_counter < pulse_len)
2234 {
2235 if (pulse_counter == 0)
2236 {
2237 irsnd_on ();
2238 }
2239 pulse_counter++;
2240 }
2241 else if (pause_counter < pause_len)
2242 {
2243 if (pause_counter == 0)
2244 {
2245 irsnd_off ();
2246 }
2247 pause_counter++;
2248 }
2249 else
2250 {
2251 current_bit++;
2252
2253 if (current_bit >= complete_data_len + has_stop_bit)
2254 {
2255 current_bit = 0xFF;
2256 auto_repetition_counter++;
2257
2258 if (auto_repetition_counter == n_auto_repetitions)
2259 {
2260 irsnd_busy = FALSE;
2261 auto_repetition_counter = 0;
2262 }
2263 new_frame = TRUE;
2264 }
2265
2266 pulse_counter = 0;
2267 pause_counter = 0;
2268 }
2269 break;
2270 }
2271 #endif
2272
2273 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2274 case IRMP_RC5_PROTOCOL:
2275 #endif
2276 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2277 case IRMP_RC6_PROTOCOL:
2278 #endif
2279 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2280 case IRMP_RC6A_PROTOCOL:
2281 #endif
2282 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2283 case IRMP_SIEMENS_PROTOCOL:
2284 #endif
2285 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2286 case IRMP_RUWIDO_PROTOCOL:
2287 #endif
2288 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2289 case IRMP_GRUNDIG_PROTOCOL:
2290 #endif
2291 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2292 case IRMP_IR60_PROTOCOL:
2293 #endif
2294 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2295 case IRMP_NOKIA_PROTOCOL:
2296 #endif
2297 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2298 case IRMP_A1TVBOX_PROTOCOL:
2299 #endif
2300
2301 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2302 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2303 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2304 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2305 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2306 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2307 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2308 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2309 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2310 {
2311 if (pulse_counter == pulse_len && pause_counter == pause_len)
2312 {
2313 current_bit++;
2314
2315 if (current_bit >= complete_data_len)
2316 {
2317 current_bit = 0xFF;
2318
2319 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2320 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2321 {
2322 auto_repetition_counter++;
2323
2324 if (repeat_counter > 0)
2325 { // set 117 msec pause time
2326 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2327 }
2328
2329 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2330 {
2331 n_auto_repetitions++; // increment number of auto repetitions
2332 repeat_counter++;
2333 }
2334 else if (auto_repetition_counter == n_auto_repetitions)
2335 {
2336 irsnd_busy = FALSE;
2337 auto_repetition_counter = 0;
2338 }
2339 }
2340 else
2341 #endif
2342 {
2343 irsnd_busy = FALSE;
2344 }
2345
2346 new_frame = TRUE;
2347 irsnd_off ();
2348 }
2349
2350 pulse_counter = 0;
2351 pause_counter = 0;
2352 }
2353
2354 if (! new_frame)
2355 {
2356 uint8_t first_pulse;
2357
2358 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2359 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2360 {
2361 if (current_bit == 0xFF || // start bit of start-frame
2362 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2363 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2364 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2365 {
2366 pulse_len = startbit_pulse_len;
2367 pause_len = startbit_pause_len;
2368 first_pulse = TRUE;
2369 }
2370 else // send n'th bit
2371 {
2372 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2373 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2374 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2375 }
2376 }
2377 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2378 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2379 #endif
2380 {
2381 if (current_bit == 0xFF) // 1 start bit
2382 {
2383 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2384 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2385 {
2386 pulse_len = startbit_pulse_len;
2387 pause_len = startbit_pause_len;
2388 }
2389 else
2390 #endif
2391 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2392 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2393 {
2394 current_bit = 0;
2395 }
2396 else
2397 #endif
2398 {
2399 ;
2400 }
2401
2402 first_pulse = TRUE;
2403 }
2404 else // send n'th bit
2405 {
2406 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2407 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2408 {
2409 pulse_len = RC6_BIT_LEN;
2410 pause_len = RC6_BIT_LEN;
2411
2412 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2413 {
2414 if (current_bit == 4) // toggle bit (double len)
2415 {
2416 pulse_len = 2 * RC6_BIT_LEN;
2417 pause_len = 2 * RC6_BIT_LEN;
2418 }
2419 }
2420 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2421 {
2422 if (current_bit == 4) // toggle bit (double len)
2423 {
2424 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2425 pause_len = 2 * RC6_BIT_LEN;
2426 }
2427 else if (current_bit == 5) // toggle bit (double len)
2428 {
2429 pause_len = 2 * RC6_BIT_LEN;
2430 }
2431 }
2432 }
2433 #endif
2434 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2435 }
2436
2437 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2438 {
2439 first_pulse = first_pulse ? FALSE : TRUE;
2440 }
2441 }
2442
2443 if (first_pulse)
2444 {
2445 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2446
2447 if (pulse_counter < pulse_len)
2448 {
2449 if (pulse_counter == 0)
2450 {
2451 irsnd_on ();
2452 }
2453 pulse_counter++;
2454 }
2455 else // if (pause_counter < pause_len)
2456 {
2457 if (pause_counter == 0)
2458 {
2459 irsnd_off ();
2460 }
2461 pause_counter++;
2462 }
2463 }
2464 else
2465 {
2466 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2467
2468 if (pause_counter < pause_len)
2469 {
2470 if (pause_counter == 0)
2471 {
2472 irsnd_off ();
2473 }
2474 pause_counter++;
2475 }
2476 else // if (pulse_counter < pulse_len)
2477 {
2478 if (pulse_counter == 0)
2479 {
2480 irsnd_on ();
2481 }
2482 pulse_counter++;
2483 }
2484 }
2485 }
2486 break;
2487 }
2488 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2489 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2490
2491 default:
2492 {
2493 irsnd_busy = FALSE;
2494 break;
2495 }
2496 }
2497 }
2498
2499 if (! irsnd_busy)
2500 {
2501 if (repeat_counter < n_repeat_frames)
2502 {
2503 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2504 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2505 {
2506 irsnd_buffer[2] |= 0x0F;
2507 }
2508 #endif
2509 repeat_counter++;
2510 irsnd_busy = TRUE;
2511 }
2512 else
2513 {
2514 irsnd_busy = TRUE; //Rainer
2515 send_trailer = TRUE;
2516 n_repeat_frames = 0;
2517 repeat_counter = 0;
2518 }
2519 }
2520 }
2521
2522 #ifdef ANALYZE
2523 if (irsnd_is_on)
2524 {
2525 putchar ('0');
2526 }
2527 else
2528 {
2529 putchar ('1');
2530 }
2531 #endif
2532
2533 return irsnd_busy;
2534 }
2535
2536 #ifdef ANALYZE
2537
2538 // main function - for unix/linux + windows only!
2539 // AVR: see main.c!
2540 // Compile it under linux with:
2541 // cc irsnd.c -o irsnd
2542 //
2543 // usage: ./irsnd protocol hex-address hex-command >filename
2544
2545 int
2546 main (int argc, char ** argv)
2547 {
2548 int protocol;
2549 int address;
2550 int command;
2551 IRMP_DATA irmp_data;
2552
2553 if (argc != 4 && argc != 5)
2554 {
2555 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2556 return 1;
2557 }
2558
2559 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2560 sscanf (argv[2], "%x", &address) == 1 &&
2561 sscanf (argv[3], "%x", &command) == 1)
2562 {
2563 irmp_data.protocol = protocol;
2564 irmp_data.address = address;
2565 irmp_data.command = command;
2566
2567 if (argc == 5)
2568 {
2569 irmp_data.flags = atoi (argv[4]);
2570 }
2571 else
2572 {
2573 irmp_data.flags = 0;
2574 }
2575
2576 irsnd_init ();
2577
2578 (void) irsnd_send_data (&irmp_data, TRUE);
2579
2580 while (irsnd_busy)
2581 {
2582 irsnd_ISR ();
2583 }
2584
2585 putchar ('\n');
2586
2587 #if 1 // enable here to send twice
2588 (void) irsnd_send_data (&irmp_data, TRUE);
2589
2590 while (irsnd_busy)
2591 {
2592 irsnd_ISR ();
2593 }
2594
2595 putchar ('\n');
2596 #endif
2597 }
2598 else
2599 {
2600 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2601 return 1;
2602 }
2603 return 0;
2604 }
2605
2606 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)