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Version 3.0.2
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2016 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported AVR mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATtiny2313 ATtiny4313
12 * ATmega8, ATmega16, ATmega32
13 * ATmega162
14 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
15 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
16 *
17 * $Id: irsnd.c,v 1.101 2016/09/09 07:53:29 fm Exp $
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *---------------------------------------------------------------------------------------------------------------------------------------------------
24 */
25
26 #include "irsnd.h"
27
28 #ifndef F_CPU
29 # error F_CPU unkown
30 #endif
31
32 /*---------------------------------------------------------------------------------------------------------------------------------------------------
33 * ATtiny pin definition of OC0A / OC0B
34 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
35 *---------------------------------------------------------------------------------------------------------------------------------------------------
36 */
37 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
38 # if IRSND_OCx == IRSND_OC0A // OC0A
39 # define IRSND_PORT_LETTER B
40 # define IRSND_BIT_NUMBER 2
41 # elif IRSND_OCx == IRSND_OC0B // OC0B
42 # define IRSND_PORT_LETTER A
43 # define IRSND_BIT_NUMBER 7
44 # else
45 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
46 # endif // IRSND_OCx
47
48 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
49 # if IRSND_OCx == IRSND_OC0A // OC0A
50 # define IRSND_PORT_LETTER B
51 # define IRSND_BIT_NUMBER 0
52 # elif IRSND_OCx == IRSND_OC0B // OC0B
53 # define IRSND_PORT_LETTER B
54 # define IRSND_BIT_NUMBER 1
55 # else
56 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
57 # endif // IRSND_OCx
58
59 #elif defined (__AVR_ATtiny2313__) || defined (__AVR_ATtiny4313__) // ATtiny2313/4313 uses OC0A = PB2 or OC0B = PD5
60 # if IRSND_OCx == IRSND_OC0A // OC0A
61 # define IRSND_PORT_LETTER B
62 # define IRSND_BIT_NUMBER 2
63 # elif IRSND_OCx == IRSND_OC0B // OC0B
64 # define IRSND_PORT_LETTER D
65 # define IRSND_BIT_NUMBER 5
66 # else
67 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
68 # endif // IRSND_OCx
69
70 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
71 # if IRSND_OCx == IRSND_OC0A // OC0A
72 # define IRSND_PORT_LETTER A
73 # define IRSND_BIT_NUMBER 2
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
76 # endif // IRSND_OCx
77
78 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
79 # if IRSND_OCx == IRSND_OC2 // OC2
80 # define IRSND_PORT_LETTER B
81 # define IRSND_BIT_NUMBER 3
82 # else
83 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
84 # endif // IRSND_OCx
85 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC0 = PB3 or OC2 = PD7
86 # if IRSND_OCx == IRSND_OC2 // OC2
87 # define IRSND_PORT_LETTER D
88 # define IRSND_BIT_NUMBER 7
89 # elif IRSND_OCx == IRSND_OC0 // OC0
90 # define IRSND_PORT_LETTER B
91 # define IRSND_BIT_NUMBER 3
92 # else
93 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
94 # endif // IRSND_OCx
95
96 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
97 # if IRSND_OCx == IRSND_OC2 // OC2
98 # define IRSND_PORT_LETTER B
99 # define IRSND_BIT_NUMBER 1
100 # elif IRSND_OCx == IRSND_OC0 // OC0
101 # define IRSND_PORT_LETTER B
102 # define IRSND_BIT_NUMBER 0
103 # else
104 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
105 # endif // IRSND_OCx
106
107 #elif defined (__AVR_ATmega164__) \
108 || defined (__AVR_ATmega324__) \
109 || defined (__AVR_ATmega644__) \
110 || defined (__AVR_ATmega644P__) \
111 || defined (__AVR_ATmega1284__) \
112 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
113 # if IRSND_OCx == IRSND_OC2A // OC2A
114 # define IRSND_PORT_LETTER D
115 # define IRSND_BIT_NUMBER 7
116 # elif IRSND_OCx == IRSND_OC2B // OC2B
117 # define IRSND_PORT_LETTER D
118 # define IRSND_BIT_NUMBER 6
119 # elif IRSND_OCx == IRSND_OC0A // OC0A
120 # define IRSND_PORT_LETTER B
121 # define IRSND_BIT_NUMBER 3
122 # elif IRSND_OCx == IRSND_OC0B // OC0B
123 # define IRSND_PORT_LETTER B
124 # define IRSND_BIT_NUMBER 4
125 # else
126 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
127 # endif // IRSND_OCx
128
129 #elif defined (__AVR_ATmega48__) \
130 || defined (__AVR_ATmega88__) \
131 || defined (__AVR_ATmega88P__) \
132 || defined (__AVR_ATmega168__) \
133 || defined (__AVR_ATmega168P__) \
134 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
135 # if IRSND_OCx == IRSND_OC2A // OC2A
136 # define IRSND_PORT_LETTER B
137 # define IRSND_BIT_NUMBER 3
138 # elif IRSND_OCx == IRSND_OC2B // OC2B
139 # define IRSND_PORT_LETTER D
140 # define IRSND_BIT_NUMBER 3
141 # elif IRSND_OCx == IRSND_OC0A // OC0A
142 # define IRSND_PORT_LETTER D
143 # define IRSND_BIT_NUMBER 6
144 # elif IRSND_OCx == IRSND_OC0B // OC0B
145 # define IRSND_PORT_LETTER D
146 # define IRSND_BIT_NUMBER 5
147 # else
148 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
149 # endif // IRSND_OCx
150
151 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
152 # if IRSND_OCx == IRSND_OC0
153 # define IRSND_PORT_LETTER B
154 # define IRSND_BIT_NUMBER 0
155 # elif IRSND_OCx == IRSND_OC1A
156 # define IRSND_PORT_LETTER D
157 # define IRSND_BIT_NUMBER 5
158 # elif IRSND_OCx == IRSND_OC1B
159 # define IRSND_PORT_LETTER E
160 # define IRSND_BIT_NUMBER 2
161 # endif // IRSND_OCx
162
163 #elif defined (__AVR_XMEGA__) // ATxmega
164 # if IRSND_OCx == IRSND_XMEGA_OC0A
165 # define IRSND_BIT_NUMBER 0
166 # elif IRSND_OCx == IRSND_XMEGA_OC0B
167 # define IRSND_BIT_NUMBER 1
168 # elif IRSND_OCx == IRSND_XMEGA_OC0C
169 # define IRSND_BIT_NUMBER 2
170 # elif IRSND_OCx == IRSND_XMEGA_OC0D
171 # define IRSND_BIT_NUMBER 3
172 # elif IRSND_OCx == IRSND_XMEGA_OC1A
173 # define IRSND_BIT_NUMBER 4
174 # elif IRSND_OCx == IRSND_XMEGA_OC1B
175 # define IRSND_BIT_NUMBER 5
176 # else
177 # error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h
178 # endif // IRSND_OCx
179
180 #elif defined (PIC_C18) //Microchip C18 compiler
181 //Nothing here to do here -> See irsndconfig.h
182 #elif defined (ARM_STM32) //STM32
183 //Nothing here to do here -> See irsndconfig.h
184 /*---------------------------------------------------------------------------------------------------------------------------------------------------
185 * Macro digitalPinHasPWM bothers PIC_C18 compiler, but why?
186 *
187 * #elif defined (TEENSY_ARM_CORTEX_M4) // Teensy3
188 * # if !digitalPinHasPWM(IRSND_PIN)
189 * # error need pin with PWM output.
190 * # endif
191 *---------------------------------------------------------------------------------------------------------------------------------------------------
192 */
193 #else
194 # if !defined (unix) && !defined (WIN32)
195 # error mikrocontroller not defined, please fill in definitions here.
196 # endif // unix, WIN32
197 #endif // __AVR...
198
199 #if defined(__AVR_XMEGA__)
200 # define _CONCAT(a,b) a##b
201 # define CONCAT(a,b) _CONCAT(a,b)
202 # define IRSND_PORT IRSND_PORT_PRE.OUT
203 # define IRSND_DDR IRSND_PORT_PRE.DIR
204 # define IRSND_PIN IRSND_PORT_PRE.IN
205 # define IRSND_BIT IRSND_BIT_NUMBER
206 #elif defined(ATMEL_AVR)
207 # define _CONCAT(a,b) a##b
208 # define CONCAT(a,b) _CONCAT(a,b)
209 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
210 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
211 # define IRSND_BIT IRSND_BIT_NUMBER
212 #endif
213
214 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
215 typedef uint16_t IRSND_PAUSE_LEN;
216 #else
217 typedef uint8_t IRSND_PAUSE_LEN;
218 #endif
219
220 /*---------------------------------------------------------------------------------------------------------------------------------------------------
221 * IR timings
222 *---------------------------------------------------------------------------------------------------------------------------------------------------
223 */
224 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
225 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
226 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
227 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
228 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
229 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
230 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
231
232 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
233 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
234 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
235 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
236 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
237 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
238 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
239
240 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
241 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
242 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
243 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
244 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
245 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
246
247 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
248 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
249
250 #define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
251 #define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
252
253 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
254 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
255 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
256 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
257 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
258 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
259
260 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
261 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
262 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
263 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
264 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
265 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
266 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
267
268 #define PANASONIC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME + 0.5)
269 #define PANASONIC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME + 0.5)
270 #define PANASONIC_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME + 0.5)
271 #define PANASONIC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME + 0.5)
272 #define PANASONIC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME + 0.5)
273 #define PANASONIC_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
274 #define PANASONIC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
275
276 #define MITSU_HEAVY_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME + 0.5)
277 #define MITSU_HEAVY_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME + 0.5)
278 #define MITSU_HEAVY_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME + 0.5)
279 #define MITSU_HEAVY_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME + 0.5)
280 #define MITSU_HEAVY_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME + 0.5)
281 #define MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MITSU_HEAVY_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
282
283 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
284 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
285 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
286 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
287 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
288 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
289
290 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
291 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
292 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
293
294 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
295 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
296 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
297 #define RC6_BIT_2_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_2_TIME + 0.5)
298 #define RC6_BIT_3_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_3_TIME + 0.5)
299 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
300
301 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
302 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
303 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
304 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
305 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
306
307 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
308 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
309 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
310 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
311 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
312
313 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
314 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
315 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
316 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
317 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
318 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
319
320 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
321 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
322 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
323 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
324 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
325 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
326 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
327
328 #define BOSE_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME + 0.5)
329 #define BOSE_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME + 0.5)
330 #define BOSE_PULSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_PULSE_TIME + 0.5)
331 #define BOSE_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME + 0.5)
332 #define BOSE_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME + 0.5)
333 #define BOSE_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BOSE_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
334 #define BOSE_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BOSE_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
335
336 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
337 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
338 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
339 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
340 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
341 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
342 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
343 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
344
345 #define FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5)
346 #define FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5)
347 #define FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5)
348 #define FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5)
349 #define FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5)
350 #define FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5)
351 #define FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
352 #define FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
353
354 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
355 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
356 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
357 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
358 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
359 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
360 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
361 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
362
363 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
364 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
365 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
366 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
367 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
368 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
369 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
370 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
371 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
372 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
373 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
374 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
375
376 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
377 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
378 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
379 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
380 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
381
382 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
383
384 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
385 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
386 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
387
388 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
389 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
390 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
391 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
392 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
393
394 #ifdef PIC_C18 // PIC C18
395 # define IRSND_FREQ_TYPE uint8_t
396 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
397 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
398 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
399 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
400 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
401 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
402 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
403 #elif defined (ARM_STM32) // STM32
404 # define IRSND_FREQ_TYPE uint32_t
405 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
406 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
407 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
408 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
409 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
410 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
411 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
412 #elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY
413 # define IRSND_FREQ_TYPE float
414 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
415 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
416 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
417 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
418 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
419 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
420 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
421 #else // AVR
422 # if F_CPU >= 16000000L
423 # define AVR_PRESCALER 8
424 # else
425 # define AVR_PRESCALER 1
426 # endif
427 # define IRSND_FREQ_TYPE uint8_t
428 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
429 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
430 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
431 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
432 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
433 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
434 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
435 #endif
436
437 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
438 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
439 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
440 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
441 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
442 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
443
444 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
445 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
446 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
447 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
448 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
449 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
450
451 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
452 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
453 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
454 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
455 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
456 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
457 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
458
459 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
460 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
461 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
462 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
463 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
464 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
465 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
466
467 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
468 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
469 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
470 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
471 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
472 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
473 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
474
475 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
476 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
477 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
478 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
479 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
480 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
481
482 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
483 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
484 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
485 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
486 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
487 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
488 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
489
490 #define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)
491 #define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)
492 #define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)
493 #define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)
494 #define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)
495 #define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)
496 #define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
497
498 #define ACP24_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME + 0.5)
499 #define ACP24_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME + 0.5)
500 #define ACP24_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_REPEAT_START_BIT_PAUSE_TIME + 0.5)
501 #define ACP24_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_PULSE_TIME + 0.5)
502 #define ACP24_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME + 0.5)
503 #define ACP24_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME + 0.5)
504 #define ACP24_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ACP24_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
505
506 static volatile uint8_t irsnd_busy = 0;
507 static volatile uint8_t irsnd_protocol = 0;
508 static volatile uint8_t irsnd_buffer[11] = {0};
509 static volatile uint8_t irsnd_repeat = 0;
510 static volatile uint8_t irsnd_is_on = FALSE;
511
512 #if IRSND_USE_CALLBACK == 1
513 static void (*irsnd_callback_ptr) (uint8_t);
514 #endif // IRSND_USE_CALLBACK == 1
515
516 /*---------------------------------------------------------------------------------------------------------------------------------------------------
517 * Switch PWM on
518 *---------------------------------------------------------------------------------------------------------------------------------------------------
519 */
520 static void
521 irsnd_on (void)
522 {
523 if (! irsnd_is_on)
524 {
525 #ifndef ANALYZE
526 # if defined(PIC_C18) // PIC C18
527 PWMon();
528 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
529
530 # elif defined (ARM_STM32) // STM32
531 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
532 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
533 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
534
535 # elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY
536 analogWrite(IRSND_PIN, 33 * 255 / 100); // pwm 33%
537
538 # elif defined (__AVR_XMEGA__)
539 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
540 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A
541 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
542 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B
543 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
544 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C
545 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
546 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D
547 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
548 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A
549 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
550 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B
551 # else
552 # error wrong value of IRSND_OCx
553 # endif // IRSND_OCx
554
555 # else // AVR
556 # if IRSND_OCx == IRSND_OC2 // use OC2
557 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
558 # elif IRSND_OCx == IRSND_OC2A // use OC2A
559 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
560 # elif IRSND_OCx == IRSND_OC2B // use OC2B
561 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
562 # elif IRSND_OCx == IRSND_OC0 // use OC0
563 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
564 # elif IRSND_OCx == IRSND_OC0A // use OC0A
565 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
566 # elif IRSND_OCx == IRSND_OC0B // use OC0B
567 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
568 # else
569 # error wrong value of IRSND_OCx
570 # endif // IRSND_OCx
571 # endif // C18
572 #endif // ANALYZE
573
574 #if IRSND_USE_CALLBACK == 1
575 if (irsnd_callback_ptr)
576 {
577 (*irsnd_callback_ptr) (TRUE);
578 }
579 #endif // IRSND_USE_CALLBACK == 1
580
581 irsnd_is_on = TRUE;
582 }
583 }
584
585 /*---------------------------------------------------------------------------------------------------------------------------------------------------
586 * Switch PWM off
587 * @details Switches PWM off
588 *---------------------------------------------------------------------------------------------------------------------------------------------------
589 */
590 static void
591 irsnd_off (void)
592 {
593 if (irsnd_is_on)
594 {
595 #ifndef ANALYZE
596
597 # if defined(PIC_C18) // PIC C18
598 PWMoff();
599 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
600
601 # elif defined (ARM_STM32) // STM32
602 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
603 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
604 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
605 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
606
607 # elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY
608 analogWrite(IRSND_PIN, 0); // pwm off, LOW level
609
610 # elif defined (__AVR_XMEGA__)
611 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
612 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected
613 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
614 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected
615 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
616 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected
617 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
618 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected
619 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
620 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected
621 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
622 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected
623 # else
624 # error wrong value of IRSND_OCx
625 # endif // IRSND_OCx
626
627 # else //AVR
628
629 # if IRSND_OCx == IRSND_OC2 // use OC2
630 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
631 # elif IRSND_OCx == IRSND_OC2A // use OC2A
632 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
633 # elif IRSND_OCx == IRSND_OC2B // use OC2B
634 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
635 # elif IRSND_OCx == IRSND_OC0 // use OC0
636 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
637 # elif IRSND_OCx == IRSND_OC0A // use OC0A
638 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
639 # elif IRSND_OCx == IRSND_OC0B // use OC0B
640 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
641 # else
642 # error wrong value of IRSND_OCx
643 # endif // IRSND_OCx
644 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
645 # endif //C18
646 #endif // ANALYZE
647
648 #if IRSND_USE_CALLBACK == 1
649 if (irsnd_callback_ptr)
650 {
651 (*irsnd_callback_ptr) (FALSE);
652 }
653 #endif // IRSND_USE_CALLBACK == 1
654
655 irsnd_is_on = FALSE;
656 }
657 }
658
659 /*---------------------------------------------------------------------------------------------------------------------------------------------------
660 * Set PWM frequency
661 * @details sets pwm frequency
662 *---------------------------------------------------------------------------------------------------------------------------------------------------
663 */
664 #if defined(__12F1840)
665 extern void pwm_init(uint16_t freq);
666 #include <stdio.h>
667 #endif
668
669 static void
670 irsnd_set_freq (IRSND_FREQ_TYPE freq)
671 {
672 #ifndef ANALYZE
673 # if defined(PIC_C18) // PIC C18 or XC8
674 # if defined(__12F1840) // XC8
675 TRISA2=0;
676 PR2=freq;
677 CCP1M0=1;
678 CCP1M1=1;
679 CCP1M2=1;
680 CCP1M3=1;
681 DC1B0=1;
682 DC1B1=0;
683 CCPR1L = 0b01101001;
684 TMR2IF = 0;
685 TMR2ON=1;
686 CCP1CON &=(~0b0011); // p 197 "active high"
687 # else // PIC C18
688 OpenPWM(freq);
689 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
690 # endif
691 PWMoff();
692 # elif defined (ARM_STM32) // STM32
693 static uint32_t TimeBaseFreq = 0;
694
695 if (TimeBaseFreq == 0)
696 {
697 RCC_ClocksTypeDef RCC_ClocksStructure;
698 /* Get system clocks and store timer clock in variable */
699 RCC_GetClocksFreq(&RCC_ClocksStructure);
700 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
701 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
702 {
703 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
704 }
705 else
706 {
707 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
708 }
709 # else
710 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
711 {
712 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
713 }
714 else
715 {
716 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
717 }
718 # endif
719 }
720
721 freq = TimeBaseFreq/freq;
722
723 /* Set frequency */
724 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
725 /* Set duty cycle */
726 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
727
728 # elif defined (TEENSY_ARM_CORTEX_M4)
729 analogWriteResolution(8); // 8 bit
730 analogWriteFrequency(IRSND_PIN, freq);
731 analogWrite(IRSND_PIN, 0); // pwm off, LOW level
732
733 # elif defined (__AVR_XMEGA__)
734 XMEGA_Timer.CCA = freq;
735
736 # else // AVR
737
738 # if IRSND_OCx == IRSND_OC2
739 OCR2 = freq; // use register OCR2 for OC2
740 # elif IRSND_OCx == IRSND_OC2A // use OC2A
741 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
742 # elif IRSND_OCx == IRSND_OC2B // use OC2B
743 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
744 # elif IRSND_OCx == IRSND_OC0 // use OC0
745 OCR0 = freq; // use register OCR2 for OC2
746 # elif IRSND_OCx == IRSND_OC0A // use OC0A
747 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
748 # elif IRSND_OCx == IRSND_OC0B // use OC0B
749 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
750 # else
751 # error wrong value of IRSND_OCx
752 # endif
753 # endif //PIC_C18
754 #endif // ANALYZE
755 }
756
757 /*---------------------------------------------------------------------------------------------------------------------------------------------------
758 * Initialize the PWM
759 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
760 *---------------------------------------------------------------------------------------------------------------------------------------------------
761 */
762 void
763 irsnd_init (void)
764 {
765 #ifndef ANALYZE
766 # if defined(PIC_C18) // PIC C18 or XC8 compiler
767 # if ! defined(__12F1840) // only C18:
768 OpenTimer;
769 # endif
770 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
771 IRSND_PIN = 0; // set IO to outout
772 PWMoff();
773 # elif defined (ARM_STM32) // STM32
774 GPIO_InitTypeDef GPIO_InitStructure;
775 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
776 TIM_OCInitTypeDef TIM_OCInitStructure;
777
778 /* GPIOx clock enable */
779 # if defined (ARM_STM32L1XX)
780 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
781 # elif defined (ARM_STM32F10X)
782 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
783 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping
784 # elif defined (ARM_STM32F4XX)
785 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
786 # endif
787
788 /* GPIO Configuration */
789 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
790 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
791 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
792 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
793 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
794 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
795 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
796 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
797 # elif defined (ARM_STM32F10X)
798 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
799 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
800 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
801 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping
802 # endif
803
804 /* TIMx clock enable */
805 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
806 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
807 # else
808 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
809 # endif
810
811 /* Time base configuration */
812 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
813 TIM_TimeBaseStructure.TIM_Prescaler = 0;
814 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
815 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
816 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
817
818 /* PWM1 Mode configuration */
819 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
820 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
821 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
822 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
823 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
824
825 /* Preload configuration */
826 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
827 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
828
829 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
830
831 # elif defined (TEENSY_ARM_CORTEX_M4)
832 if (!digitalPinHasPWM(IRSND_PIN))
833 {
834 return;
835 }
836
837 # elif defined (__AVR_XMEGA__)
838 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
839 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
840
841 XMEGA_Timer.PER = 0xFFFF; //Topwert
842 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC
843
844 # if AVR_PRESCALER == 8
845 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8
846 # else
847 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1
848 # endif
849
850 # else // AVR
851 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
852 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
853
854 # if IRSND_OCx == IRSND_OC2 // use OC2
855 TCCR2 = (1<<WGM21); // CTC mode
856 # if AVR_PRESCALER == 8
857 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
858 # else
859 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
860 # endif
861 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
862 TCCR2A = (1<<WGM21); // CTC mode
863 # if AVR_PRESCALER == 8
864 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
865 # else
866 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
867 # endif
868 # elif IRSND_OCx == IRSND_OC0 // use OC0
869 TCCR0 = (1<<WGM01); // CTC mode
870 # if AVR_PRESCALER == 8
871 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
872 # else
873 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
874 # endif
875 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
876 TCCR0A = (1<<WGM01); // CTC mode
877 # if AVR_PRESCALER == 8
878 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
879 # else
880 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
881 # endif
882 # else
883 # error wrong value of IRSND_OCx
884 # endif
885 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
886 # endif //PIC_C18
887 #endif // ANALYZE
888 }
889
890 #if IRSND_USE_CALLBACK == 1
891 void
892 irsnd_set_callback_ptr (void (*cb)(uint8_t))
893 {
894 irsnd_callback_ptr = cb;
895 }
896 #endif // IRSND_USE_CALLBACK == 1
897
898 uint8_t
899 irsnd_is_busy (void)
900 {
901 return irsnd_busy;
902 }
903
904 static uint16_t
905 bitsrevervse (uint16_t x, uint8_t len)
906 {
907 uint16_t xx = 0;
908
909 while(len)
910 {
911 xx <<= 1;
912 if (x & 1)
913 {
914 xx |= 1;
915 }
916 x >>= 1;
917 len--;
918 }
919 return xx;
920 }
921
922
923 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
924 static uint8_t sircs_additional_bitlen;
925 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
926
927 uint8_t
928 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
929 {
930 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
931 static uint8_t toggle_bit_recs80;
932 #endif
933 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
934 static uint8_t toggle_bit_recs80ext;
935 #endif
936 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
937 static uint8_t toggle_bit_rc5;
938 #endif
939 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
940 static uint8_t toggle_bit_rc6;
941 #endif
942 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
943 static uint8_t toggle_bit_thomson;
944 #endif
945 uint16_t address;
946 uint16_t command;
947
948 if (do_wait)
949 {
950 while (irsnd_busy)
951 {
952 // do nothing;
953 }
954 }
955 else if (irsnd_busy)
956 {
957 return (FALSE);
958 }
959
960 irsnd_protocol = irmp_data_p->protocol;
961 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
962
963 switch (irsnd_protocol)
964 {
965 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
966 case IRMP_SIRCS_PROTOCOL:
967 {
968 // uint8_t sircs_additional_command_len;
969 uint8_t sircs_additional_address_len;
970
971 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
972
973 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
974 {
975 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
976 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
977 }
978 else
979 {
980 // sircs_additional_command_len = sircs_additional_bitlen;
981 sircs_additional_address_len = 0;
982 }
983
984 command = bitsrevervse (irmp_data_p->command, 15);
985
986 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
987 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
988
989 if (sircs_additional_address_len > 0)
990 {
991 address = bitsrevervse (irmp_data_p->address, 5);
992 irsnd_buffer[1] |= (address & 0x0010) >> 4;
993 irsnd_buffer[2] = (address & 0x000F) << 4;
994 }
995 irsnd_busy = TRUE;
996 break;
997 }
998 #endif
999 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1000 case IRMP_APPLE_PROTOCOL:
1001 {
1002 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
1003 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
1004
1005 address = bitsrevervse (address, NEC_ADDRESS_LEN);
1006 command = bitsrevervse (command, NEC_COMMAND_LEN);
1007
1008 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
1009
1010 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1011 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1012 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
1013 irsnd_buffer[3] = 0x8B; // 10001011 (id)
1014 irsnd_busy = TRUE;
1015 break;
1016 }
1017 case IRMP_NEC_PROTOCOL:
1018 {
1019 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
1020 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
1021
1022 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1023 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1024 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
1025 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
1026 irsnd_busy = TRUE;
1027 break;
1028 }
1029 #endif
1030 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1031 case IRMP_NEC16_PROTOCOL:
1032 {
1033 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
1034 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
1035
1036 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
1037 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1038 irsnd_busy = TRUE;
1039 break;
1040 }
1041 #endif
1042 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1043 case IRMP_NEC42_PROTOCOL:
1044 {
1045 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
1046 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
1047
1048 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
1049 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
1050 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
1051 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
1052 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
1053 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
1054 irsnd_busy = TRUE;
1055 break;
1056 }
1057 #endif
1058 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1059 case IRMP_LGAIR_PROTOCOL:
1060 {
1061 address = irmp_data_p->address;
1062 command = irmp_data_p->command;
1063
1064 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
1065 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
1066 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
1067 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
1068 ((command & 0x0F00) >> 8) +
1069 ((command & 0x00F0) >>4 ) +
1070 ((command & 0x000F))) & 0x000F) << 4;
1071 irsnd_busy = TRUE;
1072 break;
1073 }
1074 #endif
1075 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1076 case IRMP_SAMSUNG_PROTOCOL:
1077 {
1078 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1079 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
1080
1081 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1082 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1083 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
1084 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
1085 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
1086 irsnd_busy = TRUE;
1087 break;
1088 }
1089 case IRMP_SAMSUNG32_PROTOCOL:
1090 {
1091 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1092 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
1093
1094 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1095 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1096 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
1097 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
1098 irsnd_busy = TRUE;
1099 break;
1100 }
1101 #endif
1102 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1103 case IRMP_SAMSUNG48_PROTOCOL:
1104 {
1105 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1106 command = bitsrevervse (irmp_data_p->command, 16);
1107
1108 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1109 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1110 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC
1111 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
1112 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC
1113 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc
1114 irsnd_busy = TRUE;
1115 break;
1116 }
1117 #endif
1118 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1119 case IRMP_MATSUSHITA_PROTOCOL:
1120 {
1121 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
1122 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
1123
1124 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
1125 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
1126 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
1127 irsnd_busy = TRUE;
1128 break;
1129 }
1130 #endif
1131 #if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1
1132 case IRMP_TECHNICS_PROTOCOL:
1133 {
1134 command = bitsrevervse (irmp_data_p->command, TECHNICS_COMMAND_LEN);
1135
1136 irsnd_buffer[0] = (command & 0x07FC) >> 3; // CCCCCCCC
1137 irsnd_buffer[1] = ((command & 0x0007) << 5) | ((~command & 0x07C0) >> 6); // CCCccccc
1138 irsnd_buffer[2] = (~command & 0x003F) << 2; // cccccc
1139 irsnd_busy = TRUE;
1140 break;
1141 }
1142 #endif
1143 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1144 case IRMP_KASEIKYO_PROTOCOL:
1145 {
1146 uint8_t xor_value;
1147 uint16_t genre2;
1148
1149 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
1150 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
1151 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
1152
1153 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
1154
1155 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1156 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1157 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
1158 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
1159 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
1160
1161 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
1162
1163 irsnd_buffer[5] = xor_value;
1164 irsnd_busy = TRUE;
1165 break;
1166 }
1167 #endif
1168 #if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1
1169 case IRMP_PANASONIC_PROTOCOL:
1170 {
1171 address = bitsrevervse (irmp_data_p->address, PANASONIC_ADDRESS_LEN);
1172 command = bitsrevervse (irmp_data_p->command, PANASONIC_COMMAND_LEN);
1173
1174 irsnd_buffer[0] = 0x40; // 01000000
1175 irsnd_buffer[1] = 0x04; // 00000100
1176 irsnd_buffer[2] = 0x01; // 00000001
1177 irsnd_buffer[3] = (address & 0xFF00) >> 8; // AAAAAAAA
1178 irsnd_buffer[4] = (address & 0x00FF); // AAAAAAAA
1179 irsnd_buffer[5] = (command & 0xFF00) >> 8; // CCCCCCCC
1180 irsnd_buffer[6] = (command & 0x00FF); // CCCCCCCC
1181
1182 irsnd_busy = TRUE;
1183 break;
1184 }
1185 #endif
1186 #if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1
1187 case IRMP_MITSU_HEAVY_PROTOCOL:
1188 {
1189 address = irmp_data_p->address;
1190 command = irmp_data_p->command;
1191
1192 irsnd_buffer[0] = 0x4A;
1193 irsnd_buffer[1] = 0x75;
1194 irsnd_buffer[2] = 0xC3;
1195 irsnd_buffer[3] = 0x64;
1196 irsnd_buffer[4] = 0x9B;
1197 irsnd_buffer[5] = ~(address & 0xFF00) >> 8;
1198 irsnd_buffer[6] = (address & 0xFF00) >> 8;
1199 irsnd_buffer[7] = ~(address & 0x00FF);
1200 irsnd_buffer[8] = (address & 0x00FF);
1201 irsnd_buffer[9] = ~(command & 0x00FF);
1202 irsnd_buffer[10] = (command & 0x00FF);
1203
1204 irsnd_busy = TRUE;
1205 break;
1206 }
1207 #endif
1208 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1209 case IRMP_RECS80_PROTOCOL:
1210 {
1211 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
1212
1213 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
1214 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
1215 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
1216 irsnd_busy = TRUE;
1217 break;
1218 }
1219 #endif
1220 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1221 case IRMP_RECS80EXT_PROTOCOL:
1222 {
1223 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
1224
1225 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
1226 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
1227 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
1228 irsnd_busy = TRUE;
1229 break;
1230 }
1231 #endif
1232 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1233 case IRMP_RC5_PROTOCOL:
1234 {
1235 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
1236
1237 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
1238 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
1239 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
1240 irsnd_busy = TRUE;
1241 break;
1242 }
1243 #endif
1244 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1245 case IRMP_RC6_PROTOCOL:
1246 {
1247 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1248
1249 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
1250 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
1251 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
1252 irsnd_busy = TRUE;
1253 break;
1254 }
1255 #endif
1256 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1257 case IRMP_RC6A_PROTOCOL:
1258 {
1259 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1260
1261 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
1262 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
1263 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
1264 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1265 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
1266 irsnd_busy = TRUE;
1267 break;
1268 }
1269 #endif
1270 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1271 case IRMP_DENON_PROTOCOL:
1272 {
1273 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
1274 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
1275 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
1276 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
1277 irsnd_busy = TRUE;
1278 break;
1279 }
1280 #endif
1281 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1282 case IRMP_THOMSON_PROTOCOL:
1283 {
1284 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1285
1286 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1287 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1288 irsnd_busy = TRUE;
1289 break;
1290 }
1291 #endif
1292 #if IRSND_SUPPORT_BOSE_PROTOCOL == 1
1293 case IRMP_BOSE_PROTOCOL:
1294 {
1295 command = bitsrevervse (irmp_data_p->command, BOSE_COMMAND_LEN);
1296
1297 irsnd_buffer[0] = (command & 0xFF00) >> 8; // CCCCCCCC
1298 irsnd_buffer[1] = ~((command & 0xFF00) >> 8); // cccccccc
1299 irsnd_busy = TRUE;
1300 break;
1301 }
1302 #endif
1303 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1304 case IRMP_NUBERT_PROTOCOL:
1305 {
1306 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1307 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1308 irsnd_busy = TRUE;
1309 break;
1310 }
1311 #endif
1312 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
1313 case IRMP_FAN_PROTOCOL:
1314 {
1315 irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC
1316 irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1317 irsnd_busy = TRUE;
1318 break;
1319 }
1320 #endif
1321 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1322 case IRMP_SPEAKER_PROTOCOL:
1323 {
1324 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1325 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1326 irsnd_busy = TRUE;
1327 break;
1328 }
1329 #endif
1330 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1331 case IRMP_BANG_OLUFSEN_PROTOCOL:
1332 {
1333 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1334 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1335 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1336 irsnd_busy = TRUE;
1337 break;
1338 }
1339 #endif
1340 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1341 case IRMP_GRUNDIG_PROTOCOL:
1342 {
1343 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1344
1345 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1346 irsnd_buffer[1] = 0xC0; // 11
1347 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1348 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1349
1350 irsnd_busy = TRUE;
1351 break;
1352 }
1353 #endif
1354 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1355 case IRMP_TELEFUNKEN_PROTOCOL:
1356 {
1357 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1358 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1359
1360 irsnd_busy = TRUE;
1361 break;
1362 }
1363 #endif
1364 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1365 case IRMP_IR60_PROTOCOL:
1366 {
1367 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1368 #if 0
1369 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1370 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1371 #else
1372 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1373 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1374 #endif
1375
1376 irsnd_busy = TRUE;
1377 break;
1378 }
1379 #endif
1380 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1381 case IRMP_NOKIA_PROTOCOL:
1382 {
1383 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1384 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1385
1386 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1387 irsnd_buffer[1] = 0xFF; // 11111111
1388 irsnd_buffer[2] = 0x80; // 1
1389 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1390 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1391 irsnd_buffer[5] = (address << 7); // A
1392
1393 irsnd_busy = TRUE;
1394 break;
1395 }
1396 #endif
1397 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1398 case IRMP_SIEMENS_PROTOCOL:
1399 {
1400 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1401 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1402 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1403
1404 irsnd_busy = TRUE;
1405 break;
1406 }
1407 #endif
1408 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1409 case IRMP_RUWIDO_PROTOCOL:
1410 {
1411 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1412 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1413 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1414 irsnd_busy = TRUE;
1415 break;
1416 }
1417 #endif
1418 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1419 case IRMP_FDC_PROTOCOL:
1420 {
1421 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1422 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1423
1424 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1425 irsnd_buffer[1] = 0; // 00000000
1426 irsnd_buffer[2] = 0; // 0000RRRR
1427 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1428 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1429 irsnd_busy = TRUE;
1430 break;
1431 }
1432 #endif
1433 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1434 case IRMP_RCCAR_PROTOCOL:
1435 {
1436 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1437 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1438
1439 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1440 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1441
1442 irsnd_busy = TRUE;
1443 break;
1444 }
1445 #endif
1446 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1447 case IRMP_JVC_PROTOCOL:
1448 {
1449 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1450 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1451
1452 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1453 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1454
1455 irsnd_busy = TRUE;
1456 break;
1457 }
1458 #endif
1459 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1460 case IRMP_NIKON_PROTOCOL:
1461 {
1462 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1463 irsnd_busy = TRUE;
1464 break;
1465 }
1466 #endif
1467 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1468 case IRMP_LEGO_PROTOCOL:
1469 {
1470 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1471
1472 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1473 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1474 irsnd_busy = TRUE;
1475 break;
1476 }
1477 #endif
1478 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1479 case IRMP_A1TVBOX_PROTOCOL:
1480 {
1481 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1482 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1483 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1484
1485 irsnd_busy = TRUE;
1486 break;
1487 }
1488 #endif
1489 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1490 case IRMP_ROOMBA_PROTOCOL:
1491 {
1492 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1493 irsnd_busy = TRUE;
1494 break;
1495 }
1496 #endif
1497 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
1498 case IRMP_PENTAX_PROTOCOL:
1499 {
1500 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..
1501 irsnd_busy = TRUE;
1502 break;
1503 }
1504 #endif
1505 #if IRSND_SUPPORT_ACP24_PROTOCOL == 1
1506 # define ACP_SET_BIT(acp24_bitno, c, irmp_bitno) \
1507 do \
1508 { \
1509 if ((c) & (1<<(irmp_bitno))) \
1510 { \
1511 irsnd_buffer[((acp24_bitno)>>3)] |= 1 << (((7 - (acp24_bitno)) & 0x07)); \
1512 } \
1513 } while (0)
1514
1515 case IRMP_ACP24_PROTOCOL:
1516 {
1517 uint16_t cmd = irmp_data_p->command;
1518 uint8_t i;
1519
1520 address = bitsrevervse (irmp_data_p->address, ACP24_ADDRESS_LEN);
1521
1522 for (i = 0; i < 8; i++)
1523 {
1524 irsnd_buffer[i] = 0x00; // CCCCCCCC
1525 }
1526
1527 // ACP24-Frame:
1528 // 1 2 3 4 5 6
1529 // 0123456789012345678901234567890123456789012345678901234567890123456789
1530 // N VVMMM ? ??? t vmA x y TTTT
1531 //
1532 // irmp_data_p->command:
1533 //
1534 // 5432109876543210
1535 // NAVVvMMMmtxyTTTT
1536
1537 ACP_SET_BIT( 0, cmd, 15);
1538 ACP_SET_BIT(24, cmd, 14);
1539 ACP_SET_BIT( 2, cmd, 13);
1540 ACP_SET_BIT( 3, cmd, 12);
1541 ACP_SET_BIT(22, cmd, 11);
1542 ACP_SET_BIT( 4, cmd, 10);
1543 ACP_SET_BIT( 5, cmd, 9);
1544 ACP_SET_BIT( 6, cmd, 8);
1545 ACP_SET_BIT(23, cmd, 7);
1546 ACP_SET_BIT(20, cmd, 6);
1547 ACP_SET_BIT(26, cmd, 5);
1548 ACP_SET_BIT(44, cmd, 4);
1549 ACP_SET_BIT(66, cmd, 3);
1550 ACP_SET_BIT(67, cmd, 2);
1551 ACP_SET_BIT(68, cmd, 1);
1552 ACP_SET_BIT(69, cmd, 0);
1553
1554 irsnd_busy = TRUE;
1555 break;
1556 }
1557 #endif
1558
1559 default:
1560 {
1561 break;
1562 }
1563 }
1564
1565 return irsnd_busy;
1566 }
1567
1568 void
1569 irsnd_stop (void)
1570 {
1571 irsnd_repeat = 0;
1572 }
1573
1574 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1575 * ISR routine
1576 * @details ISR routine, called 10000 times per second
1577 *---------------------------------------------------------------------------------------------------------------------------------------------------
1578 */
1579 uint8_t
1580 irsnd_ISR (void)
1581 {
1582 static uint8_t send_trailer = FALSE;
1583 static uint8_t current_bit = 0xFF;
1584 static uint8_t pulse_counter = 0;
1585 static IRSND_PAUSE_LEN pause_counter = 0;
1586 static uint8_t startbit_pulse_len = 0;
1587 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1588 static uint8_t pulse_1_len = 0;
1589 static uint8_t pause_1_len = 0;
1590 static uint8_t pulse_0_len = 0;
1591 static uint8_t pause_0_len = 0;
1592 static uint8_t has_stop_bit = 0;
1593 static uint8_t new_frame = TRUE;
1594 static uint8_t complete_data_len = 0;
1595 static uint8_t n_repeat_frames = 0; // number of repetition frames
1596 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1597 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1598 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1599 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1600 static uint8_t repeat_counter = 0; // repeat counter
1601 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1602 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1603 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1604 static uint8_t last_bit_value;
1605 #endif
1606 static uint8_t pulse_len = 0xFF;
1607 static IRSND_PAUSE_LEN pause_len = 0xFF;
1608
1609 if (irsnd_busy)
1610 {
1611 if (current_bit == 0xFF && new_frame) // start of transmission...
1612 {
1613 if (auto_repetition_counter > 0)
1614 {
1615 auto_repetition_pause_counter++;
1616
1617 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1618 {
1619 auto_repetition_pause_counter = 0;
1620
1621 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1622 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1623 {
1624 current_bit = 16;
1625 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1626 }
1627 else
1628 #endif
1629 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1630 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1631 {
1632 current_bit = 15;
1633 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1634 }
1635 else
1636 #endif
1637 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1638 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1639 {
1640 current_bit = 7;
1641 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1642 }
1643 else
1644 #endif
1645 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1646 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1647 {
1648 if (auto_repetition_counter + 1 < n_auto_repetitions)
1649 {
1650 current_bit = 23;
1651 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1652 }
1653 else // nokia stop frame
1654 {
1655 current_bit = 0xFF;
1656 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1657 }
1658 }
1659 else
1660 #endif
1661 {
1662 ;
1663 }
1664 }
1665 else
1666 {
1667 #ifdef ANALYZE
1668 if (irsnd_is_on)
1669 {
1670 putchar ('0');
1671 }
1672 else
1673 {
1674 putchar ('1');
1675 }
1676 #endif
1677 return irsnd_busy;
1678 }
1679 }
1680 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1681 {
1682 packet_repeat_pause_counter++;
1683 #ifdef ANALYZE
1684 if (irsnd_is_on)
1685 {
1686 putchar ('0');
1687 }
1688 else
1689 {
1690 putchar ('1');
1691 }
1692 #endif
1693 return irsnd_busy;
1694 }
1695 else
1696 {
1697 if (send_trailer)
1698 {
1699 irsnd_busy = FALSE;
1700 send_trailer = FALSE;
1701 return irsnd_busy;
1702 }
1703
1704 n_repeat_frames = irsnd_repeat;
1705
1706 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1707 {
1708 n_repeat_frames = 255;
1709 }
1710
1711 packet_repeat_pause_counter = 0;
1712 pulse_counter = 0;
1713 pause_counter = 0;
1714
1715 switch (irsnd_protocol)
1716 {
1717 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1718 case IRMP_SIRCS_PROTOCOL:
1719 {
1720 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1721 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1722 pulse_1_len = SIRCS_1_PULSE_LEN;
1723 pause_1_len = SIRCS_PAUSE_LEN - 1;
1724 pulse_0_len = SIRCS_0_PULSE_LEN;
1725 pause_0_len = SIRCS_PAUSE_LEN - 1;
1726 has_stop_bit = SIRCS_STOP_BIT;
1727 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1728 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1729 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1730 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1731 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1732 break;
1733 }
1734 #endif
1735 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1736 case IRMP_NEC_PROTOCOL:
1737 {
1738 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1739
1740 if (repeat_counter > 0)
1741 {
1742 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1743 complete_data_len = 0;
1744 }
1745 else
1746 {
1747 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1748 complete_data_len = NEC_COMPLETE_DATA_LEN;
1749 }
1750
1751 pulse_1_len = NEC_PULSE_LEN;
1752 pause_1_len = NEC_1_PAUSE_LEN - 1;
1753 pulse_0_len = NEC_PULSE_LEN;
1754 pause_0_len = NEC_0_PAUSE_LEN - 1;
1755 has_stop_bit = NEC_STOP_BIT;
1756 n_auto_repetitions = 1; // 1 frame
1757 auto_repetition_pause_len = 0;
1758 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1759 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1760 break;
1761 }
1762 #endif
1763 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1764 case IRMP_NEC16_PROTOCOL:
1765 {
1766 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1767 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1768 pulse_1_len = NEC_PULSE_LEN;
1769 pause_1_len = NEC_1_PAUSE_LEN - 1;
1770 pulse_0_len = NEC_PULSE_LEN;
1771 pause_0_len = NEC_0_PAUSE_LEN - 1;
1772 has_stop_bit = NEC_STOP_BIT;
1773 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1774 n_auto_repetitions = 1; // 1 frame
1775 auto_repetition_pause_len = 0;
1776 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1777 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1778 break;
1779 }
1780 #endif
1781 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1782 case IRMP_NEC42_PROTOCOL:
1783 {
1784 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1785 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1786 pulse_1_len = NEC_PULSE_LEN;
1787 pause_1_len = NEC_1_PAUSE_LEN - 1;
1788 pulse_0_len = NEC_PULSE_LEN;
1789 pause_0_len = NEC_0_PAUSE_LEN - 1;
1790 has_stop_bit = NEC_STOP_BIT;
1791 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1792 n_auto_repetitions = 1; // 1 frame
1793 auto_repetition_pause_len = 0;
1794 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1795 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1796 break;
1797 }
1798 #endif
1799 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1800 case IRMP_LGAIR_PROTOCOL:
1801 {
1802 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1803 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1804 pulse_1_len = NEC_PULSE_LEN;
1805 pause_1_len = NEC_1_PAUSE_LEN - 1;
1806 pulse_0_len = NEC_PULSE_LEN;
1807 pause_0_len = NEC_0_PAUSE_LEN - 1;
1808 has_stop_bit = NEC_STOP_BIT;
1809 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1810 n_auto_repetitions = 1; // 1 frame
1811 auto_repetition_pause_len = 0;
1812 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1813 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1814 break;
1815 }
1816 #endif
1817 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1818 case IRMP_SAMSUNG_PROTOCOL:
1819 {
1820 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1821 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1822 pulse_1_len = SAMSUNG_PULSE_LEN;
1823 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1824 pulse_0_len = SAMSUNG_PULSE_LEN;
1825 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1826 has_stop_bit = SAMSUNG_STOP_BIT;
1827 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1828 n_auto_repetitions = 1; // 1 frame
1829 auto_repetition_pause_len = 0;
1830 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1831 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1832 break;
1833 }
1834
1835 case IRMP_SAMSUNG32_PROTOCOL:
1836 {
1837 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1838 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1839 pulse_1_len = SAMSUNG_PULSE_LEN;
1840 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1841 pulse_0_len = SAMSUNG_PULSE_LEN;
1842 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1843 has_stop_bit = SAMSUNG_STOP_BIT;
1844 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1845 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame
1846 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1847 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1848 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1849 break;
1850 }
1851 #endif
1852 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1853 case IRMP_SAMSUNG48_PROTOCOL:
1854 {
1855 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1856 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1857 pulse_1_len = SAMSUNG_PULSE_LEN;
1858 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1859 pulse_0_len = SAMSUNG_PULSE_LEN;
1860 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1861 has_stop_bit = SAMSUNG_STOP_BIT;
1862 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;
1863 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame
1864 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1865 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;
1866 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1867 break;
1868 }
1869 #endif
1870 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1871 case IRMP_MATSUSHITA_PROTOCOL:
1872 {
1873 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1874 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1875 pulse_1_len = MATSUSHITA_PULSE_LEN;
1876 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1877 pulse_0_len = MATSUSHITA_PULSE_LEN;
1878 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1879 has_stop_bit = MATSUSHITA_STOP_BIT;
1880 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1881 n_auto_repetitions = 1; // 1 frame
1882 auto_repetition_pause_len = 0;
1883 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1884 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1885 break;
1886 }
1887 #endif
1888 #if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1
1889 case IRMP_TECHNICS_PROTOCOL:
1890 {
1891 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1892 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1893 pulse_1_len = MATSUSHITA_PULSE_LEN;
1894 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1895 pulse_0_len = MATSUSHITA_PULSE_LEN;
1896 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1897 has_stop_bit = MATSUSHITA_STOP_BIT;
1898 complete_data_len = TECHNICS_COMPLETE_DATA_LEN; // here TECHNICS
1899 n_auto_repetitions = 1; // 1 frame
1900 auto_repetition_pause_len = 0;
1901 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1902 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1903 break;
1904 }
1905 #endif
1906 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1907 case IRMP_KASEIKYO_PROTOCOL:
1908 {
1909 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1910 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1911 pulse_1_len = KASEIKYO_PULSE_LEN;
1912 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1913 pulse_0_len = KASEIKYO_PULSE_LEN;
1914 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1915 has_stop_bit = KASEIKYO_STOP_BIT;
1916 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1917 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1918 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1919 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1920 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1921 break;
1922 }
1923 #endif
1924 #if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1
1925 case IRMP_PANASONIC_PROTOCOL:
1926 {
1927 startbit_pulse_len = PANASONIC_START_BIT_PULSE_LEN;
1928 startbit_pause_len = PANASONIC_START_BIT_PAUSE_LEN - 1;
1929 pulse_1_len = PANASONIC_PULSE_LEN;
1930 pause_1_len = PANASONIC_1_PAUSE_LEN - 1;
1931 pulse_0_len = PANASONIC_PULSE_LEN;
1932 pause_0_len = PANASONIC_0_PAUSE_LEN - 1;
1933 has_stop_bit = PANASONIC_STOP_BIT;
1934 complete_data_len = PANASONIC_COMPLETE_DATA_LEN;
1935 n_auto_repetitions = PANASONIC_FRAMES; // 1 frame
1936 auto_repetition_pause_len = PANASONIC_AUTO_REPETITION_PAUSE_LEN; // 40 ms pause
1937 repeat_frame_pause_len = PANASONIC_FRAME_REPEAT_PAUSE_LEN;
1938 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1939 break;
1940 }
1941 #endif
1942 #if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1
1943 case IRMP_MITSU_HEAVY_PROTOCOL:
1944 {
1945 startbit_pulse_len = MITSU_HEAVY_START_BIT_PULSE_LEN;
1946 startbit_pause_len = MITSU_HEAVY_START_BIT_PAUSE_LEN - 1;
1947 pulse_1_len = MITSU_HEAVY_PULSE_LEN;
1948 pause_1_len = MITSU_HEAVY_1_PAUSE_LEN - 1;
1949 pulse_0_len = MITSU_HEAVY_PULSE_LEN;
1950 pause_0_len = MITSU_HEAVY_0_PAUSE_LEN - 1;
1951 has_stop_bit = MITSU_HEAVY_STOP_BIT;
1952 complete_data_len = MITSU_HEAVY_COMPLETE_DATA_LEN;
1953 n_auto_repetitions = MITSU_HEAVY_FRAMES; // 1 frame
1954 auto_repetition_pause_len = 0;;
1955 repeat_frame_pause_len = MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN;
1956 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1957 break;
1958 }
1959 #endif
1960 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1961 case IRMP_RECS80_PROTOCOL:
1962 {
1963 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1964 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1965 pulse_1_len = RECS80_PULSE_LEN;
1966 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1967 pulse_0_len = RECS80_PULSE_LEN;
1968 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1969 has_stop_bit = RECS80_STOP_BIT;
1970 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1971 n_auto_repetitions = 1; // 1 frame
1972 auto_repetition_pause_len = 0;
1973 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1974 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1975 break;
1976 }
1977 #endif
1978 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1979 case IRMP_RECS80EXT_PROTOCOL:
1980 {
1981 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1982 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1983 pulse_1_len = RECS80EXT_PULSE_LEN;
1984 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1985 pulse_0_len = RECS80EXT_PULSE_LEN;
1986 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1987 has_stop_bit = RECS80EXT_STOP_BIT;
1988 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1989 n_auto_repetitions = 1; // 1 frame
1990 auto_repetition_pause_len = 0;
1991 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1992 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1993 break;
1994 }
1995 #endif
1996 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1997 case IRMP_TELEFUNKEN_PROTOCOL:
1998 {
1999 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
2000 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
2001 pulse_1_len = TELEFUNKEN_PULSE_LEN;
2002 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
2003 pulse_0_len = TELEFUNKEN_PULSE_LEN;
2004 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
2005 has_stop_bit = TELEFUNKEN_STOP_BIT;
2006 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
2007 n_auto_repetitions = 1; // 1 frames
2008 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
2009 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
2010 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2011 break;
2012 }
2013 #endif
2014 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2015 case IRMP_RC5_PROTOCOL:
2016 {
2017 startbit_pulse_len = RC5_BIT_LEN;
2018 startbit_pause_len = RC5_BIT_LEN;
2019 pulse_len = RC5_BIT_LEN;
2020 pause_len = RC5_BIT_LEN;
2021 has_stop_bit = RC5_STOP_BIT;
2022 complete_data_len = RC5_COMPLETE_DATA_LEN;
2023 n_auto_repetitions = 1; // 1 frame
2024 auto_repetition_pause_len = 0;
2025 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
2026 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2027 break;
2028 }
2029 #endif
2030 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2031 case IRMP_RC6_PROTOCOL:
2032 {
2033 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
2034 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
2035 pulse_len = RC6_BIT_LEN;
2036 pause_len = RC6_BIT_LEN;
2037 has_stop_bit = RC6_STOP_BIT;
2038 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
2039 n_auto_repetitions = 1; // 1 frame
2040 auto_repetition_pause_len = 0;
2041 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
2042 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2043 break;
2044 }
2045 #endif
2046 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2047 case IRMP_RC6A_PROTOCOL:
2048 {
2049 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
2050 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
2051 pulse_len = RC6_BIT_LEN;
2052 pause_len = RC6_BIT_LEN;
2053 has_stop_bit = RC6_STOP_BIT;
2054 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
2055 n_auto_repetitions = 1; // 1 frame
2056 auto_repetition_pause_len = 0;
2057 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
2058 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2059 break;
2060 }
2061 #endif
2062 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2063 case IRMP_DENON_PROTOCOL:
2064 {
2065 startbit_pulse_len = 0x00;
2066 startbit_pause_len = 0x00;
2067 pulse_1_len = DENON_PULSE_LEN;
2068 pause_1_len = DENON_1_PAUSE_LEN - 1;
2069 pulse_0_len = DENON_PULSE_LEN;
2070 pause_0_len = DENON_0_PAUSE_LEN - 1;
2071 has_stop_bit = DENON_STOP_BIT;
2072 complete_data_len = DENON_COMPLETE_DATA_LEN;
2073 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
2074 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
2075 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
2076 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
2077 break;
2078 }
2079 #endif
2080 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2081 case IRMP_THOMSON_PROTOCOL:
2082 {
2083 startbit_pulse_len = 0x00;
2084 startbit_pause_len = 0x00;
2085 pulse_1_len = THOMSON_PULSE_LEN;
2086 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
2087 pulse_0_len = THOMSON_PULSE_LEN;
2088 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
2089 has_stop_bit = THOMSON_STOP_BIT;
2090 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
2091 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
2092 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
2093 repeat_frame_pause_len = THOMSON_FRAME_REPEAT_PAUSE_LEN;
2094 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2095 break;
2096 }
2097 #endif
2098 #if IRSND_SUPPORT_BOSE_PROTOCOL == 1
2099 case IRMP_BOSE_PROTOCOL:
2100 {
2101 startbit_pulse_len = BOSE_START_BIT_PULSE_LEN;
2102 startbit_pause_len = BOSE_START_BIT_PAUSE_LEN - 1;
2103 pulse_1_len = BOSE_PULSE_LEN;
2104 pause_1_len = BOSE_1_PAUSE_LEN - 1;
2105 pulse_0_len = BOSE_PULSE_LEN;
2106 pause_0_len = BOSE_0_PAUSE_LEN - 1;
2107 has_stop_bit = BOSE_STOP_BIT;
2108 complete_data_len = BOSE_COMPLETE_DATA_LEN;
2109 n_auto_repetitions = BOSE_FRAMES; // 1 frame
2110 auto_repetition_pause_len = BOSE_AUTO_REPETITION_PAUSE_LEN; // 40 ms pause
2111 repeat_frame_pause_len = BOSE_FRAME_REPEAT_PAUSE_LEN;
2112 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2113 break;
2114 }
2115 #endif
2116 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2117 case IRMP_NUBERT_PROTOCOL:
2118 {
2119 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
2120 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
2121 pulse_1_len = NUBERT_1_PULSE_LEN;
2122 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
2123 pulse_0_len = NUBERT_0_PULSE_LEN;
2124 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
2125 has_stop_bit = NUBERT_STOP_BIT;
2126 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
2127 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
2128 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
2129 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
2130 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2131 break;
2132 }
2133 #endif
2134 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
2135 case IRMP_FAN_PROTOCOL:
2136 {
2137 startbit_pulse_len = FAN_START_BIT_PULSE_LEN;
2138 startbit_pause_len = FAN_START_BIT_PAUSE_LEN - 1;
2139 pulse_1_len = FAN_1_PULSE_LEN;
2140 pause_1_len = FAN_1_PAUSE_LEN - 1;
2141 pulse_0_len = FAN_0_PULSE_LEN;
2142 pause_0_len = FAN_0_PAUSE_LEN - 1;
2143 has_stop_bit = FAN_STOP_BIT;
2144 complete_data_len = FAN_COMPLETE_DATA_LEN;
2145 n_auto_repetitions = FAN_FRAMES; // only 1 frame
2146 auto_repetition_pause_len = FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
2147 repeat_frame_pause_len = FAN_FRAME_REPEAT_PAUSE_LEN;
2148 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2149 break;
2150 }
2151 #endif
2152 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2153 case IRMP_SPEAKER_PROTOCOL:
2154 {
2155 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
2156 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
2157 pulse_1_len = SPEAKER_1_PULSE_LEN;
2158 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
2159 pulse_0_len = SPEAKER_0_PULSE_LEN;
2160 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
2161 has_stop_bit = SPEAKER_STOP_BIT;
2162 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
2163 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
2164 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
2165 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
2166 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2167 break;
2168 }
2169 #endif
2170 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2171 case IRMP_BANG_OLUFSEN_PROTOCOL:
2172 {
2173 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
2174 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
2175 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
2176 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
2177 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
2178 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
2179 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
2180 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
2181 n_auto_repetitions = 1; // 1 frame
2182 auto_repetition_pause_len = 0;
2183 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
2184 last_bit_value = 0;
2185 irsnd_set_freq (IRSND_FREQ_455_KHZ);
2186 break;
2187 }
2188 #endif
2189 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2190 case IRMP_GRUNDIG_PROTOCOL:
2191 {
2192 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2193 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
2194 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2195 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2196 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
2197 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
2198 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
2199 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
2200 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
2201 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2202 break;
2203 }
2204 #endif
2205 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2206 case IRMP_IR60_PROTOCOL:
2207 {
2208 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2209 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
2210 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2211 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2212 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
2213 complete_data_len = IR60_COMPLETE_DATA_LEN;
2214 n_auto_repetitions = IR60_FRAMES; // 2 frames
2215 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
2216 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
2217 irsnd_set_freq (IRSND_FREQ_30_KHZ);
2218 break;
2219 }
2220 #endif
2221 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2222 case IRMP_NOKIA_PROTOCOL:
2223 {
2224 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2225 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
2226 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2227 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2228 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
2229 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
2230 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
2231 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
2232 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
2233 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2234 break;
2235 }
2236 #endif
2237 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2238 case IRMP_SIEMENS_PROTOCOL:
2239 {
2240 startbit_pulse_len = SIEMENS_BIT_LEN;
2241 startbit_pause_len = SIEMENS_BIT_LEN;
2242 pulse_len = SIEMENS_BIT_LEN;
2243 pause_len = SIEMENS_BIT_LEN;
2244 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
2245 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
2246 n_auto_repetitions = 1; // 1 frame
2247 auto_repetition_pause_len = 0;
2248 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
2249 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2250 break;
2251 }
2252 #endif
2253 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2254 case IRMP_RUWIDO_PROTOCOL:
2255 {
2256 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
2257 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
2258 pulse_len = RUWIDO_BIT_PULSE_LEN;
2259 pause_len = RUWIDO_BIT_PAUSE_LEN;
2260 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
2261 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
2262 n_auto_repetitions = 1; // 1 frame
2263 auto_repetition_pause_len = 0;
2264 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
2265 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2266 break;
2267 }
2268 #endif
2269 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2270 case IRMP_FDC_PROTOCOL:
2271 {
2272 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
2273 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
2274 complete_data_len = FDC_COMPLETE_DATA_LEN;
2275 pulse_1_len = FDC_PULSE_LEN;
2276 pause_1_len = FDC_1_PAUSE_LEN - 1;
2277 pulse_0_len = FDC_PULSE_LEN;
2278 pause_0_len = FDC_0_PAUSE_LEN - 1;
2279 has_stop_bit = FDC_STOP_BIT;
2280 n_auto_repetitions = 1; // 1 frame
2281 auto_repetition_pause_len = 0;
2282 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
2283 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2284 break;
2285 }
2286 #endif
2287 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2288 case IRMP_RCCAR_PROTOCOL:
2289 {
2290 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
2291 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
2292 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
2293 pulse_1_len = RCCAR_PULSE_LEN;
2294 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
2295 pulse_0_len = RCCAR_PULSE_LEN;
2296 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
2297 has_stop_bit = RCCAR_STOP_BIT;
2298 n_auto_repetitions = 1; // 1 frame
2299 auto_repetition_pause_len = 0;
2300 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
2301 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2302 break;
2303 }
2304 #endif
2305 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2306 case IRMP_JVC_PROTOCOL:
2307 {
2308 if (repeat_counter != 0) // skip start bit if repetition frame
2309 {
2310 current_bit = 0;
2311 }
2312
2313 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
2314 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
2315 complete_data_len = JVC_COMPLETE_DATA_LEN;
2316 pulse_1_len = JVC_PULSE_LEN;
2317 pause_1_len = JVC_1_PAUSE_LEN - 1;
2318 pulse_0_len = JVC_PULSE_LEN;
2319 pause_0_len = JVC_0_PAUSE_LEN - 1;
2320 has_stop_bit = JVC_STOP_BIT;
2321 n_auto_repetitions = 1; // 1 frame
2322 auto_repetition_pause_len = 0;
2323 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
2324 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2325 break;
2326 }
2327 #endif
2328 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2329 case IRMP_NIKON_PROTOCOL:
2330 {
2331 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
2332 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
2333 complete_data_len = NIKON_COMPLETE_DATA_LEN;
2334 pulse_1_len = NIKON_PULSE_LEN;
2335 pause_1_len = NIKON_1_PAUSE_LEN - 1;
2336 pulse_0_len = NIKON_PULSE_LEN;
2337 pause_0_len = NIKON_0_PAUSE_LEN - 1;
2338 has_stop_bit = NIKON_STOP_BIT;
2339 n_auto_repetitions = 1; // 1 frame
2340 auto_repetition_pause_len = 0;
2341 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
2342 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2343 break;
2344 }
2345 #endif
2346 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2347 case IRMP_LEGO_PROTOCOL:
2348 {
2349 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
2350 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
2351 complete_data_len = LEGO_COMPLETE_DATA_LEN;
2352 pulse_1_len = LEGO_PULSE_LEN;
2353 pause_1_len = LEGO_1_PAUSE_LEN - 1;
2354 pulse_0_len = LEGO_PULSE_LEN;
2355 pause_0_len = LEGO_0_PAUSE_LEN - 1;
2356 has_stop_bit = LEGO_STOP_BIT;
2357 n_auto_repetitions = 1; // 1 frame
2358 auto_repetition_pause_len = 0;
2359 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
2360 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2361 break;
2362 }
2363 #endif
2364 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2365 case IRMP_A1TVBOX_PROTOCOL:
2366 {
2367 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
2368 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
2369 pulse_len = A1TVBOX_BIT_PULSE_LEN;
2370 pause_len = A1TVBOX_BIT_PAUSE_LEN;
2371 has_stop_bit = A1TVBOX_STOP_BIT;
2372 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
2373 n_auto_repetitions = 1; // 1 frame
2374 auto_repetition_pause_len = 0;
2375 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
2376 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2377 break;
2378 }
2379 #endif
2380 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2381 case IRMP_ROOMBA_PROTOCOL:
2382 {
2383 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
2384 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
2385 pulse_1_len = ROOMBA_1_PULSE_LEN;
2386 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
2387 pulse_0_len = ROOMBA_0_PULSE_LEN;
2388 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
2389 has_stop_bit = ROOMBA_STOP_BIT;
2390 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
2391 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
2392 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2393 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2394 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2395 break;
2396 }
2397 #endif
2398 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2399 case IRMP_PENTAX_PROTOCOL:
2400 {
2401 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;
2402 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;
2403 complete_data_len = PENTAX_COMPLETE_DATA_LEN;
2404 pulse_1_len = PENTAX_PULSE_LEN;
2405 pause_1_len = PENTAX_1_PAUSE_LEN - 1;
2406 pulse_0_len = PENTAX_PULSE_LEN;
2407 pause_0_len = PENTAX_0_PAUSE_LEN - 1;
2408 has_stop_bit = PENTAX_STOP_BIT;
2409 n_auto_repetitions = 1; // 1 frame
2410 auto_repetition_pause_len = 0;
2411 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;
2412 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2413 break;
2414 }
2415 #endif
2416 #if IRSND_SUPPORT_ACP24_PROTOCOL == 1
2417 case IRMP_ACP24_PROTOCOL:
2418 {
2419 startbit_pulse_len = ACP24_START_BIT_PULSE_LEN;
2420 startbit_pause_len = ACP24_START_BIT_PAUSE_LEN - 1;
2421 complete_data_len = ACP24_COMPLETE_DATA_LEN;
2422 pulse_1_len = ACP24_PULSE_LEN;
2423 pause_1_len = ACP24_1_PAUSE_LEN - 1;
2424 pulse_0_len = ACP24_PULSE_LEN;
2425 pause_0_len = ACP24_0_PAUSE_LEN - 1;
2426 has_stop_bit = ACP24_STOP_BIT;
2427 n_auto_repetitions = 1; // 1 frame
2428 auto_repetition_pause_len = 0;
2429 repeat_frame_pause_len = ACP24_FRAME_REPEAT_PAUSE_LEN;
2430 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2431 break;
2432 }
2433 #endif
2434 default:
2435 {
2436 irsnd_busy = FALSE;
2437 break;
2438 }
2439 }
2440 }
2441 }
2442
2443 if (irsnd_busy)
2444 {
2445 new_frame = FALSE;
2446
2447 switch (irsnd_protocol)
2448 {
2449 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
2450 case IRMP_SIRCS_PROTOCOL:
2451 #endif
2452 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
2453 case IRMP_NEC_PROTOCOL:
2454 #endif
2455 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2456 case IRMP_NEC16_PROTOCOL:
2457 #endif
2458 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
2459 case IRMP_NEC42_PROTOCOL:
2460 #endif
2461 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
2462 case IRMP_LGAIR_PROTOCOL:
2463 #endif
2464 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2465 case IRMP_SAMSUNG_PROTOCOL:
2466 case IRMP_SAMSUNG32_PROTOCOL:
2467 #endif
2468 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
2469 case IRMP_SAMSUNG48_PROTOCOL:
2470 #endif
2471 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2472 case IRMP_MATSUSHITA_PROTOCOL:
2473 #endif
2474 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2475 case IRMP_TECHNICS_PROTOCOL:
2476 #endif
2477 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
2478 case IRMP_KASEIKYO_PROTOCOL:
2479 #endif
2480 #if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1
2481 case IRMP_PANASONIC_PROTOCOL:
2482 #endif
2483 #if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1
2484 case IRMP_MITSU_HEAVY_PROTOCOL:
2485 #endif
2486 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
2487 case IRMP_RECS80_PROTOCOL:
2488 #endif
2489 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
2490 case IRMP_RECS80EXT_PROTOCOL:
2491 #endif
2492 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2493 case IRMP_TELEFUNKEN_PROTOCOL:
2494 #endif
2495 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2496 case IRMP_DENON_PROTOCOL:
2497 #endif
2498 #if IRSND_SUPPORT_BOSE_PROTOCOL == 1
2499 case IRMP_BOSE_PROTOCOL:
2500 #endif
2501 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2502 case IRMP_NUBERT_PROTOCOL:
2503 #endif
2504 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
2505 case IRMP_FAN_PROTOCOL:
2506 #endif
2507 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2508 case IRMP_SPEAKER_PROTOCOL:
2509 #endif
2510 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2511 case IRMP_BANG_OLUFSEN_PROTOCOL:
2512 #endif
2513 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2514 case IRMP_FDC_PROTOCOL:
2515 #endif
2516 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2517 case IRMP_RCCAR_PROTOCOL:
2518 #endif
2519 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2520 case IRMP_JVC_PROTOCOL:
2521 #endif
2522 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2523 case IRMP_NIKON_PROTOCOL:
2524 #endif
2525 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2526 case IRMP_LEGO_PROTOCOL:
2527 #endif
2528 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2529 case IRMP_THOMSON_PROTOCOL:
2530 #endif
2531 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2532 case IRMP_ROOMBA_PROTOCOL:
2533 #endif
2534 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2535 case IRMP_PENTAX_PROTOCOL:
2536 #endif
2537 #if IRSND_SUPPORT_ACP24_PROTOCOL == 1
2538 case IRMP_ACP24_PROTOCOL:
2539 #endif
2540
2541 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2542 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || IRSND_SUPPORT_TECHNICS_PROTOCOL == 1 || \
2543 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2544 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \
2545 IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \
2546 IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \
2547 IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1 || IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 || IRSND_SUPPORT_BOSE_PROTOCOL == 1 || \
2548 IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1
2549 {
2550 if (pulse_counter == 0)
2551 {
2552 if (current_bit == 0xFF) // send start bit
2553 {
2554 pulse_len = startbit_pulse_len;
2555 pause_len = startbit_pause_len;
2556 }
2557 else if (current_bit < complete_data_len) // send n'th bit
2558 {
2559 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2560 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2561 {
2562 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2563 {
2564 pulse_len = SAMSUNG_PULSE_LEN;
2565 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2566 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2567 }
2568 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2569 {
2570 pulse_len = SAMSUNG_PULSE_LEN;
2571 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2572 }
2573 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2574 {
2575 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2576
2577 pulse_len = SAMSUNG_PULSE_LEN;
2578 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2579 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2580 }
2581 }
2582 else
2583 #endif
2584
2585 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2586 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2587 {
2588 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2589 {
2590 pulse_len = NEC_PULSE_LEN;
2591 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2592 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2593 }
2594 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2595 {
2596 pulse_len = NEC_PULSE_LEN;
2597 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2598 }
2599 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2600 {
2601 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2602
2603 pulse_len = NEC_PULSE_LEN;
2604 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2605 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2606 }
2607 }
2608 else
2609 #endif
2610
2611 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2612 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2613 {
2614 if (current_bit == 0) // send 2nd start bit
2615 {
2616 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2617 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2618 }
2619 else if (current_bit == 1) // send 3rd start bit
2620 {
2621 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2622 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2623 }
2624 else if (current_bit == 2) // send 4th start bit
2625 {
2626 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2627 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2628 }
2629 else if (current_bit == 19) // send trailer bit
2630 {
2631 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2632 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2633 }
2634 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2635 {
2636 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;
2637 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2638
2639 if (cur_bit_value == last_bit_value)
2640 {
2641 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2642 }
2643 else
2644 {
2645 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2646 last_bit_value = cur_bit_value;
2647 }
2648 }
2649 }
2650 else
2651 #endif
2652 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))
2653 {
2654 pulse_len = pulse_1_len;
2655 pause_len = pause_1_len;
2656 }
2657 else
2658 {
2659 pulse_len = pulse_0_len;
2660 pause_len = pause_0_len;
2661 }
2662 }
2663 else if (has_stop_bit) // send stop bit
2664 {
2665 pulse_len = pulse_0_len;
2666
2667 if (auto_repetition_counter < n_auto_repetitions)
2668 {
2669 pause_len = pause_0_len;
2670 }
2671 else
2672 {
2673 pause_len = 255; // last frame: pause of 255
2674 }
2675 }
2676 }
2677
2678 if (pulse_counter < pulse_len)
2679 {
2680 if (pulse_counter == 0)
2681 {
2682 irsnd_on ();
2683 }
2684 pulse_counter++;
2685 }
2686 else if (pause_counter < pause_len)
2687 {
2688 if (pause_counter == 0)
2689 {
2690 irsnd_off ();
2691 }
2692 pause_counter++;
2693 }
2694 else
2695 {
2696 current_bit++;
2697
2698 if (current_bit >= complete_data_len + has_stop_bit)
2699 {
2700 current_bit = 0xFF;
2701 auto_repetition_counter++;
2702
2703 if (auto_repetition_counter == n_auto_repetitions)
2704 {
2705 irsnd_busy = FALSE;
2706 auto_repetition_counter = 0;
2707 }
2708 new_frame = TRUE;
2709 }
2710
2711 pulse_counter = 0;
2712 pause_counter = 0;
2713 }
2714 break;
2715 }
2716 #endif
2717
2718 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2719 case IRMP_RC5_PROTOCOL:
2720 #endif
2721 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2722 case IRMP_RC6_PROTOCOL:
2723 #endif
2724 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2725 case IRMP_RC6A_PROTOCOL:
2726 #endif
2727 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2728 case IRMP_SIEMENS_PROTOCOL:
2729 #endif
2730 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2731 case IRMP_RUWIDO_PROTOCOL:
2732 #endif
2733 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2734 case IRMP_GRUNDIG_PROTOCOL:
2735 #endif
2736 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2737 case IRMP_IR60_PROTOCOL:
2738 #endif
2739 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2740 case IRMP_NOKIA_PROTOCOL:
2741 #endif
2742 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2743 case IRMP_A1TVBOX_PROTOCOL:
2744 #endif
2745
2746 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2747 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2748 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2749 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2750 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2751 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2752 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2753 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2754 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2755 {
2756 if (pulse_counter == pulse_len && pause_counter == pause_len)
2757 {
2758 current_bit++;
2759
2760 if (current_bit >= complete_data_len)
2761 {
2762 current_bit = 0xFF;
2763
2764 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2765 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2766 {
2767 auto_repetition_counter++;
2768
2769 if (repeat_counter > 0)
2770 { // set 117 msec pause time
2771 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2772 }
2773
2774 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2775 {
2776 n_auto_repetitions++; // increment number of auto repetitions
2777 repeat_counter++;
2778 }
2779 else if (auto_repetition_counter == n_auto_repetitions)
2780 {
2781 irsnd_busy = FALSE;
2782 auto_repetition_counter = 0;
2783 }
2784 }
2785 else
2786 #endif
2787 {
2788 irsnd_busy = FALSE;
2789 }
2790
2791 new_frame = TRUE;
2792 irsnd_off ();
2793 }
2794
2795 pulse_counter = 0;
2796 pause_counter = 0;
2797 }
2798
2799 if (! new_frame)
2800 {
2801 uint8_t first_pulse;
2802
2803 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2804 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2805 {
2806 if (current_bit == 0xFF || // start bit of start-frame
2807 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2808 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2809 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2810 {
2811 pulse_len = startbit_pulse_len;
2812 pause_len = startbit_pause_len;
2813 first_pulse = TRUE;
2814 }
2815 else // send n'th bit
2816 {
2817 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2818 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2819 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2820 }
2821 }
2822 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2823 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2824 #endif
2825 {
2826 if (current_bit == 0xFF) // 1 start bit
2827 {
2828 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2829 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2830 {
2831 pulse_len = startbit_pulse_len;
2832 pause_len = startbit_pause_len;
2833 }
2834 else
2835 #endif
2836 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2837 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2838 {
2839 current_bit = 0;
2840 }
2841 else
2842 #endif
2843 {
2844 ;
2845 }
2846
2847 first_pulse = TRUE;
2848 }
2849 else // send n'th bit
2850 {
2851 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2852 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2853 {
2854 pulse_len = RC6_BIT_LEN;
2855 pause_len = RC6_BIT_LEN;
2856
2857 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2858 {
2859 if (current_bit == 4) // toggle bit (double len)
2860 {
2861 pulse_len = RC6_BIT_2_LEN; // = 2 * RC_BIT_LEN
2862 pause_len = RC6_BIT_2_LEN; // = 2 * RC_BIT_LEN
2863 }
2864 }
2865 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2866 {
2867 if (current_bit == 4) // toggle bit (double len)
2868 {
2869 pulse_len = RC6_BIT_3_LEN; // = 3 * RC6_BIT_LEN
2870 pause_len = RC6_BIT_2_LEN; // = 2 * RC6_BIT_LEN
2871 }
2872 else if (current_bit == 5) // toggle bit (double len)
2873 {
2874 pause_len = RC6_BIT_2_LEN; // = 2 * RC6_BIT_LEN
2875 }
2876 }
2877 }
2878 #endif
2879 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2880 }
2881
2882 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2883 {
2884 first_pulse = first_pulse ? FALSE : TRUE;
2885 }
2886 }
2887
2888 if (first_pulse)
2889 {
2890 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2891
2892 if (pulse_counter < pulse_len)
2893 {
2894 if (pulse_counter == 0)
2895 {
2896 irsnd_on ();
2897 }
2898 pulse_counter++;
2899 }
2900 else // if (pause_counter < pause_len)
2901 {
2902 if (pause_counter == 0)
2903 {
2904 irsnd_off ();
2905 }
2906 pause_counter++;
2907 }
2908 }
2909 else
2910 {
2911 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2912
2913 if (pause_counter < pause_len)
2914 {
2915 if (pause_counter == 0)
2916 {
2917 irsnd_off ();
2918 }
2919 pause_counter++;
2920 }
2921 else // if (pulse_counter < pulse_len)
2922 {
2923 if (pulse_counter == 0)
2924 {
2925 irsnd_on ();
2926 }
2927 pulse_counter++;
2928 }
2929 }
2930 }
2931 break;
2932 }
2933 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2934 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2935
2936 default:
2937 {
2938 irsnd_busy = FALSE;
2939 break;
2940 }
2941 }
2942 }
2943
2944 if (! irsnd_busy)
2945 {
2946 if (repeat_counter < n_repeat_frames)
2947 {
2948 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2949 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2950 {
2951 irsnd_buffer[2] |= 0x0F;
2952 }
2953 #endif
2954 repeat_counter++;
2955 irsnd_busy = TRUE;
2956 }
2957 else
2958 {
2959 irsnd_busy = TRUE; //Rainer
2960 send_trailer = TRUE;
2961 n_repeat_frames = 0;
2962 repeat_counter = 0;
2963 }
2964 }
2965 }
2966
2967 #ifdef ANALYZE
2968 if (irsnd_is_on)
2969 {
2970 putchar ('0');
2971 }
2972 else
2973 {
2974 putchar ('1');
2975 }
2976 #endif
2977
2978 return irsnd_busy;
2979 }
2980
2981 #ifdef ANALYZE
2982
2983 // main function - for unix/linux + windows only!
2984 // AVR: see main.c!
2985 // Compile it under linux with:
2986 // cc irsnd.c -o irsnd
2987 //
2988 // usage: ./irsnd protocol hex-address hex-command >filename
2989
2990 int
2991 main (int argc, char ** argv)
2992 {
2993 int protocol;
2994 int address;
2995 int command;
2996 IRMP_DATA irmp_data;
2997
2998 if (argc != 4 && argc != 5)
2999 {
3000 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
3001 return 1;
3002 }
3003
3004 if (sscanf (argv[1], "%d", &protocol) == 1 &&
3005 sscanf (argv[2], "%x", &address) == 1 &&
3006 sscanf (argv[3], "%x", &command) == 1)
3007 {
3008 irmp_data.protocol = protocol;
3009 irmp_data.address = address;
3010 irmp_data.command = command;
3011
3012 if (argc == 5)
3013 {
3014 irmp_data.flags = atoi (argv[4]);
3015 }
3016 else
3017 {
3018 irmp_data.flags = 0;
3019 }
3020
3021 irsnd_init ();
3022
3023 (void) irsnd_send_data (&irmp_data, TRUE);
3024
3025 while (irsnd_busy)
3026 {
3027 irsnd_ISR ();
3028 }
3029
3030 putchar ('\n');
3031
3032 #if 1 // enable here to send twice
3033 (void) irsnd_send_data (&irmp_data, TRUE);
3034
3035 while (irsnd_busy)
3036 {
3037 irsnd_ISR ();
3038 }
3039
3040 putchar ('\n');
3041 #endif
3042 }
3043 else
3044 {
3045 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
3046 return 1;
3047 }
3048 return 0;
3049 }
3050
3051 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)