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Version 2.5.7: some corrections for PIC XC8 compiler
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.76 2014/06/23 06:56:00 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
47 # if IRSND_OCx == IRSND_OC0A // OC0A
48 # define IRSND_PORT_LETTER B
49 # define IRSND_BIT_NUMBER 0
50 # elif IRSND_OCx == IRSND_OC0B // OC0B
51 # define IRSND_PORT_LETTER B
52 # define IRSND_BIT_NUMBER 1
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT_LETTER A
59 # define IRSND_BIT_NUMBER 2
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
64 # if IRSND_OCx == IRSND_OC2 // OC0A
65 # define IRSND_PORT_LETTER B
66 # define IRSND_BIT_NUMBER 3
67 # else
68 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
69 # endif // IRSND_OCx
70 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
71 # if IRSND_OCx == IRSND_OC2 // OC2
72 # define IRSND_PORT_LETTER D
73 # define IRSND_BIT_NUMBER 7
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
76 # endif // IRSND_OCx
77 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
78 # if IRSND_OCx == IRSND_OC2 // OC2
79 # define IRSND_PORT_LETTER B
80 # define IRSND_BIT_NUMBER 1
81 # elif IRSND_OCx == IRSND_OC0 // OC0
82 # define IRSND_PORT_LETTER B
83 # define IRSND_BIT_NUMBER 0
84 # else
85 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
86 # endif // IRSND_OCx
87 #elif defined (__AVR_ATmega164__) \
88 || defined (__AVR_ATmega324__) \
89 || defined (__AVR_ATmega644__) \
90 || defined (__AVR_ATmega644P__) \
91 || defined (__AVR_ATmega1284__) \
92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
93 # if IRSND_OCx == IRSND_OC2A // OC2A
94 # define IRSND_PORT_LETTER D
95 # define IRSND_BIT_NUMBER 7
96 # elif IRSND_OCx == IRSND_OC2B // OC2B
97 # define IRSND_PORT_LETTER D
98 # define IRSND_BIT_NUMBER 6
99 # elif IRSND_OCx == IRSND_OC0A // OC0A
100 # define IRSND_PORT_LETTER B
101 # define IRSND_BIT_NUMBER 3
102 # elif IRSND_OCx == IRSND_OC0B // OC0B
103 # define IRSND_PORT_LETTER B
104 # define IRSND_BIT_NUMBER 4
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT_LETTER B
116 # define IRSND_BIT_NUMBER 3
117 # elif IRSND_OCx == IRSND_OC2B // OC2B
118 # define IRSND_PORT_LETTER D
119 # define IRSND_BIT_NUMBER 3
120 # elif IRSND_OCx == IRSND_OC0A // OC0A
121 # define IRSND_PORT_LETTER D
122 # define IRSND_BIT_NUMBER 6
123 # elif IRSND_OCx == IRSND_OC0B // OC0B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 5
126 # else
127 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
128 # endif // IRSND_OCx
129 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
130 # if IRSND_OCx == IRSND_OC0
131 # define IRSND_PORT_LETTER B
132 # define IRSND_BIT_NUMBER 0
133 # elif IRSND_OCx == IRSND_OC1A
134 # define IRSND_PORT_LETTER D
135 # define IRSND_BIT_NUMBER 5
136 # elif IRSND_OCx == IRSND_OC1B
137 # define IRSND_PORT_LETTER E
138 # define IRSND_BIT_NUMBER 2
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (PIC_C18) //Microchip C18 compiler
143 //Nothing here to do here -> See irsndconfig.h
144 #elif defined (ARM_STM32) //STM32
145 //Nothing here to do here -> See irsndconfig.h
146 #else
147 # if !defined (unix) && !defined (WIN32)
148 # error mikrocontroller not defined, please fill in definitions here.
149 # endif // unix, WIN32
150 #endif // __AVR...
151
152 #if defined(ATMEL_AVR)
153 # define _CONCAT(a,b) a##b
154 # define CONCAT(a,b) _CONCAT(a,b)
155 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
156 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
157 # define IRSND_BIT IRSND_BIT_NUMBER
158 #endif
159
160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
161 typedef uint16_t IRSND_PAUSE_LEN;
162 #else
163 typedef uint8_t IRSND_PAUSE_LEN;
164 #endif
165
166 /*---------------------------------------------------------------------------------------------------------------------------------------------------
167 * IR timings
168 *---------------------------------------------------------------------------------------------------------------------------------------------------
169 */
170 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
171 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
172 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
173 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
174 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
175 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
176 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
177
178 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
179 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
181 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
182 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
183 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
184 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
187 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
188 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
189 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
190 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
191 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
192
193 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
194 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
195
196 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
197 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
198 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
199 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
200 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
201 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
202
203 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
204 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
205 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
206 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
207 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
208 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
209 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
210
211 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
212 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
213 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
214 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
215 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
216 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
217
218 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
219 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
220 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
221
222 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
223 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
224 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
225 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
226 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
227
228 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
229 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
230 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
231 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
232 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
233
234 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
235 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
236 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
237 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
238 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
239
240 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
241 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
242 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
243 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
244 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
245 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
246
247 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
248 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
249 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
250 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
251 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
252 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
253 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
254
255 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
256 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
257 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
258 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
259 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
260 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
261 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
262 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
263
264 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
265 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
266 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
267 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
268 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
269 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
270 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
271 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
272
273 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
274 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
275 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
276 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
277 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
278 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
279 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
280 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
281 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
282 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
283 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
284 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
285
286 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
287 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
288 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
289 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
290 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
291
292 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
293
294 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
295 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
296 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
297
298 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
299 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
300 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
301 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
302 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
303
304 #ifdef PIC_C18 // PIC C18
305 # define IRSND_FREQ_TYPE uint8_t
306 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
307 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
308 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
309 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
310 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
311 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
312 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
313 #elif defined (ARM_STM32) // STM32
314 # define IRSND_FREQ_TYPE uint32_t
315 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
316 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
317 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
318 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
319 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
320 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
321 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
322 #else // AVR
323 # if F_CPU >= 16000000L
324 # define AVR_PRESCALER 8
325 # else
326 # define AVR_PRESCALER 1
327 # endif
328 # define IRSND_FREQ_TYPE uint8_t
329 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
330 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
331 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
332 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
333 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
334 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
335 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
336 #endif
337
338 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
339 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
340 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
341 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
342 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
343 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
344
345 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
346 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
347 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
348 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
349 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
350 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
351
352 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
353 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
354 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
355 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
356 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
357 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
358 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
359
360 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
361 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
362 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
363 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
364 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
365 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
366 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
367
368 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
369 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
370 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
371 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
372 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
373 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
374 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
375
376 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
377 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
378 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
379 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
380 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
381 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
382
383 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
384 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
385 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
386 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
387 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
388 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
389 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
390
391 static volatile uint8_t irsnd_busy = 0;
392 static volatile uint8_t irsnd_protocol = 0;
393 static volatile uint8_t irsnd_buffer[6] = {0};
394 static volatile uint8_t irsnd_repeat = 0;
395 static volatile uint8_t irsnd_is_on = FALSE;
396
397 #if IRSND_USE_CALLBACK == 1
398 static void (*irsnd_callback_ptr) (uint8_t);
399 #endif // IRSND_USE_CALLBACK == 1
400
401 /*---------------------------------------------------------------------------------------------------------------------------------------------------
402 * Switch PWM on
403 *---------------------------------------------------------------------------------------------------------------------------------------------------
404 */
405 static void
406 irsnd_on (void)
407 {
408 if (! irsnd_is_on)
409 {
410 #ifndef ANALYZE
411 # if defined(PIC_C18) // PIC C18
412 PWMon();
413 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
414 # elif defined (ARM_STM32) // STM32
415 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
416 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
417 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
418 # else // AVR
419 # if IRSND_OCx == IRSND_OC2 // use OC2
420 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
421 # elif IRSND_OCx == IRSND_OC2A // use OC2A
422 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
423 # elif IRSND_OCx == IRSND_OC2B // use OC2B
424 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
425 # elif IRSND_OCx == IRSND_OC0 // use OC0
426 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
427 # elif IRSND_OCx == IRSND_OC0A // use OC0A
428 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
429 # elif IRSND_OCx == IRSND_OC0B // use OC0B
430 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
431 # else
432 # error wrong value of IRSND_OCx
433 # endif // IRSND_OCx
434 # endif // C18
435 #endif // ANALYZE
436
437 #if IRSND_USE_CALLBACK == 1
438 if (irsnd_callback_ptr)
439 {
440 (*irsnd_callback_ptr) (TRUE);
441 }
442 #endif // IRSND_USE_CALLBACK == 1
443
444 irsnd_is_on = TRUE;
445 }
446 }
447
448 /*---------------------------------------------------------------------------------------------------------------------------------------------------
449 * Switch PWM off
450 * @details Switches PWM off
451 *---------------------------------------------------------------------------------------------------------------------------------------------------
452 */
453 static void
454 irsnd_off (void)
455 {
456 if (irsnd_is_on)
457 {
458 #ifndef ANALYZE
459
460 # if defined(PIC_C18) // PIC C18
461 PWMoff();
462 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
463 # elif defined (ARM_STM32) // STM32
464 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
465 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
466 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
467 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
468 # else //AVR
469
470 # if IRSND_OCx == IRSND_OC2 // use OC2
471 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
472 # elif IRSND_OCx == IRSND_OC2A // use OC2A
473 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
474 # elif IRSND_OCx == IRSND_OC2B // use OC2B
475 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
476 # elif IRSND_OCx == IRSND_OC0 // use OC0
477 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
478 # elif IRSND_OCx == IRSND_OC0A // use OC0A
479 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
480 # elif IRSND_OCx == IRSND_OC0B // use OC0B
481 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
482 # else
483 # error wrong value of IRSND_OCx
484 # endif // IRSND_OCx
485 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
486 # endif //C18
487 #endif // ANALYZE
488
489 #if IRSND_USE_CALLBACK == 1
490 if (irsnd_callback_ptr)
491 {
492 (*irsnd_callback_ptr) (FALSE);
493 }
494 #endif // IRSND_USE_CALLBACK == 1
495
496 irsnd_is_on = FALSE;
497 }
498 }
499
500 /*---------------------------------------------------------------------------------------------------------------------------------------------------
501 * Set PWM frequency
502 * @details sets pwm frequency
503 *---------------------------------------------------------------------------------------------------------------------------------------------------
504 */
505 static void
506 irsnd_set_freq (IRSND_FREQ_TYPE freq)
507 {
508 #ifndef ANALYZE
509 # if defined(PIC_C18) // PIC C18
510 OpenPWM(freq);
511 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
512 PWMoff();
513 # elif defined (ARM_STM32) // STM32
514 static uint32_t TimeBaseFreq = 0;
515
516 if (TimeBaseFreq == 0)
517 {
518 RCC_ClocksTypeDef RCC_ClocksStructure;
519 /* Get system clocks and store timer clock in variable */
520 RCC_GetClocksFreq(&RCC_ClocksStructure);
521 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
522 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
523 {
524 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
525 }
526 else
527 {
528 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
529 }
530 # else
531 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
532 {
533 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
534 }
535 else
536 {
537 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
538 }
539 # endif
540 }
541
542 freq = TimeBaseFreq/freq;
543
544 /* Set frequency */
545 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
546 /* Set duty cycle */
547 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
548 # else // AVR
549
550 # if IRSND_OCx == IRSND_OC2
551 OCR2 = freq; // use register OCR2 for OC2
552 # elif IRSND_OCx == IRSND_OC2A // use OC2A
553 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
554 # elif IRSND_OCx == IRSND_OC2B // use OC2B
555 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
556 # elif IRSND_OCx == IRSND_OC0 // use OC0
557 OCR0 = freq; // use register OCR2 for OC2
558 # elif IRSND_OCx == IRSND_OC0A // use OC0A
559 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
560 # elif IRSND_OCx == IRSND_OC0B // use OC0B
561 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
562 # else
563 # error wrong value of IRSND_OCx
564 # endif
565 # endif //PIC_C18
566 #endif // ANALYZE
567 }
568
569 /*---------------------------------------------------------------------------------------------------------------------------------------------------
570 * Initialize the PWM
571 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
572 *---------------------------------------------------------------------------------------------------------------------------------------------------
573 */
574 void
575 irsnd_init (void)
576 {
577 #ifndef ANALYZE
578 # if defined(PIC_C18) // PIC C18
579 OpenTimer;
580 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
581 IRSND_PIN = 0; // set IO to outout
582 PWMoff();
583 # elif defined (ARM_STM32) // STM32
584 GPIO_InitTypeDef GPIO_InitStructure;
585 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
586 TIM_OCInitTypeDef TIM_OCInitStructure;
587
588 /* GPIOx clock enable */
589 # if defined (ARM_STM32L1XX)
590 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
591 # elif defined (ARM_STM32F10X)
592 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
593 # elif defined (ARM_STM32F4XX)
594 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
595 # endif
596
597 /* GPIO Configuration */
598 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
599 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
600 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
601 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
602 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
603 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
604 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
605 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
606 # elif defined (ARM_STM32F10X)
607 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
608 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
609 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
610 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
611 # endif
612
613 /* TIMx clock enable */
614 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
615 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
616 # else
617 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
618 # endif
619
620 /* Time base configuration */
621 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
622 TIM_TimeBaseStructure.TIM_Prescaler = 0;
623 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
624 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
625 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
626
627 /* PWM1 Mode configuration */
628 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
629 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
630 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
631 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
632 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
633
634 /* Preload configuration */
635 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
636 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
637
638 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
639 # else // AVR
640 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
641 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
642
643 # if IRSND_OCx == IRSND_OC2 // use OC2
644 TCCR2 = (1<<WGM21); // CTC mode
645 # if AVR_PRESCALER == 8
646 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
647 # else
648 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
649 # endif
650 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
651 TCCR2A = (1<<WGM21); // CTC mode
652 # if AVR_PRESCALER == 8
653 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
654 # else
655 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
656 # endif
657 # elif IRSND_OCx == IRSND_OC0 // use OC0
658 TCCR0 = (1<<WGM01); // CTC mode
659 # if AVR_PRESCALER == 8
660 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
661 # else
662 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
663 # endif
664 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
665 TCCR0A = (1<<WGM01); // CTC mode
666 # if AVR_PRESCALER == 8
667 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
668 # else
669 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
670 # endif
671 # else
672 # error wrong value of IRSND_OCx
673 # endif
674 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
675 # endif //PIC_C18
676 #endif // ANALYZE
677 }
678
679 #if IRSND_USE_CALLBACK == 1
680 void
681 irsnd_set_callback_ptr (void (*cb)(uint8_t))
682 {
683 irsnd_callback_ptr = cb;
684 }
685 #endif // IRSND_USE_CALLBACK == 1
686
687 uint8_t
688 irsnd_is_busy (void)
689 {
690 return irsnd_busy;
691 }
692
693 static uint16_t
694 bitsrevervse (uint16_t x, uint8_t len)
695 {
696 uint16_t xx = 0;
697
698 while(len)
699 {
700 xx <<= 1;
701 if (x & 1)
702 {
703 xx |= 1;
704 }
705 x >>= 1;
706 len--;
707 }
708 return xx;
709 }
710
711
712 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
713 static uint8_t sircs_additional_bitlen;
714 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
715
716 uint8_t
717 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
718 {
719 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
720 static uint8_t toggle_bit_recs80;
721 #endif
722 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
723 static uint8_t toggle_bit_recs80ext;
724 #endif
725 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
726 static uint8_t toggle_bit_rc5;
727 #endif
728 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
729 static uint8_t toggle_bit_rc6;
730 #endif
731 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
732 static uint8_t toggle_bit_thomson;
733 #endif
734 uint16_t address;
735 uint16_t command;
736
737 if (do_wait)
738 {
739 while (irsnd_busy)
740 {
741 // do nothing;
742 }
743 }
744 else if (irsnd_busy)
745 {
746 return (FALSE);
747 }
748
749 irsnd_protocol = irmp_data_p->protocol;
750 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
751
752 switch (irsnd_protocol)
753 {
754 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
755 case IRMP_SIRCS_PROTOCOL:
756 {
757 // uint8_t sircs_additional_command_len;
758 uint8_t sircs_additional_address_len;
759
760 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
761
762 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
763 {
764 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
765 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
766 }
767 else
768 {
769 // sircs_additional_command_len = sircs_additional_bitlen;
770 sircs_additional_address_len = 0;
771 }
772
773 command = bitsrevervse (irmp_data_p->command, 15);
774
775 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
776 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
777
778 if (sircs_additional_address_len > 0)
779 {
780 address = bitsrevervse (irmp_data_p->address, 5);
781 irsnd_buffer[1] |= (address & 0x0010) >> 4;
782 irsnd_buffer[2] = (address & 0x000F) << 4;
783 }
784 irsnd_busy = TRUE;
785 break;
786 }
787 #endif
788 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
789 case IRMP_APPLE_PROTOCOL:
790 {
791 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
792 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
793
794 address = bitsrevervse (address, NEC_ADDRESS_LEN);
795 command = bitsrevervse (command, NEC_COMMAND_LEN);
796
797 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
798
799 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
800 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
801 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
802 irsnd_buffer[3] = 0x8B; // 10001011 (id)
803 irsnd_busy = TRUE;
804 break;
805 }
806 case IRMP_NEC_PROTOCOL:
807 {
808 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
809 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
810
811 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
812 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
813 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
814 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
815 irsnd_busy = TRUE;
816 break;
817 }
818 #endif
819 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
820 case IRMP_NEC16_PROTOCOL:
821 {
822 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
823 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
824
825 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
826 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
827 irsnd_busy = TRUE;
828 break;
829 }
830 #endif
831 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
832 case IRMP_NEC42_PROTOCOL:
833 {
834 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
835 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
836
837 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
838 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
839 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
840 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
841 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
842 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
843 irsnd_busy = TRUE;
844 break;
845 }
846 #endif
847 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
848 case IRMP_LGAIR_PROTOCOL:
849 {
850 address = irmp_data_p->address;
851 command = irmp_data_p->command;
852
853 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
854 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
855 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
856 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
857 ((command & 0x0F00) >> 8) +
858 ((command & 0x00F0) >>4 ) +
859 ((command & 0x000F))) & 0x000F) << 4;
860 irsnd_busy = TRUE;
861 break;
862 }
863 #endif
864 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
865 case IRMP_SAMSUNG_PROTOCOL:
866 {
867 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
868 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
869
870 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
871 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
872 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
873 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
874 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
875 irsnd_busy = TRUE;
876 break;
877 }
878 case IRMP_SAMSUNG32_PROTOCOL:
879 {
880 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
881 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
882
883 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
884 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
885 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
886 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
887 irsnd_busy = TRUE;
888 break;
889 }
890 #endif
891 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
892 case IRMP_MATSUSHITA_PROTOCOL:
893 {
894 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
895 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
896
897 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
898 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
899 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
900 irsnd_busy = TRUE;
901 break;
902 }
903 #endif
904 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
905 case IRMP_KASEIKYO_PROTOCOL:
906 {
907 uint8_t xor_value;
908 uint16_t genre2;
909
910 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
911 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
912 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
913
914 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
915
916 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
917 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
918 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
919 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
920 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
921
922 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
923
924 irsnd_buffer[5] = xor_value;
925 irsnd_busy = TRUE;
926 break;
927 }
928 #endif
929 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
930 case IRMP_RECS80_PROTOCOL:
931 {
932 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
933
934 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
935 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
936 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
937 irsnd_busy = TRUE;
938 break;
939 }
940 #endif
941 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
942 case IRMP_RECS80EXT_PROTOCOL:
943 {
944 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
945
946 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
947 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
948 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
949 irsnd_busy = TRUE;
950 break;
951 }
952 #endif
953 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
954 case IRMP_RC5_PROTOCOL:
955 {
956 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
957
958 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
959 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
960 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
961 irsnd_busy = TRUE;
962 break;
963 }
964 #endif
965 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
966 case IRMP_RC6_PROTOCOL:
967 {
968 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
969
970 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
971 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
972 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
973 irsnd_busy = TRUE;
974 break;
975 }
976 #endif
977 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
978 case IRMP_RC6A_PROTOCOL:
979 {
980 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
981
982 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
983 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
984 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
985 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
986 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
987 irsnd_busy = TRUE;
988 break;
989 }
990 #endif
991 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
992 case IRMP_DENON_PROTOCOL:
993 {
994 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
995 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
996 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
997 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
998 irsnd_busy = TRUE;
999 break;
1000 }
1001 #endif
1002 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1003 case IRMP_THOMSON_PROTOCOL:
1004 {
1005 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1006
1007 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1008 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1009 irsnd_busy = TRUE;
1010 break;
1011 }
1012 #endif
1013 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1014 case IRMP_NUBERT_PROTOCOL:
1015 {
1016 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1017 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1018 irsnd_busy = TRUE;
1019 break;
1020 }
1021 #endif
1022 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1023 case IRMP_SPEAKER_PROTOCOL:
1024 {
1025 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1026 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1027 irsnd_busy = TRUE;
1028 break;
1029 }
1030 #endif
1031 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1032 case IRMP_BANG_OLUFSEN_PROTOCOL:
1033 {
1034 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1035 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1036 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1037 irsnd_busy = TRUE;
1038 break;
1039 }
1040 #endif
1041 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1042 case IRMP_GRUNDIG_PROTOCOL:
1043 {
1044 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1045
1046 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1047 irsnd_buffer[1] = 0xC0; // 11
1048 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1049 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1050
1051 irsnd_busy = TRUE;
1052 break;
1053 }
1054 #endif
1055 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1056 case IRMP_TELEFUNKEN_PROTOCOL:
1057 {
1058 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1059 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1060
1061 irsnd_busy = TRUE;
1062 break;
1063 }
1064 #endif
1065 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1066 case IRMP_IR60_PROTOCOL:
1067 {
1068 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1069 #if 0
1070 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1071 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1072 #else
1073 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1074 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1075 #endif
1076
1077 irsnd_busy = TRUE;
1078 break;
1079 }
1080 #endif
1081 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1082 case IRMP_NOKIA_PROTOCOL:
1083 {
1084 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1085 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1086
1087 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1088 irsnd_buffer[1] = 0xFF; // 11111111
1089 irsnd_buffer[2] = 0x80; // 1
1090 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1091 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1092 irsnd_buffer[5] = (address << 7); // A
1093
1094 irsnd_busy = TRUE;
1095 break;
1096 }
1097 #endif
1098 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1099 case IRMP_SIEMENS_PROTOCOL:
1100 {
1101 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1102 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1103 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1104
1105 irsnd_busy = TRUE;
1106 break;
1107 }
1108 #endif
1109 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1110 case IRMP_RUWIDO_PROTOCOL:
1111 {
1112 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1113 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1114 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1115 irsnd_busy = TRUE;
1116 break;
1117 }
1118 #endif
1119 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1120 case IRMP_FDC_PROTOCOL:
1121 {
1122 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1123 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1124
1125 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1126 irsnd_buffer[1] = 0; // 00000000
1127 irsnd_buffer[2] = 0; // 0000RRRR
1128 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1129 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1130 irsnd_busy = TRUE;
1131 break;
1132 }
1133 #endif
1134 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1135 case IRMP_RCCAR_PROTOCOL:
1136 {
1137 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1138 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1139
1140 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1141 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1142
1143 irsnd_busy = TRUE;
1144 break;
1145 }
1146 #endif
1147 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1148 case IRMP_JVC_PROTOCOL:
1149 {
1150 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1151 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1152
1153 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1154 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1155
1156 irsnd_busy = TRUE;
1157 break;
1158 }
1159 #endif
1160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1161 case IRMP_NIKON_PROTOCOL:
1162 {
1163 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1164 irsnd_busy = TRUE;
1165 break;
1166 }
1167 #endif
1168 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1169 case IRMP_LEGO_PROTOCOL:
1170 {
1171 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1172
1173 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1174 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1175 irsnd_busy = TRUE;
1176 break;
1177 }
1178 #endif
1179 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1180 case IRMP_A1TVBOX_PROTOCOL:
1181 {
1182 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1183 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1184 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1185
1186 irsnd_busy = TRUE;
1187 break;
1188 }
1189 #endif
1190 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1191 case IRMP_ROOMBA_PROTOCOL:
1192 {
1193
1194 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1195 irsnd_busy = TRUE;
1196 break;
1197 }
1198 #endif
1199 default:
1200 {
1201 break;
1202 }
1203 }
1204
1205 return irsnd_busy;
1206 }
1207
1208 void
1209 irsnd_stop (void)
1210 {
1211 irsnd_repeat = 0;
1212 }
1213
1214 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1215 * ISR routine
1216 * @details ISR routine, called 10000 times per second
1217 *---------------------------------------------------------------------------------------------------------------------------------------------------
1218 */
1219 uint8_t
1220 irsnd_ISR (void)
1221 {
1222 static uint8_t send_trailer = FALSE;
1223 static uint8_t current_bit = 0xFF;
1224 static uint8_t pulse_counter = 0;
1225 static IRSND_PAUSE_LEN pause_counter = 0;
1226 static uint8_t startbit_pulse_len = 0;
1227 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1228 static uint8_t pulse_1_len = 0;
1229 static uint8_t pause_1_len = 0;
1230 static uint8_t pulse_0_len = 0;
1231 static uint8_t pause_0_len = 0;
1232 static uint8_t has_stop_bit = 0;
1233 static uint8_t new_frame = TRUE;
1234 static uint8_t complete_data_len = 0;
1235 static uint8_t n_repeat_frames = 0; // number of repetition frames
1236 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1237 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1238 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1239 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1240 static uint8_t repeat_counter = 0; // repeat counter
1241 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1242 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1243 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1244 static uint8_t last_bit_value;
1245 #endif
1246 static uint8_t pulse_len = 0xFF;
1247 static IRSND_PAUSE_LEN pause_len = 0xFF;
1248
1249 if (irsnd_busy)
1250 {
1251 if (current_bit == 0xFF && new_frame) // start of transmission...
1252 {
1253 if (auto_repetition_counter > 0)
1254 {
1255 auto_repetition_pause_counter++;
1256
1257 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1258 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1259 {
1260 repeat_frame_pause_len--;
1261 }
1262 #endif
1263
1264 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1265 {
1266 auto_repetition_pause_counter = 0;
1267
1268 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1269 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1270 {
1271 current_bit = 16;
1272 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1273 }
1274 else
1275 #endif
1276 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1277 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1278 {
1279 current_bit = 15;
1280 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1281 }
1282 else
1283 #endif
1284 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1285 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1286 {
1287 current_bit = 7;
1288 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1289 }
1290 else
1291 #endif
1292 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1293 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1294 {
1295 if (auto_repetition_counter + 1 < n_auto_repetitions)
1296 {
1297 current_bit = 23;
1298 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1299 }
1300 else // nokia stop frame
1301 {
1302 current_bit = 0xFF;
1303 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1304 }
1305 }
1306 else
1307 #endif
1308 {
1309 ;
1310 }
1311 }
1312 else
1313 {
1314 #ifdef ANALYZE
1315 if (irsnd_is_on)
1316 {
1317 putchar ('0');
1318 }
1319 else
1320 {
1321 putchar ('1');
1322 }
1323 #endif
1324 return irsnd_busy;
1325 }
1326 }
1327 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1328 {
1329 packet_repeat_pause_counter++;
1330 #ifdef ANALYZE
1331 if (irsnd_is_on)
1332 {
1333 putchar ('0');
1334 }
1335 else
1336 {
1337 putchar ('1');
1338 }
1339 #endif
1340 return irsnd_busy;
1341 }
1342 else
1343 {
1344 if (send_trailer)
1345 {
1346 irsnd_busy = FALSE;
1347 send_trailer = FALSE;
1348 return irsnd_busy;
1349 }
1350
1351 n_repeat_frames = irsnd_repeat;
1352
1353 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1354 {
1355 n_repeat_frames = 255;
1356 }
1357
1358 packet_repeat_pause_counter = 0;
1359 pulse_counter = 0;
1360 pause_counter = 0;
1361
1362 switch (irsnd_protocol)
1363 {
1364 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1365 case IRMP_SIRCS_PROTOCOL:
1366 {
1367 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1368 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1369 pulse_1_len = SIRCS_1_PULSE_LEN;
1370 pause_1_len = SIRCS_PAUSE_LEN - 1;
1371 pulse_0_len = SIRCS_0_PULSE_LEN;
1372 pause_0_len = SIRCS_PAUSE_LEN - 1;
1373 has_stop_bit = SIRCS_STOP_BIT;
1374 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1375 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1376 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1377 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1378 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1379 break;
1380 }
1381 #endif
1382 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1383 case IRMP_NEC_PROTOCOL:
1384 {
1385 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1386
1387 if (repeat_counter > 0)
1388 {
1389 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1390 complete_data_len = 0;
1391 }
1392 else
1393 {
1394 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1395 complete_data_len = NEC_COMPLETE_DATA_LEN;
1396 }
1397
1398 pulse_1_len = NEC_PULSE_LEN;
1399 pause_1_len = NEC_1_PAUSE_LEN - 1;
1400 pulse_0_len = NEC_PULSE_LEN;
1401 pause_0_len = NEC_0_PAUSE_LEN - 1;
1402 has_stop_bit = NEC_STOP_BIT;
1403 n_auto_repetitions = 1; // 1 frame
1404 auto_repetition_pause_len = 0;
1405 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1406 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1407 break;
1408 }
1409 #endif
1410 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1411 case IRMP_NEC16_PROTOCOL:
1412 {
1413 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1414 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1415 pulse_1_len = NEC_PULSE_LEN;
1416 pause_1_len = NEC_1_PAUSE_LEN - 1;
1417 pulse_0_len = NEC_PULSE_LEN;
1418 pause_0_len = NEC_0_PAUSE_LEN - 1;
1419 has_stop_bit = NEC_STOP_BIT;
1420 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1421 n_auto_repetitions = 1; // 1 frame
1422 auto_repetition_pause_len = 0;
1423 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1424 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1425 break;
1426 }
1427 #endif
1428 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1429 case IRMP_NEC42_PROTOCOL:
1430 {
1431 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1432 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1433 pulse_1_len = NEC_PULSE_LEN;
1434 pause_1_len = NEC_1_PAUSE_LEN - 1;
1435 pulse_0_len = NEC_PULSE_LEN;
1436 pause_0_len = NEC_0_PAUSE_LEN - 1;
1437 has_stop_bit = NEC_STOP_BIT;
1438 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1439 n_auto_repetitions = 1; // 1 frame
1440 auto_repetition_pause_len = 0;
1441 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1442 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1443 break;
1444 }
1445 #endif
1446 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1447 case IRMP_LGAIR_PROTOCOL:
1448 {
1449 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1450 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1451 pulse_1_len = NEC_PULSE_LEN;
1452 pause_1_len = NEC_1_PAUSE_LEN - 1;
1453 pulse_0_len = NEC_PULSE_LEN;
1454 pause_0_len = NEC_0_PAUSE_LEN - 1;
1455 has_stop_bit = NEC_STOP_BIT;
1456 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1457 n_auto_repetitions = 1; // 1 frame
1458 auto_repetition_pause_len = 0;
1459 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1460 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1461 break;
1462 }
1463 #endif
1464 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1465 case IRMP_SAMSUNG_PROTOCOL:
1466 {
1467 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1468 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1469 pulse_1_len = SAMSUNG_PULSE_LEN;
1470 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1471 pulse_0_len = SAMSUNG_PULSE_LEN;
1472 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1473 has_stop_bit = SAMSUNG_STOP_BIT;
1474 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1475 n_auto_repetitions = 1; // 1 frame
1476 auto_repetition_pause_len = 0;
1477 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1478 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1479 break;
1480 }
1481
1482 case IRMP_SAMSUNG32_PROTOCOL:
1483 {
1484 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1485 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1486 pulse_1_len = SAMSUNG_PULSE_LEN;
1487 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1488 pulse_0_len = SAMSUNG_PULSE_LEN;
1489 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1490 has_stop_bit = SAMSUNG_STOP_BIT;
1491 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1492 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames
1493 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1494 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1495 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1496 break;
1497 }
1498 #endif
1499 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1500 case IRMP_MATSUSHITA_PROTOCOL:
1501 {
1502 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1503 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1504 pulse_1_len = MATSUSHITA_PULSE_LEN;
1505 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1506 pulse_0_len = MATSUSHITA_PULSE_LEN;
1507 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1508 has_stop_bit = MATSUSHITA_STOP_BIT;
1509 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1510 n_auto_repetitions = 1; // 1 frame
1511 auto_repetition_pause_len = 0;
1512 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1513 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1514 break;
1515 }
1516 #endif
1517 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1518 case IRMP_KASEIKYO_PROTOCOL:
1519 {
1520 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1521 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1522 pulse_1_len = KASEIKYO_PULSE_LEN;
1523 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1524 pulse_0_len = KASEIKYO_PULSE_LEN;
1525 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1526 has_stop_bit = KASEIKYO_STOP_BIT;
1527 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1528 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1529 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1530 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1531 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1532 break;
1533 }
1534 #endif
1535 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1536 case IRMP_RECS80_PROTOCOL:
1537 {
1538 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1539 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1540 pulse_1_len = RECS80_PULSE_LEN;
1541 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1542 pulse_0_len = RECS80_PULSE_LEN;
1543 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1544 has_stop_bit = RECS80_STOP_BIT;
1545 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1546 n_auto_repetitions = 1; // 1 frame
1547 auto_repetition_pause_len = 0;
1548 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1549 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1550 break;
1551 }
1552 #endif
1553 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1554 case IRMP_RECS80EXT_PROTOCOL:
1555 {
1556 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1557 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1558 pulse_1_len = RECS80EXT_PULSE_LEN;
1559 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1560 pulse_0_len = RECS80EXT_PULSE_LEN;
1561 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1562 has_stop_bit = RECS80EXT_STOP_BIT;
1563 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1564 n_auto_repetitions = 1; // 1 frame
1565 auto_repetition_pause_len = 0;
1566 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1567 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1568 break;
1569 }
1570 #endif
1571 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1572 case IRMP_TELEFUNKEN_PROTOCOL:
1573 {
1574 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1575 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1576 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1577 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1578 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1579 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1580 has_stop_bit = TELEFUNKEN_STOP_BIT;
1581 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1582 n_auto_repetitions = 1; // 1 frames
1583 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1584 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1585 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1586 break;
1587 }
1588 #endif
1589 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1590 case IRMP_RC5_PROTOCOL:
1591 {
1592 startbit_pulse_len = RC5_BIT_LEN;
1593 startbit_pause_len = RC5_BIT_LEN;
1594 pulse_len = RC5_BIT_LEN;
1595 pause_len = RC5_BIT_LEN;
1596 has_stop_bit = RC5_STOP_BIT;
1597 complete_data_len = RC5_COMPLETE_DATA_LEN;
1598 n_auto_repetitions = 1; // 1 frame
1599 auto_repetition_pause_len = 0;
1600 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1601 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1602 break;
1603 }
1604 #endif
1605 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1606 case IRMP_RC6_PROTOCOL:
1607 {
1608 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1609 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1610 pulse_len = RC6_BIT_LEN;
1611 pause_len = RC6_BIT_LEN;
1612 has_stop_bit = RC6_STOP_BIT;
1613 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1614 n_auto_repetitions = 1; // 1 frame
1615 auto_repetition_pause_len = 0;
1616 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1617 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1618 break;
1619 }
1620 #endif
1621 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1622 case IRMP_RC6A_PROTOCOL:
1623 {
1624 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1625 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1626 pulse_len = RC6_BIT_LEN;
1627 pause_len = RC6_BIT_LEN;
1628 has_stop_bit = RC6_STOP_BIT;
1629 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1630 n_auto_repetitions = 1; // 1 frame
1631 auto_repetition_pause_len = 0;
1632 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1633 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1634 break;
1635 }
1636 #endif
1637 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1638 case IRMP_DENON_PROTOCOL:
1639 {
1640 startbit_pulse_len = 0x00;
1641 startbit_pause_len = 0x00;
1642 pulse_1_len = DENON_PULSE_LEN;
1643 pause_1_len = DENON_1_PAUSE_LEN - 1;
1644 pulse_0_len = DENON_PULSE_LEN;
1645 pause_0_len = DENON_0_PAUSE_LEN - 1;
1646 has_stop_bit = DENON_STOP_BIT;
1647 complete_data_len = DENON_COMPLETE_DATA_LEN;
1648 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1649 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1650 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1651 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1652 break;
1653 }
1654 #endif
1655 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1656 case IRMP_THOMSON_PROTOCOL:
1657 {
1658 startbit_pulse_len = 0x00;
1659 startbit_pause_len = 0x00;
1660 pulse_1_len = THOMSON_PULSE_LEN;
1661 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1662 pulse_0_len = THOMSON_PULSE_LEN;
1663 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1664 has_stop_bit = THOMSON_STOP_BIT;
1665 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1666 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1667 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1668 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1669 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1670 break;
1671 }
1672 #endif
1673 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1674 case IRMP_NUBERT_PROTOCOL:
1675 {
1676 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1677 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1678 pulse_1_len = NUBERT_1_PULSE_LEN;
1679 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1680 pulse_0_len = NUBERT_0_PULSE_LEN;
1681 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1682 has_stop_bit = NUBERT_STOP_BIT;
1683 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1684 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1685 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1686 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1687 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1688 break;
1689 }
1690 #endif
1691 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1692 case IRMP_SPEAKER_PROTOCOL:
1693 {
1694 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1695 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1696 pulse_1_len = SPEAKER_1_PULSE_LEN;
1697 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1698 pulse_0_len = SPEAKER_0_PULSE_LEN;
1699 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1700 has_stop_bit = SPEAKER_STOP_BIT;
1701 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1702 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1703 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1704 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1705 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1706 break;
1707 }
1708 #endif
1709 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1710 case IRMP_BANG_OLUFSEN_PROTOCOL:
1711 {
1712 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1713 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1714 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1715 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1716 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1717 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1718 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1719 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1720 n_auto_repetitions = 1; // 1 frame
1721 auto_repetition_pause_len = 0;
1722 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1723 last_bit_value = 0;
1724 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1725 break;
1726 }
1727 #endif
1728 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1729 case IRMP_GRUNDIG_PROTOCOL:
1730 {
1731 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1732 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1733 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1734 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1735 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1736 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1737 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1738 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1739 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1740 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1741 break;
1742 }
1743 #endif
1744 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1745 case IRMP_IR60_PROTOCOL:
1746 {
1747 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1748 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1749 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1750 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1751 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1752 complete_data_len = IR60_COMPLETE_DATA_LEN;
1753 n_auto_repetitions = IR60_FRAMES; // 2 frames
1754 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1755 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1756 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1757 break;
1758 }
1759 #endif
1760 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1761 case IRMP_NOKIA_PROTOCOL:
1762 {
1763 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1764 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1765 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1766 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1767 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1768 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1769 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1770 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1771 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1772 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1773 break;
1774 }
1775 #endif
1776 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1777 case IRMP_SIEMENS_PROTOCOL:
1778 {
1779 startbit_pulse_len = SIEMENS_BIT_LEN;
1780 startbit_pause_len = SIEMENS_BIT_LEN;
1781 pulse_len = SIEMENS_BIT_LEN;
1782 pause_len = SIEMENS_BIT_LEN;
1783 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1784 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1785 n_auto_repetitions = 1; // 1 frame
1786 auto_repetition_pause_len = 0;
1787 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1788 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1789 break;
1790 }
1791 #endif
1792 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1793 case IRMP_RUWIDO_PROTOCOL:
1794 {
1795 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1796 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1797 pulse_len = RUWIDO_BIT_PULSE_LEN;
1798 pause_len = RUWIDO_BIT_PAUSE_LEN;
1799 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1800 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1801 n_auto_repetitions = 1; // 1 frame
1802 auto_repetition_pause_len = 0;
1803 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
1804 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1805 break;
1806 }
1807 #endif
1808 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1809 case IRMP_FDC_PROTOCOL:
1810 {
1811 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1812 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1813 complete_data_len = FDC_COMPLETE_DATA_LEN;
1814 pulse_1_len = FDC_PULSE_LEN;
1815 pause_1_len = FDC_1_PAUSE_LEN - 1;
1816 pulse_0_len = FDC_PULSE_LEN;
1817 pause_0_len = FDC_0_PAUSE_LEN - 1;
1818 has_stop_bit = FDC_STOP_BIT;
1819 n_auto_repetitions = 1; // 1 frame
1820 auto_repetition_pause_len = 0;
1821 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1822 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1823 break;
1824 }
1825 #endif
1826 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1827 case IRMP_RCCAR_PROTOCOL:
1828 {
1829 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1830 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1831 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1832 pulse_1_len = RCCAR_PULSE_LEN;
1833 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1834 pulse_0_len = RCCAR_PULSE_LEN;
1835 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1836 has_stop_bit = RCCAR_STOP_BIT;
1837 n_auto_repetitions = 1; // 1 frame
1838 auto_repetition_pause_len = 0;
1839 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1840 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1841 break;
1842 }
1843 #endif
1844 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1845 case IRMP_JVC_PROTOCOL:
1846 {
1847 if (repeat_counter != 0) // skip start bit if repetition frame
1848 {
1849 current_bit = 0;
1850 }
1851
1852 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1853 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1854 complete_data_len = JVC_COMPLETE_DATA_LEN;
1855 pulse_1_len = JVC_PULSE_LEN;
1856 pause_1_len = JVC_1_PAUSE_LEN - 1;
1857 pulse_0_len = JVC_PULSE_LEN;
1858 pause_0_len = JVC_0_PAUSE_LEN - 1;
1859 has_stop_bit = JVC_STOP_BIT;
1860 n_auto_repetitions = 1; // 1 frame
1861 auto_repetition_pause_len = 0;
1862 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1863 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1864 break;
1865 }
1866 #endif
1867 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1868 case IRMP_NIKON_PROTOCOL:
1869 {
1870 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1871 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
1872 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1873 pulse_1_len = NIKON_PULSE_LEN;
1874 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1875 pulse_0_len = NIKON_PULSE_LEN;
1876 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1877 has_stop_bit = NIKON_STOP_BIT;
1878 n_auto_repetitions = 1; // 1 frame
1879 auto_repetition_pause_len = 0;
1880 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1881 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1882 break;
1883 }
1884 #endif
1885 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1886 case IRMP_LEGO_PROTOCOL:
1887 {
1888 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1889 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1890 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1891 pulse_1_len = LEGO_PULSE_LEN;
1892 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1893 pulse_0_len = LEGO_PULSE_LEN;
1894 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1895 has_stop_bit = LEGO_STOP_BIT;
1896 n_auto_repetitions = 1; // 1 frame
1897 auto_repetition_pause_len = 0;
1898 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1899 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1900 break;
1901 }
1902 #endif
1903 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1904 case IRMP_A1TVBOX_PROTOCOL:
1905 {
1906 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
1907 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
1908 pulse_len = A1TVBOX_BIT_PULSE_LEN;
1909 pause_len = A1TVBOX_BIT_PAUSE_LEN;
1910 has_stop_bit = A1TVBOX_STOP_BIT;
1911 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
1912 n_auto_repetitions = 1; // 1 frame
1913 auto_repetition_pause_len = 0;
1914 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
1915 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1916 break;
1917 }
1918 #endif
1919 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1920 case IRMP_ROOMBA_PROTOCOL:
1921 {
1922 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
1923 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
1924 pulse_1_len = ROOMBA_1_PULSE_LEN;
1925 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
1926 pulse_0_len = ROOMBA_0_PULSE_LEN;
1927 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
1928 has_stop_bit = ROOMBA_STOP_BIT;
1929 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
1930 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
1931 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1932 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1933 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1934 break;
1935 }
1936 #endif
1937 default:
1938 {
1939 irsnd_busy = FALSE;
1940 break;
1941 }
1942 }
1943 }
1944 }
1945
1946 if (irsnd_busy)
1947 {
1948 new_frame = FALSE;
1949
1950 switch (irsnd_protocol)
1951 {
1952 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1953 case IRMP_SIRCS_PROTOCOL:
1954 #endif
1955 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1956 case IRMP_NEC_PROTOCOL:
1957 #endif
1958 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1959 case IRMP_NEC16_PROTOCOL:
1960 #endif
1961 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1962 case IRMP_NEC42_PROTOCOL:
1963 #endif
1964 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1965 case IRMP_LGAIR_PROTOCOL:
1966 #endif
1967 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1968 case IRMP_SAMSUNG_PROTOCOL:
1969 case IRMP_SAMSUNG32_PROTOCOL:
1970 #endif
1971 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1972 case IRMP_MATSUSHITA_PROTOCOL:
1973 #endif
1974 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1975 case IRMP_KASEIKYO_PROTOCOL:
1976 #endif
1977 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1978 case IRMP_RECS80_PROTOCOL:
1979 #endif
1980 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1981 case IRMP_RECS80EXT_PROTOCOL:
1982 #endif
1983 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1984 case IRMP_TELEFUNKEN_PROTOCOL:
1985 #endif
1986 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1987 case IRMP_DENON_PROTOCOL:
1988 #endif
1989 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1990 case IRMP_NUBERT_PROTOCOL:
1991 #endif
1992 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1993 case IRMP_SPEAKER_PROTOCOL:
1994 #endif
1995 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1996 case IRMP_BANG_OLUFSEN_PROTOCOL:
1997 #endif
1998 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1999 case IRMP_FDC_PROTOCOL:
2000 #endif
2001 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2002 case IRMP_RCCAR_PROTOCOL:
2003 #endif
2004 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2005 case IRMP_JVC_PROTOCOL:
2006 #endif
2007 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2008 case IRMP_NIKON_PROTOCOL:
2009 #endif
2010 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2011 case IRMP_LEGO_PROTOCOL:
2012 #endif
2013 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2014 case IRMP_THOMSON_PROTOCOL:
2015 #endif
2016 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2017 case IRMP_ROOMBA_PROTOCOL:
2018 #endif
2019
2020 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2021 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
2022 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2023 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
2024 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \
2025 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2026 {
2027 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2028 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
2029 {
2030 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
2031 {
2032 auto_repetition_pause_len--;
2033 }
2034
2035 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
2036 {
2037 repeat_frame_pause_len--;
2038 }
2039 }
2040 #endif
2041
2042 if (pulse_counter == 0)
2043 {
2044 if (current_bit == 0xFF) // send start bit
2045 {
2046 pulse_len = startbit_pulse_len;
2047 pause_len = startbit_pause_len;
2048 }
2049 else if (current_bit < complete_data_len) // send n'th bit
2050 {
2051 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2052 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2053 {
2054 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2055 {
2056 pulse_len = SAMSUNG_PULSE_LEN;
2057 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
2058 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2059 }
2060 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2061 {
2062 pulse_len = SAMSUNG_PULSE_LEN;
2063 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2064 }
2065 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2066 {
2067 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2068
2069 pulse_len = SAMSUNG_PULSE_LEN;
2070 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
2071 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2072 }
2073 }
2074 else
2075 #endif
2076
2077 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2078 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2079 {
2080 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2081 {
2082 pulse_len = NEC_PULSE_LEN;
2083 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
2084 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2085 }
2086 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2087 {
2088 pulse_len = NEC_PULSE_LEN;
2089 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2090 }
2091 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2092 {
2093 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2094
2095 pulse_len = NEC_PULSE_LEN;
2096 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
2097 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2098 }
2099 }
2100 else
2101 #endif
2102
2103 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2104 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2105 {
2106 if (current_bit == 0) // send 2nd start bit
2107 {
2108 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2109 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2110 }
2111 else if (current_bit == 1) // send 3rd start bit
2112 {
2113 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2114 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2115 }
2116 else if (current_bit == 2) // send 4th start bit
2117 {
2118 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2119 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2120 }
2121 else if (current_bit == 19) // send trailer bit
2122 {
2123 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2124 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2125 }
2126 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2127 {
2128 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
2129 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2130
2131 if (cur_bit_value == last_bit_value)
2132 {
2133 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2134 }
2135 else
2136 {
2137 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2138 last_bit_value = cur_bit_value;
2139 }
2140 }
2141 }
2142 else
2143 #endif
2144 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
2145 {
2146 pulse_len = pulse_1_len;
2147 pause_len = pause_1_len;
2148 }
2149 else
2150 {
2151 pulse_len = pulse_0_len;
2152 pause_len = pause_0_len;
2153 }
2154 }
2155 else if (has_stop_bit) // send stop bit
2156 {
2157 pulse_len = pulse_0_len;
2158
2159 if (auto_repetition_counter < n_auto_repetitions)
2160 {
2161 pause_len = pause_0_len;
2162 }
2163 else
2164 {
2165 pause_len = 255; // last frame: pause of 255
2166 }
2167 }
2168 }
2169
2170 if (pulse_counter < pulse_len)
2171 {
2172 if (pulse_counter == 0)
2173 {
2174 irsnd_on ();
2175 }
2176 pulse_counter++;
2177 }
2178 else if (pause_counter < pause_len)
2179 {
2180 if (pause_counter == 0)
2181 {
2182 irsnd_off ();
2183 }
2184 pause_counter++;
2185 }
2186 else
2187 {
2188 current_bit++;
2189
2190 if (current_bit >= complete_data_len + has_stop_bit)
2191 {
2192 current_bit = 0xFF;
2193 auto_repetition_counter++;
2194
2195 if (auto_repetition_counter == n_auto_repetitions)
2196 {
2197 irsnd_busy = FALSE;
2198 auto_repetition_counter = 0;
2199 }
2200 new_frame = TRUE;
2201 }
2202
2203 pulse_counter = 0;
2204 pause_counter = 0;
2205 }
2206 break;
2207 }
2208 #endif
2209
2210 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2211 case IRMP_RC5_PROTOCOL:
2212 #endif
2213 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2214 case IRMP_RC6_PROTOCOL:
2215 #endif
2216 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2217 case IRMP_RC6A_PROTOCOL:
2218 #endif
2219 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2220 case IRMP_SIEMENS_PROTOCOL:
2221 #endif
2222 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2223 case IRMP_RUWIDO_PROTOCOL:
2224 #endif
2225 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2226 case IRMP_GRUNDIG_PROTOCOL:
2227 #endif
2228 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2229 case IRMP_IR60_PROTOCOL:
2230 #endif
2231 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2232 case IRMP_NOKIA_PROTOCOL:
2233 #endif
2234 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2235 case IRMP_A1TVBOX_PROTOCOL:
2236 #endif
2237
2238 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2239 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2240 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2241 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2242 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2243 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2244 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2245 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2246 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2247 {
2248 if (pulse_counter == pulse_len && pause_counter == pause_len)
2249 {
2250 current_bit++;
2251
2252 if (current_bit >= complete_data_len)
2253 {
2254 current_bit = 0xFF;
2255
2256 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2257 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2258 {
2259 auto_repetition_counter++;
2260
2261 if (repeat_counter > 0)
2262 { // set 117 msec pause time
2263 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2264 }
2265
2266 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2267 {
2268 n_auto_repetitions++; // increment number of auto repetitions
2269 repeat_counter++;
2270 }
2271 else if (auto_repetition_counter == n_auto_repetitions)
2272 {
2273 irsnd_busy = FALSE;
2274 auto_repetition_counter = 0;
2275 }
2276 }
2277 else
2278 #endif
2279 {
2280 irsnd_busy = FALSE;
2281 }
2282
2283 new_frame = TRUE;
2284 irsnd_off ();
2285 }
2286
2287 pulse_counter = 0;
2288 pause_counter = 0;
2289 }
2290
2291 if (! new_frame)
2292 {
2293 uint8_t first_pulse;
2294
2295 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2296 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2297 {
2298 if (current_bit == 0xFF || // start bit of start-frame
2299 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2300 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2301 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2302 {
2303 pulse_len = startbit_pulse_len;
2304 pause_len = startbit_pause_len;
2305 first_pulse = TRUE;
2306 }
2307 else // send n'th bit
2308 {
2309 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2310 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2311 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2312 }
2313 }
2314 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2315 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2316 #endif
2317 {
2318 if (current_bit == 0xFF) // 1 start bit
2319 {
2320 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2321 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2322 {
2323 pulse_len = startbit_pulse_len;
2324 pause_len = startbit_pause_len;
2325 }
2326 else
2327 #endif
2328 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2329 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2330 {
2331 current_bit = 0;
2332 }
2333 else
2334 #endif
2335 {
2336 ;
2337 }
2338
2339 first_pulse = TRUE;
2340 }
2341 else // send n'th bit
2342 {
2343 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2344 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2345 {
2346 pulse_len = RC6_BIT_LEN;
2347 pause_len = RC6_BIT_LEN;
2348
2349 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2350 {
2351 if (current_bit == 4) // toggle bit (double len)
2352 {
2353 pulse_len = 2 * RC6_BIT_LEN;
2354 pause_len = 2 * RC6_BIT_LEN;
2355 }
2356 }
2357 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2358 {
2359 if (current_bit == 4) // toggle bit (double len)
2360 {
2361 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2362 pause_len = 2 * RC6_BIT_LEN;
2363 }
2364 else if (current_bit == 5) // toggle bit (double len)
2365 {
2366 pause_len = 2 * RC6_BIT_LEN;
2367 }
2368 }
2369 }
2370 #endif
2371 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2372 }
2373
2374 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2375 {
2376 first_pulse = first_pulse ? FALSE : TRUE;
2377 }
2378 }
2379
2380 if (first_pulse)
2381 {
2382 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2383
2384 if (pulse_counter < pulse_len)
2385 {
2386 if (pulse_counter == 0)
2387 {
2388 irsnd_on ();
2389 }
2390 pulse_counter++;
2391 }
2392 else // if (pause_counter < pause_len)
2393 {
2394 if (pause_counter == 0)
2395 {
2396 irsnd_off ();
2397 }
2398 pause_counter++;
2399 }
2400 }
2401 else
2402 {
2403 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2404
2405 if (pause_counter < pause_len)
2406 {
2407 if (pause_counter == 0)
2408 {
2409 irsnd_off ();
2410 }
2411 pause_counter++;
2412 }
2413 else // if (pulse_counter < pulse_len)
2414 {
2415 if (pulse_counter == 0)
2416 {
2417 irsnd_on ();
2418 }
2419 pulse_counter++;
2420 }
2421 }
2422 }
2423 break;
2424 }
2425 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2426 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2427
2428 default:
2429 {
2430 irsnd_busy = FALSE;
2431 break;
2432 }
2433 }
2434 }
2435
2436 if (! irsnd_busy)
2437 {
2438 if (repeat_counter < n_repeat_frames)
2439 {
2440 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2441 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2442 {
2443 irsnd_buffer[2] |= 0x0F;
2444 }
2445 #endif
2446 repeat_counter++;
2447 irsnd_busy = TRUE;
2448 }
2449 else
2450 {
2451 irsnd_busy = TRUE; //Rainer
2452 send_trailer = TRUE;
2453 n_repeat_frames = 0;
2454 repeat_counter = 0;
2455 }
2456 }
2457 }
2458
2459 #ifdef ANALYZE
2460 if (irsnd_is_on)
2461 {
2462 putchar ('0');
2463 }
2464 else
2465 {
2466 putchar ('1');
2467 }
2468 #endif
2469
2470 return irsnd_busy;
2471 }
2472
2473 #ifdef ANALYZE
2474
2475 // main function - for unix/linux + windows only!
2476 // AVR: see main.c!
2477 // Compile it under linux with:
2478 // cc irsnd.c -o irsnd
2479 //
2480 // usage: ./irsnd protocol hex-address hex-command >filename
2481
2482 int
2483 main (int argc, char ** argv)
2484 {
2485 int protocol;
2486 int address;
2487 int command;
2488 IRMP_DATA irmp_data;
2489
2490 if (argc != 4 && argc != 5)
2491 {
2492 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2493 return 1;
2494 }
2495
2496 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2497 sscanf (argv[2], "%x", &address) == 1 &&
2498 sscanf (argv[3], "%x", &command) == 1)
2499 {
2500 irmp_data.protocol = protocol;
2501 irmp_data.address = address;
2502 irmp_data.command = command;
2503
2504 if (argc == 5)
2505 {
2506 irmp_data.flags = atoi (argv[4]);
2507 }
2508 else
2509 {
2510 irmp_data.flags = 0;
2511 }
2512
2513 irsnd_init ();
2514
2515 (void) irsnd_send_data (&irmp_data, TRUE);
2516
2517 while (irsnd_busy)
2518 {
2519 irsnd_ISR ();
2520 }
2521
2522 putchar ('\n');
2523
2524 #if 1 // enable here to send twice
2525 (void) irsnd_send_data (&irmp_data, TRUE);
2526
2527 while (irsnd_busy)
2528 {
2529 irsnd_ISR ();
2530 }
2531
2532 putchar ('\n');
2533 #endif
2534 }
2535 else
2536 {
2537 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2538 return 1;
2539 }
2540 return 0;
2541 }
2542
2543 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)