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Version 2.5.2: added TELEFUNKEN protocol (IRSND)
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.75 2014/06/03 12:28:41 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
47 # if IRSND_OCx == IRSND_OC0A // OC0A
48 # define IRSND_PORT_LETTER B
49 # define IRSND_BIT_NUMBER 0
50 # elif IRSND_OCx == IRSND_OC0B // OC0B
51 # define IRSND_PORT_LETTER B
52 # define IRSND_BIT_NUMBER 1
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT_LETTER A
59 # define IRSND_BIT_NUMBER 2
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
64 # if IRSND_OCx == IRSND_OC2 // OC0A
65 # define IRSND_PORT_LETTER B
66 # define IRSND_BIT_NUMBER 3
67 # else
68 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
69 # endif // IRSND_OCx
70 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
71 # if IRSND_OCx == IRSND_OC2 // OC2
72 # define IRSND_PORT_LETTER D
73 # define IRSND_BIT_NUMBER 7
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
76 # endif // IRSND_OCx
77 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
78 # if IRSND_OCx == IRSND_OC2 // OC2
79 # define IRSND_PORT_LETTER B
80 # define IRSND_BIT_NUMBER 1
81 # elif IRSND_OCx == IRSND_OC0 // OC0
82 # define IRSND_PORT_LETTER B
83 # define IRSND_BIT_NUMBER 0
84 # else
85 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
86 # endif // IRSND_OCx
87 #elif defined (__AVR_ATmega164__) \
88 || defined (__AVR_ATmega324__) \
89 || defined (__AVR_ATmega644__) \
90 || defined (__AVR_ATmega644P__) \
91 || defined (__AVR_ATmega1284__) \
92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
93 # if IRSND_OCx == IRSND_OC2A // OC2A
94 # define IRSND_PORT_LETTER D
95 # define IRSND_BIT_NUMBER 7
96 # elif IRSND_OCx == IRSND_OC2B // OC2B
97 # define IRSND_PORT_LETTER D
98 # define IRSND_BIT_NUMBER 6
99 # elif IRSND_OCx == IRSND_OC0A // OC0A
100 # define IRSND_PORT_LETTER B
101 # define IRSND_BIT_NUMBER 3
102 # elif IRSND_OCx == IRSND_OC0B // OC0B
103 # define IRSND_PORT_LETTER B
104 # define IRSND_BIT_NUMBER 4
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT_LETTER B
116 # define IRSND_BIT_NUMBER 3
117 # elif IRSND_OCx == IRSND_OC2B // OC2B
118 # define IRSND_PORT_LETTER D
119 # define IRSND_BIT_NUMBER 3
120 # elif IRSND_OCx == IRSND_OC0A // OC0A
121 # define IRSND_PORT_LETTER D
122 # define IRSND_BIT_NUMBER 6
123 # elif IRSND_OCx == IRSND_OC0B // OC0B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 5
126 # else
127 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
128 # endif // IRSND_OCx
129 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
130 # if IRSND_OCx == IRSND_OC0
131 # define IRSND_PORT_LETTER B
132 # define IRSND_BIT_NUMBER 0
133 # elif IRSND_OCx == IRSND_OC1A
134 # define IRSND_PORT_LETTER D
135 # define IRSND_BIT_NUMBER 5
136 # elif IRSND_OCx == IRSND_OC1B
137 # define IRSND_PORT_LETTER E
138 # define IRSND_BIT_NUMBER 2
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (PIC_C18) //Microchip C18 compiler
143 //Nothing here to do here -> See irsndconfig.h
144 #elif defined (ARM_STM32) //STM32
145 //Nothing here to do here -> See irsndconfig.h
146 #else
147 # if !defined (unix) && !defined (WIN32)
148 # error mikrocontroller not defined, please fill in definitions here.
149 # endif // unix, WIN32
150 #endif // __AVR...
151
152 #if defined(ATMEL_AVR)
153 # define _CONCAT(a,b) a##b
154 # define CONCAT(a,b) _CONCAT(a,b)
155 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
156 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
157 # define IRSND_BIT IRSND_BIT_NUMBER
158 #endif
159
160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
161 typedef uint16_t IRSND_PAUSE_LEN;
162 #else
163 typedef uint8_t IRSND_PAUSE_LEN;
164 #endif
165
166 /*---------------------------------------------------------------------------------------------------------------------------------------------------
167 * IR timings
168 *---------------------------------------------------------------------------------------------------------------------------------------------------
169 */
170 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
171 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
172 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
173 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
174 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
175 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
176 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
177
178 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
179 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
181 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
182 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
183 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
184 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
187 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
188 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
189 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
190 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
191 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
192
193 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
194 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
195
196 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
197 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
198 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
199 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
200 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
201 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
202
203 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
204 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
205 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
206 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
207 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
208 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
209 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
210
211 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
212 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
213 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
214 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
215 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
216 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
217
218 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
219 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
220 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
221
222 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
223 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
224 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
225 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
226 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
227
228 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
229 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
230 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
231 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
232 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
233
234 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
235 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
236 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
237 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
238 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
239
240 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
241 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
242 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
243 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
244 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
245 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
246
247 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
248 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
249 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
250 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
251 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
252 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
253 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
254
255 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
256 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
257 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
258 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
259 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
260 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
261 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
262 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
263
264 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
265 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
266 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
267 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
268 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
269 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
270 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
271 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
272
273 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
274 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
275 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
276 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
277 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
278 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
279 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
280 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
281 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
282 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
283 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
284 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
285
286 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
287 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
288 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
289 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
290 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
291
292 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
293
294 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
295 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
296 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
297
298 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
299 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
300 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
301 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
302 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
303
304 #ifdef PIC_C18 // PIC C18
305 # define IRSND_FREQ_TYPE uint8_t
306 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
307 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
308 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
309 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
310 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
311 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
312 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
313 #elif defined (ARM_STM32) // STM32
314 # define IRSND_FREQ_TYPE uint32_t
315 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
316 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
317 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
318 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
319 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
320 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
321 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
322 #else // AVR
323 # if F_CPU >= 16000000L
324 # define AVR_PRESCALER 8
325 # else
326 # define AVR_PRESCALER 1
327 # endif
328 # define IRSND_FREQ_TYPE uint8_t
329 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
330 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
331 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
332 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
333 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
334 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
335 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
336 #endif
337
338 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
339 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
340 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
341 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
342 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
343 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
344
345 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
346 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
347 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
348 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
349 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
350 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
351
352 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
353 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
354 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
355 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
356 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
357 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
358 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
359
360 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
361 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
362 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
363 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
364 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
365 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
366 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
367
368 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
369 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
370 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
371 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
372 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
373 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
374 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
375
376 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
377 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
378 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
379 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
380 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
381 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
382
383 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
384 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
385 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
386 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
387 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
388 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
389 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
390
391 static volatile uint8_t irsnd_busy = 0;
392 static volatile uint8_t irsnd_protocol = 0;
393 static volatile uint8_t irsnd_buffer[6] = {0};
394 static volatile uint8_t irsnd_repeat = 0;
395 static volatile uint8_t irsnd_is_on = FALSE;
396
397 #if IRSND_USE_CALLBACK == 1
398 static void (*irsnd_callback_ptr) (uint8_t);
399 #endif // IRSND_USE_CALLBACK == 1
400
401 /*---------------------------------------------------------------------------------------------------------------------------------------------------
402 * Switch PWM on
403 *---------------------------------------------------------------------------------------------------------------------------------------------------
404 */
405 static void
406 irsnd_on (void)
407 {
408 if (! irsnd_is_on)
409 {
410 #ifndef ANALYZE
411 # if defined(PIC_C18) // PIC C18
412 PWMon();
413 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
414 # elif defined (ARM_STM32) // STM32
415 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
416 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
417 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
418 # else // AVR
419 # if IRSND_OCx == IRSND_OC2 // use OC2
420 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
421 # elif IRSND_OCx == IRSND_OC2A // use OC2A
422 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
423 # elif IRSND_OCx == IRSND_OC2B // use OC2B
424 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
425 # elif IRSND_OCx == IRSND_OC0 // use OC0
426 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
427 # elif IRSND_OCx == IRSND_OC0A // use OC0A
428 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
429 # elif IRSND_OCx == IRSND_OC0B // use OC0B
430 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
431 # else
432 # error wrong value of IRSND_OCx
433 # endif // IRSND_OCx
434 # endif // C18
435 #endif // ANALYZE
436
437 #if IRSND_USE_CALLBACK == 1
438 if (irsnd_callback_ptr)
439 {
440 (*irsnd_callback_ptr) (TRUE);
441 }
442 #endif // IRSND_USE_CALLBACK == 1
443
444 irsnd_is_on = TRUE;
445 }
446 }
447
448 /*---------------------------------------------------------------------------------------------------------------------------------------------------
449 * Switch PWM off
450 * @details Switches PWM off
451 *---------------------------------------------------------------------------------------------------------------------------------------------------
452 */
453 static void
454 irsnd_off (void)
455 {
456 if (irsnd_is_on)
457 {
458 #ifndef ANALYZE
459
460 # if defined(PIC_C18) // PIC C18
461 PWMoff();
462 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
463 # elif defined (ARM_STM32) // STM32
464 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
465 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
466 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
467 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
468 # else //AVR
469
470 # if IRSND_OCx == IRSND_OC2 // use OC2
471 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
472 # elif IRSND_OCx == IRSND_OC2A // use OC2A
473 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
474 # elif IRSND_OCx == IRSND_OC2B // use OC2B
475 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
476 # elif IRSND_OCx == IRSND_OC0 // use OC0
477 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
478 # elif IRSND_OCx == IRSND_OC0A // use OC0A
479 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
480 # elif IRSND_OCx == IRSND_OC0B // use OC0B
481 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
482 # else
483 # error wrong value of IRSND_OCx
484 # endif // IRSND_OCx
485 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
486 # endif //C18
487 #endif // ANALYZE
488
489 #if IRSND_USE_CALLBACK == 1
490 if (irsnd_callback_ptr)
491 {
492 (*irsnd_callback_ptr) (FALSE);
493 }
494 #endif // IRSND_USE_CALLBACK == 1
495
496 irsnd_is_on = FALSE;
497 }
498 }
499
500 /*---------------------------------------------------------------------------------------------------------------------------------------------------
501 * Set PWM frequency
502 * @details sets pwm frequency
503 *---------------------------------------------------------------------------------------------------------------------------------------------------
504 */
505 static void
506 irsnd_set_freq (IRSND_FREQ_TYPE freq)
507 {
508 #ifndef ANALYZE
509 # if defined(PIC_C18) // PIC C18
510 OpenPWM(freq);
511 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
512 PWMoff();
513 # elif defined (ARM_STM32) // STM32
514 static uint32_t TimeBaseFreq = 0;
515
516 if (TimeBaseFreq == 0)
517 {
518 RCC_ClocksTypeDef RCC_ClocksStructure;
519 /* Get system clocks and store timer clock in variable */
520 RCC_GetClocksFreq(&RCC_ClocksStructure);
521 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
522 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
523 {
524 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
525 }
526 else
527 {
528 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
529 }
530 # else
531 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
532 {
533 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
534 }
535 else
536 {
537 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
538 }
539 # endif
540 }
541
542 freq = TimeBaseFreq/freq;
543
544 /* Set frequency */
545 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
546 /* Set duty cycle */
547 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
548 # else // AVR
549
550 # if IRSND_OCx == IRSND_OC2
551 OCR2 = freq; // use register OCR2 for OC2
552 # elif IRSND_OCx == IRSND_OC2A // use OC2A
553 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
554 # elif IRSND_OCx == IRSND_OC2B // use OC2B
555 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
556 # elif IRSND_OCx == IRSND_OC0 // use OC0
557 OCR0 = freq; // use register OCR2 for OC2
558 # elif IRSND_OCx == IRSND_OC0A // use OC0A
559 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
560 # elif IRSND_OCx == IRSND_OC0B // use OC0B
561 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
562 # else
563 # error wrong value of IRSND_OCx
564 # endif
565 # endif //PIC_C18
566 #endif // ANALYZE
567 }
568
569 /*---------------------------------------------------------------------------------------------------------------------------------------------------
570 * Initialize the PWM
571 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
572 *---------------------------------------------------------------------------------------------------------------------------------------------------
573 */
574 void
575 irsnd_init (void)
576 {
577 #ifndef ANALYZE
578 # if defined(PIC_C18) // PIC C18
579 OpenTimer;
580 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
581 IRSND_PIN = 0; // set IO to outout
582 PWMoff();
583 # elif defined (ARM_STM32) // STM32
584 GPIO_InitTypeDef GPIO_InitStructure;
585 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
586 TIM_OCInitTypeDef TIM_OCInitStructure;
587
588 /* GPIOx clock enable */
589 # if defined (ARM_STM32L1XX)
590 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
591 # elif defined (ARM_STM32F10X)
592 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
593 # elif defined (ARM_STM32F4XX)
594 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
595 # endif
596
597 /* GPIO Configuration */
598 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
599 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
600 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
601 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
602 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
603 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
604 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
605 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
606 # elif defined (ARM_STM32F10X)
607 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
608 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
609 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
610 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
611 # endif
612
613 /* TIMx clock enable */
614 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
615 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
616 # else
617 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
618 # endif
619
620 /* Time base configuration */
621 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
622 TIM_TimeBaseStructure.TIM_Prescaler = 0;
623 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
624 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
625 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
626
627 /* PWM1 Mode configuration */
628 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
629 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
630 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
631 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
632 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
633
634 /* Preload configuration */
635 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
636 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
637
638 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
639 # else // AVR
640 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
641 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
642
643 # if IRSND_OCx == IRSND_OC2 // use OC2
644 TCCR2 = (1<<WGM21); // CTC mode
645 # if AVR_PRESCALER == 8
646 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
647 # else
648 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
649 # endif
650 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
651 TCCR2A = (1<<WGM21); // CTC mode
652 # if AVR_PRESCALER == 8
653 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
654 # else
655 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
656 # endif
657 # elif IRSND_OCx == IRSND_OC0 // use OC0
658 TCCR0 = (1<<WGM01); // CTC mode
659 # if AVR_PRESCALER == 8
660 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
661 # else
662 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
663 # endif
664 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
665 TCCR0A = (1<<WGM01); // CTC mode
666 # if AVR_PRESCALER == 8
667 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
668 # else
669 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
670 # endif
671 # else
672 # error wrong value of IRSND_OCx
673 # endif
674 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
675 # endif //PIC_C18
676 #endif // ANALYZE
677 }
678
679 #if IRSND_USE_CALLBACK == 1
680 void
681 irsnd_set_callback_ptr (void (*cb)(uint8_t))
682 {
683 irsnd_callback_ptr = cb;
684 }
685 #endif // IRSND_USE_CALLBACK == 1
686
687 uint8_t
688 irsnd_is_busy (void)
689 {
690 return irsnd_busy;
691 }
692
693 static uint16_t
694 bitsrevervse (uint16_t x, uint8_t len)
695 {
696 uint16_t xx = 0;
697
698 while(len)
699 {
700 xx <<= 1;
701 if (x & 1)
702 {
703 xx |= 1;
704 }
705 x >>= 1;
706 len--;
707 }
708 return xx;
709 }
710
711
712 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
713 static uint8_t sircs_additional_bitlen;
714 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
715
716 uint8_t
717 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
718 {
719 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
720 static uint8_t toggle_bit_recs80;
721 #endif
722 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
723 static uint8_t toggle_bit_recs80ext;
724 #endif
725 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
726 static uint8_t toggle_bit_rc5;
727 #endif
728 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
729 static uint8_t toggle_bit_rc6;
730 #endif
731 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
732 static uint8_t toggle_bit_thomson;
733 #endif
734 uint16_t address;
735 uint16_t command;
736
737 if (do_wait)
738 {
739 while (irsnd_busy)
740 {
741 // do nothing;
742 }
743 }
744 else if (irsnd_busy)
745 {
746 return (FALSE);
747 }
748
749 irsnd_protocol = irmp_data_p->protocol;
750 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
751
752 switch (irsnd_protocol)
753 {
754 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
755 case IRMP_SIRCS_PROTOCOL:
756 {
757 // uint8_t sircs_additional_command_len;
758 uint8_t sircs_additional_address_len;
759
760 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
761
762 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
763 {
764 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
765 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
766 }
767 else
768 {
769 // sircs_additional_command_len = sircs_additional_bitlen;
770 sircs_additional_address_len = 0;
771 }
772
773 command = bitsrevervse (irmp_data_p->command, 15);
774
775 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
776 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
777
778 if (sircs_additional_address_len > 0)
779 {
780 address = bitsrevervse (irmp_data_p->address, 5);
781 irsnd_buffer[1] |= (address & 0x0010) >> 4;
782 irsnd_buffer[2] = (address & 0x000F) << 4;
783 }
784 irsnd_busy = TRUE;
785 break;
786 }
787 #endif
788 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
789 case IRMP_APPLE_PROTOCOL:
790 {
791 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
792 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
793
794 address = bitsrevervse (address, NEC_ADDRESS_LEN);
795 command = bitsrevervse (command, NEC_COMMAND_LEN);
796
797 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
798
799 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
800 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
801 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
802 irsnd_buffer[3] = 0x8B; // 10001011 (id)
803 irsnd_busy = TRUE;
804 break;
805 }
806 case IRMP_NEC_PROTOCOL:
807 {
808 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
809 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
810
811 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
812 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
813 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
814 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
815 irsnd_busy = TRUE;
816 break;
817 }
818 #endif
819 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
820 case IRMP_NEC16_PROTOCOL:
821 {
822 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
823 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
824
825 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
826 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
827 irsnd_busy = TRUE;
828 break;
829 }
830 #endif
831 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
832 case IRMP_NEC42_PROTOCOL:
833 {
834 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
835 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
836
837 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
838 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
839 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
840 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
841 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
842 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
843 irsnd_busy = TRUE;
844 break;
845 }
846 #endif
847 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
848 case IRMP_SAMSUNG_PROTOCOL:
849 {
850 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
851 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
852
853 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
854 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
855 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
856 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
857 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
858 irsnd_busy = TRUE;
859 break;
860 }
861 case IRMP_SAMSUNG32_PROTOCOL:
862 {
863 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
864 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
865
866 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
867 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
868 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
869 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
870 irsnd_busy = TRUE;
871 break;
872 }
873 #endif
874 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
875 case IRMP_MATSUSHITA_PROTOCOL:
876 {
877 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
878 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
879
880 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
881 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
882 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
883 irsnd_busy = TRUE;
884 break;
885 }
886 #endif
887 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
888 case IRMP_KASEIKYO_PROTOCOL:
889 {
890 uint8_t xor_value;
891 uint16_t genre2;
892
893 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
894 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
895 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
896
897 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
898
899 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
900 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
901 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
902 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
903 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
904
905 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
906
907 irsnd_buffer[5] = xor_value;
908 irsnd_busy = TRUE;
909 break;
910 }
911 #endif
912 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
913 case IRMP_RECS80_PROTOCOL:
914 {
915 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
916
917 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
918 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
919 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
920 irsnd_busy = TRUE;
921 break;
922 }
923 #endif
924 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
925 case IRMP_RECS80EXT_PROTOCOL:
926 {
927 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
928
929 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
930 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
931 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
932 irsnd_busy = TRUE;
933 break;
934 }
935 #endif
936 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
937 case IRMP_RC5_PROTOCOL:
938 {
939 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
940
941 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
942 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
943 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
944 irsnd_busy = TRUE;
945 break;
946 }
947 #endif
948 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
949 case IRMP_RC6_PROTOCOL:
950 {
951 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
952
953 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
954 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
955 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
956 irsnd_busy = TRUE;
957 break;
958 }
959 #endif
960 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
961 case IRMP_RC6A_PROTOCOL:
962 {
963 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
964
965 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
966 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
967 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
968 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
969 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
970 irsnd_busy = TRUE;
971 break;
972 }
973 #endif
974 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
975 case IRMP_DENON_PROTOCOL:
976 {
977 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
978 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
979 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
980 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
981 irsnd_busy = TRUE;
982 break;
983 }
984 #endif
985 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
986 case IRMP_THOMSON_PROTOCOL:
987 {
988 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
989
990 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
991 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
992 irsnd_busy = TRUE;
993 break;
994 }
995 #endif
996 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
997 case IRMP_NUBERT_PROTOCOL:
998 {
999 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1000 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1001 irsnd_busy = TRUE;
1002 break;
1003 }
1004 #endif
1005 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1006 case IRMP_SPEAKER_PROTOCOL:
1007 {
1008 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1009 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1010 irsnd_busy = TRUE;
1011 break;
1012 }
1013 #endif
1014 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1015 case IRMP_BANG_OLUFSEN_PROTOCOL:
1016 {
1017 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1018 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1019 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1020 irsnd_busy = TRUE;
1021 break;
1022 }
1023 #endif
1024 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1025 case IRMP_GRUNDIG_PROTOCOL:
1026 {
1027 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1028
1029 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1030 irsnd_buffer[1] = 0xC0; // 11
1031 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1032 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1033
1034 irsnd_busy = TRUE;
1035 break;
1036 }
1037 #endif
1038 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1039 case IRMP_TELEFUNKEN_PROTOCOL:
1040 {
1041 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1042 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1043
1044 irsnd_busy = TRUE;
1045 break;
1046 }
1047 #endif
1048 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1049 case IRMP_IR60_PROTOCOL:
1050 {
1051 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1052 #if 0
1053 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1054 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1055 #else
1056 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1057 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1058 #endif
1059
1060 irsnd_busy = TRUE;
1061 break;
1062 }
1063 #endif
1064 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1065 case IRMP_NOKIA_PROTOCOL:
1066 {
1067 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1068 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1069
1070 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1071 irsnd_buffer[1] = 0xFF; // 11111111
1072 irsnd_buffer[2] = 0x80; // 1
1073 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1074 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1075 irsnd_buffer[5] = (address << 7); // A
1076
1077 irsnd_busy = TRUE;
1078 break;
1079 }
1080 #endif
1081 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1082 case IRMP_SIEMENS_PROTOCOL:
1083 {
1084 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1085 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1086 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1087
1088 irsnd_busy = TRUE;
1089 break;
1090 }
1091 #endif
1092 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1093 case IRMP_RUWIDO_PROTOCOL:
1094 {
1095 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1096 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1097 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1098 irsnd_busy = TRUE;
1099 break;
1100 }
1101 #endif
1102 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1103 case IRMP_FDC_PROTOCOL:
1104 {
1105 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1106 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1107
1108 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1109 irsnd_buffer[1] = 0; // 00000000
1110 irsnd_buffer[2] = 0; // 0000RRRR
1111 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1112 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1113 irsnd_busy = TRUE;
1114 break;
1115 }
1116 #endif
1117 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1118 case IRMP_RCCAR_PROTOCOL:
1119 {
1120 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1121 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1122
1123 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1124 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1125
1126 irsnd_busy = TRUE;
1127 break;
1128 }
1129 #endif
1130 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1131 case IRMP_JVC_PROTOCOL:
1132 {
1133 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1134 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1135
1136 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1137 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1138
1139 irsnd_busy = TRUE;
1140 break;
1141 }
1142 #endif
1143 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1144 case IRMP_NIKON_PROTOCOL:
1145 {
1146 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1147 irsnd_busy = TRUE;
1148 break;
1149 }
1150 #endif
1151 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1152 case IRMP_LEGO_PROTOCOL:
1153 {
1154 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1155
1156 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1157 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1158 irsnd_busy = TRUE;
1159 break;
1160 }
1161 #endif
1162 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1163 case IRMP_A1TVBOX_PROTOCOL:
1164 {
1165 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1166 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1167 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1168
1169 irsnd_busy = TRUE;
1170 break;
1171 }
1172 #endif
1173 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1174 case IRMP_ROOMBA_PROTOCOL:
1175 {
1176
1177 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1178 irsnd_busy = TRUE;
1179 break;
1180 }
1181 #endif
1182 default:
1183 {
1184 break;
1185 }
1186 }
1187
1188 return irsnd_busy;
1189 }
1190
1191 void
1192 irsnd_stop (void)
1193 {
1194 irsnd_repeat = 0;
1195 }
1196
1197 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1198 * ISR routine
1199 * @details ISR routine, called 10000 times per second
1200 *---------------------------------------------------------------------------------------------------------------------------------------------------
1201 */
1202 uint8_t
1203 irsnd_ISR (void)
1204 {
1205 static uint8_t send_trailer = FALSE;
1206 static uint8_t current_bit = 0xFF;
1207 static uint8_t pulse_counter = 0;
1208 static IRSND_PAUSE_LEN pause_counter = 0;
1209 static uint8_t startbit_pulse_len = 0;
1210 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1211 static uint8_t pulse_1_len = 0;
1212 static uint8_t pause_1_len = 0;
1213 static uint8_t pulse_0_len = 0;
1214 static uint8_t pause_0_len = 0;
1215 static uint8_t has_stop_bit = 0;
1216 static uint8_t new_frame = TRUE;
1217 static uint8_t complete_data_len = 0;
1218 static uint8_t n_repeat_frames = 0; // number of repetition frames
1219 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1220 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1221 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1222 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1223 static uint8_t repeat_counter = 0; // repeat counter
1224 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1225 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1226 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1227 static uint8_t last_bit_value;
1228 #endif
1229 static uint8_t pulse_len = 0xFF;
1230 static IRSND_PAUSE_LEN pause_len = 0xFF;
1231
1232 if (irsnd_busy)
1233 {
1234 if (current_bit == 0xFF && new_frame) // start of transmission...
1235 {
1236 if (auto_repetition_counter > 0)
1237 {
1238 auto_repetition_pause_counter++;
1239
1240 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1241 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1242 {
1243 repeat_frame_pause_len--;
1244 }
1245 #endif
1246
1247 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1248 {
1249 auto_repetition_pause_counter = 0;
1250
1251 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1252 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1253 {
1254 current_bit = 16;
1255 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1256 }
1257 else
1258 #endif
1259 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1260 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1261 {
1262 current_bit = 15;
1263 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1264 }
1265 else
1266 #endif
1267 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1268 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1269 {
1270 current_bit = 7;
1271 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1272 }
1273 else
1274 #endif
1275 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1276 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1277 {
1278 if (auto_repetition_counter + 1 < n_auto_repetitions)
1279 {
1280 current_bit = 23;
1281 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1282 }
1283 else // nokia stop frame
1284 {
1285 current_bit = 0xFF;
1286 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1287 }
1288 }
1289 else
1290 #endif
1291 {
1292 ;
1293 }
1294 }
1295 else
1296 {
1297 #ifdef ANALYZE
1298 if (irsnd_is_on)
1299 {
1300 putchar ('0');
1301 }
1302 else
1303 {
1304 putchar ('1');
1305 }
1306 #endif
1307 return irsnd_busy;
1308 }
1309 }
1310 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1311 {
1312 packet_repeat_pause_counter++;
1313 #ifdef ANALYZE
1314 if (irsnd_is_on)
1315 {
1316 putchar ('0');
1317 }
1318 else
1319 {
1320 putchar ('1');
1321 }
1322 #endif
1323 return irsnd_busy;
1324 }
1325 else
1326 {
1327 if (send_trailer)
1328 {
1329 irsnd_busy = FALSE;
1330 send_trailer = FALSE;
1331 return irsnd_busy;
1332 }
1333
1334 n_repeat_frames = irsnd_repeat;
1335
1336 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1337 {
1338 n_repeat_frames = 255;
1339 }
1340
1341 packet_repeat_pause_counter = 0;
1342 pulse_counter = 0;
1343 pause_counter = 0;
1344
1345 switch (irsnd_protocol)
1346 {
1347 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1348 case IRMP_SIRCS_PROTOCOL:
1349 {
1350 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1351 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1352 pulse_1_len = SIRCS_1_PULSE_LEN;
1353 pause_1_len = SIRCS_PAUSE_LEN - 1;
1354 pulse_0_len = SIRCS_0_PULSE_LEN;
1355 pause_0_len = SIRCS_PAUSE_LEN - 1;
1356 has_stop_bit = SIRCS_STOP_BIT;
1357 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1358 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1359 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1360 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1361 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1362 break;
1363 }
1364 #endif
1365 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1366 case IRMP_NEC_PROTOCOL:
1367 {
1368 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1369
1370 if (repeat_counter > 0)
1371 {
1372 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1373 complete_data_len = 0;
1374 }
1375 else
1376 {
1377 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1378 complete_data_len = NEC_COMPLETE_DATA_LEN;
1379 }
1380
1381 pulse_1_len = NEC_PULSE_LEN;
1382 pause_1_len = NEC_1_PAUSE_LEN - 1;
1383 pulse_0_len = NEC_PULSE_LEN;
1384 pause_0_len = NEC_0_PAUSE_LEN - 1;
1385 has_stop_bit = NEC_STOP_BIT;
1386 n_auto_repetitions = 1; // 1 frame
1387 auto_repetition_pause_len = 0;
1388 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1389 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1390 break;
1391 }
1392 #endif
1393 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1394 case IRMP_NEC16_PROTOCOL:
1395 {
1396 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1397 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1398 pulse_1_len = NEC_PULSE_LEN;
1399 pause_1_len = NEC_1_PAUSE_LEN - 1;
1400 pulse_0_len = NEC_PULSE_LEN;
1401 pause_0_len = NEC_0_PAUSE_LEN - 1;
1402 has_stop_bit = NEC_STOP_BIT;
1403 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1404 n_auto_repetitions = 1; // 1 frame
1405 auto_repetition_pause_len = 0;
1406 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1407 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1408 break;
1409 }
1410 #endif
1411 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1412 case IRMP_NEC42_PROTOCOL:
1413 {
1414 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1415 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1416 pulse_1_len = NEC_PULSE_LEN;
1417 pause_1_len = NEC_1_PAUSE_LEN - 1;
1418 pulse_0_len = NEC_PULSE_LEN;
1419 pause_0_len = NEC_0_PAUSE_LEN - 1;
1420 has_stop_bit = NEC_STOP_BIT;
1421 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1422 n_auto_repetitions = 1; // 1 frame
1423 auto_repetition_pause_len = 0;
1424 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1425 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1426 break;
1427 }
1428 #endif
1429 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1430 case IRMP_SAMSUNG_PROTOCOL:
1431 {
1432 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1433 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1434 pulse_1_len = SAMSUNG_PULSE_LEN;
1435 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1436 pulse_0_len = SAMSUNG_PULSE_LEN;
1437 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1438 has_stop_bit = SAMSUNG_STOP_BIT;
1439 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1440 n_auto_repetitions = 1; // 1 frame
1441 auto_repetition_pause_len = 0;
1442 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1443 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1444 break;
1445 }
1446
1447 case IRMP_SAMSUNG32_PROTOCOL:
1448 {
1449 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1450 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1451 pulse_1_len = SAMSUNG_PULSE_LEN;
1452 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1453 pulse_0_len = SAMSUNG_PULSE_LEN;
1454 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1455 has_stop_bit = SAMSUNG_STOP_BIT;
1456 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1457 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames
1458 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1459 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1460 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1461 break;
1462 }
1463 #endif
1464 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1465 case IRMP_MATSUSHITA_PROTOCOL:
1466 {
1467 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1468 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1469 pulse_1_len = MATSUSHITA_PULSE_LEN;
1470 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1471 pulse_0_len = MATSUSHITA_PULSE_LEN;
1472 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1473 has_stop_bit = MATSUSHITA_STOP_BIT;
1474 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1475 n_auto_repetitions = 1; // 1 frame
1476 auto_repetition_pause_len = 0;
1477 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1478 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1479 break;
1480 }
1481 #endif
1482 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1483 case IRMP_KASEIKYO_PROTOCOL:
1484 {
1485 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1486 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1487 pulse_1_len = KASEIKYO_PULSE_LEN;
1488 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1489 pulse_0_len = KASEIKYO_PULSE_LEN;
1490 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1491 has_stop_bit = KASEIKYO_STOP_BIT;
1492 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1493 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1494 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1495 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1496 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1497 break;
1498 }
1499 #endif
1500 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1501 case IRMP_RECS80_PROTOCOL:
1502 {
1503 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1504 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1505 pulse_1_len = RECS80_PULSE_LEN;
1506 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1507 pulse_0_len = RECS80_PULSE_LEN;
1508 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1509 has_stop_bit = RECS80_STOP_BIT;
1510 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1511 n_auto_repetitions = 1; // 1 frame
1512 auto_repetition_pause_len = 0;
1513 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1514 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1515 break;
1516 }
1517 #endif
1518 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1519 case IRMP_RECS80EXT_PROTOCOL:
1520 {
1521 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1522 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1523 pulse_1_len = RECS80EXT_PULSE_LEN;
1524 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1525 pulse_0_len = RECS80EXT_PULSE_LEN;
1526 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1527 has_stop_bit = RECS80EXT_STOP_BIT;
1528 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1529 n_auto_repetitions = 1; // 1 frame
1530 auto_repetition_pause_len = 0;
1531 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1532 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1533 break;
1534 }
1535 #endif
1536 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1537 case IRMP_TELEFUNKEN_PROTOCOL:
1538 {
1539 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1540 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1541 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1542 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1543 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1544 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1545 has_stop_bit = TELEFUNKEN_STOP_BIT;
1546 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1547 n_auto_repetitions = 1; // 1 frames
1548 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1549 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1550 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1551 break;
1552 }
1553 #endif
1554 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1555 case IRMP_RC5_PROTOCOL:
1556 {
1557 startbit_pulse_len = RC5_BIT_LEN;
1558 startbit_pause_len = RC5_BIT_LEN;
1559 pulse_len = RC5_BIT_LEN;
1560 pause_len = RC5_BIT_LEN;
1561 has_stop_bit = RC5_STOP_BIT;
1562 complete_data_len = RC5_COMPLETE_DATA_LEN;
1563 n_auto_repetitions = 1; // 1 frame
1564 auto_repetition_pause_len = 0;
1565 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1566 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1567 break;
1568 }
1569 #endif
1570 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1571 case IRMP_RC6_PROTOCOL:
1572 {
1573 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1574 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1575 pulse_len = RC6_BIT_LEN;
1576 pause_len = RC6_BIT_LEN;
1577 has_stop_bit = RC6_STOP_BIT;
1578 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1579 n_auto_repetitions = 1; // 1 frame
1580 auto_repetition_pause_len = 0;
1581 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1582 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1583 break;
1584 }
1585 #endif
1586 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1587 case IRMP_RC6A_PROTOCOL:
1588 {
1589 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1590 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1591 pulse_len = RC6_BIT_LEN;
1592 pause_len = RC6_BIT_LEN;
1593 has_stop_bit = RC6_STOP_BIT;
1594 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1595 n_auto_repetitions = 1; // 1 frame
1596 auto_repetition_pause_len = 0;
1597 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1598 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1599 break;
1600 }
1601 #endif
1602 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1603 case IRMP_DENON_PROTOCOL:
1604 {
1605 startbit_pulse_len = 0x00;
1606 startbit_pause_len = 0x00;
1607 pulse_1_len = DENON_PULSE_LEN;
1608 pause_1_len = DENON_1_PAUSE_LEN - 1;
1609 pulse_0_len = DENON_PULSE_LEN;
1610 pause_0_len = DENON_0_PAUSE_LEN - 1;
1611 has_stop_bit = DENON_STOP_BIT;
1612 complete_data_len = DENON_COMPLETE_DATA_LEN;
1613 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1614 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1615 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1616 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1617 break;
1618 }
1619 #endif
1620 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1621 case IRMP_THOMSON_PROTOCOL:
1622 {
1623 startbit_pulse_len = 0x00;
1624 startbit_pause_len = 0x00;
1625 pulse_1_len = THOMSON_PULSE_LEN;
1626 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1627 pulse_0_len = THOMSON_PULSE_LEN;
1628 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1629 has_stop_bit = THOMSON_STOP_BIT;
1630 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1631 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1632 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1633 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1634 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1635 break;
1636 }
1637 #endif
1638 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1639 case IRMP_NUBERT_PROTOCOL:
1640 {
1641 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1642 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1643 pulse_1_len = NUBERT_1_PULSE_LEN;
1644 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1645 pulse_0_len = NUBERT_0_PULSE_LEN;
1646 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1647 has_stop_bit = NUBERT_STOP_BIT;
1648 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1649 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1650 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1651 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1652 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1653 break;
1654 }
1655 #endif
1656 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1657 case IRMP_SPEAKER_PROTOCOL:
1658 {
1659 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1660 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1661 pulse_1_len = SPEAKER_1_PULSE_LEN;
1662 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1663 pulse_0_len = SPEAKER_0_PULSE_LEN;
1664 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1665 has_stop_bit = SPEAKER_STOP_BIT;
1666 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1667 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1668 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1669 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1670 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1671 break;
1672 }
1673 #endif
1674 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1675 case IRMP_BANG_OLUFSEN_PROTOCOL:
1676 {
1677 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1678 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1679 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1680 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1681 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1682 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1683 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1684 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1685 n_auto_repetitions = 1; // 1 frame
1686 auto_repetition_pause_len = 0;
1687 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1688 last_bit_value = 0;
1689 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1690 break;
1691 }
1692 #endif
1693 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1694 case IRMP_GRUNDIG_PROTOCOL:
1695 {
1696 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1697 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1698 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1699 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1700 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1701 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1702 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1703 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1704 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1705 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1706 break;
1707 }
1708 #endif
1709 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1710 case IRMP_IR60_PROTOCOL:
1711 {
1712 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1713 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1714 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1715 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1716 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1717 complete_data_len = IR60_COMPLETE_DATA_LEN;
1718 n_auto_repetitions = IR60_FRAMES; // 2 frames
1719 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1720 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1721 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1722 break;
1723 }
1724 #endif
1725 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1726 case IRMP_NOKIA_PROTOCOL:
1727 {
1728 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1729 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1730 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1731 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1732 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1733 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1734 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1735 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1736 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1737 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1738 break;
1739 }
1740 #endif
1741 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1742 case IRMP_SIEMENS_PROTOCOL:
1743 {
1744 startbit_pulse_len = SIEMENS_BIT_LEN;
1745 startbit_pause_len = SIEMENS_BIT_LEN;
1746 pulse_len = SIEMENS_BIT_LEN;
1747 pause_len = SIEMENS_BIT_LEN;
1748 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1749 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1750 n_auto_repetitions = 1; // 1 frame
1751 auto_repetition_pause_len = 0;
1752 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1753 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1754 break;
1755 }
1756 #endif
1757 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1758 case IRMP_RUWIDO_PROTOCOL:
1759 {
1760 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1761 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1762 pulse_len = RUWIDO_BIT_PULSE_LEN;
1763 pause_len = RUWIDO_BIT_PAUSE_LEN;
1764 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1765 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1766 n_auto_repetitions = 1; // 1 frame
1767 auto_repetition_pause_len = 0;
1768 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
1769 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1770 break;
1771 }
1772 #endif
1773 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1774 case IRMP_FDC_PROTOCOL:
1775 {
1776 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1777 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1778 complete_data_len = FDC_COMPLETE_DATA_LEN;
1779 pulse_1_len = FDC_PULSE_LEN;
1780 pause_1_len = FDC_1_PAUSE_LEN - 1;
1781 pulse_0_len = FDC_PULSE_LEN;
1782 pause_0_len = FDC_0_PAUSE_LEN - 1;
1783 has_stop_bit = FDC_STOP_BIT;
1784 n_auto_repetitions = 1; // 1 frame
1785 auto_repetition_pause_len = 0;
1786 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1787 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1788 break;
1789 }
1790 #endif
1791 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1792 case IRMP_RCCAR_PROTOCOL:
1793 {
1794 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1795 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1796 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1797 pulse_1_len = RCCAR_PULSE_LEN;
1798 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1799 pulse_0_len = RCCAR_PULSE_LEN;
1800 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1801 has_stop_bit = RCCAR_STOP_BIT;
1802 n_auto_repetitions = 1; // 1 frame
1803 auto_repetition_pause_len = 0;
1804 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1805 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1806 break;
1807 }
1808 #endif
1809 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1810 case IRMP_JVC_PROTOCOL:
1811 {
1812 if (repeat_counter != 0) // skip start bit if repetition frame
1813 {
1814 current_bit = 0;
1815 }
1816
1817 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1818 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1819 complete_data_len = JVC_COMPLETE_DATA_LEN;
1820 pulse_1_len = JVC_PULSE_LEN;
1821 pause_1_len = JVC_1_PAUSE_LEN - 1;
1822 pulse_0_len = JVC_PULSE_LEN;
1823 pause_0_len = JVC_0_PAUSE_LEN - 1;
1824 has_stop_bit = JVC_STOP_BIT;
1825 n_auto_repetitions = 1; // 1 frame
1826 auto_repetition_pause_len = 0;
1827 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1828 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1829 break;
1830 }
1831 #endif
1832 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1833 case IRMP_NIKON_PROTOCOL:
1834 {
1835 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1836 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
1837 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1838 pulse_1_len = NIKON_PULSE_LEN;
1839 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1840 pulse_0_len = NIKON_PULSE_LEN;
1841 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1842 has_stop_bit = NIKON_STOP_BIT;
1843 n_auto_repetitions = 1; // 1 frame
1844 auto_repetition_pause_len = 0;
1845 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1846 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1847 break;
1848 }
1849 #endif
1850 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1851 case IRMP_LEGO_PROTOCOL:
1852 {
1853 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1854 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1855 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1856 pulse_1_len = LEGO_PULSE_LEN;
1857 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1858 pulse_0_len = LEGO_PULSE_LEN;
1859 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1860 has_stop_bit = LEGO_STOP_BIT;
1861 n_auto_repetitions = 1; // 1 frame
1862 auto_repetition_pause_len = 0;
1863 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1864 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1865 break;
1866 }
1867 #endif
1868 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1869 case IRMP_A1TVBOX_PROTOCOL:
1870 {
1871 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
1872 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
1873 pulse_len = A1TVBOX_BIT_PULSE_LEN;
1874 pause_len = A1TVBOX_BIT_PAUSE_LEN;
1875 has_stop_bit = A1TVBOX_STOP_BIT;
1876 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
1877 n_auto_repetitions = 1; // 1 frame
1878 auto_repetition_pause_len = 0;
1879 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
1880 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1881 break;
1882 }
1883 #endif
1884 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1885 case IRMP_ROOMBA_PROTOCOL:
1886 {
1887 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
1888 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
1889 pulse_1_len = ROOMBA_1_PULSE_LEN;
1890 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
1891 pulse_0_len = ROOMBA_0_PULSE_LEN;
1892 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
1893 has_stop_bit = ROOMBA_STOP_BIT;
1894 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
1895 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
1896 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1897 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1898 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1899 break;
1900 }
1901 #endif
1902 default:
1903 {
1904 irsnd_busy = FALSE;
1905 break;
1906 }
1907 }
1908 }
1909 }
1910
1911 if (irsnd_busy)
1912 {
1913 new_frame = FALSE;
1914
1915 switch (irsnd_protocol)
1916 {
1917 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1918 case IRMP_SIRCS_PROTOCOL:
1919 #endif
1920 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1921 case IRMP_NEC_PROTOCOL:
1922 #endif
1923 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1924 case IRMP_NEC16_PROTOCOL:
1925 #endif
1926 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1927 case IRMP_NEC42_PROTOCOL:
1928 #endif
1929 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1930 case IRMP_SAMSUNG_PROTOCOL:
1931 case IRMP_SAMSUNG32_PROTOCOL:
1932 #endif
1933 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1934 case IRMP_MATSUSHITA_PROTOCOL:
1935 #endif
1936 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1937 case IRMP_KASEIKYO_PROTOCOL:
1938 #endif
1939 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1940 case IRMP_RECS80_PROTOCOL:
1941 #endif
1942 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1943 case IRMP_RECS80EXT_PROTOCOL:
1944 #endif
1945 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1946 case IRMP_TELEFUNKEN_PROTOCOL:
1947 #endif
1948 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1949 case IRMP_DENON_PROTOCOL:
1950 #endif
1951 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1952 case IRMP_NUBERT_PROTOCOL:
1953 #endif
1954 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1955 case IRMP_SPEAKER_PROTOCOL:
1956 #endif
1957 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1958 case IRMP_BANG_OLUFSEN_PROTOCOL:
1959 #endif
1960 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1961 case IRMP_FDC_PROTOCOL:
1962 #endif
1963 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1964 case IRMP_RCCAR_PROTOCOL:
1965 #endif
1966 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1967 case IRMP_JVC_PROTOCOL:
1968 #endif
1969 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1970 case IRMP_NIKON_PROTOCOL:
1971 #endif
1972 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1973 case IRMP_LEGO_PROTOCOL:
1974 #endif
1975 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1976 case IRMP_THOMSON_PROTOCOL:
1977 #endif
1978 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1979 case IRMP_ROOMBA_PROTOCOL:
1980 #endif
1981
1982 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
1983 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
1984 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
1985 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
1986 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \
1987 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1988 {
1989 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1990 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
1991 {
1992 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
1993 {
1994 auto_repetition_pause_len--;
1995 }
1996
1997 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1998 {
1999 repeat_frame_pause_len--;
2000 }
2001 }
2002 #endif
2003
2004 if (pulse_counter == 0)
2005 {
2006 if (current_bit == 0xFF) // send start bit
2007 {
2008 pulse_len = startbit_pulse_len;
2009 pause_len = startbit_pause_len;
2010 }
2011 else if (current_bit < complete_data_len) // send n'th bit
2012 {
2013 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2014 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2015 {
2016 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2017 {
2018 pulse_len = SAMSUNG_PULSE_LEN;
2019 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
2020 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2021 }
2022 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2023 {
2024 pulse_len = SAMSUNG_PULSE_LEN;
2025 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2026 }
2027 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2028 {
2029 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2030
2031 pulse_len = SAMSUNG_PULSE_LEN;
2032 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
2033 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2034 }
2035 }
2036 else
2037 #endif
2038
2039 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2040 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2041 {
2042 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2043 {
2044 pulse_len = NEC_PULSE_LEN;
2045 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
2046 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2047 }
2048 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2049 {
2050 pulse_len = NEC_PULSE_LEN;
2051 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2052 }
2053 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2054 {
2055 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2056
2057 pulse_len = NEC_PULSE_LEN;
2058 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
2059 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2060 }
2061 }
2062 else
2063 #endif
2064
2065 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2066 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2067 {
2068 if (current_bit == 0) // send 2nd start bit
2069 {
2070 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2071 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2072 }
2073 else if (current_bit == 1) // send 3rd start bit
2074 {
2075 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2076 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2077 }
2078 else if (current_bit == 2) // send 4th start bit
2079 {
2080 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2081 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2082 }
2083 else if (current_bit == 19) // send trailer bit
2084 {
2085 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2086 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2087 }
2088 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2089 {
2090 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
2091 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2092
2093 if (cur_bit_value == last_bit_value)
2094 {
2095 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2096 }
2097 else
2098 {
2099 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2100 last_bit_value = cur_bit_value;
2101 }
2102 }
2103 }
2104 else
2105 #endif
2106 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
2107 {
2108 pulse_len = pulse_1_len;
2109 pause_len = pause_1_len;
2110 }
2111 else
2112 {
2113 pulse_len = pulse_0_len;
2114 pause_len = pause_0_len;
2115 }
2116 }
2117 else if (has_stop_bit) // send stop bit
2118 {
2119 pulse_len = pulse_0_len;
2120
2121 if (auto_repetition_counter < n_auto_repetitions)
2122 {
2123 pause_len = pause_0_len;
2124 }
2125 else
2126 {
2127 pause_len = 255; // last frame: pause of 255
2128 }
2129 }
2130 }
2131
2132 if (pulse_counter < pulse_len)
2133 {
2134 if (pulse_counter == 0)
2135 {
2136 irsnd_on ();
2137 }
2138 pulse_counter++;
2139 }
2140 else if (pause_counter < pause_len)
2141 {
2142 if (pause_counter == 0)
2143 {
2144 irsnd_off ();
2145 }
2146 pause_counter++;
2147 }
2148 else
2149 {
2150 current_bit++;
2151
2152 if (current_bit >= complete_data_len + has_stop_bit)
2153 {
2154 current_bit = 0xFF;
2155 auto_repetition_counter++;
2156
2157 if (auto_repetition_counter == n_auto_repetitions)
2158 {
2159 irsnd_busy = FALSE;
2160 auto_repetition_counter = 0;
2161 }
2162 new_frame = TRUE;
2163 }
2164
2165 pulse_counter = 0;
2166 pause_counter = 0;
2167 }
2168 break;
2169 }
2170 #endif
2171
2172 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2173 case IRMP_RC5_PROTOCOL:
2174 #endif
2175 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2176 case IRMP_RC6_PROTOCOL:
2177 #endif
2178 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2179 case IRMP_RC6A_PROTOCOL:
2180 #endif
2181 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2182 case IRMP_SIEMENS_PROTOCOL:
2183 #endif
2184 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2185 case IRMP_RUWIDO_PROTOCOL:
2186 #endif
2187 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2188 case IRMP_GRUNDIG_PROTOCOL:
2189 #endif
2190 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2191 case IRMP_IR60_PROTOCOL:
2192 #endif
2193 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2194 case IRMP_NOKIA_PROTOCOL:
2195 #endif
2196 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2197 case IRMP_A1TVBOX_PROTOCOL:
2198 #endif
2199
2200 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2201 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2202 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2203 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2204 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2205 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2206 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2207 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2208 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2209 {
2210 if (pulse_counter == pulse_len && pause_counter == pause_len)
2211 {
2212 current_bit++;
2213
2214 if (current_bit >= complete_data_len)
2215 {
2216 current_bit = 0xFF;
2217
2218 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2219 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2220 {
2221 auto_repetition_counter++;
2222
2223 if (repeat_counter > 0)
2224 { // set 117 msec pause time
2225 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2226 }
2227
2228 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2229 {
2230 n_auto_repetitions++; // increment number of auto repetitions
2231 repeat_counter++;
2232 }
2233 else if (auto_repetition_counter == n_auto_repetitions)
2234 {
2235 irsnd_busy = FALSE;
2236 auto_repetition_counter = 0;
2237 }
2238 }
2239 else
2240 #endif
2241 {
2242 irsnd_busy = FALSE;
2243 }
2244
2245 new_frame = TRUE;
2246 irsnd_off ();
2247 }
2248
2249 pulse_counter = 0;
2250 pause_counter = 0;
2251 }
2252
2253 if (! new_frame)
2254 {
2255 uint8_t first_pulse;
2256
2257 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2258 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2259 {
2260 if (current_bit == 0xFF || // start bit of start-frame
2261 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2262 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2263 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2264 {
2265 pulse_len = startbit_pulse_len;
2266 pause_len = startbit_pause_len;
2267 first_pulse = TRUE;
2268 }
2269 else // send n'th bit
2270 {
2271 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2272 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2273 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2274 }
2275 }
2276 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2277 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2278 #endif
2279 {
2280 if (current_bit == 0xFF) // 1 start bit
2281 {
2282 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2283 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2284 {
2285 pulse_len = startbit_pulse_len;
2286 pause_len = startbit_pause_len;
2287 }
2288 else
2289 #endif
2290 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2291 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2292 {
2293 current_bit = 0;
2294 }
2295 else
2296 #endif
2297 {
2298 ;
2299 }
2300
2301 first_pulse = TRUE;
2302 }
2303 else // send n'th bit
2304 {
2305 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2306 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2307 {
2308 pulse_len = RC6_BIT_LEN;
2309 pause_len = RC6_BIT_LEN;
2310
2311 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2312 {
2313 if (current_bit == 4) // toggle bit (double len)
2314 {
2315 pulse_len = 2 * RC6_BIT_LEN;
2316 pause_len = 2 * RC6_BIT_LEN;
2317 }
2318 }
2319 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2320 {
2321 if (current_bit == 4) // toggle bit (double len)
2322 {
2323 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2324 pause_len = 2 * RC6_BIT_LEN;
2325 }
2326 else if (current_bit == 5) // toggle bit (double len)
2327 {
2328 pause_len = 2 * RC6_BIT_LEN;
2329 }
2330 }
2331 }
2332 #endif
2333 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2334 }
2335
2336 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2337 {
2338 first_pulse = first_pulse ? FALSE : TRUE;
2339 }
2340 }
2341
2342 if (first_pulse)
2343 {
2344 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2345
2346 if (pulse_counter < pulse_len)
2347 {
2348 if (pulse_counter == 0)
2349 {
2350 irsnd_on ();
2351 }
2352 pulse_counter++;
2353 }
2354 else // if (pause_counter < pause_len)
2355 {
2356 if (pause_counter == 0)
2357 {
2358 irsnd_off ();
2359 }
2360 pause_counter++;
2361 }
2362 }
2363 else
2364 {
2365 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2366
2367 if (pause_counter < pause_len)
2368 {
2369 if (pause_counter == 0)
2370 {
2371 irsnd_off ();
2372 }
2373 pause_counter++;
2374 }
2375 else // if (pulse_counter < pulse_len)
2376 {
2377 if (pulse_counter == 0)
2378 {
2379 irsnd_on ();
2380 }
2381 pulse_counter++;
2382 }
2383 }
2384 }
2385 break;
2386 }
2387 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2388 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2389
2390 default:
2391 {
2392 irsnd_busy = FALSE;
2393 break;
2394 }
2395 }
2396 }
2397
2398 if (! irsnd_busy)
2399 {
2400 if (repeat_counter < n_repeat_frames)
2401 {
2402 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2403 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2404 {
2405 irsnd_buffer[2] |= 0x0F;
2406 }
2407 #endif
2408 repeat_counter++;
2409 irsnd_busy = TRUE;
2410 }
2411 else
2412 {
2413 irsnd_busy = TRUE; //Rainer
2414 send_trailer = TRUE;
2415 n_repeat_frames = 0;
2416 repeat_counter = 0;
2417 }
2418 }
2419 }
2420
2421 #ifdef ANALYZE
2422 if (irsnd_is_on)
2423 {
2424 putchar ('0');
2425 }
2426 else
2427 {
2428 putchar ('1');
2429 }
2430 #endif
2431
2432 return irsnd_busy;
2433 }
2434
2435 #ifdef ANALYZE
2436
2437 // main function - for unix/linux + windows only!
2438 // AVR: see main.c!
2439 // Compile it under linux with:
2440 // cc irsnd.c -o irsnd
2441 //
2442 // usage: ./irsnd protocol hex-address hex-command >filename
2443
2444 int
2445 main (int argc, char ** argv)
2446 {
2447 int protocol;
2448 int address;
2449 int command;
2450 IRMP_DATA irmp_data;
2451
2452 if (argc != 4 && argc != 5)
2453 {
2454 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2455 return 1;
2456 }
2457
2458 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2459 sscanf (argv[2], "%x", &address) == 1 &&
2460 sscanf (argv[3], "%x", &command) == 1)
2461 {
2462 irmp_data.protocol = protocol;
2463 irmp_data.address = address;
2464 irmp_data.command = command;
2465
2466 if (argc == 5)
2467 {
2468 irmp_data.flags = atoi (argv[4]);
2469 }
2470 else
2471 {
2472 irmp_data.flags = 0;
2473 }
2474
2475 irsnd_init ();
2476
2477 (void) irsnd_send_data (&irmp_data, TRUE);
2478
2479 while (irsnd_busy)
2480 {
2481 irsnd_ISR ();
2482 }
2483
2484 putchar ('\n');
2485
2486 #if 1 // enable here to send twice
2487 (void) irsnd_send_data (&irmp_data, TRUE);
2488
2489 while (irsnd_busy)
2490 {
2491 irsnd_ISR ();
2492 }
2493
2494 putchar ('\n');
2495 #endif
2496 }
2497 else
2498 {
2499 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2500 return 1;
2501 }
2502 return 0;
2503 }
2504
2505 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)