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[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny45, ATtiny85
9 * ATtiny84
10 * ATmega8, ATmega16, ATmega32
11 * ATmega162
12 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284
13 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
14 *
15 * $Id: irsnd.c,v 1.55 2012/05/24 06:55:11 fm Exp $
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *---------------------------------------------------------------------------------------------------------------------------------------------------
22 */
23
24 #include "irsnd.h"
25
26 /*---------------------------------------------------------------------------------------------------------------------------------------------------
27 * ATtiny pin definition of OC0A / OC0B
28 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
29 *---------------------------------------------------------------------------------------------------------------------------------------------------
30 */
31 #if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7
32 # if IRSND_OCx == IRSND_OC0A // OC0A
33 # define IRSND_PORT PORTB // port B
34 # define IRSND_DDR DDRB // ddr B
35 # define IRSND_BIT 2 // OC0A
36 # elif IRSND_OCx == IRSND_OC0B // OC0B
37 # define IRSND_PORT PORTA // port A
38 # define IRSND_DDR DDRA // ddr A
39 # define IRSND_BIT 7 // OC0B
40 # else
41 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
42 # endif // IRSND_OCx
43 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
44 # if IRSND_OCx == IRSND_OC0A // OC0A
45 # define IRSND_PORT PORTB // port B
46 # define IRSND_DDR DDRB // ddr B
47 # define IRSND_BIT 0 // OC0A
48 # elif IRSND_OCx == IRSND_OC0B // OC0B
49 # define IRSND_PORT PORTB // port B
50 # define IRSND_DDR DDRB // ddr B
51 # define IRSND_BIT 1 // OC0B
52 # else
53 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
54 # endif // IRSND_OCx
55 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
56 # if IRSND_OCx == IRSND_OC2 // OC0A
57 # define IRSND_PORT PORTB // port B
58 # define IRSND_DDR DDRB // ddr B
59 # define IRSND_BIT 3 // OC0A
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
64 # if IRSND_OCx == IRSND_OC2 // OC2
65 # define IRSND_PORT PORTD // port D
66 # define IRSND_DDR DDRD // ddr D
67 # define IRSND_BIT 7 // OC2
68 # else
69 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
70 # endif // IRSND_OCx
71 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
72 # if IRSND_OCx == IRSND_OC2 // OC2
73 # define IRSND_PORT PORTB // port B
74 # define IRSND_DDR DDRB // ddr B
75 # define IRSND_BIT 1 // OC2
76 # elif IRSND_OCx == IRSND_OC0 // OC0
77 # define IRSND_PORT PORTB // port B
78 # define IRSND_DDR DDRB // ddr B
79 # define IRSND_BIT 0 // OC0
80 # else
81 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
82 # endif // IRSND_OCx
83 #elif defined (__AVR_ATmega164__) \
84 || defined (__AVR_ATmega324__) \
85 || defined (__AVR_ATmega644__) \
86 || defined (__AVR_ATmega644P__) \
87 || defined (__AVR_ATmega1284__) \
88 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
89 # if IRSND_OCx == IRSND_OC2A // OC2A
90 # define IRSND_PORT PORTD // port D
91 # define IRSND_DDR DDRD // ddr D
92 # define IRSND_BIT 7 // OC2A
93 # elif IRSND_OCx == IRSND_OC2B // OC2B
94 # define IRSND_PORT PORTD // port D
95 # define IRSND_DDR DDRD // ddr D
96 # define IRSND_BIT 6 // OC2B
97 # elif IRSND_OCx == IRSND_OC0A // OC0A
98 # define IRSND_PORT PORTB // port B
99 # define IRSND_DDR DDRB // ddr B
100 # define IRSND_BIT 3 // OC0A
101 # elif IRSND_OCx == IRSND_OC0B // OC0B
102 # define IRSND_PORT PORTB // port B
103 # define IRSND_DDR DDRB // ddr B
104 # define IRSND_BIT 4 // OC0B
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT PORTB // port B
116 # define IRSND_DDR DDRB // ddr B
117 # define IRSND_BIT 3 // OC2A
118 # elif IRSND_OCx == IRSND_OC2B // OC2B
119 # define IRSND_PORT PORTD // port D
120 # define IRSND_DDR DDRD // ddr D
121 # define IRSND_BIT 3 // OC2B
122 # elif IRSND_OCx == IRSND_OC0A // OC0A
123 # define IRSND_PORT PORTB // port B
124 # define IRSND_DDR DDRB // ddr B
125 # define IRSND_BIT 6 // OC0A
126 # elif IRSND_OCx == IRSND_OC0B // OC0B
127 # define IRSND_PORT PORTD // port D
128 # define IRSND_DDR DDRD // ddr D
129 # define IRSND_BIT 5 // OC0B
130 # else
131 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
132 # endif // IRSND_OCx
133 #elif defined (__AVR_ATmega8515__)
134 # if IRSND_OCx == IRSND_OC0
135 # define IRSND_PORT PORTB // port B
136 # define IRSND_DDR DDRB // ddr B
137 # define IRSND_BIT 0 // OC0
138 # elif IRSND_OCx == IRSND_OC1A
139 # define IRSND_PORT PORTD // port D
140 # define IRSND_DDR DDRD // ddr D
141 # define IRSND_BIT 5 // OC1A
142 # elif IRSND_OCx == IRSND_OC1B
143 # define IRSND_PORT PORTE // port E
144 # define IRSND_DDR DDRE // ddr E
145 # define IRSND_BIT 2 // OC1E
146 # else
147 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
148 # endif // IRSND_OCx
149 #elif defined (PIC_C18) //Microchip C18 compiler
150 //Nothing here to do here -> See irsndconfig.h
151 #elif defined (ARM_STM32) //STM32
152 //Nothing here to do here -> See irsndconfig.h
153 #else
154 # if !defined (unix) && !defined (WIN32)
155 # error mikrocontroller not defined, please fill in definitions here.
156 # endif // unix, WIN32
157 #endif // __AVR...
158
159 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
160 typedef uint16_t IRSND_PAUSE_LEN;
161 #else
162 typedef uint8_t IRSND_PAUSE_LEN;
163 #endif
164
165 /*---------------------------------------------------------------------------------------------------------------------------------------------------
166 * IR timings
167 *---------------------------------------------------------------------------------------------------------------------------------------------------
168 */
169 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
170 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
171 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
172 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
173 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
174 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
175 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
176
177 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
178 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
179 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
181 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
182 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
183 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
184
185 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
186 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
187 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
188 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
189 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
190 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
191
192 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
193 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
194
195 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
196 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
197 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
198 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
199 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
200 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
201
202 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
203 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
204 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
205 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
206 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
207 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
208 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
209
210 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
211 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
212 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
213 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
214 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
215 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
216
217 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
218 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
219 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
220
221 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
222 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
223 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
224 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
225 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
226
227 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
228 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
229 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
230 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
231 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
232
233 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
234 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
235 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
236 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
237 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
238
239 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
240 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
241 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
242 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
243 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
244 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
245
246 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
247 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
248 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
249 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
250 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
251 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
252 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
253 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
254
255 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
256 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
257 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
258 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
259 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
260 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
261 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
262 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
263 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
264 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
265 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
266 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
267
268 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
269 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
270 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
271 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
272 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
273
274 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
275
276 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
277 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
278 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
279
280
281 #ifdef PIC_C18 // PIC C18
282 # define IRSND_FREQ_TYPE uint8_t
283 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
284 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
285 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
286 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
287 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
288 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
289 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
290 #elif defined (ARM_STM32) // STM32
291 # define IRSND_FREQ_TYPE uint32_t
292 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
293 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
294 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
295 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
296 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
297 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
298 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
299 #else // AVR
300 # define IRSND_FREQ_TYPE uint8_t
301 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2) - 1)
302 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2) - 1)
303 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2) - 1)
304 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2) - 1)
305 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2) - 1)
306 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2) - 1)
307 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2) - 1)
308 #endif
309
310 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
311 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
312 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
313 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
314 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
315 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
316
317 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
318 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
319 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
320 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
321 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
322 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
323
324 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
325 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
326 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
327 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
328 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
329 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
330 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
331
332 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
333 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
334 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
335 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
336 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
337 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
338 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
339
340 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
341 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
342 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
343 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
344 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
345 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
346 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
347
348 static volatile uint8_t irsnd_busy = 0;
349 static volatile uint8_t irsnd_protocol = 0;
350 static volatile uint8_t irsnd_buffer[6] = {0};
351 static volatile uint8_t irsnd_repeat = 0;
352 static volatile uint8_t irsnd_is_on = FALSE;
353
354 #if IRSND_USE_CALLBACK == 1
355 static void (*irsnd_callback_ptr) (uint8_t);
356 #endif // IRSND_USE_CALLBACK == 1
357
358 /*---------------------------------------------------------------------------------------------------------------------------------------------------
359 * Switch PWM on
360 * @details Switches PWM on with a narrow spike on all 3 channels -> leds glowing
361 *---------------------------------------------------------------------------------------------------------------------------------------------------
362 */
363 static void
364 irsnd_on (void)
365 {
366 if (! irsnd_is_on)
367 {
368 #ifndef DEBUG
369 # if defined(PIC_C18) // PIC C18
370 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
371 # elif defined (ARM_STM32) // STM32
372 IRSND_TIMER->CCER |= (uint16_t)TIM_CCER_CC1E;
373 TIM_Cmd(IRSND_TIMER, ENABLE); // TIMx enable counter
374 # else // AVR
375 # if IRSND_OCx == IRSND_OC2 // use OC2
376 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
377 # elif IRSND_OCx == IRSND_OC2A // use OC2A
378 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
379 # elif IRSND_OCx == IRSND_OC2B // use OC2B
380 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
381 # elif IRSND_OCx == IRSND_OC0 // use OC0
382 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
383 # elif IRSND_OCx == IRSND_OC0A // use OC0A
384 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
385 # elif IRSND_OCx == IRSND_OC0B // use OC0B
386 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
387 # else
388 # error wrong value of IRSND_OCx
389 # endif // IRSND_OCx
390 # endif // C18
391 #endif // DEBUG
392
393 #if IRSND_USE_CALLBACK == 1
394 if (irsnd_callback_ptr)
395 {
396 (*irsnd_callback_ptr) (TRUE);
397 }
398 #endif // IRSND_USE_CALLBACK == 1
399
400 irsnd_is_on = TRUE;
401 }
402 }
403
404 /*---------------------------------------------------------------------------------------------------------------------------------------------------
405 * Switch PWM off
406 * @details Switches PWM off
407 *---------------------------------------------------------------------------------------------------------------------------------------------------
408 */
409 static void
410 irsnd_off (void)
411 {
412 if (irsnd_is_on)
413 {
414 #ifndef DEBUG
415
416 # if defined(PIC_C18) // PIC C18
417 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
418 # elif defined (ARM_STM32) // STM32
419 IRSND_TIMER->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E);
420 TIM_Cmd(IRSND_TIMER, DISABLE); // TIMx enable counter
421 # else //AVR
422
423 # if IRSND_OCx == IRSND_OC2 // use OC2
424 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
425 # elif IRSND_OCx == IRSND_OC2A // use OC2A
426 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
427 # elif IRSND_OCx == IRSND_OC2B // use OC2B
428 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
429 # elif IRSND_OCx == IRSND_OC0 // use OC0
430 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
431 # elif IRSND_OCx == IRSND_OC0A // use OC0A
432 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
433 # elif IRSND_OCx == IRSND_OC0B // use OC0B
434 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
435 # else
436 # error wrong value of IRSND_OCx
437 # endif // IRSND_OCx
438 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
439 # endif //C18
440 #endif // DEBUG
441
442 #if IRSND_USE_CALLBACK == 1
443 if (irsnd_callback_ptr)
444 {
445 (*irsnd_callback_ptr) (FALSE);
446 }
447 #endif // IRSND_USE_CALLBACK == 1
448
449 irsnd_is_on = FALSE;
450 }
451 }
452
453 /*---------------------------------------------------------------------------------------------------------------------------------------------------
454 * Set PWM frequency
455 * @details sets pwm frequency
456 *---------------------------------------------------------------------------------------------------------------------------------------------------
457 */
458 static void
459 irsnd_set_freq (IRSND_FREQ_TYPE freq)
460 {
461 #ifndef DEBUG
462 # if defined(PIC_C18) // PIC C18
463 OpenPWM(freq);
464 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%
465 # elif defined (ARM_STM32) // STM32
466 static uint32_t TimeBaseFreq = 0;
467
468 if (TimeBaseFreq == 0)
469 {
470 RCC_ClocksTypeDef RCC_ClocksStructure;
471 /* Get system clocks and store timer clock in variable */
472 RCC_GetClocksFreq(&RCC_ClocksStructure);
473 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
474 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
475 {
476 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
477 }
478 else
479 {
480 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
481 }
482 # else
483 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
484 {
485 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
486 }
487 else
488 {
489 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
490 }
491 # endif
492 }
493
494 freq = TimeBaseFreq/freq;
495
496 /* Set frequency */
497 TIM_SetAutoreload(IRSND_TIMER, freq);
498 /* Set duty cycle */
499 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
500 # else // AVR
501
502 # if IRSND_OCx == IRSND_OC2
503 OCR2 = freq; // use register OCR2 for OC2
504 # elif IRSND_OCx == IRSND_OC2A // use OC2A
505 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
506 # elif IRSND_OCx == IRSND_OC2B // use OC2B
507 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
508 # elif IRSND_OCx == IRSND_OC0 // use OC0
509 OCR0 = freq; // use register OCR2 for OC2
510 # elif IRSND_OCx == IRSND_OC0A // use OC0A
511 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
512 # elif IRSND_OCx == IRSND_OC0B // use OC0B
513 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
514 # else
515 # error wrong value of IRSND_OCx
516 # endif
517 # endif //PIC_C18
518 #endif // DEBUG
519 }
520
521 /*---------------------------------------------------------------------------------------------------------------------------------------------------
522 * Initialize the PWM
523 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
524 *---------------------------------------------------------------------------------------------------------------------------------------------------
525 */
526 void
527 irsnd_init (void)
528 {
529 #ifndef DEBUG
530 # if defined(PIC_C18) // PIC C18
531 OpenTimer;
532 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency
533 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)
534 # elif defined (ARM_STM32) // STM32
535 GPIO_InitTypeDef GPIO_InitStructure;
536 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
537 TIM_OCInitTypeDef TIM_OCInitStructure;
538
539 /* GPIOx clock enable */
540 # if defined (ARM_STM32L1XX)
541 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
542 # elif defined (ARM_STM32F10X)
543 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
544 # elif defined (ARM_STM32F4XX)
545 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
546 # endif
547
548 /* GPIO Configuration */
549 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
550 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
551 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
552 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
553 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
554 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
555 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
556 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
557 # elif defined (ARM_STM32F10X)
558 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
559 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
560 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
561 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
562 # endif
563
564 /* TIMx clock enable */
565 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
566 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
567 # else
568 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
569 # endif
570
571 /* Time base configuration */
572 TIM_TimeBaseStructure.TIM_Period = 0; // will be initialized later
573 TIM_TimeBaseStructure.TIM_Prescaler = 0;
574 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
575 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
576 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
577
578 /* PWM1 Mode configuration */
579 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
580 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
581 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
582 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
583 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
584
585 /* Preload configuration */
586 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
587 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
588
589 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
590 # else // AVR
591 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
592 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
593
594 # if IRSND_OCx == IRSND_OC2 // use OC2
595 TCCR2 = (1<<WGM21); // CTC mode
596 TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling
597 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
598 TCCR2A = (1<<WGM21); // CTC mode
599 TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling
600 # elif IRSND_OCx == IRSND_OC0 // use OC0
601 TCCR0 = (1<<WGM01); // CTC mode
602 TCCR0 |= (1<<CS00); // 0x01, start Timer 0, no prescaling
603 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
604 TCCR0A = (1<<WGM01); // CTC mode
605 TCCR0B |= (1<<CS00); // 0x01, start Timer 0, no prescaling
606 # else
607 # error wrong value of IRSND_OCx
608 # endif
609 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
610 # endif //PIC_C18
611 #endif // DEBUG
612 }
613
614 #if IRSND_USE_CALLBACK == 1
615 void
616 irsnd_set_callback_ptr (void (*cb)(uint8_t))
617 {
618 irsnd_callback_ptr = cb;
619 }
620 #endif // IRSND_USE_CALLBACK == 1
621
622 uint8_t
623 irsnd_is_busy (void)
624 {
625 return irsnd_busy;
626 }
627
628 static uint16_t
629 bitsrevervse (uint16_t x, uint8_t len)
630 {
631 uint16_t xx = 0;
632
633 while(len)
634 {
635 xx <<= 1;
636 if (x & 1)
637 {
638 xx |= 1;
639 }
640 x >>= 1;
641 len--;
642 }
643 return xx;
644 }
645
646
647 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
648 static uint8_t sircs_additional_bitlen;
649 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
650
651 uint8_t
652 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
653 {
654 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
655 static uint8_t toggle_bit_recs80;
656 #endif
657 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
658 static uint8_t toggle_bit_recs80ext;
659 #endif
660 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
661 static uint8_t toggle_bit_rc5;
662 #endif
663 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
664 static uint8_t toggle_bit_rc6;
665 #endif
666 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
667 static uint8_t toggle_bit_thomson;
668 #endif
669 uint16_t address;
670 uint16_t command;
671
672 if (do_wait)
673 {
674 while (irsnd_busy)
675 {
676 // do nothing;
677 }
678 }
679 else if (irsnd_busy)
680 {
681 return (FALSE);
682 }
683
684 irsnd_protocol = irmp_data_p->protocol;
685 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
686
687 switch (irsnd_protocol)
688 {
689 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
690 case IRMP_SIRCS_PROTOCOL:
691 {
692 // uint8_t sircs_additional_command_len;
693 uint8_t sircs_additional_address_len;
694
695 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
696
697 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
698 {
699 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
700 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
701 }
702 else
703 {
704 // sircs_additional_command_len = sircs_additional_bitlen;
705 sircs_additional_address_len = 0;
706 }
707
708 command = bitsrevervse (irmp_data_p->command, 15);
709
710 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
711 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
712
713 if (sircs_additional_address_len > 0)
714 {
715 address = bitsrevervse (irmp_data_p->address, 5);
716 irsnd_buffer[1] |= (address & 0x0010) >> 4;
717 irsnd_buffer[2] = (address & 0x000F) << 4;
718 }
719 irsnd_busy = TRUE;
720 break;
721 }
722 #endif
723 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
724 case IRMP_APPLE_PROTOCOL:
725 {
726 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
727 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
728
729 address = bitsrevervse (address, NEC_ADDRESS_LEN);
730 command = bitsrevervse (command, NEC_COMMAND_LEN);
731
732 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
733
734 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
735 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
736 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
737 irsnd_buffer[3] = 0x8B; // 10001011 (id)
738 irsnd_busy = TRUE;
739 break;
740 }
741 case IRMP_NEC_PROTOCOL:
742 {
743 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
744 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
745
746 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
747 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
748 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
749 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
750 irsnd_busy = TRUE;
751 break;
752 }
753 #endif
754 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
755 case IRMP_NEC16_PROTOCOL:
756 {
757 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
758 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
759
760 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
761 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
762 irsnd_busy = TRUE;
763 break;
764 }
765 #endif
766 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
767 case IRMP_NEC42_PROTOCOL:
768 {
769 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
770 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
771
772 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
773 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
774 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
775 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
776 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
777 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
778 irsnd_busy = TRUE;
779 break;
780 }
781 #endif
782 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
783 case IRMP_SAMSUNG_PROTOCOL:
784 {
785 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
786 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
787
788 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
789 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
790 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
791 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
792 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
793 irsnd_busy = TRUE;
794 break;
795 }
796 case IRMP_SAMSUNG32_PROTOCOL:
797 {
798 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
799 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
800
801 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
802 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
803 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
804 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
805 irsnd_busy = TRUE;
806 break;
807 }
808 #endif
809 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
810 case IRMP_MATSUSHITA_PROTOCOL:
811 {
812 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
813 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
814
815 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
816 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
817 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
818 irsnd_busy = TRUE;
819 break;
820 }
821 #endif
822 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
823 case IRMP_KASEIKYO_PROTOCOL:
824 {
825 uint8_t xor;
826 uint16_t genre2;
827
828 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
829 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
830 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
831
832 xor = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
833
834 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
835 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
836 irsnd_buffer[2] = xor << 4 | (command & 0x000F); // XXXXCCCC
837 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
838 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
839
840 xor = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
841
842 irsnd_buffer[5] = xor;
843 irsnd_busy = TRUE;
844 break;
845 }
846 #endif
847 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
848 case IRMP_RECS80_PROTOCOL:
849 {
850 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
851
852 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
853 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
854 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
855 irsnd_busy = TRUE;
856 break;
857 }
858 #endif
859 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
860 case IRMP_RECS80EXT_PROTOCOL:
861 {
862 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
863
864 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
865 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
866 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
867 irsnd_busy = TRUE;
868 break;
869 }
870 #endif
871 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
872 case IRMP_RC5_PROTOCOL:
873 {
874 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
875
876 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
877 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
878 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
879 irsnd_busy = TRUE;
880 break;
881 }
882 #endif
883 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
884 case IRMP_RC6_PROTOCOL:
885 {
886 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
887
888 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
889 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
890 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
891 irsnd_busy = TRUE;
892 break;
893 }
894 #endif
895 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
896 case IRMP_RC6A_PROTOCOL:
897 {
898 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
899
900 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
901 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
902 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
903 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
904 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
905 irsnd_busy = TRUE;
906 break;
907 }
908 #endif
909 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
910 case IRMP_DENON_PROTOCOL:
911 {
912 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
913 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
914 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
915 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
916 irsnd_busy = TRUE;
917 break;
918 }
919 #endif
920 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
921 case IRMP_THOMSON_PROTOCOL:
922 {
923 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
924
925 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
926 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
927 irsnd_busy = TRUE;
928 break;
929 }
930 #endif
931 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
932 case IRMP_NUBERT_PROTOCOL:
933 {
934 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
935 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
936 irsnd_busy = TRUE;
937 break;
938 }
939 #endif
940 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
941 case IRMP_BANG_OLUFSEN_PROTOCOL:
942 {
943 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
944 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
945 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
946 irsnd_busy = TRUE;
947 break;
948 }
949 #endif
950 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
951 case IRMP_GRUNDIG_PROTOCOL:
952 {
953 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);
954
955 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
956 irsnd_buffer[1] = 0xC0; // 11
957 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
958 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
959
960 irsnd_busy = TRUE;
961 break;
962 }
963 #endif
964 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
965 case IRMP_IR60_PROTOCOL:
966 {
967 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
968 #if 0
969 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
970 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
971 #else
972 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
973 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
974 #endif
975
976 irsnd_busy = TRUE;
977 break;
978 }
979 #endif
980 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
981 case IRMP_NOKIA_PROTOCOL:
982 {
983 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
984 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
985
986 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
987 irsnd_buffer[1] = 0xFF; // 11111111
988 irsnd_buffer[2] = 0x80; // 1
989 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
990 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
991 irsnd_buffer[5] = (address << 7); // A
992
993 irsnd_busy = TRUE;
994 break;
995 }
996 #endif
997 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
998 case IRMP_SIEMENS_PROTOCOL:
999 {
1000 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA
1001 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC
1002 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1003
1004 irsnd_busy = TRUE;
1005 break;
1006 }
1007 #endif
1008 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1009 case IRMP_FDC_PROTOCOL:
1010 {
1011 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1012 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1013
1014 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1015 irsnd_buffer[1] = 0; // 00000000
1016 irsnd_buffer[2] = 0; // 0000RRRR
1017 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1018 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1019 irsnd_busy = TRUE;
1020 break;
1021 }
1022 #endif
1023 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1024 case IRMP_RCCAR_PROTOCOL:
1025 {
1026 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1027 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1028
1029 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1030 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1031
1032 irsnd_busy = TRUE;
1033 break;
1034 }
1035 #endif
1036 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1037 case IRMP_JVC_PROTOCOL:
1038 {
1039 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1040 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1041
1042 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1043 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1044
1045 irsnd_busy = TRUE;
1046 break;
1047 }
1048 #endif
1049 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1050 case IRMP_NIKON_PROTOCOL:
1051 {
1052 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1053 irsnd_busy = TRUE;
1054 break;
1055 }
1056 #endif
1057 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1058 case IRMP_LEGO_PROTOCOL:
1059 {
1060 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1061
1062 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1063 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1064
1065 irsnd_protocol = IRMP_LEGO_PROTOCOL;
1066 irsnd_busy = TRUE;
1067 break;
1068 }
1069 #endif
1070 default:
1071 {
1072 break;
1073 }
1074 }
1075
1076 return irsnd_busy;
1077 }
1078
1079 void
1080 irsnd_stop (void)
1081 {
1082 irsnd_repeat = 0;
1083 }
1084
1085 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1086 * ISR routine
1087 * @details ISR routine, called 10000 times per second
1088 *---------------------------------------------------------------------------------------------------------------------------------------------------
1089 */
1090 uint8_t
1091 irsnd_ISR (void)
1092 {
1093 static uint8_t send_trailer = FALSE;
1094 static uint8_t current_bit = 0xFF;
1095 static uint8_t pulse_counter = 0;
1096 static IRSND_PAUSE_LEN pause_counter = 0;
1097 static uint8_t startbit_pulse_len = 0;
1098 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1099 static uint8_t pulse_1_len = 0;
1100 static uint8_t pause_1_len = 0;
1101 static uint8_t pulse_0_len = 0;
1102 static uint8_t pause_0_len = 0;
1103 static uint8_t has_stop_bit = 0;
1104 static uint8_t new_frame = TRUE;
1105 static uint8_t complete_data_len = 0;
1106 static uint8_t n_repeat_frames = 0; // number of repetition frames
1107 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1108 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1109 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1110 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1111 static uint8_t repeat_counter = 0; // repeat counter
1112 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1113 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1114 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1115 static uint8_t last_bit_value;
1116 #endif
1117 static uint8_t pulse_len = 0xFF;
1118 static IRSND_PAUSE_LEN pause_len = 0xFF;
1119
1120 if (irsnd_busy)
1121 {
1122 if (current_bit == 0xFF && new_frame) // start of transmission...
1123 {
1124 if (auto_repetition_counter > 0)
1125 {
1126 auto_repetition_pause_counter++;
1127
1128 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1129 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1130 {
1131 repeat_frame_pause_len--;
1132 }
1133 #endif
1134
1135 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1136 {
1137 auto_repetition_pause_counter = 0;
1138
1139 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1140 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1141 {
1142 current_bit = 16;
1143 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1144 }
1145 else
1146 #endif
1147 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1148 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1149 {
1150 current_bit = 15;
1151 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1152 }
1153 else
1154 #endif
1155 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1156 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1157 {
1158 current_bit = 7;
1159 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1160 }
1161 else
1162 #endif
1163 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1164 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1165 {
1166 if (auto_repetition_counter + 1 < n_auto_repetitions)
1167 {
1168 current_bit = 23;
1169 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1170 }
1171 else // nokia stop frame
1172 {
1173 current_bit = 0xFF;
1174 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1175 }
1176 }
1177 else
1178 #endif
1179 {
1180 ;
1181 }
1182 }
1183 else
1184 {
1185 #ifdef DEBUG
1186 if (irsnd_is_on)
1187 {
1188 putchar ('0');
1189 }
1190 else
1191 {
1192 putchar ('1');
1193 }
1194 #endif
1195 return irsnd_busy;
1196 }
1197 }
1198 #if 0
1199 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)
1200 #else
1201 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1202 #endif
1203 {
1204 packet_repeat_pause_counter++;
1205
1206 #ifdef DEBUG
1207 if (irsnd_is_on)
1208 {
1209 putchar ('0');
1210 }
1211 else
1212 {
1213 putchar ('1');
1214 }
1215 #endif
1216 return irsnd_busy;
1217 }
1218 else
1219 {
1220 if (send_trailer)
1221 {
1222 irsnd_busy = FALSE;
1223 send_trailer = FALSE;
1224 return irsnd_busy;
1225 }
1226
1227 n_repeat_frames = irsnd_repeat;
1228
1229 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1230 {
1231 n_repeat_frames = 255;
1232 }
1233
1234 packet_repeat_pause_counter = 0;
1235 pulse_counter = 0;
1236 pause_counter = 0;
1237
1238 switch (irsnd_protocol)
1239 {
1240 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1241 case IRMP_SIRCS_PROTOCOL:
1242 {
1243 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1244 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1245 pulse_1_len = SIRCS_1_PULSE_LEN;
1246 pause_1_len = SIRCS_PAUSE_LEN - 1;
1247 pulse_0_len = SIRCS_0_PULSE_LEN;
1248 pause_0_len = SIRCS_PAUSE_LEN - 1;
1249 has_stop_bit = SIRCS_STOP_BIT;
1250 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1251 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1252 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1253 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1254 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1255 break;
1256 }
1257 #endif
1258 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1259 case IRMP_NEC_PROTOCOL:
1260 {
1261 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1262
1263 if (repeat_counter > 0)
1264 {
1265 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1266 complete_data_len = 0;
1267 }
1268 else
1269 {
1270 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1271 complete_data_len = NEC_COMPLETE_DATA_LEN;
1272 }
1273
1274 pulse_1_len = NEC_PULSE_LEN;
1275 pause_1_len = NEC_1_PAUSE_LEN - 1;
1276 pulse_0_len = NEC_PULSE_LEN;
1277 pause_0_len = NEC_0_PAUSE_LEN - 1;
1278 has_stop_bit = NEC_STOP_BIT;
1279 n_auto_repetitions = 1; // 1 frame
1280 auto_repetition_pause_len = 0;
1281 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1282 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1283 break;
1284 }
1285 #endif
1286 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1287 case IRMP_NEC16_PROTOCOL:
1288 {
1289 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1290 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1291 pulse_1_len = NEC_PULSE_LEN;
1292 pause_1_len = NEC_1_PAUSE_LEN - 1;
1293 pulse_0_len = NEC_PULSE_LEN;
1294 pause_0_len = NEC_0_PAUSE_LEN - 1;
1295 has_stop_bit = NEC_STOP_BIT;
1296 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1297 n_auto_repetitions = 1; // 1 frame
1298 auto_repetition_pause_len = 0;
1299 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1300 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1301 break;
1302 }
1303 #endif
1304 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1305 case IRMP_NEC42_PROTOCOL:
1306 {
1307 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1308 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1309 pulse_1_len = NEC_PULSE_LEN;
1310 pause_1_len = NEC_1_PAUSE_LEN - 1;
1311 pulse_0_len = NEC_PULSE_LEN;
1312 pause_0_len = NEC_0_PAUSE_LEN - 1;
1313 has_stop_bit = NEC_STOP_BIT;
1314 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1315 n_auto_repetitions = 1; // 1 frame
1316 auto_repetition_pause_len = 0;
1317 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1318 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1319 break;
1320 }
1321 #endif
1322 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1323 case IRMP_SAMSUNG_PROTOCOL:
1324 {
1325 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1326 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1327 pulse_1_len = SAMSUNG_PULSE_LEN;
1328 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1329 pulse_0_len = SAMSUNG_PULSE_LEN;
1330 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1331 has_stop_bit = SAMSUNG_STOP_BIT;
1332 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1333 n_auto_repetitions = 1; // 1 frame
1334 auto_repetition_pause_len = 0;
1335 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1336 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1337 break;
1338 }
1339
1340 case IRMP_SAMSUNG32_PROTOCOL:
1341 {
1342 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1343 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1344 pulse_1_len = SAMSUNG_PULSE_LEN;
1345 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1346 pulse_0_len = SAMSUNG_PULSE_LEN;
1347 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1348 has_stop_bit = SAMSUNG_STOP_BIT;
1349 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1350 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames
1351 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1352 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1353 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1354 break;
1355 }
1356 #endif
1357 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1358 case IRMP_MATSUSHITA_PROTOCOL:
1359 {
1360 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1361 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1362 pulse_1_len = MATSUSHITA_PULSE_LEN;
1363 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1364 pulse_0_len = MATSUSHITA_PULSE_LEN;
1365 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1366 has_stop_bit = MATSUSHITA_STOP_BIT;
1367 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1368 n_auto_repetitions = 1; // 1 frame
1369 auto_repetition_pause_len = 0;
1370 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1371 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1372 break;
1373 }
1374 #endif
1375 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1376 case IRMP_KASEIKYO_PROTOCOL:
1377 {
1378 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1379 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1380 pulse_1_len = KASEIKYO_PULSE_LEN;
1381 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1382 pulse_0_len = KASEIKYO_PULSE_LEN;
1383 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1384 has_stop_bit = KASEIKYO_STOP_BIT;
1385 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1386 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1387 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1388 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1389 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1390 break;
1391 }
1392 #endif
1393 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1394 case IRMP_RECS80_PROTOCOL:
1395 {
1396 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1397 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1398 pulse_1_len = RECS80_PULSE_LEN;
1399 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1400 pulse_0_len = RECS80_PULSE_LEN;
1401 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1402 has_stop_bit = RECS80_STOP_BIT;
1403 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1404 n_auto_repetitions = 1; // 1 frame
1405 auto_repetition_pause_len = 0;
1406 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1407 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1408 break;
1409 }
1410 #endif
1411 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1412 case IRMP_RECS80EXT_PROTOCOL:
1413 {
1414 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1415 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1416 pulse_1_len = RECS80EXT_PULSE_LEN;
1417 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1418 pulse_0_len = RECS80EXT_PULSE_LEN;
1419 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1420 has_stop_bit = RECS80EXT_STOP_BIT;
1421 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1422 n_auto_repetitions = 1; // 1 frame
1423 auto_repetition_pause_len = 0;
1424 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1425 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1426 break;
1427 }
1428 #endif
1429 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1430 case IRMP_RC5_PROTOCOL:
1431 {
1432 startbit_pulse_len = RC5_BIT_LEN;
1433 startbit_pause_len = RC5_BIT_LEN;
1434 pulse_len = RC5_BIT_LEN;
1435 pause_len = RC5_BIT_LEN;
1436 has_stop_bit = RC5_STOP_BIT;
1437 complete_data_len = RC5_COMPLETE_DATA_LEN;
1438 n_auto_repetitions = 1; // 1 frame
1439 auto_repetition_pause_len = 0;
1440 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1441 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1442 break;
1443 }
1444 #endif
1445 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1446 case IRMP_RC6_PROTOCOL:
1447 {
1448 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1449 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1450 pulse_len = RC6_BIT_LEN;
1451 pause_len = RC6_BIT_LEN;
1452 has_stop_bit = RC6_STOP_BIT;
1453 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1454 n_auto_repetitions = 1; // 1 frame
1455 auto_repetition_pause_len = 0;
1456 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1457 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1458 break;
1459 }
1460 #endif
1461 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1462 case IRMP_RC6A_PROTOCOL:
1463 {
1464 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1465 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1466 pulse_len = RC6_BIT_LEN;
1467 pause_len = RC6_BIT_LEN;
1468 has_stop_bit = RC6_STOP_BIT;
1469 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1470 n_auto_repetitions = 1; // 1 frame
1471 auto_repetition_pause_len = 0;
1472 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1473 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1474 break;
1475 }
1476 #endif
1477 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1478 case IRMP_DENON_PROTOCOL:
1479 {
1480 startbit_pulse_len = 0x00;
1481 startbit_pause_len = 0x00;
1482 pulse_1_len = DENON_PULSE_LEN;
1483 pause_1_len = DENON_1_PAUSE_LEN - 1;
1484 pulse_0_len = DENON_PULSE_LEN;
1485 pause_0_len = DENON_0_PAUSE_LEN - 1;
1486 has_stop_bit = DENON_STOP_BIT;
1487 complete_data_len = DENON_COMPLETE_DATA_LEN;
1488 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1489 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1490 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1491 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1492 break;
1493 }
1494 #endif
1495 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1496 case IRMP_THOMSON_PROTOCOL:
1497 {
1498 startbit_pulse_len = 0x00;
1499 startbit_pause_len = 0x00;
1500 pulse_1_len = THOMSON_PULSE_LEN;
1501 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1502 pulse_0_len = THOMSON_PULSE_LEN;
1503 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1504 has_stop_bit = THOMSON_STOP_BIT;
1505 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1506 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1507 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1508 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1509 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1510 break;
1511 }
1512 #endif
1513 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1514 case IRMP_NUBERT_PROTOCOL:
1515 {
1516 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1517 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1518 pulse_1_len = NUBERT_1_PULSE_LEN;
1519 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1520 pulse_0_len = NUBERT_0_PULSE_LEN;
1521 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1522 has_stop_bit = NUBERT_STOP_BIT;
1523 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1524 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1525 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1526 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1527 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1528 break;
1529 }
1530 #endif
1531 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1532 case IRMP_BANG_OLUFSEN_PROTOCOL:
1533 {
1534 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1535 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1536 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1537 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1538 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1539 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1540 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1541 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1542 n_auto_repetitions = 1; // 1 frame
1543 auto_repetition_pause_len = 0;
1544 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1545 last_bit_value = 0;
1546 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1547 break;
1548 }
1549 #endif
1550 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1551 case IRMP_GRUNDIG_PROTOCOL:
1552 {
1553 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1554 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1555 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1556 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1557 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1558 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1559 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1560 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1561 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1562 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1563 break;
1564 }
1565 #endif
1566 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1567 case IRMP_IR60_PROTOCOL:
1568 {
1569 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1570 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1571 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1572 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1573 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1574 complete_data_len = IR60_COMPLETE_DATA_LEN;
1575 n_auto_repetitions = IR60_FRAMES; // 2 frames
1576 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1577 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1578 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1579 break;
1580 }
1581 #endif
1582 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1583 case IRMP_NOKIA_PROTOCOL:
1584 {
1585 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1586 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1587 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1588 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1589 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1590 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1591 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1592 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1593 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1594 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1595 break;
1596 }
1597 #endif
1598 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1599 case IRMP_SIEMENS_PROTOCOL:
1600 {
1601 startbit_pulse_len = SIEMENS_BIT_LEN;
1602 startbit_pause_len = SIEMENS_BIT_LEN;
1603 pulse_len = SIEMENS_BIT_LEN;
1604 pause_len = SIEMENS_BIT_LEN;
1605 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1606 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;
1607 n_auto_repetitions = 1; // 1 frame
1608 auto_repetition_pause_len = 0;
1609 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1610 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1611 break;
1612 }
1613 #endif
1614 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1615 case IRMP_FDC_PROTOCOL:
1616 {
1617 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1618 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1619 complete_data_len = FDC_COMPLETE_DATA_LEN;
1620 pulse_1_len = FDC_PULSE_LEN;
1621 pause_1_len = FDC_1_PAUSE_LEN - 1;
1622 pulse_0_len = FDC_PULSE_LEN;
1623 pause_0_len = FDC_0_PAUSE_LEN - 1;
1624 has_stop_bit = FDC_STOP_BIT;
1625 n_auto_repetitions = 1; // 1 frame
1626 auto_repetition_pause_len = 0;
1627 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1628 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1629 break;
1630 }
1631 #endif
1632 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1633 case IRMP_RCCAR_PROTOCOL:
1634 {
1635 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1636 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1637 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1638 pulse_1_len = RCCAR_PULSE_LEN;
1639 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1640 pulse_0_len = RCCAR_PULSE_LEN;
1641 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1642 has_stop_bit = RCCAR_STOP_BIT;
1643 n_auto_repetitions = 1; // 1 frame
1644 auto_repetition_pause_len = 0;
1645 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1646 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1647 break;
1648 }
1649 #endif
1650 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1651 case IRMP_JVC_PROTOCOL:
1652 {
1653 if (repeat_counter != 0) // skip start bit if repetition frame
1654 {
1655 current_bit = 0;
1656 }
1657
1658 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1659 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1660 complete_data_len = JVC_COMPLETE_DATA_LEN;
1661 pulse_1_len = JVC_PULSE_LEN;
1662 pause_1_len = JVC_1_PAUSE_LEN - 1;
1663 pulse_0_len = JVC_PULSE_LEN;
1664 pause_0_len = JVC_0_PAUSE_LEN - 1;
1665 has_stop_bit = JVC_STOP_BIT;
1666 n_auto_repetitions = 1; // 1 frame
1667 auto_repetition_pause_len = 0;
1668 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1669 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1670 break;
1671 }
1672 #endif
1673 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1674 case IRMP_NIKON_PROTOCOL:
1675 {
1676 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1677 startbit_pause_len = 271 - 1; // NIKON_START_BIT_PAUSE_LEN;
1678 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1679 pulse_1_len = NIKON_PULSE_LEN;
1680 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1681 pulse_0_len = NIKON_PULSE_LEN;
1682 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1683 has_stop_bit = NIKON_STOP_BIT;
1684 n_auto_repetitions = 1; // 1 frame
1685 auto_repetition_pause_len = 0;
1686 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1687 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1688 break;
1689 }
1690 #endif
1691 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1692 case IRMP_LEGO_PROTOCOL:
1693 {
1694 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1695 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1696 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1697 pulse_1_len = LEGO_PULSE_LEN;
1698 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1699 pulse_0_len = LEGO_PULSE_LEN;
1700 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1701 has_stop_bit = LEGO_STOP_BIT;
1702 n_auto_repetitions = 1; // 1 frame
1703 auto_repetition_pause_len = 0;
1704 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1705 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1706 break;
1707 }
1708 #endif
1709 default:
1710 {
1711 irsnd_busy = FALSE;
1712 break;
1713 }
1714 }
1715 }
1716 }
1717
1718 if (irsnd_busy)
1719 {
1720 new_frame = FALSE;
1721
1722 switch (irsnd_protocol)
1723 {
1724 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1725 case IRMP_SIRCS_PROTOCOL:
1726 #endif
1727 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1728 case IRMP_NEC_PROTOCOL:
1729 #endif
1730 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1731 case IRMP_NEC16_PROTOCOL:
1732 #endif
1733 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1734 case IRMP_NEC42_PROTOCOL:
1735 #endif
1736 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1737 case IRMP_SAMSUNG_PROTOCOL:
1738 case IRMP_SAMSUNG32_PROTOCOL:
1739 #endif
1740 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1741 case IRMP_MATSUSHITA_PROTOCOL:
1742 #endif
1743 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1744 case IRMP_KASEIKYO_PROTOCOL:
1745 #endif
1746 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1747 case IRMP_RECS80_PROTOCOL:
1748 #endif
1749 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1750 case IRMP_RECS80EXT_PROTOCOL:
1751 #endif
1752 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1753 case IRMP_DENON_PROTOCOL:
1754 #endif
1755 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1756 case IRMP_THOMSON_PROTOCOL:
1757 #endif
1758 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1759 case IRMP_NUBERT_PROTOCOL:
1760 #endif
1761 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1762 case IRMP_BANG_OLUFSEN_PROTOCOL:
1763 #endif
1764 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1765 case IRMP_FDC_PROTOCOL:
1766 #endif
1767 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1768 case IRMP_RCCAR_PROTOCOL:
1769 #endif
1770 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1771 case IRMP_JVC_PROTOCOL:
1772 #endif
1773 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1774 case IRMP_NIKON_PROTOCOL:
1775 #endif
1776 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1777 case IRMP_LEGO_PROTOCOL:
1778 #endif
1779
1780
1781 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
1782 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
1783 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
1784 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
1785 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1786 {
1787 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1788 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
1789 {
1790 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
1791 {
1792 auto_repetition_pause_len--;
1793 }
1794
1795 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1796 {
1797 repeat_frame_pause_len--;
1798 }
1799 }
1800 #endif
1801
1802 if (pulse_counter == 0)
1803 {
1804 if (current_bit == 0xFF) // send start bit
1805 {
1806 pulse_len = startbit_pulse_len;
1807 pause_len = startbit_pause_len;
1808 }
1809 else if (current_bit < complete_data_len) // send n'th bit
1810 {
1811 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1812 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
1813 {
1814 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
1815 {
1816 pulse_len = SAMSUNG_PULSE_LEN;
1817 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1818 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1819 }
1820 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
1821 {
1822 pulse_len = SAMSUNG_PULSE_LEN;
1823 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1824 }
1825 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
1826 {
1827 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1828
1829 pulse_len = SAMSUNG_PULSE_LEN;
1830 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1831 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1832 }
1833 }
1834 else
1835 #endif
1836
1837 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1838 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
1839 {
1840 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
1841 {
1842 pulse_len = NEC_PULSE_LEN;
1843 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1844 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1845 }
1846 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
1847 {
1848 pulse_len = NEC_PULSE_LEN;
1849 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1850 }
1851 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
1852 {
1853 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1854
1855 pulse_len = NEC_PULSE_LEN;
1856 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1857 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1858 }
1859 }
1860 else
1861 #endif
1862
1863 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1864 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
1865 {
1866 if (current_bit == 0) // send 2nd start bit
1867 {
1868 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1869 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1870 }
1871 else if (current_bit == 1) // send 3rd start bit
1872 {
1873 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
1874 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
1875 }
1876 else if (current_bit == 2) // send 4th start bit
1877 {
1878 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1879 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1880 }
1881 else if (current_bit == 19) // send trailer bit
1882 {
1883 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1884 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
1885 }
1886 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
1887 {
1888 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
1889 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1890
1891 if (cur_bit_value == last_bit_value)
1892 {
1893 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
1894 }
1895 else
1896 {
1897 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
1898 last_bit_value = cur_bit_value;
1899 }
1900 }
1901 }
1902 else
1903 #endif
1904 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
1905 {
1906 pulse_len = pulse_1_len;
1907 pause_len = pause_1_len;
1908 }
1909 else
1910 {
1911 pulse_len = pulse_0_len;
1912 pause_len = pause_0_len;
1913 }
1914 }
1915 else if (has_stop_bit) // send stop bit
1916 {
1917 pulse_len = pulse_0_len;
1918
1919 if (auto_repetition_counter < n_auto_repetitions)
1920 {
1921 pause_len = pause_0_len;
1922 }
1923 else
1924 {
1925 pause_len = 255; // last frame: pause of 255
1926 }
1927 }
1928 }
1929
1930 if (pulse_counter < pulse_len)
1931 {
1932 if (pulse_counter == 0)
1933 {
1934 irsnd_on ();
1935 }
1936 pulse_counter++;
1937 }
1938 else if (pause_counter < pause_len)
1939 {
1940 if (pause_counter == 0)
1941 {
1942 irsnd_off ();
1943 }
1944 pause_counter++;
1945 }
1946 else
1947 {
1948 current_bit++;
1949
1950 if (current_bit >= complete_data_len + has_stop_bit)
1951 {
1952 current_bit = 0xFF;
1953 auto_repetition_counter++;
1954
1955 if (auto_repetition_counter == n_auto_repetitions)
1956 {
1957 irsnd_busy = FALSE;
1958 auto_repetition_counter = 0;
1959 }
1960 new_frame = TRUE;
1961 }
1962
1963 pulse_counter = 0;
1964 pause_counter = 0;
1965 }
1966 break;
1967 }
1968 #endif
1969
1970 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1971 case IRMP_RC5_PROTOCOL:
1972 #endif
1973 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1974 case IRMP_RC6_PROTOCOL:
1975 #endif
1976 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1977 case IRMP_RC6A_PROTOCOL:
1978 #endif
1979 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1980 case IRMP_SIEMENS_PROTOCOL:
1981 #endif
1982 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1983 case IRMP_GRUNDIG_PROTOCOL:
1984 #endif
1985 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1986 case IRMP_IR60_PROTOCOL:
1987 #endif
1988 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1989 case IRMP_NOKIA_PROTOCOL:
1990 #endif
1991
1992 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
1993 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1994 {
1995 if (pulse_counter == pulse_len && pause_counter == pause_len)
1996 {
1997 current_bit++;
1998
1999 if (current_bit >= complete_data_len)
2000 {
2001 current_bit = 0xFF;
2002
2003 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2004 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2005 {
2006 auto_repetition_counter++;
2007
2008 if (repeat_counter > 0)
2009 { // set 117 msec pause time
2010 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2011 }
2012
2013 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2014 {
2015 n_auto_repetitions++; // increment number of auto repetitions
2016 repeat_counter++;
2017 }
2018 else if (auto_repetition_counter == n_auto_repetitions)
2019 {
2020 irsnd_busy = FALSE;
2021 auto_repetition_counter = 0;
2022 }
2023 }
2024 else
2025 #endif
2026 {
2027 irsnd_busy = FALSE;
2028 }
2029
2030 new_frame = TRUE;
2031 irsnd_off ();
2032 }
2033
2034 pulse_counter = 0;
2035 pause_counter = 0;
2036 }
2037
2038 if (! new_frame)
2039 {
2040 uint8_t first_pulse;
2041
2042 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2043 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2044 {
2045 if (current_bit == 0xFF || // start bit of start-frame
2046 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2047 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2048 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2049 {
2050 pulse_len = startbit_pulse_len;
2051 pause_len = startbit_pause_len;
2052 first_pulse = TRUE;
2053 }
2054 else // send n'th bit
2055 {
2056 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2057 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2058 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2059 }
2060 }
2061 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2062 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)
2063 #endif
2064 {
2065 if (current_bit == 0xFF) // 1 start bit
2066 {
2067 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2068 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2069 {
2070 pulse_len = startbit_pulse_len;
2071 pause_len = startbit_pause_len;
2072 }
2073 #endif
2074 first_pulse = TRUE;
2075 }
2076 else // send n'th bit
2077 {
2078 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2079 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2080 {
2081 pulse_len = RC6_BIT_LEN;
2082 pause_len = RC6_BIT_LEN;
2083
2084 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2085 {
2086 if (current_bit == 4) // toggle bit (double len)
2087 {
2088 pulse_len = 2 * RC6_BIT_LEN;
2089 pause_len = 2 * RC6_BIT_LEN;
2090 }
2091 }
2092 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2093 {
2094 if (current_bit == 4) // toggle bit (double len)
2095 {
2096 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2097 pause_len = 2 * RC6_BIT_LEN;
2098 }
2099 else if (current_bit == 5) // toggle bit (double len)
2100 {
2101 pause_len = 2 * RC6_BIT_LEN;
2102 }
2103 }
2104 }
2105 #endif
2106 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2107 }
2108
2109 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2110 {
2111 first_pulse = first_pulse ? FALSE : TRUE;
2112 }
2113 }
2114
2115 if (first_pulse)
2116 {
2117 if (pulse_counter < pulse_len)
2118 {
2119 if (pulse_counter == 0)
2120 {
2121 irsnd_on ();
2122 }
2123 pulse_counter++;
2124 }
2125 else // if (pause_counter < pause_len)
2126 {
2127 if (pause_counter == 0)
2128 {
2129 irsnd_off ();
2130 }
2131 pause_counter++;
2132 }
2133 }
2134 else
2135 {
2136 if (pause_counter < pause_len)
2137 {
2138 if (pause_counter == 0)
2139 {
2140 irsnd_off ();
2141 }
2142 pause_counter++;
2143 }
2144 else // if (pulse_counter < pulse_len)
2145 {
2146 if (pulse_counter == 0)
2147 {
2148 irsnd_on ();
2149 }
2150 pulse_counter++;
2151 }
2152 }
2153 }
2154 break;
2155 }
2156 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2157 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2158
2159 default:
2160 {
2161 irsnd_busy = FALSE;
2162 break;
2163 }
2164 }
2165 }
2166
2167 if (! irsnd_busy)
2168 {
2169 if (repeat_counter < n_repeat_frames)
2170 {
2171 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2172 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2173 {
2174 irsnd_buffer[2] |= 0x0F;
2175 }
2176 #endif
2177 repeat_counter++;
2178 irsnd_busy = TRUE;
2179 }
2180 else
2181 {
2182 irsnd_busy = TRUE; //Rainer
2183 send_trailer = TRUE;
2184 n_repeat_frames = 0;
2185 repeat_counter = 0;
2186 }
2187 }
2188 }
2189
2190 #ifdef DEBUG
2191 if (irsnd_is_on)
2192 {
2193 putchar ('0');
2194 }
2195 else
2196 {
2197 putchar ('1');
2198 }
2199 #endif
2200
2201 return irsnd_busy;
2202 }
2203
2204 #ifdef DEBUG
2205
2206 // main function - for unix/linux + windows only!
2207 // AVR: see main.c!
2208 // Compile it under linux with:
2209 // cc irsnd.c -o irsnd
2210 //
2211 // usage: ./irsnd protocol hex-address hex-command >filename
2212
2213 int
2214 main (int argc, char ** argv)
2215 {
2216 int protocol;
2217 int address;
2218 int command;
2219 IRMP_DATA irmp_data;
2220
2221 if (argc != 4 && argc != 5)
2222 {
2223 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2224 return 1;
2225 }
2226
2227 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2228 sscanf (argv[2], "%x", &address) == 1 &&
2229 sscanf (argv[3], "%x", &command) == 1)
2230 {
2231 irmp_data.protocol = protocol;
2232 irmp_data.address = address;
2233 irmp_data.command = command;
2234
2235 if (argc == 5)
2236 {
2237 irmp_data.flags = atoi (argv[4]);
2238 }
2239 else
2240 {
2241 irmp_data.flags = 0;
2242 }
2243
2244 irsnd_init ();
2245
2246 (void) irsnd_send_data (&irmp_data, TRUE);
2247
2248 while (irsnd_busy)
2249 {
2250 irsnd_ISR ();
2251 }
2252
2253 putchar ('\n');
2254 }
2255 else
2256 {
2257 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2258 return 1;
2259 }
2260 return 0;
2261 }
2262
2263 #endif // DEBUG
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)