irsndconfig.h

   1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
   2  * irsndconfig.h
   3  *
   4  * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de
   5  *
   6  * $Id: irsndconfig.h,v 1.30 2012/02/24 14:24:28 fm Exp $
   7  *
   8  * ATMEGA88 @ 8 MHz
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *---------------------------------------------------------------------------------------------------------------------------------------------------
  15  */
  16
  17 /*---------------------------------------------------------------------------------------------------------------------------------------------------
  18  * F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000
  19  *---------------------------------------------------------------------------------------------------------------------------------------------------
  20  */
  21 #ifndef F_INTERRUPTS
  22 #define F_INTERRUPTS                            15000   // interrupts per second
  23 #endif
  24
  25 /*---------------------------------------------------------------------------------------------------------------------------------------------------
  26  * Change settings from 1 to 0 if you want to disable one or more encoders.
  27  * This saves program space.
  28  * 1 enable  decoder
  29  * 0 disable decoder
  30  *---------------------------------------------------------------------------------------------------------------------------------------------------
  31  */
  32
  33 // typical protocols, disable here!             Enable  Remarks                 F_INTERRUPTS            Program Space
  34 #define IRSND_SUPPORT_SIRCS_PROTOCOL            1       // Sony SIRCS           >= 10000                 ~150 bytes
  35 #define IRSND_SUPPORT_NEC_PROTOCOL              1       // NEC + APPLE          >= 10000                 ~100 bytes
  36 #define IRSND_SUPPORT_SAMSUNG_PROTOCOL          1       // Samsung + Samsung32  >= 10000                 ~300 bytes
  37 #define IRSND_SUPPORT_MATSUSHITA_PROTOCOL       1       // Matsushita           >= 10000                 ~200 bytes
  38 #define IRSND_SUPPORT_KASEIKYO_PROTOCOL         1       // Kaseikyo             >= 10000                 ~150 bytes
  39 #define IRSND_SUPPORT_DENON_PROTOCOL            1       // DENON, Sharp         >= 10000                 ~200 bytes
  40
  41 // more protocols, enable here!                 Enable  Remarks                 F_INTERRUPTS            Program Space
  42 #define IRSND_SUPPORT_RC5_PROTOCOL              0       // RC5                  >= 10000                 ~150 bytes
  43 #define IRSND_SUPPORT_RC6_PROTOCOL              0       // RC6                  >= 10000                 ~250 bytes
  44 #define IRSND_SUPPORT_RC6A_PROTOCOL             0       // RC6A                 >= 10000                 ~250 bytes
  45 #define IRSND_SUPPORT_JVC_PROTOCOL              0       // JVC                  >= 10000                 ~150 bytes
  46 #define IRSND_SUPPORT_NEC16_PROTOCOL            0       // NEC16                >= 10000                 ~150 bytes
  47 #define IRSND_SUPPORT_NEC42_PROTOCOL            0       // NEC42                >= 10000                 ~150 bytes
  48 #define IRSND_SUPPORT_IR60_PROTOCOL             1       // IR60 (SAB2008)       >= 10000                 ~250 bytes
  49 #define IRSND_SUPPORT_GRUNDIG_PROTOCOL          1       // Grundig              >= 10000                 ~300 bytes
  50 #define IRSND_SUPPORT_SIEMENS_PROTOCOL          0       // Siemens, Gigaset     >= 15000                 ~150 bytes
  51 #define IRSND_SUPPORT_NOKIA_PROTOCOL            0       // Nokia                >= 10000                 ~400 bytes
  52
  53 // exotic protocols, enable here!               Enable  Remarks                 F_INTERRUPTS            Program Space
  54 #define IRSND_SUPPORT_KATHREIN_PROTOCOL         0       // Kathrein             >= 10000                 DON'T CHANGE, NOT SUPPORTED YET!
  55 #define IRSND_SUPPORT_NUBERT_PROTOCOL           0       // NUBERT               >= 10000                 ~100 bytes
  56 #define IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL     0       // Bang&Olufsen         >= 10000                 ~250 bytes
  57 #define IRSND_SUPPORT_RECS80_PROTOCOL           0       // RECS80               >= 20000                 ~100 bytes
  58 #define IRSND_SUPPORT_RECS80EXT_PROTOCOL        0       // RECS80EXT            >= 20000                 ~100 bytes
  59 #define IRSND_SUPPORT_THOMSON_PROTOCOL          0       // Thomson              >= 10000                 ~250 bytes
  60 #define IRSND_SUPPORT_NIKON_PROTOCOL            0       // NIKON                >= 10000                 ~150 bytes
  61 #define IRSND_SUPPORT_NETBOX_PROTOCOL           0       // Netbox keyboard      >= 10000                 DON'T CHANGE, NOT SUPPORTED YET!
  62 #define IRSND_SUPPORT_FDC_PROTOCOL              0       // FDC IR keyboard      >= 10000 (better 15000)  ~150 bytes
  63 #define IRSND_SUPPORT_RCCAR_PROTOCOL            0       // RC CAR               >= 10000 (better 15000)  ~150 bytes
  64 #define IRSND_SUPPORT_RUWIDO_PROTOCOL           0       // RUWIDO, T-Home       >= 15000                 DON'T CHANGE, NOT SUPPORTED YET!
  65 #define IRSND_SUPPORT_LEGO_PROTOCOL             0       // LEGO Power RC        >= 20000                 ~150 bytes
  66
  67
  68 /*---------------------------------------------------------------------------------------------------------------------------------------------------
  69  * DO NOT CHANGE:
  70  *---------------------------------------------------------------------------------------------------------------------------------------------------
  71  */
  72 #define IRSND_OC2                               0       // OC2
  73 #define IRSND_OC2A                              1       // OC2A
  74 #define IRSND_OC2B                              2       // OC2B
  75 #define IRSND_OC0                               3       // OC0
  76 #define IRSND_OC0A                              4       // OC0A
  77 #define IRSND_OC0B                              5       // OC0B
  78
  79 //PIC Microchip C18
  80 #define IRSND_PIC_CCP1                          1       // PIC C18 RC2 = PWM1 module
  81 #define IRSND_PIC_CCP2                          2       // PIC C18 RC1 = PWM2 module
  82
  83 #ifndef PIC_C18                                                                 // AVR part
  84
  85 /*---------------------------------------------------------------------------------------------------------------------------------------------------
  86  * AVR
  87  *
  88  * Change hardware pin here:                    IRSND_OC2  = OC2  on ATmegas         supporting OC2,  e.g. ATmega8
  89  *                                              IRSND_OC2A = OC2A on ATmegas         supporting OC2A, e.g. ATmega88
  90  *                                              IRSND_OC2B = OC2B on ATmegas         supporting OC2B, e.g. ATmega88
  91  *                                              IRSND_OC0  = OC0  on ATmegas         supporting OC0,  e.g. ATmega162
  92  *                                              IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85
  93  *                                              IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85
  94  *                                                                                              IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...
  95  *                                                                                              IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...
  96  *---------------------------------------------------------------------------------------------------------------------------------------------------
  97  */
  98
  99 #define IRSND_OCx                               IRSND_OC2B          // use OC2B
 100
 101 /*---------------------------------------------------------------------------------------------------------------------------------------------------
 102  * PIC C18
 103  *
 104  * Change hardware pin here:                    IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...
 105  *                                                                                              IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...
 106  *---------------------------------------------------------------------------------------------------------------------------------------------------
 107  */
 108
 109 #else
 110 #define IRSND_OCx                                   IRSND_PIC_CCP2      // Use PWMx for PIC
 111
 112 /*---------------------------------------------------------------------------------------------------------------------------------------------------
 113  * PIC C18 - change other PIC specific settings - ignore it when using AVR
 114  *---------------------------------------------------------------------------------------------------------------------------------------------------
 115  */
 116
 117 #define F_CPU                                   48000000UL          // PIC freq.; Set you Freq here
 118 #define Pre_Scaler                              4                   // define prescaler for Timer2 e.g. 1,4,16 !!!
 119 #define PIC_Scaler                              2                   // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value
 120 #warning Timer2 used for IRSND (PWM out) ! Do not use/setup Timer 2 yourself !
 121
 122 //Do not change lines below until you have a diffrent HW !! Example for 18F2550/18F4550
 123 //Setup macro for PWM used PWM module
 124
 125 #if IRSND_OCx == IRSND_PIC_CCP2
 126 #define IRSND_PIN                               TRISCbits.TRISC1    // RC1 = PWM2
 127
 128 #define SetDCPWM(x)                             SetDCPWM2(x)
 129 #define ClosePWM                                        ClosePWM2
 130 #define OpenPWM(x)                                      OpenPWM2(x)
 131 #endif
 132
 133 #if IRSND_OCx == IRSND_PIC_CCP1
 134 #define IRSND_PIN                               TRISCbits.TRISC2    // RC2 = PWM1
 135
 136 #define SetDCPWM(x)                             SetDCPWM1(x)
 137 #define ClosePWM                                ClosePWM1
 138 #define OpenPWM(x)                              OpenPWM1(x)
 139 #endif
 140
 141 //Setup macro for OpenTimer with defined Pre_Scaler
 142 #if Pre_Scaler == 1
 143 #define OpenTimer                               OpenTimer2(TIMER_INT_OFF & T2_PS_1_1);
 144 #elif Pre_Scaler == 4
 145 #define OpenTimer                               OpenTimer2(TIMER_INT_OFF & T2_PS_1_4);
 146 #elif Pre_Scaler == 16
 147 #define OpenTimer                               OpenTimer2(TIMER_INT_OFF & T2_PS_1_16);
 148 #else
 149 #error Incorrect value for Pre_Scaler
 150 #endif
 151
 152 #endif //PIC_C18
 153
 154 /*---------------------------------------------------------------------------------------------------------------------------------------------------
 155  * Use Callbacks to indicate output signal or something else
 156  *---------------------------------------------------------------------------------------------------------------------------------------------------
 157  */
 158 #define IRSND_USE_CALLBACK                      0       // flag: 0 = don't use callbacks, 1 = use callbacks, default is 0
 159
 160 /*---------------------------------------------------------------------------------------------------------------------------------------------------
 161  *                              D O   N O T   C H A N G E   T H E   F O L L O W I N G   L I N E S   !
 162  *---------------------------------------------------------------------------------------------------------------------------------------------------
 163  */
 164 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000
 165 #warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000)
 166 #undef IRSND_SUPPORT_SIEMENS_PROTOCOL
 167 #define IRSND_SUPPORT_SIEMENS_PROTOCOL          0       // DO NOT CHANGE! F_INTERRUPTS too low!
 168 #endif
 169
 170 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 20000
 171 #warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 20000)
 172 #undef IRSND_SUPPORT_RECS80_PROTOCOL
 173 #define IRSND_SUPPORT_RECS80_PROTOCOL           0       // DO NOT CHANGE! F_INTERRUPTS too low!
 174 #endif
 175
 176 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 20000
 177 #warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 20000)
 178 #undef IRSND_SUPPORT_RECS80EXT_PROTOCOL
 179 #define IRSND_SUPPORT_RECS80EXT_PROTOCOL        0       // DO NOT CHANGE! F_INTERRUPTS too low!
 180 #endif
 181
 182 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000
 183 #warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000)
 184 #undef IRSND_SUPPORT_LEGO_PROTOCOL
 185 #define IRSND_SUPPORT_LEGO_PROTOCOL             0       // DO NOT CHANGE! F_INTERRUPTS too low!
 186 #endif