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[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported AVR mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.87 2015/05/21 06:17:31 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46
47 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
48 # if IRSND_OCx == IRSND_OC0A // OC0A
49 # define IRSND_PORT_LETTER B
50 # define IRSND_BIT_NUMBER 0
51 # elif IRSND_OCx == IRSND_OC0B // OC0B
52 # define IRSND_PORT_LETTER B
53 # define IRSND_BIT_NUMBER 1
54 # else
55 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
56 # endif // IRSND_OCx
57
58 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
59 # if IRSND_OCx == IRSND_OC0A // OC0A
60 # define IRSND_PORT_LETTER A
61 # define IRSND_BIT_NUMBER 2
62 # else
63 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
64 # endif // IRSND_OCx
65
66 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
67 # if IRSND_OCx == IRSND_OC2 // OC0A
68 # define IRSND_PORT_LETTER B
69 # define IRSND_BIT_NUMBER 3
70 # else
71 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
72 # endif // IRSND_OCx
73 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
74 # if IRSND_OCx == IRSND_OC2 // OC2
75 # define IRSND_PORT_LETTER D
76 # define IRSND_BIT_NUMBER 7
77 # else
78 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
79 # endif // IRSND_OCx
80
81 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
82 # if IRSND_OCx == IRSND_OC2 // OC2
83 # define IRSND_PORT_LETTER B
84 # define IRSND_BIT_NUMBER 1
85 # elif IRSND_OCx == IRSND_OC0 // OC0
86 # define IRSND_PORT_LETTER B
87 # define IRSND_BIT_NUMBER 0
88 # else
89 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
90 # endif // IRSND_OCx
91
92 #elif defined (__AVR_ATmega164__) \
93 || defined (__AVR_ATmega324__) \
94 || defined (__AVR_ATmega644__) \
95 || defined (__AVR_ATmega644P__) \
96 || defined (__AVR_ATmega1284__) \
97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
98 # if IRSND_OCx == IRSND_OC2A // OC2A
99 # define IRSND_PORT_LETTER D
100 # define IRSND_BIT_NUMBER 7
101 # elif IRSND_OCx == IRSND_OC2B // OC2B
102 # define IRSND_PORT_LETTER D
103 # define IRSND_BIT_NUMBER 6
104 # elif IRSND_OCx == IRSND_OC0A // OC0A
105 # define IRSND_PORT_LETTER B
106 # define IRSND_BIT_NUMBER 3
107 # elif IRSND_OCx == IRSND_OC0B // OC0B
108 # define IRSND_PORT_LETTER B
109 # define IRSND_BIT_NUMBER 4
110 # else
111 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
112 # endif // IRSND_OCx
113
114 #elif defined (__AVR_ATmega48__) \
115 || defined (__AVR_ATmega88__) \
116 || defined (__AVR_ATmega88P__) \
117 || defined (__AVR_ATmega168__) \
118 || defined (__AVR_ATmega168P__) \
119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
120 # if IRSND_OCx == IRSND_OC2A // OC2A
121 # define IRSND_PORT_LETTER B
122 # define IRSND_BIT_NUMBER 3
123 # elif IRSND_OCx == IRSND_OC2B // OC2B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 3
126 # elif IRSND_OCx == IRSND_OC0A // OC0A
127 # define IRSND_PORT_LETTER D
128 # define IRSND_BIT_NUMBER 6
129 # elif IRSND_OCx == IRSND_OC0B // OC0B
130 # define IRSND_PORT_LETTER D
131 # define IRSND_BIT_NUMBER 5
132 # else
133 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
134 # endif // IRSND_OCx
135
136 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
137 # if IRSND_OCx == IRSND_OC0
138 # define IRSND_PORT_LETTER B
139 # define IRSND_BIT_NUMBER 0
140 # elif IRSND_OCx == IRSND_OC1A
141 # define IRSND_PORT_LETTER D
142 # define IRSND_BIT_NUMBER 5
143 # elif IRSND_OCx == IRSND_OC1B
144 # define IRSND_PORT_LETTER E
145 # define IRSND_BIT_NUMBER 2
146 # endif // IRSND_OCx
147
148 #elif defined (__AVR_ATxmega128A1U__) // ATxmega128A1U
149 # if IRSND_OCx == IRSND_XMEGA_OC0A
150 # define IRSND_BIT_NUMBER 0
151 # elif IRSND_OCx == IRSND_XMEGA_OC0B
152 # define IRSND_BIT_NUMBER 1
153 # elif IRSND_OCx == IRSND_XMEGA_OC0C
154 # define IRSND_BIT_NUMBER 2
155 # elif IRSND_OCx == IRSND_XMEGA_OC0D
156 # define IRSND_BIT_NUMBER 3
157 # elif IRSND_OCx == IRSND_XMEGA_OC1A
158 # define IRSND_BIT_NUMBER 4
159 # elif IRSND_OCx == IRSND_XMEGA_OC1B
160 # define IRSND_BIT_NUMBER 5
161 # else
162 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
163 # endif // IRSND_OCx
164
165 #elif defined (PIC_C18) //Microchip C18 compiler
166 //Nothing here to do here -> See irsndconfig.h
167 #elif defined (ARM_STM32) //STM32
168 //Nothing here to do here -> See irsndconfig.h
169 #else
170 # if !defined (unix) && !defined (WIN32)
171 # error mikrocontroller not defined, please fill in definitions here.
172 # endif // unix, WIN32
173 #endif // __AVR...
174
175 #if defined(__AVR_XMEGA__)
176 # define _CONCAT(a,b) a##b
177 # define CONCAT(a,b) _CONCAT(a,b)
178 # define IRSND_PORT IRSND_PORT_PRE.OUT
179 # define IRSND_DDR IRSND_PORT_PRE.DIR
180 # define IRSND_PIN IRSND_PORT_PRE.IN
181 # define IRSND_BIT IRSND_BIT_NUMBER
182 #elif defined(ATMEL_AVR)
183 # define _CONCAT(a,b) a##b
184 # define CONCAT(a,b) _CONCAT(a,b)
185 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
186 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
187 # define IRSND_BIT IRSND_BIT_NUMBER
188 #endif
189
190 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
191 typedef uint16_t IRSND_PAUSE_LEN;
192 #else
193 typedef uint8_t IRSND_PAUSE_LEN;
194 #endif
195
196 /*---------------------------------------------------------------------------------------------------------------------------------------------------
197 * IR timings
198 *---------------------------------------------------------------------------------------------------------------------------------------------------
199 */
200 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
201 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
202 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
203 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
204 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
205 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
206 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
207
208 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
209 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
210 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
211 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
212 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
213 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
214 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
215
216 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
217 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
218 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
219 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
220 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
221 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
222
223 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
224 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
225
226 #define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
227 #define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
228
229 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
230 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
231 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
232 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
233 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
234 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
235
236 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
237 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
238 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
239 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
240 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
241 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
242 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
243
244 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
245 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
246 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
247 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
248 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
249 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
250
251 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
252 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
253 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
254
255 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
256 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
257 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
258 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
259 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
260
261 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
262 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
263 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
264 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
265 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
266
267 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
268 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
269 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
270 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
271 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
272
273 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
274 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
275 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
276 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
277 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
278 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
279
280 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
281 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
282 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
283 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
284 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
285 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
286 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
287
288 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
289 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
290 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
291 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
292 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
293 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
294 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
295 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
296
297 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
298 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
299 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
300 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
301 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
302 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
303 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
304 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
305
306 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
307 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
308 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
309 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
310 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
311 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
312 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
313 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
314 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
315 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
316 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
317 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
318
319 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
320 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
321 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
322 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
323 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
324
325 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
326
327 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
328 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
329 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
330
331 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
332 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
333 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
334 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
335 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
336
337 #ifdef PIC_C18 // PIC C18
338 # define IRSND_FREQ_TYPE uint8_t
339 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
340 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
341 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
342 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
343 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
344 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
345 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
346 #elif defined (ARM_STM32) // STM32
347 # define IRSND_FREQ_TYPE uint32_t
348 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
349 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
350 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
351 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
352 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
353 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
354 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
355 #else // AVR
356 # if F_CPU >= 16000000L
357 # define AVR_PRESCALER 8
358 # else
359 # define AVR_PRESCALER 1
360 # endif
361 # define IRSND_FREQ_TYPE uint8_t
362 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
363 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
364 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
365 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
366 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
367 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
368 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
369 #endif
370
371 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
372 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
373 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
374 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
375 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
376 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
377
378 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
379 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
380 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
381 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
382 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
383 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
384
385 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
386 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
387 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
388 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
389 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
390 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
391 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
392
393 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
394 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
395 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
396 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
397 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
398 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
399 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
400
401 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
402 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
403 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
404 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
405 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
406 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
407 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
408
409 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
410 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
411 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
412 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
413 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
414 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
415
416 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
417 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
418 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
419 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
420 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
421 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
422 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
423
424 #define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)
425 #define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)
426 #define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)
427 #define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)
428 #define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)
429 #define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)
430 #define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
431
432 static volatile uint8_t irsnd_busy = 0;
433 static volatile uint8_t irsnd_protocol = 0;
434 static volatile uint8_t irsnd_buffer[6] = {0};
435 static volatile uint8_t irsnd_repeat = 0;
436 static volatile uint8_t irsnd_is_on = FALSE;
437
438 #if IRSND_USE_CALLBACK == 1
439 static void (*irsnd_callback_ptr) (uint8_t);
440 #endif // IRSND_USE_CALLBACK == 1
441
442 /*---------------------------------------------------------------------------------------------------------------------------------------------------
443 * Switch PWM on
444 *---------------------------------------------------------------------------------------------------------------------------------------------------
445 */
446 static void
447 irsnd_on (void)
448 {
449 if (! irsnd_is_on)
450 {
451 #ifndef ANALYZE
452 # if defined(PIC_C18) // PIC C18
453 PWMon();
454 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
455
456 # elif defined (ARM_STM32) // STM32
457 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
458 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
459 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
460
461 # elif defined (__AVR_XMEGA__)
462 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
463 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A
464 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
465 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B
466 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
467 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C
468 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
469 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D
470 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
471 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A
472 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
473 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B
474 # else
475 # error wrong value of IRSND_OCx
476 # endif // IRSND_OCx
477
478 # else // AVR
479 # if IRSND_OCx == IRSND_OC2 // use OC2
480 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
481 # elif IRSND_OCx == IRSND_OC2A // use OC2A
482 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
483 # elif IRSND_OCx == IRSND_OC2B // use OC2B
484 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
485 # elif IRSND_OCx == IRSND_OC0 // use OC0
486 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
487 # elif IRSND_OCx == IRSND_OC0A // use OC0A
488 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
489 # elif IRSND_OCx == IRSND_OC0B // use OC0B
490 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
491 # else
492 # error wrong value of IRSND_OCx
493 # endif // IRSND_OCx
494 # endif // C18
495 #endif // ANALYZE
496
497 #if IRSND_USE_CALLBACK == 1
498 if (irsnd_callback_ptr)
499 {
500 (*irsnd_callback_ptr) (TRUE);
501 }
502 #endif // IRSND_USE_CALLBACK == 1
503
504 irsnd_is_on = TRUE;
505 }
506 }
507
508 /*---------------------------------------------------------------------------------------------------------------------------------------------------
509 * Switch PWM off
510 * @details Switches PWM off
511 *---------------------------------------------------------------------------------------------------------------------------------------------------
512 */
513 static void
514 irsnd_off (void)
515 {
516 if (irsnd_is_on)
517 {
518 #ifndef ANALYZE
519
520 # if defined(PIC_C18) // PIC C18
521 PWMoff();
522 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
523
524 # elif defined (ARM_STM32) // STM32
525 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
526 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
527 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
528 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
529
530 # elif defined (__AVR_XMEGA__)
531 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
532 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected
533 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
534 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected
535 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
536 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected
537 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
538 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected
539 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
540 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected
541 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
542 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected
543 # else
544 # error wrong value of IRSND_OCx
545 # endif // IRSND_OCx
546
547 # else //AVR
548
549 # if IRSND_OCx == IRSND_OC2 // use OC2
550 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
551 # elif IRSND_OCx == IRSND_OC2A // use OC2A
552 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
553 # elif IRSND_OCx == IRSND_OC2B // use OC2B
554 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
555 # elif IRSND_OCx == IRSND_OC0 // use OC0
556 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
557 # elif IRSND_OCx == IRSND_OC0A // use OC0A
558 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
559 # elif IRSND_OCx == IRSND_OC0B // use OC0B
560 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
561 # else
562 # error wrong value of IRSND_OCx
563 # endif // IRSND_OCx
564 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
565 # endif //C18
566 #endif // ANALYZE
567
568 #if IRSND_USE_CALLBACK == 1
569 if (irsnd_callback_ptr)
570 {
571 (*irsnd_callback_ptr) (FALSE);
572 }
573 #endif // IRSND_USE_CALLBACK == 1
574
575 irsnd_is_on = FALSE;
576 }
577 }
578
579 /*---------------------------------------------------------------------------------------------------------------------------------------------------
580 * Set PWM frequency
581 * @details sets pwm frequency
582 *---------------------------------------------------------------------------------------------------------------------------------------------------
583 */
584 #if defined(__12F1840)
585 extern void pwm_init(uint16_t freq);
586 #include <stdio.h>
587 #endif
588
589 static void
590 irsnd_set_freq (IRSND_FREQ_TYPE freq)
591 {
592 #ifndef ANALYZE
593 # if defined(PIC_C18) // PIC C18 or XC8
594 # if defined(__12F1840) // XC8
595 TRISA2=0;
596 PR2=freq;
597 CCP1M0=1;
598 CCP1M1=1;
599 CCP1M2=1;
600 CCP1M3=1;
601 DC1B0=1;
602 DC1B1=0;
603 CCPR1L = 0b01101001;
604 TMR2IF = 0;
605 TMR2ON=1;
606 CCP1CON &=(~0b0011); // p 197 "active high"
607 # else // PIC C18
608 OpenPWM(freq);
609 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
610 # endif
611 PWMoff();
612 # elif defined (ARM_STM32) // STM32
613 static uint32_t TimeBaseFreq = 0;
614
615 if (TimeBaseFreq == 0)
616 {
617 RCC_ClocksTypeDef RCC_ClocksStructure;
618 /* Get system clocks and store timer clock in variable */
619 RCC_GetClocksFreq(&RCC_ClocksStructure);
620 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
621 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
622 {
623 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
624 }
625 else
626 {
627 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
628 }
629 # else
630 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
631 {
632 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
633 }
634 else
635 {
636 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
637 }
638 # endif
639 }
640
641 freq = TimeBaseFreq/freq;
642
643 /* Set frequency */
644 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
645 /* Set duty cycle */
646 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
647
648 # elif defined (__AVR_XMEGA__)
649 XMEGA_Timer.CCA = freq;
650
651 # else // AVR
652
653 # if IRSND_OCx == IRSND_OC2
654 OCR2 = freq; // use register OCR2 for OC2
655 # elif IRSND_OCx == IRSND_OC2A // use OC2A
656 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
657 # elif IRSND_OCx == IRSND_OC2B // use OC2B
658 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
659 # elif IRSND_OCx == IRSND_OC0 // use OC0
660 OCR0 = freq; // use register OCR2 for OC2
661 # elif IRSND_OCx == IRSND_OC0A // use OC0A
662 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
663 # elif IRSND_OCx == IRSND_OC0B // use OC0B
664 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
665 # else
666 # error wrong value of IRSND_OCx
667 # endif
668 # endif //PIC_C18
669 #endif // ANALYZE
670 }
671
672 /*---------------------------------------------------------------------------------------------------------------------------------------------------
673 * Initialize the PWM
674 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
675 *---------------------------------------------------------------------------------------------------------------------------------------------------
676 */
677 void
678 irsnd_init (void)
679 {
680 #ifndef ANALYZE
681 # if defined(PIC_C18) // PIC C18 or XC8 compiler
682 # if ! defined(__12F1840) // only C18:
683 OpenTimer;
684 # endif
685 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
686 IRSND_PIN = 0; // set IO to outout
687 PWMoff();
688 # elif defined (ARM_STM32) // STM32
689 GPIO_InitTypeDef GPIO_InitStructure;
690 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
691 TIM_OCInitTypeDef TIM_OCInitStructure;
692
693 /* GPIOx clock enable */
694 # if defined (ARM_STM32L1XX)
695 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
696 # elif defined (ARM_STM32F10X)
697 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
698 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping
699 # elif defined (ARM_STM32F4XX)
700 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
701 # endif
702
703 /* GPIO Configuration */
704 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
705 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
706 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
707 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
708 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
709 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
710 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
711 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
712 # elif defined (ARM_STM32F10X)
713 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
714 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
715 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
716 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping
717 # endif
718
719 /* TIMx clock enable */
720 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
721 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
722 # else
723 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
724 # endif
725
726 /* Time base configuration */
727 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
728 TIM_TimeBaseStructure.TIM_Prescaler = 0;
729 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
730 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
731 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
732
733 /* PWM1 Mode configuration */
734 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
735 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
736 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
737 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
738 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
739
740 /* Preload configuration */
741 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
742 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
743
744 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
745
746 # elif defined (__AVR_XMEGA__)
747 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
748 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
749
750 XMEGA_Timer.PER = 0xFFFF; //Topwert
751 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC
752
753 # if AVR_PRESCALER == 8
754 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8
755 # else
756 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1
757 # endif
758
759 # else // AVR
760 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
761 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
762
763 # if IRSND_OCx == IRSND_OC2 // use OC2
764 TCCR2 = (1<<WGM21); // CTC mode
765 # if AVR_PRESCALER == 8
766 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
767 # else
768 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
769 # endif
770 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
771 TCCR2A = (1<<WGM21); // CTC mode
772 # if AVR_PRESCALER == 8
773 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
774 # else
775 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
776 # endif
777 # elif IRSND_OCx == IRSND_OC0 // use OC0
778 TCCR0 = (1<<WGM01); // CTC mode
779 # if AVR_PRESCALER == 8
780 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
781 # else
782 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
783 # endif
784 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
785 TCCR0A = (1<<WGM01); // CTC mode
786 # if AVR_PRESCALER == 8
787 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
788 # else
789 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
790 # endif
791 # else
792 # error wrong value of IRSND_OCx
793 # endif
794 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
795 # endif //PIC_C18
796 #endif // ANALYZE
797 }
798
799 #if IRSND_USE_CALLBACK == 1
800 void
801 irsnd_set_callback_ptr (void (*cb)(uint8_t))
802 {
803 irsnd_callback_ptr = cb;
804 }
805 #endif // IRSND_USE_CALLBACK == 1
806
807 uint8_t
808 irsnd_is_busy (void)
809 {
810 return irsnd_busy;
811 }
812
813 static uint16_t
814 bitsrevervse (uint16_t x, uint8_t len)
815 {
816 uint16_t xx = 0;
817
818 while(len)
819 {
820 xx <<= 1;
821 if (x & 1)
822 {
823 xx |= 1;
824 }
825 x >>= 1;
826 len--;
827 }
828 return xx;
829 }
830
831
832 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
833 static uint8_t sircs_additional_bitlen;
834 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
835
836 uint8_t
837 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
838 {
839 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
840 static uint8_t toggle_bit_recs80;
841 #endif
842 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
843 static uint8_t toggle_bit_recs80ext;
844 #endif
845 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
846 static uint8_t toggle_bit_rc5;
847 #endif
848 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
849 static uint8_t toggle_bit_rc6;
850 #endif
851 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
852 static uint8_t toggle_bit_thomson;
853 #endif
854 uint16_t address;
855 uint16_t command;
856
857 if (do_wait)
858 {
859 while (irsnd_busy)
860 {
861 // do nothing;
862 }
863 }
864 else if (irsnd_busy)
865 {
866 return (FALSE);
867 }
868
869 irsnd_protocol = irmp_data_p->protocol;
870 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
871
872 switch (irsnd_protocol)
873 {
874 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
875 case IRMP_SIRCS_PROTOCOL:
876 {
877 // uint8_t sircs_additional_command_len;
878 uint8_t sircs_additional_address_len;
879
880 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
881
882 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
883 {
884 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
885 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
886 }
887 else
888 {
889 // sircs_additional_command_len = sircs_additional_bitlen;
890 sircs_additional_address_len = 0;
891 }
892
893 command = bitsrevervse (irmp_data_p->command, 15);
894
895 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
896 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
897
898 if (sircs_additional_address_len > 0)
899 {
900 address = bitsrevervse (irmp_data_p->address, 5);
901 irsnd_buffer[1] |= (address & 0x0010) >> 4;
902 irsnd_buffer[2] = (address & 0x000F) << 4;
903 }
904 irsnd_busy = TRUE;
905 break;
906 }
907 #endif
908 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
909 case IRMP_APPLE_PROTOCOL:
910 {
911 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
912 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
913
914 address = bitsrevervse (address, NEC_ADDRESS_LEN);
915 command = bitsrevervse (command, NEC_COMMAND_LEN);
916
917 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
918
919 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
920 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
921 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
922 irsnd_buffer[3] = 0x8B; // 10001011 (id)
923 irsnd_busy = TRUE;
924 break;
925 }
926 case IRMP_NEC_PROTOCOL:
927 {
928 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
929 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
930
931 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
932 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
933 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
934 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
935 irsnd_busy = TRUE;
936 break;
937 }
938 #endif
939 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
940 case IRMP_NEC16_PROTOCOL:
941 {
942 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
943 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
944
945 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
946 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
947 irsnd_busy = TRUE;
948 break;
949 }
950 #endif
951 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
952 case IRMP_NEC42_PROTOCOL:
953 {
954 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
955 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
956
957 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
958 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
959 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
960 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
961 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
962 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
963 irsnd_busy = TRUE;
964 break;
965 }
966 #endif
967 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
968 case IRMP_LGAIR_PROTOCOL:
969 {
970 address = irmp_data_p->address;
971 command = irmp_data_p->command;
972
973 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
974 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
975 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
976 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
977 ((command & 0x0F00) >> 8) +
978 ((command & 0x00F0) >>4 ) +
979 ((command & 0x000F))) & 0x000F) << 4;
980 irsnd_busy = TRUE;
981 break;
982 }
983 #endif
984 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
985 case IRMP_SAMSUNG_PROTOCOL:
986 {
987 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
988 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
989
990 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
991 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
992 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
993 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
994 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
995 irsnd_busy = TRUE;
996 break;
997 }
998 case IRMP_SAMSUNG32_PROTOCOL:
999 {
1000 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1001 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
1002
1003 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1004 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1005 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
1006 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
1007 irsnd_busy = TRUE;
1008 break;
1009 }
1010 #endif
1011 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1012 case IRMP_SAMSUNG48_PROTOCOL:
1013 {
1014 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1015 command = bitsrevervse (irmp_data_p->command, 16);
1016
1017 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1018 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1019 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC
1020 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
1021 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC
1022 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc
1023 irsnd_busy = TRUE;
1024 break;
1025 }
1026 #endif
1027 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1028 case IRMP_MATSUSHITA_PROTOCOL:
1029 {
1030 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
1031 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
1032
1033 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
1034 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
1035 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
1036 irsnd_busy = TRUE;
1037 break;
1038 }
1039 #endif
1040 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1041 case IRMP_KASEIKYO_PROTOCOL:
1042 {
1043 uint8_t xor_value;
1044 uint16_t genre2;
1045
1046 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
1047 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
1048 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
1049
1050 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
1051
1052 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1053 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1054 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
1055 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
1056 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
1057
1058 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
1059
1060 irsnd_buffer[5] = xor_value;
1061 irsnd_busy = TRUE;
1062 break;
1063 }
1064 #endif
1065 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1066 case IRMP_RECS80_PROTOCOL:
1067 {
1068 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
1069
1070 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
1071 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
1072 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
1073 irsnd_busy = TRUE;
1074 break;
1075 }
1076 #endif
1077 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1078 case IRMP_RECS80EXT_PROTOCOL:
1079 {
1080 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
1081
1082 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
1083 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
1084 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
1085 irsnd_busy = TRUE;
1086 break;
1087 }
1088 #endif
1089 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1090 case IRMP_RC5_PROTOCOL:
1091 {
1092 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
1093
1094 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
1095 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
1096 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
1097 irsnd_busy = TRUE;
1098 break;
1099 }
1100 #endif
1101 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1102 case IRMP_RC6_PROTOCOL:
1103 {
1104 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1105
1106 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
1107 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
1108 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
1109 irsnd_busy = TRUE;
1110 break;
1111 }
1112 #endif
1113 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1114 case IRMP_RC6A_PROTOCOL:
1115 {
1116 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1117
1118 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
1119 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
1120 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
1121 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1122 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
1123 irsnd_busy = TRUE;
1124 break;
1125 }
1126 #endif
1127 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1128 case IRMP_DENON_PROTOCOL:
1129 {
1130 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
1131 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
1132 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
1133 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
1134 irsnd_busy = TRUE;
1135 break;
1136 }
1137 #endif
1138 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1139 case IRMP_THOMSON_PROTOCOL:
1140 {
1141 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1142
1143 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1144 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1145 irsnd_busy = TRUE;
1146 break;
1147 }
1148 #endif
1149 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1150 case IRMP_NUBERT_PROTOCOL:
1151 {
1152 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1153 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1154 irsnd_busy = TRUE;
1155 break;
1156 }
1157 #endif
1158 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1159 case IRMP_SPEAKER_PROTOCOL:
1160 {
1161 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1162 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1163 irsnd_busy = TRUE;
1164 break;
1165 }
1166 #endif
1167 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1168 case IRMP_BANG_OLUFSEN_PROTOCOL:
1169 {
1170 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1171 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1172 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1173 irsnd_busy = TRUE;
1174 break;
1175 }
1176 #endif
1177 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1178 case IRMP_GRUNDIG_PROTOCOL:
1179 {
1180 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1181
1182 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1183 irsnd_buffer[1] = 0xC0; // 11
1184 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1185 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1186
1187 irsnd_busy = TRUE;
1188 break;
1189 }
1190 #endif
1191 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1192 case IRMP_TELEFUNKEN_PROTOCOL:
1193 {
1194 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1195 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1196
1197 irsnd_busy = TRUE;
1198 break;
1199 }
1200 #endif
1201 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1202 case IRMP_IR60_PROTOCOL:
1203 {
1204 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1205 #if 0
1206 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1207 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1208 #else
1209 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1210 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1211 #endif
1212
1213 irsnd_busy = TRUE;
1214 break;
1215 }
1216 #endif
1217 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1218 case IRMP_NOKIA_PROTOCOL:
1219 {
1220 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1221 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1222
1223 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1224 irsnd_buffer[1] = 0xFF; // 11111111
1225 irsnd_buffer[2] = 0x80; // 1
1226 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1227 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1228 irsnd_buffer[5] = (address << 7); // A
1229
1230 irsnd_busy = TRUE;
1231 break;
1232 }
1233 #endif
1234 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1235 case IRMP_SIEMENS_PROTOCOL:
1236 {
1237 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1238 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1239 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1240
1241 irsnd_busy = TRUE;
1242 break;
1243 }
1244 #endif
1245 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1246 case IRMP_RUWIDO_PROTOCOL:
1247 {
1248 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1249 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1250 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1251 irsnd_busy = TRUE;
1252 break;
1253 }
1254 #endif
1255 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1256 case IRMP_FDC_PROTOCOL:
1257 {
1258 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1259 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1260
1261 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1262 irsnd_buffer[1] = 0; // 00000000
1263 irsnd_buffer[2] = 0; // 0000RRRR
1264 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1265 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1266 irsnd_busy = TRUE;
1267 break;
1268 }
1269 #endif
1270 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1271 case IRMP_RCCAR_PROTOCOL:
1272 {
1273 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1274 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1275
1276 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1277 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1278
1279 irsnd_busy = TRUE;
1280 break;
1281 }
1282 #endif
1283 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1284 case IRMP_JVC_PROTOCOL:
1285 {
1286 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1287 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1288
1289 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1290 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1291
1292 irsnd_busy = TRUE;
1293 break;
1294 }
1295 #endif
1296 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1297 case IRMP_NIKON_PROTOCOL:
1298 {
1299 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1300 irsnd_busy = TRUE;
1301 break;
1302 }
1303 #endif
1304 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1305 case IRMP_LEGO_PROTOCOL:
1306 {
1307 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1308
1309 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1310 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1311 irsnd_busy = TRUE;
1312 break;
1313 }
1314 #endif
1315 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1316 case IRMP_A1TVBOX_PROTOCOL:
1317 {
1318 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1319 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1320 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1321
1322 irsnd_busy = TRUE;
1323 break;
1324 }
1325 #endif
1326 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1327 case IRMP_ROOMBA_PROTOCOL:
1328 {
1329 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1330 irsnd_busy = TRUE;
1331 break;
1332 }
1333 #endif
1334 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
1335 case IRMP_PENTAX_PROTOCOL:
1336 {
1337 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..
1338 irsnd_busy = TRUE;
1339 break;
1340 }
1341 #endif
1342
1343 default:
1344 {
1345 break;
1346 }
1347 }
1348
1349 return irsnd_busy;
1350 }
1351
1352 void
1353 irsnd_stop (void)
1354 {
1355 irsnd_repeat = 0;
1356 }
1357
1358 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1359 * ISR routine
1360 * @details ISR routine, called 10000 times per second
1361 *---------------------------------------------------------------------------------------------------------------------------------------------------
1362 */
1363 uint8_t
1364 irsnd_ISR (void)
1365 {
1366 static uint8_t send_trailer = FALSE;
1367 static uint8_t current_bit = 0xFF;
1368 static uint8_t pulse_counter = 0;
1369 static IRSND_PAUSE_LEN pause_counter = 0;
1370 static uint8_t startbit_pulse_len = 0;
1371 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1372 static uint8_t pulse_1_len = 0;
1373 static uint8_t pause_1_len = 0;
1374 static uint8_t pulse_0_len = 0;
1375 static uint8_t pause_0_len = 0;
1376 static uint8_t has_stop_bit = 0;
1377 static uint8_t new_frame = TRUE;
1378 static uint8_t complete_data_len = 0;
1379 static uint8_t n_repeat_frames = 0; // number of repetition frames
1380 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1381 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1382 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1383 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1384 static uint8_t repeat_counter = 0; // repeat counter
1385 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1386 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1387 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1388 static uint8_t last_bit_value;
1389 #endif
1390 static uint8_t pulse_len = 0xFF;
1391 static IRSND_PAUSE_LEN pause_len = 0xFF;
1392
1393 if (irsnd_busy)
1394 {
1395 if (current_bit == 0xFF && new_frame) // start of transmission...
1396 {
1397 if (auto_repetition_counter > 0)
1398 {
1399 auto_repetition_pause_counter++;
1400
1401 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1402 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1403 {
1404 repeat_frame_pause_len--;
1405 }
1406 #endif
1407
1408 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1409 {
1410 auto_repetition_pause_counter = 0;
1411
1412 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1413 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1414 {
1415 current_bit = 16;
1416 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1417 }
1418 else
1419 #endif
1420 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1421 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1422 {
1423 current_bit = 15;
1424 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1425 }
1426 else
1427 #endif
1428 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1429 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1430 {
1431 current_bit = 7;
1432 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1433 }
1434 else
1435 #endif
1436 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1437 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1438 {
1439 if (auto_repetition_counter + 1 < n_auto_repetitions)
1440 {
1441 current_bit = 23;
1442 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1443 }
1444 else // nokia stop frame
1445 {
1446 current_bit = 0xFF;
1447 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1448 }
1449 }
1450 else
1451 #endif
1452 {
1453 ;
1454 }
1455 }
1456 else
1457 {
1458 #ifdef ANALYZE
1459 if (irsnd_is_on)
1460 {
1461 putchar ('0');
1462 }
1463 else
1464 {
1465 putchar ('1');
1466 }
1467 #endif
1468 return irsnd_busy;
1469 }
1470 }
1471 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1472 {
1473 packet_repeat_pause_counter++;
1474 #ifdef ANALYZE
1475 if (irsnd_is_on)
1476 {
1477 putchar ('0');
1478 }
1479 else
1480 {
1481 putchar ('1');
1482 }
1483 #endif
1484 return irsnd_busy;
1485 }
1486 else
1487 {
1488 if (send_trailer)
1489 {
1490 irsnd_busy = FALSE;
1491 send_trailer = FALSE;
1492 return irsnd_busy;
1493 }
1494
1495 n_repeat_frames = irsnd_repeat;
1496
1497 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1498 {
1499 n_repeat_frames = 255;
1500 }
1501
1502 packet_repeat_pause_counter = 0;
1503 pulse_counter = 0;
1504 pause_counter = 0;
1505
1506 switch (irsnd_protocol)
1507 {
1508 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1509 case IRMP_SIRCS_PROTOCOL:
1510 {
1511 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1512 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1513 pulse_1_len = SIRCS_1_PULSE_LEN;
1514 pause_1_len = SIRCS_PAUSE_LEN - 1;
1515 pulse_0_len = SIRCS_0_PULSE_LEN;
1516 pause_0_len = SIRCS_PAUSE_LEN - 1;
1517 has_stop_bit = SIRCS_STOP_BIT;
1518 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1519 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1520 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1521 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1522 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1523 break;
1524 }
1525 #endif
1526 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1527 case IRMP_NEC_PROTOCOL:
1528 {
1529 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1530
1531 if (repeat_counter > 0)
1532 {
1533 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1534 complete_data_len = 0;
1535 }
1536 else
1537 {
1538 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1539 complete_data_len = NEC_COMPLETE_DATA_LEN;
1540 }
1541
1542 pulse_1_len = NEC_PULSE_LEN;
1543 pause_1_len = NEC_1_PAUSE_LEN - 1;
1544 pulse_0_len = NEC_PULSE_LEN;
1545 pause_0_len = NEC_0_PAUSE_LEN - 1;
1546 has_stop_bit = NEC_STOP_BIT;
1547 n_auto_repetitions = 1; // 1 frame
1548 auto_repetition_pause_len = 0;
1549 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1550 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1551 break;
1552 }
1553 #endif
1554 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1555 case IRMP_NEC16_PROTOCOL:
1556 {
1557 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1558 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1559 pulse_1_len = NEC_PULSE_LEN;
1560 pause_1_len = NEC_1_PAUSE_LEN - 1;
1561 pulse_0_len = NEC_PULSE_LEN;
1562 pause_0_len = NEC_0_PAUSE_LEN - 1;
1563 has_stop_bit = NEC_STOP_BIT;
1564 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1565 n_auto_repetitions = 1; // 1 frame
1566 auto_repetition_pause_len = 0;
1567 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1568 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1569 break;
1570 }
1571 #endif
1572 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1573 case IRMP_NEC42_PROTOCOL:
1574 {
1575 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1576 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1577 pulse_1_len = NEC_PULSE_LEN;
1578 pause_1_len = NEC_1_PAUSE_LEN - 1;
1579 pulse_0_len = NEC_PULSE_LEN;
1580 pause_0_len = NEC_0_PAUSE_LEN - 1;
1581 has_stop_bit = NEC_STOP_BIT;
1582 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1583 n_auto_repetitions = 1; // 1 frame
1584 auto_repetition_pause_len = 0;
1585 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1586 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1587 break;
1588 }
1589 #endif
1590 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1591 case IRMP_LGAIR_PROTOCOL:
1592 {
1593 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1594 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1595 pulse_1_len = NEC_PULSE_LEN;
1596 pause_1_len = NEC_1_PAUSE_LEN - 1;
1597 pulse_0_len = NEC_PULSE_LEN;
1598 pause_0_len = NEC_0_PAUSE_LEN - 1;
1599 has_stop_bit = NEC_STOP_BIT;
1600 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1601 n_auto_repetitions = 1; // 1 frame
1602 auto_repetition_pause_len = 0;
1603 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1604 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1605 break;
1606 }
1607 #endif
1608 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1609 case IRMP_SAMSUNG_PROTOCOL:
1610 {
1611 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1612 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1613 pulse_1_len = SAMSUNG_PULSE_LEN;
1614 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1615 pulse_0_len = SAMSUNG_PULSE_LEN;
1616 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1617 has_stop_bit = SAMSUNG_STOP_BIT;
1618 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1619 n_auto_repetitions = 1; // 1 frame
1620 auto_repetition_pause_len = 0;
1621 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1622 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1623 break;
1624 }
1625
1626 case IRMP_SAMSUNG32_PROTOCOL:
1627 {
1628 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1629 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1630 pulse_1_len = SAMSUNG_PULSE_LEN;
1631 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1632 pulse_0_len = SAMSUNG_PULSE_LEN;
1633 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1634 has_stop_bit = SAMSUNG_STOP_BIT;
1635 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1636 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame
1637 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1638 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1639 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1640 break;
1641 }
1642 #endif
1643 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1644 case IRMP_SAMSUNG48_PROTOCOL:
1645 {
1646 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1647 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1648 pulse_1_len = SAMSUNG_PULSE_LEN;
1649 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1650 pulse_0_len = SAMSUNG_PULSE_LEN;
1651 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1652 has_stop_bit = SAMSUNG_STOP_BIT;
1653 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;
1654 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame
1655 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1656 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;
1657 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1658 break;
1659 }
1660 #endif
1661 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1662 case IRMP_MATSUSHITA_PROTOCOL:
1663 {
1664 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1665 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1666 pulse_1_len = MATSUSHITA_PULSE_LEN;
1667 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1668 pulse_0_len = MATSUSHITA_PULSE_LEN;
1669 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1670 has_stop_bit = MATSUSHITA_STOP_BIT;
1671 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1672 n_auto_repetitions = 1; // 1 frame
1673 auto_repetition_pause_len = 0;
1674 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1675 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1676 break;
1677 }
1678 #endif
1679 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1680 case IRMP_KASEIKYO_PROTOCOL:
1681 {
1682 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1683 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1684 pulse_1_len = KASEIKYO_PULSE_LEN;
1685 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1686 pulse_0_len = KASEIKYO_PULSE_LEN;
1687 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1688 has_stop_bit = KASEIKYO_STOP_BIT;
1689 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1690 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1691 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1692 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1693 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1694 break;
1695 }
1696 #endif
1697 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1698 case IRMP_RECS80_PROTOCOL:
1699 {
1700 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1701 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1702 pulse_1_len = RECS80_PULSE_LEN;
1703 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1704 pulse_0_len = RECS80_PULSE_LEN;
1705 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1706 has_stop_bit = RECS80_STOP_BIT;
1707 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1708 n_auto_repetitions = 1; // 1 frame
1709 auto_repetition_pause_len = 0;
1710 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1711 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1712 break;
1713 }
1714 #endif
1715 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1716 case IRMP_RECS80EXT_PROTOCOL:
1717 {
1718 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1719 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1720 pulse_1_len = RECS80EXT_PULSE_LEN;
1721 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1722 pulse_0_len = RECS80EXT_PULSE_LEN;
1723 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1724 has_stop_bit = RECS80EXT_STOP_BIT;
1725 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1726 n_auto_repetitions = 1; // 1 frame
1727 auto_repetition_pause_len = 0;
1728 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1729 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1730 break;
1731 }
1732 #endif
1733 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1734 case IRMP_TELEFUNKEN_PROTOCOL:
1735 {
1736 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1737 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1738 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1739 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1740 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1741 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1742 has_stop_bit = TELEFUNKEN_STOP_BIT;
1743 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1744 n_auto_repetitions = 1; // 1 frames
1745 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1746 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1747 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1748 break;
1749 }
1750 #endif
1751 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1752 case IRMP_RC5_PROTOCOL:
1753 {
1754 startbit_pulse_len = RC5_BIT_LEN;
1755 startbit_pause_len = RC5_BIT_LEN;
1756 pulse_len = RC5_BIT_LEN;
1757 pause_len = RC5_BIT_LEN;
1758 has_stop_bit = RC5_STOP_BIT;
1759 complete_data_len = RC5_COMPLETE_DATA_LEN;
1760 n_auto_repetitions = 1; // 1 frame
1761 auto_repetition_pause_len = 0;
1762 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1763 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1764 break;
1765 }
1766 #endif
1767 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1768 case IRMP_RC6_PROTOCOL:
1769 {
1770 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1771 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1772 pulse_len = RC6_BIT_LEN;
1773 pause_len = RC6_BIT_LEN;
1774 has_stop_bit = RC6_STOP_BIT;
1775 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1776 n_auto_repetitions = 1; // 1 frame
1777 auto_repetition_pause_len = 0;
1778 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1779 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1780 break;
1781 }
1782 #endif
1783 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1784 case IRMP_RC6A_PROTOCOL:
1785 {
1786 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1787 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1788 pulse_len = RC6_BIT_LEN;
1789 pause_len = RC6_BIT_LEN;
1790 has_stop_bit = RC6_STOP_BIT;
1791 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1792 n_auto_repetitions = 1; // 1 frame
1793 auto_repetition_pause_len = 0;
1794 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1795 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1796 break;
1797 }
1798 #endif
1799 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1800 case IRMP_DENON_PROTOCOL:
1801 {
1802 startbit_pulse_len = 0x00;
1803 startbit_pause_len = 0x00;
1804 pulse_1_len = DENON_PULSE_LEN;
1805 pause_1_len = DENON_1_PAUSE_LEN - 1;
1806 pulse_0_len = DENON_PULSE_LEN;
1807 pause_0_len = DENON_0_PAUSE_LEN - 1;
1808 has_stop_bit = DENON_STOP_BIT;
1809 complete_data_len = DENON_COMPLETE_DATA_LEN;
1810 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1811 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1812 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1813 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1814 break;
1815 }
1816 #endif
1817 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1818 case IRMP_THOMSON_PROTOCOL:
1819 {
1820 startbit_pulse_len = 0x00;
1821 startbit_pause_len = 0x00;
1822 pulse_1_len = THOMSON_PULSE_LEN;
1823 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1824 pulse_0_len = THOMSON_PULSE_LEN;
1825 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1826 has_stop_bit = THOMSON_STOP_BIT;
1827 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1828 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1829 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1830 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1831 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1832 break;
1833 }
1834 #endif
1835 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1836 case IRMP_NUBERT_PROTOCOL:
1837 {
1838 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1839 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1840 pulse_1_len = NUBERT_1_PULSE_LEN;
1841 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1842 pulse_0_len = NUBERT_0_PULSE_LEN;
1843 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1844 has_stop_bit = NUBERT_STOP_BIT;
1845 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1846 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1847 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1848 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1849 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1850 break;
1851 }
1852 #endif
1853 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1854 case IRMP_SPEAKER_PROTOCOL:
1855 {
1856 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1857 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1858 pulse_1_len = SPEAKER_1_PULSE_LEN;
1859 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1860 pulse_0_len = SPEAKER_0_PULSE_LEN;
1861 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1862 has_stop_bit = SPEAKER_STOP_BIT;
1863 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1864 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1865 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1866 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1867 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1868 break;
1869 }
1870 #endif
1871 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1872 case IRMP_BANG_OLUFSEN_PROTOCOL:
1873 {
1874 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1875 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1876 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1877 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1878 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1879 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1880 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1881 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1882 n_auto_repetitions = 1; // 1 frame
1883 auto_repetition_pause_len = 0;
1884 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1885 last_bit_value = 0;
1886 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1887 break;
1888 }
1889 #endif
1890 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1891 case IRMP_GRUNDIG_PROTOCOL:
1892 {
1893 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1894 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1895 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1896 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1897 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1898 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1899 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1900 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1901 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1902 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1903 break;
1904 }
1905 #endif
1906 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1907 case IRMP_IR60_PROTOCOL:
1908 {
1909 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1910 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1911 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1912 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1913 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1914 complete_data_len = IR60_COMPLETE_DATA_LEN;
1915 n_auto_repetitions = IR60_FRAMES; // 2 frames
1916 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1917 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1918 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1919 break;
1920 }
1921 #endif
1922 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1923 case IRMP_NOKIA_PROTOCOL:
1924 {
1925 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1926 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1927 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1928 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1929 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1930 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1931 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1932 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1933 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1934 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1935 break;
1936 }
1937 #endif
1938 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1939 case IRMP_SIEMENS_PROTOCOL:
1940 {
1941 startbit_pulse_len = SIEMENS_BIT_LEN;
1942 startbit_pause_len = SIEMENS_BIT_LEN;
1943 pulse_len = SIEMENS_BIT_LEN;
1944 pause_len = SIEMENS_BIT_LEN;
1945 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1946 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1947 n_auto_repetitions = 1; // 1 frame
1948 auto_repetition_pause_len = 0;
1949 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1950 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1951 break;
1952 }
1953 #endif
1954 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1955 case IRMP_RUWIDO_PROTOCOL:
1956 {
1957 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1958 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1959 pulse_len = RUWIDO_BIT_PULSE_LEN;
1960 pause_len = RUWIDO_BIT_PAUSE_LEN;
1961 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1962 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1963 n_auto_repetitions = 1; // 1 frame
1964 auto_repetition_pause_len = 0;
1965 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
1966 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1967 break;
1968 }
1969 #endif
1970 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1971 case IRMP_FDC_PROTOCOL:
1972 {
1973 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1974 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1975 complete_data_len = FDC_COMPLETE_DATA_LEN;
1976 pulse_1_len = FDC_PULSE_LEN;
1977 pause_1_len = FDC_1_PAUSE_LEN - 1;
1978 pulse_0_len = FDC_PULSE_LEN;
1979 pause_0_len = FDC_0_PAUSE_LEN - 1;
1980 has_stop_bit = FDC_STOP_BIT;
1981 n_auto_repetitions = 1; // 1 frame
1982 auto_repetition_pause_len = 0;
1983 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1984 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1985 break;
1986 }
1987 #endif
1988 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1989 case IRMP_RCCAR_PROTOCOL:
1990 {
1991 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1992 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1993 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1994 pulse_1_len = RCCAR_PULSE_LEN;
1995 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1996 pulse_0_len = RCCAR_PULSE_LEN;
1997 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1998 has_stop_bit = RCCAR_STOP_BIT;
1999 n_auto_repetitions = 1; // 1 frame
2000 auto_repetition_pause_len = 0;
2001 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
2002 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2003 break;
2004 }
2005 #endif
2006 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2007 case IRMP_JVC_PROTOCOL:
2008 {
2009 if (repeat_counter != 0) // skip start bit if repetition frame
2010 {
2011 current_bit = 0;
2012 }
2013
2014 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
2015 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
2016 complete_data_len = JVC_COMPLETE_DATA_LEN;
2017 pulse_1_len = JVC_PULSE_LEN;
2018 pause_1_len = JVC_1_PAUSE_LEN - 1;
2019 pulse_0_len = JVC_PULSE_LEN;
2020 pause_0_len = JVC_0_PAUSE_LEN - 1;
2021 has_stop_bit = JVC_STOP_BIT;
2022 n_auto_repetitions = 1; // 1 frame
2023 auto_repetition_pause_len = 0;
2024 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
2025 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2026 break;
2027 }
2028 #endif
2029 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2030 case IRMP_NIKON_PROTOCOL:
2031 {
2032 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
2033 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
2034 complete_data_len = NIKON_COMPLETE_DATA_LEN;
2035 pulse_1_len = NIKON_PULSE_LEN;
2036 pause_1_len = NIKON_1_PAUSE_LEN - 1;
2037 pulse_0_len = NIKON_PULSE_LEN;
2038 pause_0_len = NIKON_0_PAUSE_LEN - 1;
2039 has_stop_bit = NIKON_STOP_BIT;
2040 n_auto_repetitions = 1; // 1 frame
2041 auto_repetition_pause_len = 0;
2042 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
2043 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2044 break;
2045 }
2046 #endif
2047 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2048 case IRMP_LEGO_PROTOCOL:
2049 {
2050 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
2051 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
2052 complete_data_len = LEGO_COMPLETE_DATA_LEN;
2053 pulse_1_len = LEGO_PULSE_LEN;
2054 pause_1_len = LEGO_1_PAUSE_LEN - 1;
2055 pulse_0_len = LEGO_PULSE_LEN;
2056 pause_0_len = LEGO_0_PAUSE_LEN - 1;
2057 has_stop_bit = LEGO_STOP_BIT;
2058 n_auto_repetitions = 1; // 1 frame
2059 auto_repetition_pause_len = 0;
2060 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
2061 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2062 break;
2063 }
2064 #endif
2065 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2066 case IRMP_A1TVBOX_PROTOCOL:
2067 {
2068 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
2069 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
2070 pulse_len = A1TVBOX_BIT_PULSE_LEN;
2071 pause_len = A1TVBOX_BIT_PAUSE_LEN;
2072 has_stop_bit = A1TVBOX_STOP_BIT;
2073 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
2074 n_auto_repetitions = 1; // 1 frame
2075 auto_repetition_pause_len = 0;
2076 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
2077 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2078 break;
2079 }
2080 #endif
2081 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2082 case IRMP_ROOMBA_PROTOCOL:
2083 {
2084 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
2085 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
2086 pulse_1_len = ROOMBA_1_PULSE_LEN;
2087 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
2088 pulse_0_len = ROOMBA_0_PULSE_LEN;
2089 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
2090 has_stop_bit = ROOMBA_STOP_BIT;
2091 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
2092 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
2093 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2094 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2095 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2096 break;
2097 }
2098 #endif
2099 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2100 case IRMP_PENTAX_PROTOCOL:
2101 {
2102 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;
2103 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;
2104 complete_data_len = PENTAX_COMPLETE_DATA_LEN;
2105 pulse_1_len = PENTAX_PULSE_LEN;
2106 pause_1_len = PENTAX_1_PAUSE_LEN - 1;
2107 pulse_0_len = PENTAX_PULSE_LEN;
2108 pause_0_len = PENTAX_0_PAUSE_LEN - 1;
2109 has_stop_bit = PENTAX_STOP_BIT;
2110 n_auto_repetitions = 1; // 1 frame
2111 auto_repetition_pause_len = 0;
2112 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;
2113 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2114 break;
2115 }
2116 #endif
2117 default:
2118 {
2119 irsnd_busy = FALSE;
2120 break;
2121 }
2122 }
2123 }
2124 }
2125
2126 if (irsnd_busy)
2127 {
2128 new_frame = FALSE;
2129
2130 switch (irsnd_protocol)
2131 {
2132 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
2133 case IRMP_SIRCS_PROTOCOL:
2134 #endif
2135 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
2136 case IRMP_NEC_PROTOCOL:
2137 #endif
2138 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2139 case IRMP_NEC16_PROTOCOL:
2140 #endif
2141 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
2142 case IRMP_NEC42_PROTOCOL:
2143 #endif
2144 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
2145 case IRMP_LGAIR_PROTOCOL:
2146 #endif
2147 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2148 case IRMP_SAMSUNG_PROTOCOL:
2149 case IRMP_SAMSUNG32_PROTOCOL:
2150 #endif
2151 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
2152 case IRMP_SAMSUNG48_PROTOCOL:
2153 #endif
2154 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2155 case IRMP_MATSUSHITA_PROTOCOL:
2156 #endif
2157 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
2158 case IRMP_KASEIKYO_PROTOCOL:
2159 #endif
2160 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
2161 case IRMP_RECS80_PROTOCOL:
2162 #endif
2163 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
2164 case IRMP_RECS80EXT_PROTOCOL:
2165 #endif
2166 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2167 case IRMP_TELEFUNKEN_PROTOCOL:
2168 #endif
2169 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2170 case IRMP_DENON_PROTOCOL:
2171 #endif
2172 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2173 case IRMP_NUBERT_PROTOCOL:
2174 #endif
2175 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2176 case IRMP_SPEAKER_PROTOCOL:
2177 #endif
2178 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2179 case IRMP_BANG_OLUFSEN_PROTOCOL:
2180 #endif
2181 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2182 case IRMP_FDC_PROTOCOL:
2183 #endif
2184 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2185 case IRMP_RCCAR_PROTOCOL:
2186 #endif
2187 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2188 case IRMP_JVC_PROTOCOL:
2189 #endif
2190 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2191 case IRMP_NIKON_PROTOCOL:
2192 #endif
2193 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2194 case IRMP_LEGO_PROTOCOL:
2195 #endif
2196 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2197 case IRMP_THOMSON_PROTOCOL:
2198 #endif
2199 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2200 case IRMP_ROOMBA_PROTOCOL:
2201 #endif
2202 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2203 case IRMP_PENTAX_PROTOCOL:
2204 #endif
2205
2206 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2207 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
2208 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2209 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
2210 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \
2211 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2212 {
2213 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2214 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
2215 {
2216 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
2217 {
2218 auto_repetition_pause_len--;
2219 }
2220
2221 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
2222 {
2223 repeat_frame_pause_len--;
2224 }
2225 }
2226 #endif
2227
2228 if (pulse_counter == 0)
2229 {
2230 if (current_bit == 0xFF) // send start bit
2231 {
2232 pulse_len = startbit_pulse_len;
2233 pause_len = startbit_pause_len;
2234 }
2235 else if (current_bit < complete_data_len) // send n'th bit
2236 {
2237 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2238 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2239 {
2240 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2241 {
2242 pulse_len = SAMSUNG_PULSE_LEN;
2243 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2244 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2245 }
2246 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2247 {
2248 pulse_len = SAMSUNG_PULSE_LEN;
2249 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2250 }
2251 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2252 {
2253 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2254
2255 pulse_len = SAMSUNG_PULSE_LEN;
2256 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2257 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2258 }
2259 }
2260 else
2261 #endif
2262
2263 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2264 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2265 {
2266 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2267 {
2268 pulse_len = NEC_PULSE_LEN;
2269 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2270 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2271 }
2272 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2273 {
2274 pulse_len = NEC_PULSE_LEN;
2275 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2276 }
2277 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2278 {
2279 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2280
2281 pulse_len = NEC_PULSE_LEN;
2282 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2283 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2284 }
2285 }
2286 else
2287 #endif
2288
2289 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2290 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2291 {
2292 if (current_bit == 0) // send 2nd start bit
2293 {
2294 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2295 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2296 }
2297 else if (current_bit == 1) // send 3rd start bit
2298 {
2299 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2300 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2301 }
2302 else if (current_bit == 2) // send 4th start bit
2303 {
2304 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2305 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2306 }
2307 else if (current_bit == 19) // send trailer bit
2308 {
2309 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2310 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2311 }
2312 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2313 {
2314 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;
2315 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2316
2317 if (cur_bit_value == last_bit_value)
2318 {
2319 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2320 }
2321 else
2322 {
2323 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2324 last_bit_value = cur_bit_value;
2325 }
2326 }
2327 }
2328 else
2329 #endif
2330 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))
2331 {
2332 pulse_len = pulse_1_len;
2333 pause_len = pause_1_len;
2334 }
2335 else
2336 {
2337 pulse_len = pulse_0_len;
2338 pause_len = pause_0_len;
2339 }
2340 }
2341 else if (has_stop_bit) // send stop bit
2342 {
2343 pulse_len = pulse_0_len;
2344
2345 if (auto_repetition_counter < n_auto_repetitions)
2346 {
2347 pause_len = pause_0_len;
2348 }
2349 else
2350 {
2351 pause_len = 255; // last frame: pause of 255
2352 }
2353 }
2354 }
2355
2356 if (pulse_counter < pulse_len)
2357 {
2358 if (pulse_counter == 0)
2359 {
2360 irsnd_on ();
2361 }
2362 pulse_counter++;
2363 }
2364 else if (pause_counter < pause_len)
2365 {
2366 if (pause_counter == 0)
2367 {
2368 irsnd_off ();
2369 }
2370 pause_counter++;
2371 }
2372 else
2373 {
2374 current_bit++;
2375
2376 if (current_bit >= complete_data_len + has_stop_bit)
2377 {
2378 current_bit = 0xFF;
2379 auto_repetition_counter++;
2380
2381 if (auto_repetition_counter == n_auto_repetitions)
2382 {
2383 irsnd_busy = FALSE;
2384 auto_repetition_counter = 0;
2385 }
2386 new_frame = TRUE;
2387 }
2388
2389 pulse_counter = 0;
2390 pause_counter = 0;
2391 }
2392 break;
2393 }
2394 #endif
2395
2396 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2397 case IRMP_RC5_PROTOCOL:
2398 #endif
2399 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2400 case IRMP_RC6_PROTOCOL:
2401 #endif
2402 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2403 case IRMP_RC6A_PROTOCOL:
2404 #endif
2405 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2406 case IRMP_SIEMENS_PROTOCOL:
2407 #endif
2408 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2409 case IRMP_RUWIDO_PROTOCOL:
2410 #endif
2411 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2412 case IRMP_GRUNDIG_PROTOCOL:
2413 #endif
2414 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2415 case IRMP_IR60_PROTOCOL:
2416 #endif
2417 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2418 case IRMP_NOKIA_PROTOCOL:
2419 #endif
2420 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2421 case IRMP_A1TVBOX_PROTOCOL:
2422 #endif
2423
2424 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2425 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2426 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2427 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2428 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2429 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2430 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2431 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2432 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2433 {
2434 if (pulse_counter == pulse_len && pause_counter == pause_len)
2435 {
2436 current_bit++;
2437
2438 if (current_bit >= complete_data_len)
2439 {
2440 current_bit = 0xFF;
2441
2442 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2443 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2444 {
2445 auto_repetition_counter++;
2446
2447 if (repeat_counter > 0)
2448 { // set 117 msec pause time
2449 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2450 }
2451
2452 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2453 {
2454 n_auto_repetitions++; // increment number of auto repetitions
2455 repeat_counter++;
2456 }
2457 else if (auto_repetition_counter == n_auto_repetitions)
2458 {
2459 irsnd_busy = FALSE;
2460 auto_repetition_counter = 0;
2461 }
2462 }
2463 else
2464 #endif
2465 {
2466 irsnd_busy = FALSE;
2467 }
2468
2469 new_frame = TRUE;
2470 irsnd_off ();
2471 }
2472
2473 pulse_counter = 0;
2474 pause_counter = 0;
2475 }
2476
2477 if (! new_frame)
2478 {
2479 uint8_t first_pulse;
2480
2481 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2482 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2483 {
2484 if (current_bit == 0xFF || // start bit of start-frame
2485 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2486 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2487 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2488 {
2489 pulse_len = startbit_pulse_len;
2490 pause_len = startbit_pause_len;
2491 first_pulse = TRUE;
2492 }
2493 else // send n'th bit
2494 {
2495 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2496 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2497 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2498 }
2499 }
2500 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2501 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2502 #endif
2503 {
2504 if (current_bit == 0xFF) // 1 start bit
2505 {
2506 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2507 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2508 {
2509 pulse_len = startbit_pulse_len;
2510 pause_len = startbit_pause_len;
2511 }
2512 else
2513 #endif
2514 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2515 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2516 {
2517 current_bit = 0;
2518 }
2519 else
2520 #endif
2521 {
2522 ;
2523 }
2524
2525 first_pulse = TRUE;
2526 }
2527 else // send n'th bit
2528 {
2529 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2530 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2531 {
2532 pulse_len = RC6_BIT_LEN;
2533 pause_len = RC6_BIT_LEN;
2534
2535 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2536 {
2537 if (current_bit == 4) // toggle bit (double len)
2538 {
2539 pulse_len = 2 * RC6_BIT_LEN;
2540 pause_len = 2 * RC6_BIT_LEN;
2541 }
2542 }
2543 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2544 {
2545 if (current_bit == 4) // toggle bit (double len)
2546 {
2547 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2548 pause_len = 2 * RC6_BIT_LEN;
2549 }
2550 else if (current_bit == 5) // toggle bit (double len)
2551 {
2552 pause_len = 2 * RC6_BIT_LEN;
2553 }
2554 }
2555 }
2556 #endif
2557 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2558 }
2559
2560 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2561 {
2562 first_pulse = first_pulse ? FALSE : TRUE;
2563 }
2564 }
2565
2566 if (first_pulse)
2567 {
2568 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2569
2570 if (pulse_counter < pulse_len)
2571 {
2572 if (pulse_counter == 0)
2573 {
2574 irsnd_on ();
2575 }
2576 pulse_counter++;
2577 }
2578 else // if (pause_counter < pause_len)
2579 {
2580 if (pause_counter == 0)
2581 {
2582 irsnd_off ();
2583 }
2584 pause_counter++;
2585 }
2586 }
2587 else
2588 {
2589 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2590
2591 if (pause_counter < pause_len)
2592 {
2593 if (pause_counter == 0)
2594 {
2595 irsnd_off ();
2596 }
2597 pause_counter++;
2598 }
2599 else // if (pulse_counter < pulse_len)
2600 {
2601 if (pulse_counter == 0)
2602 {
2603 irsnd_on ();
2604 }
2605 pulse_counter++;
2606 }
2607 }
2608 }
2609 break;
2610 }
2611 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2612 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2613
2614 default:
2615 {
2616 irsnd_busy = FALSE;
2617 break;
2618 }
2619 }
2620 }
2621
2622 if (! irsnd_busy)
2623 {
2624 if (repeat_counter < n_repeat_frames)
2625 {
2626 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2627 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2628 {
2629 irsnd_buffer[2] |= 0x0F;
2630 }
2631 #endif
2632 repeat_counter++;
2633 irsnd_busy = TRUE;
2634 }
2635 else
2636 {
2637 irsnd_busy = TRUE; //Rainer
2638 send_trailer = TRUE;
2639 n_repeat_frames = 0;
2640 repeat_counter = 0;
2641 }
2642 }
2643 }
2644
2645 #ifdef ANALYZE
2646 if (irsnd_is_on)
2647 {
2648 putchar ('0');
2649 }
2650 else
2651 {
2652 putchar ('1');
2653 }
2654 #endif
2655
2656 return irsnd_busy;
2657 }
2658
2659 #ifdef ANALYZE
2660
2661 // main function - for unix/linux + windows only!
2662 // AVR: see main.c!
2663 // Compile it under linux with:
2664 // cc irsnd.c -o irsnd
2665 //
2666 // usage: ./irsnd protocol hex-address hex-command >filename
2667
2668 int
2669 main (int argc, char ** argv)
2670 {
2671 int protocol;
2672 int address;
2673 int command;
2674 IRMP_DATA irmp_data;
2675
2676 if (argc != 4 && argc != 5)
2677 {
2678 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2679 return 1;
2680 }
2681
2682 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2683 sscanf (argv[2], "%x", &address) == 1 &&
2684 sscanf (argv[3], "%x", &command) == 1)
2685 {
2686 irmp_data.protocol = protocol;
2687 irmp_data.address = address;
2688 irmp_data.command = command;
2689
2690 if (argc == 5)
2691 {
2692 irmp_data.flags = atoi (argv[4]);
2693 }
2694 else
2695 {
2696 irmp_data.flags = 0;
2697 }
2698
2699 irsnd_init ();
2700
2701 (void) irsnd_send_data (&irmp_data, TRUE);
2702
2703 while (irsnd_busy)
2704 {
2705 irsnd_ISR ();
2706 }
2707
2708 putchar ('\n');
2709
2710 #if 1 // enable here to send twice
2711 (void) irsnd_send_data (&irmp_data, TRUE);
2712
2713 while (irsnd_busy)
2714 {
2715 irsnd_ISR ();
2716 }
2717
2718 putchar ('\n');
2719 #endif
2720 }
2721 else
2722 {
2723 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2724 return 1;
2725 }
2726 return 0;
2727 }
2728
2729 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)