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Version 2.6.0: added SAMSUNG48 protocol (in IRSND).
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.78 2014/07/10 09:48:23 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
47 # if IRSND_OCx == IRSND_OC0A // OC0A
48 # define IRSND_PORT_LETTER B
49 # define IRSND_BIT_NUMBER 0
50 # elif IRSND_OCx == IRSND_OC0B // OC0B
51 # define IRSND_PORT_LETTER B
52 # define IRSND_BIT_NUMBER 1
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT_LETTER A
59 # define IRSND_BIT_NUMBER 2
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
64 # if IRSND_OCx == IRSND_OC2 // OC0A
65 # define IRSND_PORT_LETTER B
66 # define IRSND_BIT_NUMBER 3
67 # else
68 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
69 # endif // IRSND_OCx
70 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
71 # if IRSND_OCx == IRSND_OC2 // OC2
72 # define IRSND_PORT_LETTER D
73 # define IRSND_BIT_NUMBER 7
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
76 # endif // IRSND_OCx
77 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
78 # if IRSND_OCx == IRSND_OC2 // OC2
79 # define IRSND_PORT_LETTER B
80 # define IRSND_BIT_NUMBER 1
81 # elif IRSND_OCx == IRSND_OC0 // OC0
82 # define IRSND_PORT_LETTER B
83 # define IRSND_BIT_NUMBER 0
84 # else
85 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
86 # endif // IRSND_OCx
87 #elif defined (__AVR_ATmega164__) \
88 || defined (__AVR_ATmega324__) \
89 || defined (__AVR_ATmega644__) \
90 || defined (__AVR_ATmega644P__) \
91 || defined (__AVR_ATmega1284__) \
92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
93 # if IRSND_OCx == IRSND_OC2A // OC2A
94 # define IRSND_PORT_LETTER D
95 # define IRSND_BIT_NUMBER 7
96 # elif IRSND_OCx == IRSND_OC2B // OC2B
97 # define IRSND_PORT_LETTER D
98 # define IRSND_BIT_NUMBER 6
99 # elif IRSND_OCx == IRSND_OC0A // OC0A
100 # define IRSND_PORT_LETTER B
101 # define IRSND_BIT_NUMBER 3
102 # elif IRSND_OCx == IRSND_OC0B // OC0B
103 # define IRSND_PORT_LETTER B
104 # define IRSND_BIT_NUMBER 4
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT_LETTER B
116 # define IRSND_BIT_NUMBER 3
117 # elif IRSND_OCx == IRSND_OC2B // OC2B
118 # define IRSND_PORT_LETTER D
119 # define IRSND_BIT_NUMBER 3
120 # elif IRSND_OCx == IRSND_OC0A // OC0A
121 # define IRSND_PORT_LETTER D
122 # define IRSND_BIT_NUMBER 6
123 # elif IRSND_OCx == IRSND_OC0B // OC0B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 5
126 # else
127 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
128 # endif // IRSND_OCx
129 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
130 # if IRSND_OCx == IRSND_OC0
131 # define IRSND_PORT_LETTER B
132 # define IRSND_BIT_NUMBER 0
133 # elif IRSND_OCx == IRSND_OC1A
134 # define IRSND_PORT_LETTER D
135 # define IRSND_BIT_NUMBER 5
136 # elif IRSND_OCx == IRSND_OC1B
137 # define IRSND_PORT_LETTER E
138 # define IRSND_BIT_NUMBER 2
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (PIC_C18) //Microchip C18 compiler
143 //Nothing here to do here -> See irsndconfig.h
144 #elif defined (ARM_STM32) //STM32
145 //Nothing here to do here -> See irsndconfig.h
146 #else
147 # if !defined (unix) && !defined (WIN32)
148 # error mikrocontroller not defined, please fill in definitions here.
149 # endif // unix, WIN32
150 #endif // __AVR...
151
152 #if defined(ATMEL_AVR)
153 # define _CONCAT(a,b) a##b
154 # define CONCAT(a,b) _CONCAT(a,b)
155 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
156 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
157 # define IRSND_BIT IRSND_BIT_NUMBER
158 #endif
159
160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
161 typedef uint16_t IRSND_PAUSE_LEN;
162 #else
163 typedef uint8_t IRSND_PAUSE_LEN;
164 #endif
165
166 /*---------------------------------------------------------------------------------------------------------------------------------------------------
167 * IR timings
168 *---------------------------------------------------------------------------------------------------------------------------------------------------
169 */
170 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
171 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
172 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
173 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
174 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
175 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
176 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
177
178 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
179 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
181 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
182 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
183 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
184 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
187 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
188 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
189 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
190 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
191 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
192
193 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
194 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
195
196 #define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
197 #define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
198
199 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
200 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
201 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
202 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
203 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
204 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
205
206 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
207 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
208 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
209 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
210 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
211 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
212 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
213
214 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
215 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
216 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
217 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
218 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
219 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
220
221 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
222 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
223 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
224
225 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
226 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
227 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
228 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
229 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
230
231 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
232 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
233 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
234 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
235 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
236
237 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
238 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
239 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
240 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
241 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
242
243 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
244 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
245 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
246 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
247 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
248 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
249
250 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
251 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
252 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
253 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
254 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
255 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
256 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
257
258 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
259 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
260 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
261 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
262 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
263 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
264 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
265 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
266
267 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
268 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
269 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
270 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
271 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
272 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
273 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
274 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
275
276 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
277 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
278 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
279 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
280 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
281 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
282 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
283 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
284 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
285 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
286 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
287 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
288
289 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
290 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
291 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
292 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
293 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
294
295 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
296
297 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
298 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
299 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
300
301 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
302 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
303 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
304 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
305 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
306
307 #ifdef PIC_C18 // PIC C18
308 # define IRSND_FREQ_TYPE uint8_t
309 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
310 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
311 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
312 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
313 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
314 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
315 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
316 #elif defined (ARM_STM32) // STM32
317 # define IRSND_FREQ_TYPE uint32_t
318 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
319 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
320 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
321 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
322 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
323 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
324 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
325 #else // AVR
326 # if F_CPU >= 16000000L
327 # define AVR_PRESCALER 8
328 # else
329 # define AVR_PRESCALER 1
330 # endif
331 # define IRSND_FREQ_TYPE uint8_t
332 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
333 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
334 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
335 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
336 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
337 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
338 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
339 #endif
340
341 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
342 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
343 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
344 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
345 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
346 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
347
348 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
349 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
350 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
351 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
352 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
353 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
354
355 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
356 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
357 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
358 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
359 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
360 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
361 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
362
363 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
364 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
365 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
366 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
367 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
368 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
369 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
370
371 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
372 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
373 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
374 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
375 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
376 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
377 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
378
379 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
380 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
381 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
382 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
383 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
384 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
385
386 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
387 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
388 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
389 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
390 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
391 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
392 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
393
394 static volatile uint8_t irsnd_busy = 0;
395 static volatile uint8_t irsnd_protocol = 0;
396 static volatile uint8_t irsnd_buffer[6] = {0};
397 static volatile uint8_t irsnd_repeat = 0;
398 static volatile uint8_t irsnd_is_on = FALSE;
399
400 #if IRSND_USE_CALLBACK == 1
401 static void (*irsnd_callback_ptr) (uint8_t);
402 #endif // IRSND_USE_CALLBACK == 1
403
404 /*---------------------------------------------------------------------------------------------------------------------------------------------------
405 * Switch PWM on
406 *---------------------------------------------------------------------------------------------------------------------------------------------------
407 */
408 static void
409 irsnd_on (void)
410 {
411 if (! irsnd_is_on)
412 {
413 #ifndef ANALYZE
414 # if defined(PIC_C18) // PIC C18
415 PWMon();
416 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
417 # elif defined (ARM_STM32) // STM32
418 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
419 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
420 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
421 # else // AVR
422 # if IRSND_OCx == IRSND_OC2 // use OC2
423 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
424 # elif IRSND_OCx == IRSND_OC2A // use OC2A
425 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
426 # elif IRSND_OCx == IRSND_OC2B // use OC2B
427 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
428 # elif IRSND_OCx == IRSND_OC0 // use OC0
429 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
430 # elif IRSND_OCx == IRSND_OC0A // use OC0A
431 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
432 # elif IRSND_OCx == IRSND_OC0B // use OC0B
433 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
434 # else
435 # error wrong value of IRSND_OCx
436 # endif // IRSND_OCx
437 # endif // C18
438 #endif // ANALYZE
439
440 #if IRSND_USE_CALLBACK == 1
441 if (irsnd_callback_ptr)
442 {
443 (*irsnd_callback_ptr) (TRUE);
444 }
445 #endif // IRSND_USE_CALLBACK == 1
446
447 irsnd_is_on = TRUE;
448 }
449 }
450
451 /*---------------------------------------------------------------------------------------------------------------------------------------------------
452 * Switch PWM off
453 * @details Switches PWM off
454 *---------------------------------------------------------------------------------------------------------------------------------------------------
455 */
456 static void
457 irsnd_off (void)
458 {
459 if (irsnd_is_on)
460 {
461 #ifndef ANALYZE
462
463 # if defined(PIC_C18) // PIC C18
464 PWMoff();
465 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
466 # elif defined (ARM_STM32) // STM32
467 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
468 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
469 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
470 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
471 # else //AVR
472
473 # if IRSND_OCx == IRSND_OC2 // use OC2
474 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
475 # elif IRSND_OCx == IRSND_OC2A // use OC2A
476 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
477 # elif IRSND_OCx == IRSND_OC2B // use OC2B
478 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
479 # elif IRSND_OCx == IRSND_OC0 // use OC0
480 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
481 # elif IRSND_OCx == IRSND_OC0A // use OC0A
482 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
483 # elif IRSND_OCx == IRSND_OC0B // use OC0B
484 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
485 # else
486 # error wrong value of IRSND_OCx
487 # endif // IRSND_OCx
488 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
489 # endif //C18
490 #endif // ANALYZE
491
492 #if IRSND_USE_CALLBACK == 1
493 if (irsnd_callback_ptr)
494 {
495 (*irsnd_callback_ptr) (FALSE);
496 }
497 #endif // IRSND_USE_CALLBACK == 1
498
499 irsnd_is_on = FALSE;
500 }
501 }
502
503 /*---------------------------------------------------------------------------------------------------------------------------------------------------
504 * Set PWM frequency
505 * @details sets pwm frequency
506 *---------------------------------------------------------------------------------------------------------------------------------------------------
507 */
508 static void
509 irsnd_set_freq (IRSND_FREQ_TYPE freq)
510 {
511 #ifndef ANALYZE
512 # if defined(PIC_C18) // PIC C18
513 OpenPWM(freq);
514 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
515 PWMoff();
516 # elif defined (ARM_STM32) // STM32
517 static uint32_t TimeBaseFreq = 0;
518
519 if (TimeBaseFreq == 0)
520 {
521 RCC_ClocksTypeDef RCC_ClocksStructure;
522 /* Get system clocks and store timer clock in variable */
523 RCC_GetClocksFreq(&RCC_ClocksStructure);
524 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
525 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
526 {
527 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
528 }
529 else
530 {
531 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
532 }
533 # else
534 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
535 {
536 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
537 }
538 else
539 {
540 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
541 }
542 # endif
543 }
544
545 freq = TimeBaseFreq/freq;
546
547 /* Set frequency */
548 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
549 /* Set duty cycle */
550 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
551 # else // AVR
552
553 # if IRSND_OCx == IRSND_OC2
554 OCR2 = freq; // use register OCR2 for OC2
555 # elif IRSND_OCx == IRSND_OC2A // use OC2A
556 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
557 # elif IRSND_OCx == IRSND_OC2B // use OC2B
558 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
559 # elif IRSND_OCx == IRSND_OC0 // use OC0
560 OCR0 = freq; // use register OCR2 for OC2
561 # elif IRSND_OCx == IRSND_OC0A // use OC0A
562 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
563 # elif IRSND_OCx == IRSND_OC0B // use OC0B
564 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
565 # else
566 # error wrong value of IRSND_OCx
567 # endif
568 # endif //PIC_C18
569 #endif // ANALYZE
570 }
571
572 /*---------------------------------------------------------------------------------------------------------------------------------------------------
573 * Initialize the PWM
574 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
575 *---------------------------------------------------------------------------------------------------------------------------------------------------
576 */
577 void
578 irsnd_init (void)
579 {
580 #ifndef ANALYZE
581 # if defined(PIC_C18) // PIC C18
582 OpenTimer;
583 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
584 IRSND_PIN = 0; // set IO to outout
585 PWMoff();
586 # elif defined (ARM_STM32) // STM32
587 GPIO_InitTypeDef GPIO_InitStructure;
588 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
589 TIM_OCInitTypeDef TIM_OCInitStructure;
590
591 /* GPIOx clock enable */
592 # if defined (ARM_STM32L1XX)
593 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
594 # elif defined (ARM_STM32F10X)
595 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
596 # elif defined (ARM_STM32F4XX)
597 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
598 # endif
599
600 /* GPIO Configuration */
601 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
602 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
603 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
604 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
605 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
606 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
607 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
608 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
609 # elif defined (ARM_STM32F10X)
610 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
611 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
612 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
613 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
614 # endif
615
616 /* TIMx clock enable */
617 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
618 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
619 # else
620 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
621 # endif
622
623 /* Time base configuration */
624 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
625 TIM_TimeBaseStructure.TIM_Prescaler = 0;
626 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
627 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
628 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
629
630 /* PWM1 Mode configuration */
631 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
632 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
633 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
634 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
635 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
636
637 /* Preload configuration */
638 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
639 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
640
641 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
642 # else // AVR
643 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
644 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
645
646 # if IRSND_OCx == IRSND_OC2 // use OC2
647 TCCR2 = (1<<WGM21); // CTC mode
648 # if AVR_PRESCALER == 8
649 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
650 # else
651 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
652 # endif
653 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
654 TCCR2A = (1<<WGM21); // CTC mode
655 # if AVR_PRESCALER == 8
656 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
657 # else
658 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
659 # endif
660 # elif IRSND_OCx == IRSND_OC0 // use OC0
661 TCCR0 = (1<<WGM01); // CTC mode
662 # if AVR_PRESCALER == 8
663 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
664 # else
665 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
666 # endif
667 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
668 TCCR0A = (1<<WGM01); // CTC mode
669 # if AVR_PRESCALER == 8
670 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
671 # else
672 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
673 # endif
674 # else
675 # error wrong value of IRSND_OCx
676 # endif
677 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
678 # endif //PIC_C18
679 #endif // ANALYZE
680 }
681
682 #if IRSND_USE_CALLBACK == 1
683 void
684 irsnd_set_callback_ptr (void (*cb)(uint8_t))
685 {
686 irsnd_callback_ptr = cb;
687 }
688 #endif // IRSND_USE_CALLBACK == 1
689
690 uint8_t
691 irsnd_is_busy (void)
692 {
693 return irsnd_busy;
694 }
695
696 static uint16_t
697 bitsrevervse (uint16_t x, uint8_t len)
698 {
699 uint16_t xx = 0;
700
701 while(len)
702 {
703 xx <<= 1;
704 if (x & 1)
705 {
706 xx |= 1;
707 }
708 x >>= 1;
709 len--;
710 }
711 return xx;
712 }
713
714
715 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
716 static uint8_t sircs_additional_bitlen;
717 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
718
719 uint8_t
720 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
721 {
722 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
723 static uint8_t toggle_bit_recs80;
724 #endif
725 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
726 static uint8_t toggle_bit_recs80ext;
727 #endif
728 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
729 static uint8_t toggle_bit_rc5;
730 #endif
731 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
732 static uint8_t toggle_bit_rc6;
733 #endif
734 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
735 static uint8_t toggle_bit_thomson;
736 #endif
737 uint16_t address;
738 uint16_t command;
739
740 if (do_wait)
741 {
742 while (irsnd_busy)
743 {
744 // do nothing;
745 }
746 }
747 else if (irsnd_busy)
748 {
749 return (FALSE);
750 }
751
752 irsnd_protocol = irmp_data_p->protocol;
753 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
754
755 switch (irsnd_protocol)
756 {
757 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
758 case IRMP_SIRCS_PROTOCOL:
759 {
760 // uint8_t sircs_additional_command_len;
761 uint8_t sircs_additional_address_len;
762
763 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
764
765 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
766 {
767 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
768 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
769 }
770 else
771 {
772 // sircs_additional_command_len = sircs_additional_bitlen;
773 sircs_additional_address_len = 0;
774 }
775
776 command = bitsrevervse (irmp_data_p->command, 15);
777
778 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
779 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
780
781 if (sircs_additional_address_len > 0)
782 {
783 address = bitsrevervse (irmp_data_p->address, 5);
784 irsnd_buffer[1] |= (address & 0x0010) >> 4;
785 irsnd_buffer[2] = (address & 0x000F) << 4;
786 }
787 irsnd_busy = TRUE;
788 break;
789 }
790 #endif
791 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
792 case IRMP_APPLE_PROTOCOL:
793 {
794 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
795 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
796
797 address = bitsrevervse (address, NEC_ADDRESS_LEN);
798 command = bitsrevervse (command, NEC_COMMAND_LEN);
799
800 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
801
802 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
803 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
804 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
805 irsnd_buffer[3] = 0x8B; // 10001011 (id)
806 irsnd_busy = TRUE;
807 break;
808 }
809 case IRMP_NEC_PROTOCOL:
810 {
811 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
812 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
813
814 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
815 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
816 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
817 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
818 irsnd_busy = TRUE;
819 break;
820 }
821 #endif
822 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
823 case IRMP_NEC16_PROTOCOL:
824 {
825 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
826 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
827
828 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
829 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
830 irsnd_busy = TRUE;
831 break;
832 }
833 #endif
834 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
835 case IRMP_NEC42_PROTOCOL:
836 {
837 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
838 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
839
840 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
841 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
842 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
843 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
844 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
845 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
846 irsnd_busy = TRUE;
847 break;
848 }
849 #endif
850 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
851 case IRMP_LGAIR_PROTOCOL:
852 {
853 address = irmp_data_p->address;
854 command = irmp_data_p->command;
855
856 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
857 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
858 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
859 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
860 ((command & 0x0F00) >> 8) +
861 ((command & 0x00F0) >>4 ) +
862 ((command & 0x000F))) & 0x000F) << 4;
863 irsnd_busy = TRUE;
864 break;
865 }
866 #endif
867 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
868 case IRMP_SAMSUNG_PROTOCOL:
869 {
870 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
871 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
872
873 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
874 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
875 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
876 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
877 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
878 irsnd_busy = TRUE;
879 break;
880 }
881 case IRMP_SAMSUNG32_PROTOCOL:
882 {
883 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
884 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
885
886 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
887 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
888 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
889 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
890 irsnd_busy = TRUE;
891 break;
892 }
893 #endif
894 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
895 case IRMP_SAMSUNG48_PROTOCOL:
896 {
897 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
898 command = bitsrevervse (irmp_data_p->command, 16);
899
900 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
901 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
902 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC
903 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
904 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC
905 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc
906 irsnd_busy = TRUE;
907 break;
908 }
909 #endif
910 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
911 case IRMP_MATSUSHITA_PROTOCOL:
912 {
913 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
914 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
915
916 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
917 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
918 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
919 irsnd_busy = TRUE;
920 break;
921 }
922 #endif
923 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
924 case IRMP_KASEIKYO_PROTOCOL:
925 {
926 uint8_t xor_value;
927 uint16_t genre2;
928
929 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
930 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
931 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
932
933 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
934
935 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
936 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
937 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
938 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
939 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
940
941 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
942
943 irsnd_buffer[5] = xor_value;
944 irsnd_busy = TRUE;
945 break;
946 }
947 #endif
948 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
949 case IRMP_RECS80_PROTOCOL:
950 {
951 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
952
953 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
954 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
955 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
956 irsnd_busy = TRUE;
957 break;
958 }
959 #endif
960 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
961 case IRMP_RECS80EXT_PROTOCOL:
962 {
963 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
964
965 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
966 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
967 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
968 irsnd_busy = TRUE;
969 break;
970 }
971 #endif
972 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
973 case IRMP_RC5_PROTOCOL:
974 {
975 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
976
977 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
978 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
979 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
980 irsnd_busy = TRUE;
981 break;
982 }
983 #endif
984 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
985 case IRMP_RC6_PROTOCOL:
986 {
987 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
988
989 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
990 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
991 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
992 irsnd_busy = TRUE;
993 break;
994 }
995 #endif
996 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
997 case IRMP_RC6A_PROTOCOL:
998 {
999 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1000
1001 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
1002 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
1003 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
1004 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1005 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
1006 irsnd_busy = TRUE;
1007 break;
1008 }
1009 #endif
1010 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1011 case IRMP_DENON_PROTOCOL:
1012 {
1013 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
1014 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
1015 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
1016 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
1017 irsnd_busy = TRUE;
1018 break;
1019 }
1020 #endif
1021 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1022 case IRMP_THOMSON_PROTOCOL:
1023 {
1024 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1025
1026 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1027 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1028 irsnd_busy = TRUE;
1029 break;
1030 }
1031 #endif
1032 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1033 case IRMP_NUBERT_PROTOCOL:
1034 {
1035 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1036 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1037 irsnd_busy = TRUE;
1038 break;
1039 }
1040 #endif
1041 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1042 case IRMP_SPEAKER_PROTOCOL:
1043 {
1044 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1045 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1046 irsnd_busy = TRUE;
1047 break;
1048 }
1049 #endif
1050 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1051 case IRMP_BANG_OLUFSEN_PROTOCOL:
1052 {
1053 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1054 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1055 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1056 irsnd_busy = TRUE;
1057 break;
1058 }
1059 #endif
1060 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1061 case IRMP_GRUNDIG_PROTOCOL:
1062 {
1063 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1064
1065 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1066 irsnd_buffer[1] = 0xC0; // 11
1067 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1068 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1069
1070 irsnd_busy = TRUE;
1071 break;
1072 }
1073 #endif
1074 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1075 case IRMP_TELEFUNKEN_PROTOCOL:
1076 {
1077 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1078 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1079
1080 irsnd_busy = TRUE;
1081 break;
1082 }
1083 #endif
1084 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1085 case IRMP_IR60_PROTOCOL:
1086 {
1087 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1088 #if 0
1089 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1090 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1091 #else
1092 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1093 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1094 #endif
1095
1096 irsnd_busy = TRUE;
1097 break;
1098 }
1099 #endif
1100 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1101 case IRMP_NOKIA_PROTOCOL:
1102 {
1103 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1104 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1105
1106 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1107 irsnd_buffer[1] = 0xFF; // 11111111
1108 irsnd_buffer[2] = 0x80; // 1
1109 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1110 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1111 irsnd_buffer[5] = (address << 7); // A
1112
1113 irsnd_busy = TRUE;
1114 break;
1115 }
1116 #endif
1117 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1118 case IRMP_SIEMENS_PROTOCOL:
1119 {
1120 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1121 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1122 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1123
1124 irsnd_busy = TRUE;
1125 break;
1126 }
1127 #endif
1128 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1129 case IRMP_RUWIDO_PROTOCOL:
1130 {
1131 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1132 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1133 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1134 irsnd_busy = TRUE;
1135 break;
1136 }
1137 #endif
1138 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1139 case IRMP_FDC_PROTOCOL:
1140 {
1141 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1142 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1143
1144 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1145 irsnd_buffer[1] = 0; // 00000000
1146 irsnd_buffer[2] = 0; // 0000RRRR
1147 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1148 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1149 irsnd_busy = TRUE;
1150 break;
1151 }
1152 #endif
1153 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1154 case IRMP_RCCAR_PROTOCOL:
1155 {
1156 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1157 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1158
1159 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1160 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1161
1162 irsnd_busy = TRUE;
1163 break;
1164 }
1165 #endif
1166 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1167 case IRMP_JVC_PROTOCOL:
1168 {
1169 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1170 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1171
1172 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1173 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1174
1175 irsnd_busy = TRUE;
1176 break;
1177 }
1178 #endif
1179 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1180 case IRMP_NIKON_PROTOCOL:
1181 {
1182 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1183 irsnd_busy = TRUE;
1184 break;
1185 }
1186 #endif
1187 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1188 case IRMP_LEGO_PROTOCOL:
1189 {
1190 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1191
1192 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1193 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1194 irsnd_busy = TRUE;
1195 break;
1196 }
1197 #endif
1198 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1199 case IRMP_A1TVBOX_PROTOCOL:
1200 {
1201 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1202 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1203 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1204
1205 irsnd_busy = TRUE;
1206 break;
1207 }
1208 #endif
1209 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1210 case IRMP_ROOMBA_PROTOCOL:
1211 {
1212
1213 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1214 irsnd_busy = TRUE;
1215 break;
1216 }
1217 #endif
1218 default:
1219 {
1220 break;
1221 }
1222 }
1223
1224 return irsnd_busy;
1225 }
1226
1227 void
1228 irsnd_stop (void)
1229 {
1230 irsnd_repeat = 0;
1231 }
1232
1233 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1234 * ISR routine
1235 * @details ISR routine, called 10000 times per second
1236 *---------------------------------------------------------------------------------------------------------------------------------------------------
1237 */
1238 uint8_t
1239 irsnd_ISR (void)
1240 {
1241 static uint8_t send_trailer = FALSE;
1242 static uint8_t current_bit = 0xFF;
1243 static uint8_t pulse_counter = 0;
1244 static IRSND_PAUSE_LEN pause_counter = 0;
1245 static uint8_t startbit_pulse_len = 0;
1246 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1247 static uint8_t pulse_1_len = 0;
1248 static uint8_t pause_1_len = 0;
1249 static uint8_t pulse_0_len = 0;
1250 static uint8_t pause_0_len = 0;
1251 static uint8_t has_stop_bit = 0;
1252 static uint8_t new_frame = TRUE;
1253 static uint8_t complete_data_len = 0;
1254 static uint8_t n_repeat_frames = 0; // number of repetition frames
1255 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1256 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1257 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1258 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1259 static uint8_t repeat_counter = 0; // repeat counter
1260 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1261 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1262 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1263 static uint8_t last_bit_value;
1264 #endif
1265 static uint8_t pulse_len = 0xFF;
1266 static IRSND_PAUSE_LEN pause_len = 0xFF;
1267
1268 if (irsnd_busy)
1269 {
1270 if (current_bit == 0xFF && new_frame) // start of transmission...
1271 {
1272 if (auto_repetition_counter > 0)
1273 {
1274 auto_repetition_pause_counter++;
1275
1276 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1277 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1278 {
1279 repeat_frame_pause_len--;
1280 }
1281 #endif
1282
1283 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1284 {
1285 auto_repetition_pause_counter = 0;
1286
1287 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1288 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1289 {
1290 current_bit = 16;
1291 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1292 }
1293 else
1294 #endif
1295 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1296 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1297 {
1298 current_bit = 15;
1299 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1300 }
1301 else
1302 #endif
1303 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1304 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1305 {
1306 current_bit = 7;
1307 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1308 }
1309 else
1310 #endif
1311 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1312 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1313 {
1314 if (auto_repetition_counter + 1 < n_auto_repetitions)
1315 {
1316 current_bit = 23;
1317 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1318 }
1319 else // nokia stop frame
1320 {
1321 current_bit = 0xFF;
1322 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1323 }
1324 }
1325 else
1326 #endif
1327 {
1328 ;
1329 }
1330 }
1331 else
1332 {
1333 #ifdef ANALYZE
1334 if (irsnd_is_on)
1335 {
1336 putchar ('0');
1337 }
1338 else
1339 {
1340 putchar ('1');
1341 }
1342 #endif
1343 return irsnd_busy;
1344 }
1345 }
1346 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1347 {
1348 packet_repeat_pause_counter++;
1349 #ifdef ANALYZE
1350 if (irsnd_is_on)
1351 {
1352 putchar ('0');
1353 }
1354 else
1355 {
1356 putchar ('1');
1357 }
1358 #endif
1359 return irsnd_busy;
1360 }
1361 else
1362 {
1363 if (send_trailer)
1364 {
1365 irsnd_busy = FALSE;
1366 send_trailer = FALSE;
1367 return irsnd_busy;
1368 }
1369
1370 n_repeat_frames = irsnd_repeat;
1371
1372 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1373 {
1374 n_repeat_frames = 255;
1375 }
1376
1377 packet_repeat_pause_counter = 0;
1378 pulse_counter = 0;
1379 pause_counter = 0;
1380
1381 switch (irsnd_protocol)
1382 {
1383 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1384 case IRMP_SIRCS_PROTOCOL:
1385 {
1386 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1387 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1388 pulse_1_len = SIRCS_1_PULSE_LEN;
1389 pause_1_len = SIRCS_PAUSE_LEN - 1;
1390 pulse_0_len = SIRCS_0_PULSE_LEN;
1391 pause_0_len = SIRCS_PAUSE_LEN - 1;
1392 has_stop_bit = SIRCS_STOP_BIT;
1393 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1394 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1395 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1396 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1397 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1398 break;
1399 }
1400 #endif
1401 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1402 case IRMP_NEC_PROTOCOL:
1403 {
1404 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1405
1406 if (repeat_counter > 0)
1407 {
1408 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1409 complete_data_len = 0;
1410 }
1411 else
1412 {
1413 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1414 complete_data_len = NEC_COMPLETE_DATA_LEN;
1415 }
1416
1417 pulse_1_len = NEC_PULSE_LEN;
1418 pause_1_len = NEC_1_PAUSE_LEN - 1;
1419 pulse_0_len = NEC_PULSE_LEN;
1420 pause_0_len = NEC_0_PAUSE_LEN - 1;
1421 has_stop_bit = NEC_STOP_BIT;
1422 n_auto_repetitions = 1; // 1 frame
1423 auto_repetition_pause_len = 0;
1424 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1425 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1426 break;
1427 }
1428 #endif
1429 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1430 case IRMP_NEC16_PROTOCOL:
1431 {
1432 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1433 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1434 pulse_1_len = NEC_PULSE_LEN;
1435 pause_1_len = NEC_1_PAUSE_LEN - 1;
1436 pulse_0_len = NEC_PULSE_LEN;
1437 pause_0_len = NEC_0_PAUSE_LEN - 1;
1438 has_stop_bit = NEC_STOP_BIT;
1439 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1440 n_auto_repetitions = 1; // 1 frame
1441 auto_repetition_pause_len = 0;
1442 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1443 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1444 break;
1445 }
1446 #endif
1447 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1448 case IRMP_NEC42_PROTOCOL:
1449 {
1450 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1451 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1452 pulse_1_len = NEC_PULSE_LEN;
1453 pause_1_len = NEC_1_PAUSE_LEN - 1;
1454 pulse_0_len = NEC_PULSE_LEN;
1455 pause_0_len = NEC_0_PAUSE_LEN - 1;
1456 has_stop_bit = NEC_STOP_BIT;
1457 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1458 n_auto_repetitions = 1; // 1 frame
1459 auto_repetition_pause_len = 0;
1460 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1461 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1462 break;
1463 }
1464 #endif
1465 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1466 case IRMP_LGAIR_PROTOCOL:
1467 {
1468 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1469 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1470 pulse_1_len = NEC_PULSE_LEN;
1471 pause_1_len = NEC_1_PAUSE_LEN - 1;
1472 pulse_0_len = NEC_PULSE_LEN;
1473 pause_0_len = NEC_0_PAUSE_LEN - 1;
1474 has_stop_bit = NEC_STOP_BIT;
1475 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1476 n_auto_repetitions = 1; // 1 frame
1477 auto_repetition_pause_len = 0;
1478 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1479 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1480 break;
1481 }
1482 #endif
1483 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1484 case IRMP_SAMSUNG_PROTOCOL:
1485 {
1486 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1487 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1488 pulse_1_len = SAMSUNG_PULSE_LEN;
1489 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1490 pulse_0_len = SAMSUNG_PULSE_LEN;
1491 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1492 has_stop_bit = SAMSUNG_STOP_BIT;
1493 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1494 n_auto_repetitions = 1; // 1 frame
1495 auto_repetition_pause_len = 0;
1496 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1497 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1498 break;
1499 }
1500
1501 case IRMP_SAMSUNG32_PROTOCOL:
1502 {
1503 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1504 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1505 pulse_1_len = SAMSUNG_PULSE_LEN;
1506 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1507 pulse_0_len = SAMSUNG_PULSE_LEN;
1508 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1509 has_stop_bit = SAMSUNG_STOP_BIT;
1510 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1511 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame
1512 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1513 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1514 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1515 break;
1516 }
1517 #endif
1518 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1519 case IRMP_SAMSUNG48_PROTOCOL:
1520 {
1521 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1522 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1523 pulse_1_len = SAMSUNG_PULSE_LEN;
1524 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1525 pulse_0_len = SAMSUNG_PULSE_LEN;
1526 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1527 has_stop_bit = SAMSUNG_STOP_BIT;
1528 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;
1529 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame
1530 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1531 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;
1532 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1533 break;
1534 }
1535 #endif
1536 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1537 case IRMP_MATSUSHITA_PROTOCOL:
1538 {
1539 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1540 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1541 pulse_1_len = MATSUSHITA_PULSE_LEN;
1542 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1543 pulse_0_len = MATSUSHITA_PULSE_LEN;
1544 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1545 has_stop_bit = MATSUSHITA_STOP_BIT;
1546 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1547 n_auto_repetitions = 1; // 1 frame
1548 auto_repetition_pause_len = 0;
1549 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1550 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1551 break;
1552 }
1553 #endif
1554 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1555 case IRMP_KASEIKYO_PROTOCOL:
1556 {
1557 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1558 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1559 pulse_1_len = KASEIKYO_PULSE_LEN;
1560 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1561 pulse_0_len = KASEIKYO_PULSE_LEN;
1562 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1563 has_stop_bit = KASEIKYO_STOP_BIT;
1564 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1565 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1566 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1567 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1568 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1569 break;
1570 }
1571 #endif
1572 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1573 case IRMP_RECS80_PROTOCOL:
1574 {
1575 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1576 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1577 pulse_1_len = RECS80_PULSE_LEN;
1578 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1579 pulse_0_len = RECS80_PULSE_LEN;
1580 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1581 has_stop_bit = RECS80_STOP_BIT;
1582 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1583 n_auto_repetitions = 1; // 1 frame
1584 auto_repetition_pause_len = 0;
1585 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1586 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1587 break;
1588 }
1589 #endif
1590 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1591 case IRMP_RECS80EXT_PROTOCOL:
1592 {
1593 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1594 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1595 pulse_1_len = RECS80EXT_PULSE_LEN;
1596 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1597 pulse_0_len = RECS80EXT_PULSE_LEN;
1598 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1599 has_stop_bit = RECS80EXT_STOP_BIT;
1600 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1601 n_auto_repetitions = 1; // 1 frame
1602 auto_repetition_pause_len = 0;
1603 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1604 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1605 break;
1606 }
1607 #endif
1608 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1609 case IRMP_TELEFUNKEN_PROTOCOL:
1610 {
1611 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1612 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1613 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1614 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1615 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1616 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1617 has_stop_bit = TELEFUNKEN_STOP_BIT;
1618 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1619 n_auto_repetitions = 1; // 1 frames
1620 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1621 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1622 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1623 break;
1624 }
1625 #endif
1626 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1627 case IRMP_RC5_PROTOCOL:
1628 {
1629 startbit_pulse_len = RC5_BIT_LEN;
1630 startbit_pause_len = RC5_BIT_LEN;
1631 pulse_len = RC5_BIT_LEN;
1632 pause_len = RC5_BIT_LEN;
1633 has_stop_bit = RC5_STOP_BIT;
1634 complete_data_len = RC5_COMPLETE_DATA_LEN;
1635 n_auto_repetitions = 1; // 1 frame
1636 auto_repetition_pause_len = 0;
1637 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1638 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1639 break;
1640 }
1641 #endif
1642 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1643 case IRMP_RC6_PROTOCOL:
1644 {
1645 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1646 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1647 pulse_len = RC6_BIT_LEN;
1648 pause_len = RC6_BIT_LEN;
1649 has_stop_bit = RC6_STOP_BIT;
1650 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1651 n_auto_repetitions = 1; // 1 frame
1652 auto_repetition_pause_len = 0;
1653 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1654 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1655 break;
1656 }
1657 #endif
1658 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1659 case IRMP_RC6A_PROTOCOL:
1660 {
1661 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1662 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1663 pulse_len = RC6_BIT_LEN;
1664 pause_len = RC6_BIT_LEN;
1665 has_stop_bit = RC6_STOP_BIT;
1666 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1667 n_auto_repetitions = 1; // 1 frame
1668 auto_repetition_pause_len = 0;
1669 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1670 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1671 break;
1672 }
1673 #endif
1674 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1675 case IRMP_DENON_PROTOCOL:
1676 {
1677 startbit_pulse_len = 0x00;
1678 startbit_pause_len = 0x00;
1679 pulse_1_len = DENON_PULSE_LEN;
1680 pause_1_len = DENON_1_PAUSE_LEN - 1;
1681 pulse_0_len = DENON_PULSE_LEN;
1682 pause_0_len = DENON_0_PAUSE_LEN - 1;
1683 has_stop_bit = DENON_STOP_BIT;
1684 complete_data_len = DENON_COMPLETE_DATA_LEN;
1685 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1686 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1687 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1688 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1689 break;
1690 }
1691 #endif
1692 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1693 case IRMP_THOMSON_PROTOCOL:
1694 {
1695 startbit_pulse_len = 0x00;
1696 startbit_pause_len = 0x00;
1697 pulse_1_len = THOMSON_PULSE_LEN;
1698 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1699 pulse_0_len = THOMSON_PULSE_LEN;
1700 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1701 has_stop_bit = THOMSON_STOP_BIT;
1702 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1703 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1704 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1705 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1706 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1707 break;
1708 }
1709 #endif
1710 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1711 case IRMP_NUBERT_PROTOCOL:
1712 {
1713 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1714 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1715 pulse_1_len = NUBERT_1_PULSE_LEN;
1716 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1717 pulse_0_len = NUBERT_0_PULSE_LEN;
1718 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1719 has_stop_bit = NUBERT_STOP_BIT;
1720 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1721 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1722 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1723 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1724 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1725 break;
1726 }
1727 #endif
1728 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1729 case IRMP_SPEAKER_PROTOCOL:
1730 {
1731 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1732 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1733 pulse_1_len = SPEAKER_1_PULSE_LEN;
1734 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1735 pulse_0_len = SPEAKER_0_PULSE_LEN;
1736 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1737 has_stop_bit = SPEAKER_STOP_BIT;
1738 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1739 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1740 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1741 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1742 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1743 break;
1744 }
1745 #endif
1746 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1747 case IRMP_BANG_OLUFSEN_PROTOCOL:
1748 {
1749 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1750 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1751 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1752 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1753 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1754 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1755 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1756 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1757 n_auto_repetitions = 1; // 1 frame
1758 auto_repetition_pause_len = 0;
1759 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1760 last_bit_value = 0;
1761 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1762 break;
1763 }
1764 #endif
1765 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1766 case IRMP_GRUNDIG_PROTOCOL:
1767 {
1768 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1769 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1770 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1771 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1772 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1773 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1774 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1775 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1776 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1777 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1778 break;
1779 }
1780 #endif
1781 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1782 case IRMP_IR60_PROTOCOL:
1783 {
1784 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1785 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1786 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1787 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1788 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1789 complete_data_len = IR60_COMPLETE_DATA_LEN;
1790 n_auto_repetitions = IR60_FRAMES; // 2 frames
1791 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1792 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1793 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1794 break;
1795 }
1796 #endif
1797 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1798 case IRMP_NOKIA_PROTOCOL:
1799 {
1800 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1801 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1802 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1803 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1804 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1805 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1806 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1807 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1808 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1809 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1810 break;
1811 }
1812 #endif
1813 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1814 case IRMP_SIEMENS_PROTOCOL:
1815 {
1816 startbit_pulse_len = SIEMENS_BIT_LEN;
1817 startbit_pause_len = SIEMENS_BIT_LEN;
1818 pulse_len = SIEMENS_BIT_LEN;
1819 pause_len = SIEMENS_BIT_LEN;
1820 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1821 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1822 n_auto_repetitions = 1; // 1 frame
1823 auto_repetition_pause_len = 0;
1824 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1825 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1826 break;
1827 }
1828 #endif
1829 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1830 case IRMP_RUWIDO_PROTOCOL:
1831 {
1832 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1833 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1834 pulse_len = RUWIDO_BIT_PULSE_LEN;
1835 pause_len = RUWIDO_BIT_PAUSE_LEN;
1836 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1837 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1838 n_auto_repetitions = 1; // 1 frame
1839 auto_repetition_pause_len = 0;
1840 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
1841 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1842 break;
1843 }
1844 #endif
1845 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1846 case IRMP_FDC_PROTOCOL:
1847 {
1848 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1849 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1850 complete_data_len = FDC_COMPLETE_DATA_LEN;
1851 pulse_1_len = FDC_PULSE_LEN;
1852 pause_1_len = FDC_1_PAUSE_LEN - 1;
1853 pulse_0_len = FDC_PULSE_LEN;
1854 pause_0_len = FDC_0_PAUSE_LEN - 1;
1855 has_stop_bit = FDC_STOP_BIT;
1856 n_auto_repetitions = 1; // 1 frame
1857 auto_repetition_pause_len = 0;
1858 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1859 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1860 break;
1861 }
1862 #endif
1863 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1864 case IRMP_RCCAR_PROTOCOL:
1865 {
1866 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1867 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1868 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1869 pulse_1_len = RCCAR_PULSE_LEN;
1870 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1871 pulse_0_len = RCCAR_PULSE_LEN;
1872 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1873 has_stop_bit = RCCAR_STOP_BIT;
1874 n_auto_repetitions = 1; // 1 frame
1875 auto_repetition_pause_len = 0;
1876 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1877 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1878 break;
1879 }
1880 #endif
1881 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1882 case IRMP_JVC_PROTOCOL:
1883 {
1884 if (repeat_counter != 0) // skip start bit if repetition frame
1885 {
1886 current_bit = 0;
1887 }
1888
1889 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1890 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1891 complete_data_len = JVC_COMPLETE_DATA_LEN;
1892 pulse_1_len = JVC_PULSE_LEN;
1893 pause_1_len = JVC_1_PAUSE_LEN - 1;
1894 pulse_0_len = JVC_PULSE_LEN;
1895 pause_0_len = JVC_0_PAUSE_LEN - 1;
1896 has_stop_bit = JVC_STOP_BIT;
1897 n_auto_repetitions = 1; // 1 frame
1898 auto_repetition_pause_len = 0;
1899 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1900 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1901 break;
1902 }
1903 #endif
1904 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1905 case IRMP_NIKON_PROTOCOL:
1906 {
1907 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1908 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
1909 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1910 pulse_1_len = NIKON_PULSE_LEN;
1911 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1912 pulse_0_len = NIKON_PULSE_LEN;
1913 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1914 has_stop_bit = NIKON_STOP_BIT;
1915 n_auto_repetitions = 1; // 1 frame
1916 auto_repetition_pause_len = 0;
1917 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1918 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1919 break;
1920 }
1921 #endif
1922 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1923 case IRMP_LEGO_PROTOCOL:
1924 {
1925 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1926 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1927 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1928 pulse_1_len = LEGO_PULSE_LEN;
1929 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1930 pulse_0_len = LEGO_PULSE_LEN;
1931 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1932 has_stop_bit = LEGO_STOP_BIT;
1933 n_auto_repetitions = 1; // 1 frame
1934 auto_repetition_pause_len = 0;
1935 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1936 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1937 break;
1938 }
1939 #endif
1940 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1941 case IRMP_A1TVBOX_PROTOCOL:
1942 {
1943 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
1944 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
1945 pulse_len = A1TVBOX_BIT_PULSE_LEN;
1946 pause_len = A1TVBOX_BIT_PAUSE_LEN;
1947 has_stop_bit = A1TVBOX_STOP_BIT;
1948 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
1949 n_auto_repetitions = 1; // 1 frame
1950 auto_repetition_pause_len = 0;
1951 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
1952 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1953 break;
1954 }
1955 #endif
1956 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1957 case IRMP_ROOMBA_PROTOCOL:
1958 {
1959 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
1960 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
1961 pulse_1_len = ROOMBA_1_PULSE_LEN;
1962 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
1963 pulse_0_len = ROOMBA_0_PULSE_LEN;
1964 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
1965 has_stop_bit = ROOMBA_STOP_BIT;
1966 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
1967 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
1968 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1969 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1970 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1971 break;
1972 }
1973 #endif
1974 default:
1975 {
1976 irsnd_busy = FALSE;
1977 break;
1978 }
1979 }
1980 }
1981 }
1982
1983 if (irsnd_busy)
1984 {
1985 new_frame = FALSE;
1986
1987 switch (irsnd_protocol)
1988 {
1989 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1990 case IRMP_SIRCS_PROTOCOL:
1991 #endif
1992 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1993 case IRMP_NEC_PROTOCOL:
1994 #endif
1995 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1996 case IRMP_NEC16_PROTOCOL:
1997 #endif
1998 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1999 case IRMP_NEC42_PROTOCOL:
2000 #endif
2001 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
2002 case IRMP_LGAIR_PROTOCOL:
2003 #endif
2004 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2005 case IRMP_SAMSUNG_PROTOCOL:
2006 case IRMP_SAMSUNG32_PROTOCOL:
2007 #endif
2008 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
2009 case IRMP_SAMSUNG48_PROTOCOL:
2010 #endif
2011 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2012 case IRMP_MATSUSHITA_PROTOCOL:
2013 #endif
2014 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
2015 case IRMP_KASEIKYO_PROTOCOL:
2016 #endif
2017 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
2018 case IRMP_RECS80_PROTOCOL:
2019 #endif
2020 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
2021 case IRMP_RECS80EXT_PROTOCOL:
2022 #endif
2023 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2024 case IRMP_TELEFUNKEN_PROTOCOL:
2025 #endif
2026 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2027 case IRMP_DENON_PROTOCOL:
2028 #endif
2029 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2030 case IRMP_NUBERT_PROTOCOL:
2031 #endif
2032 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2033 case IRMP_SPEAKER_PROTOCOL:
2034 #endif
2035 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2036 case IRMP_BANG_OLUFSEN_PROTOCOL:
2037 #endif
2038 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2039 case IRMP_FDC_PROTOCOL:
2040 #endif
2041 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2042 case IRMP_RCCAR_PROTOCOL:
2043 #endif
2044 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2045 case IRMP_JVC_PROTOCOL:
2046 #endif
2047 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2048 case IRMP_NIKON_PROTOCOL:
2049 #endif
2050 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2051 case IRMP_LEGO_PROTOCOL:
2052 #endif
2053 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2054 case IRMP_THOMSON_PROTOCOL:
2055 #endif
2056 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2057 case IRMP_ROOMBA_PROTOCOL:
2058 #endif
2059
2060 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2061 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
2062 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2063 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
2064 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \
2065 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2066 {
2067 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2068 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
2069 {
2070 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
2071 {
2072 auto_repetition_pause_len--;
2073 }
2074
2075 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
2076 {
2077 repeat_frame_pause_len--;
2078 }
2079 }
2080 #endif
2081
2082 if (pulse_counter == 0)
2083 {
2084 if (current_bit == 0xFF) // send start bit
2085 {
2086 pulse_len = startbit_pulse_len;
2087 pause_len = startbit_pause_len;
2088 }
2089 else if (current_bit < complete_data_len) // send n'th bit
2090 {
2091 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2092 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2093 {
2094 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2095 {
2096 pulse_len = SAMSUNG_PULSE_LEN;
2097 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
2098 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2099 }
2100 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2101 {
2102 pulse_len = SAMSUNG_PULSE_LEN;
2103 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2104 }
2105 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2106 {
2107 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2108
2109 pulse_len = SAMSUNG_PULSE_LEN;
2110 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
2111 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2112 }
2113 }
2114 else
2115 #endif
2116
2117 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2118 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2119 {
2120 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2121 {
2122 pulse_len = NEC_PULSE_LEN;
2123 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
2124 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2125 }
2126 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2127 {
2128 pulse_len = NEC_PULSE_LEN;
2129 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2130 }
2131 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2132 {
2133 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2134
2135 pulse_len = NEC_PULSE_LEN;
2136 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
2137 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2138 }
2139 }
2140 else
2141 #endif
2142
2143 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2144 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2145 {
2146 if (current_bit == 0) // send 2nd start bit
2147 {
2148 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2149 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2150 }
2151 else if (current_bit == 1) // send 3rd start bit
2152 {
2153 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2154 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2155 }
2156 else if (current_bit == 2) // send 4th start bit
2157 {
2158 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2159 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2160 }
2161 else if (current_bit == 19) // send trailer bit
2162 {
2163 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2164 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2165 }
2166 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2167 {
2168 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
2169 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2170
2171 if (cur_bit_value == last_bit_value)
2172 {
2173 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2174 }
2175 else
2176 {
2177 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2178 last_bit_value = cur_bit_value;
2179 }
2180 }
2181 }
2182 else
2183 #endif
2184 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
2185 {
2186 pulse_len = pulse_1_len;
2187 pause_len = pause_1_len;
2188 }
2189 else
2190 {
2191 pulse_len = pulse_0_len;
2192 pause_len = pause_0_len;
2193 }
2194 }
2195 else if (has_stop_bit) // send stop bit
2196 {
2197 pulse_len = pulse_0_len;
2198
2199 if (auto_repetition_counter < n_auto_repetitions)
2200 {
2201 pause_len = pause_0_len;
2202 }
2203 else
2204 {
2205 pause_len = 255; // last frame: pause of 255
2206 }
2207 }
2208 }
2209
2210 if (pulse_counter < pulse_len)
2211 {
2212 if (pulse_counter == 0)
2213 {
2214 irsnd_on ();
2215 }
2216 pulse_counter++;
2217 }
2218 else if (pause_counter < pause_len)
2219 {
2220 if (pause_counter == 0)
2221 {
2222 irsnd_off ();
2223 }
2224 pause_counter++;
2225 }
2226 else
2227 {
2228 current_bit++;
2229
2230 if (current_bit >= complete_data_len + has_stop_bit)
2231 {
2232 current_bit = 0xFF;
2233 auto_repetition_counter++;
2234
2235 if (auto_repetition_counter == n_auto_repetitions)
2236 {
2237 irsnd_busy = FALSE;
2238 auto_repetition_counter = 0;
2239 }
2240 new_frame = TRUE;
2241 }
2242
2243 pulse_counter = 0;
2244 pause_counter = 0;
2245 }
2246 break;
2247 }
2248 #endif
2249
2250 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2251 case IRMP_RC5_PROTOCOL:
2252 #endif
2253 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2254 case IRMP_RC6_PROTOCOL:
2255 #endif
2256 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2257 case IRMP_RC6A_PROTOCOL:
2258 #endif
2259 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2260 case IRMP_SIEMENS_PROTOCOL:
2261 #endif
2262 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2263 case IRMP_RUWIDO_PROTOCOL:
2264 #endif
2265 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2266 case IRMP_GRUNDIG_PROTOCOL:
2267 #endif
2268 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2269 case IRMP_IR60_PROTOCOL:
2270 #endif
2271 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2272 case IRMP_NOKIA_PROTOCOL:
2273 #endif
2274 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2275 case IRMP_A1TVBOX_PROTOCOL:
2276 #endif
2277
2278 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2279 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2280 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2281 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2282 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2283 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2284 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2285 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2286 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2287 {
2288 if (pulse_counter == pulse_len && pause_counter == pause_len)
2289 {
2290 current_bit++;
2291
2292 if (current_bit >= complete_data_len)
2293 {
2294 current_bit = 0xFF;
2295
2296 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2297 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2298 {
2299 auto_repetition_counter++;
2300
2301 if (repeat_counter > 0)
2302 { // set 117 msec pause time
2303 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2304 }
2305
2306 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2307 {
2308 n_auto_repetitions++; // increment number of auto repetitions
2309 repeat_counter++;
2310 }
2311 else if (auto_repetition_counter == n_auto_repetitions)
2312 {
2313 irsnd_busy = FALSE;
2314 auto_repetition_counter = 0;
2315 }
2316 }
2317 else
2318 #endif
2319 {
2320 irsnd_busy = FALSE;
2321 }
2322
2323 new_frame = TRUE;
2324 irsnd_off ();
2325 }
2326
2327 pulse_counter = 0;
2328 pause_counter = 0;
2329 }
2330
2331 if (! new_frame)
2332 {
2333 uint8_t first_pulse;
2334
2335 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2336 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2337 {
2338 if (current_bit == 0xFF || // start bit of start-frame
2339 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2340 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2341 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2342 {
2343 pulse_len = startbit_pulse_len;
2344 pause_len = startbit_pause_len;
2345 first_pulse = TRUE;
2346 }
2347 else // send n'th bit
2348 {
2349 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2350 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2351 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2352 }
2353 }
2354 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2355 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2356 #endif
2357 {
2358 if (current_bit == 0xFF) // 1 start bit
2359 {
2360 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2361 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2362 {
2363 pulse_len = startbit_pulse_len;
2364 pause_len = startbit_pause_len;
2365 }
2366 else
2367 #endif
2368 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2369 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2370 {
2371 current_bit = 0;
2372 }
2373 else
2374 #endif
2375 {
2376 ;
2377 }
2378
2379 first_pulse = TRUE;
2380 }
2381 else // send n'th bit
2382 {
2383 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2384 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2385 {
2386 pulse_len = RC6_BIT_LEN;
2387 pause_len = RC6_BIT_LEN;
2388
2389 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2390 {
2391 if (current_bit == 4) // toggle bit (double len)
2392 {
2393 pulse_len = 2 * RC6_BIT_LEN;
2394 pause_len = 2 * RC6_BIT_LEN;
2395 }
2396 }
2397 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2398 {
2399 if (current_bit == 4) // toggle bit (double len)
2400 {
2401 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2402 pause_len = 2 * RC6_BIT_LEN;
2403 }
2404 else if (current_bit == 5) // toggle bit (double len)
2405 {
2406 pause_len = 2 * RC6_BIT_LEN;
2407 }
2408 }
2409 }
2410 #endif
2411 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2412 }
2413
2414 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2415 {
2416 first_pulse = first_pulse ? FALSE : TRUE;
2417 }
2418 }
2419
2420 if (first_pulse)
2421 {
2422 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2423
2424 if (pulse_counter < pulse_len)
2425 {
2426 if (pulse_counter == 0)
2427 {
2428 irsnd_on ();
2429 }
2430 pulse_counter++;
2431 }
2432 else // if (pause_counter < pause_len)
2433 {
2434 if (pause_counter == 0)
2435 {
2436 irsnd_off ();
2437 }
2438 pause_counter++;
2439 }
2440 }
2441 else
2442 {
2443 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2444
2445 if (pause_counter < pause_len)
2446 {
2447 if (pause_counter == 0)
2448 {
2449 irsnd_off ();
2450 }
2451 pause_counter++;
2452 }
2453 else // if (pulse_counter < pulse_len)
2454 {
2455 if (pulse_counter == 0)
2456 {
2457 irsnd_on ();
2458 }
2459 pulse_counter++;
2460 }
2461 }
2462 }
2463 break;
2464 }
2465 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2466 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2467
2468 default:
2469 {
2470 irsnd_busy = FALSE;
2471 break;
2472 }
2473 }
2474 }
2475
2476 if (! irsnd_busy)
2477 {
2478 if (repeat_counter < n_repeat_frames)
2479 {
2480 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2481 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2482 {
2483 irsnd_buffer[2] |= 0x0F;
2484 }
2485 #endif
2486 repeat_counter++;
2487 irsnd_busy = TRUE;
2488 }
2489 else
2490 {
2491 irsnd_busy = TRUE; //Rainer
2492 send_trailer = TRUE;
2493 n_repeat_frames = 0;
2494 repeat_counter = 0;
2495 }
2496 }
2497 }
2498
2499 #ifdef ANALYZE
2500 if (irsnd_is_on)
2501 {
2502 putchar ('0');
2503 }
2504 else
2505 {
2506 putchar ('1');
2507 }
2508 #endif
2509
2510 return irsnd_busy;
2511 }
2512
2513 #ifdef ANALYZE
2514
2515 // main function - for unix/linux + windows only!
2516 // AVR: see main.c!
2517 // Compile it under linux with:
2518 // cc irsnd.c -o irsnd
2519 //
2520 // usage: ./irsnd protocol hex-address hex-command >filename
2521
2522 int
2523 main (int argc, char ** argv)
2524 {
2525 int protocol;
2526 int address;
2527 int command;
2528 IRMP_DATA irmp_data;
2529
2530 if (argc != 4 && argc != 5)
2531 {
2532 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2533 return 1;
2534 }
2535
2536 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2537 sscanf (argv[2], "%x", &address) == 1 &&
2538 sscanf (argv[3], "%x", &command) == 1)
2539 {
2540 irmp_data.protocol = protocol;
2541 irmp_data.address = address;
2542 irmp_data.command = command;
2543
2544 if (argc == 5)
2545 {
2546 irmp_data.flags = atoi (argv[4]);
2547 }
2548 else
2549 {
2550 irmp_data.flags = 0;
2551 }
2552
2553 irsnd_init ();
2554
2555 (void) irsnd_send_data (&irmp_data, TRUE);
2556
2557 while (irsnd_busy)
2558 {
2559 irsnd_ISR ();
2560 }
2561
2562 putchar ('\n');
2563
2564 #if 1 // enable here to send twice
2565 (void) irsnd_send_data (&irmp_data, TRUE);
2566
2567 while (irsnd_busy)
2568 {
2569 irsnd_ISR ();
2570 }
2571
2572 putchar ('\n');
2573 #endif
2574 }
2575 else
2576 {
2577 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2578 return 1;
2579 }
2580 return 0;
2581 }
2582
2583 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)