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Version 2.8.0: port to AVR XMEGA
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported AVR mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.84 2015/02/26 15:42:53 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46
47 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
48 # if IRSND_OCx == IRSND_OC0A // OC0A
49 # define IRSND_PORT_LETTER B
50 # define IRSND_BIT_NUMBER 0
51 # elif IRSND_OCx == IRSND_OC0B // OC0B
52 # define IRSND_PORT_LETTER B
53 # define IRSND_BIT_NUMBER 1
54 # else
55 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
56 # endif // IRSND_OCx
57
58 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
59 # if IRSND_OCx == IRSND_OC0A // OC0A
60 # define IRSND_PORT_LETTER A
61 # define IRSND_BIT_NUMBER 2
62 # else
63 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
64 # endif // IRSND_OCx
65
66 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
67 # if IRSND_OCx == IRSND_OC2 // OC0A
68 # define IRSND_PORT_LETTER B
69 # define IRSND_BIT_NUMBER 3
70 # else
71 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
72 # endif // IRSND_OCx
73 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
74 # if IRSND_OCx == IRSND_OC2 // OC2
75 # define IRSND_PORT_LETTER D
76 # define IRSND_BIT_NUMBER 7
77 # else
78 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
79 # endif // IRSND_OCx
80
81 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
82 # if IRSND_OCx == IRSND_OC2 // OC2
83 # define IRSND_PORT_LETTER B
84 # define IRSND_BIT_NUMBER 1
85 # elif IRSND_OCx == IRSND_OC0 // OC0
86 # define IRSND_PORT_LETTER B
87 # define IRSND_BIT_NUMBER 0
88 # else
89 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
90 # endif // IRSND_OCx
91
92 #elif defined (__AVR_ATmega164__) \
93 || defined (__AVR_ATmega324__) \
94 || defined (__AVR_ATmega644__) \
95 || defined (__AVR_ATmega644P__) \
96 || defined (__AVR_ATmega1284__) \
97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
98 # if IRSND_OCx == IRSND_OC2A // OC2A
99 # define IRSND_PORT_LETTER D
100 # define IRSND_BIT_NUMBER 7
101 # elif IRSND_OCx == IRSND_OC2B // OC2B
102 # define IRSND_PORT_LETTER D
103 # define IRSND_BIT_NUMBER 6
104 # elif IRSND_OCx == IRSND_OC0A // OC0A
105 # define IRSND_PORT_LETTER B
106 # define IRSND_BIT_NUMBER 3
107 # elif IRSND_OCx == IRSND_OC0B // OC0B
108 # define IRSND_PORT_LETTER B
109 # define IRSND_BIT_NUMBER 4
110 # else
111 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
112 # endif // IRSND_OCx
113
114 #elif defined (__AVR_ATmega48__) \
115 || defined (__AVR_ATmega88__) \
116 || defined (__AVR_ATmega88P__) \
117 || defined (__AVR_ATmega168__) \
118 || defined (__AVR_ATmega168P__) \
119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
120 # if IRSND_OCx == IRSND_OC2A // OC2A
121 # define IRSND_PORT_LETTER B
122 # define IRSND_BIT_NUMBER 3
123 # elif IRSND_OCx == IRSND_OC2B // OC2B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 3
126 # elif IRSND_OCx == IRSND_OC0A // OC0A
127 # define IRSND_PORT_LETTER D
128 # define IRSND_BIT_NUMBER 6
129 # elif IRSND_OCx == IRSND_OC0B // OC0B
130 # define IRSND_PORT_LETTER D
131 # define IRSND_BIT_NUMBER 5
132 # else
133 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
134 # endif // IRSND_OCx
135
136 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
137 # if IRSND_OCx == IRSND_OC0
138 # define IRSND_PORT_LETTER B
139 # define IRSND_BIT_NUMBER 0
140 # elif IRSND_OCx == IRSND_OC1A
141 # define IRSND_PORT_LETTER D
142 # define IRSND_BIT_NUMBER 5
143 # elif IRSND_OCx == IRSND_OC1B
144 # define IRSND_PORT_LETTER E
145 # define IRSND_BIT_NUMBER 2
146 # endif // IRSND_OCx
147
148 #elif defined (__AVR_ATxmega128A1U__) // ATxmega128A1U
149 # if (XMEGA_Timer_NR == 1)
150 # define IRSND_PORT_PRE PORTC
151 # elif (XMEGA_Timer_NR == 2)
152 # define IRSND_PORT_PRE PORTD
153 # elif (XMEGA_Timer_NR == 3)
154 # define IRSND_PORT_PRE PORTE
155 # elif (XMEGA_Timer_NR == 4)
156 # define IRSND_PORT_PRE PORTF
157 # else
158 # warning wrong XMEGA_Timer_NR, choose correct value in irsndconfig.h
159 # endif
160 # if IRSND_OCx == IRSND_XMEGA_OC0A
161 # define IRSND_BIT_NUMBER 0
162 # elif IRSND_OCx == IRSND_XMEGA_OC0B
163 # define IRSND_BIT_NUMBER 1
164 # elif IRSND_OCx == IRSND_XMEGA_OC0C
165 # define IRSND_BIT_NUMBER 2
166 # elif IRSND_OCx == IRSND_XMEGA_OC0D
167 # define IRSND_BIT_NUMBER 3
168 # elif IRSND_OCx == IRSND_XMEGA_OC1A
169 # define IRSND_BIT_NUMBER 4
170 # elif IRSND_OCx == IRSND_XMEGA_OC1B
171 # define IRSND_BIT_NUMBER 5
172 # else
173 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
174 # endif // IRSND_OCx
175
176 #elif defined (PIC_C18) //Microchip C18 compiler
177 //Nothing here to do here -> See irsndconfig.h
178 #elif defined (ARM_STM32) //STM32
179 //Nothing here to do here -> See irsndconfig.h
180 #else
181 # if !defined (unix) && !defined (WIN32)
182 # error mikrocontroller not defined, please fill in definitions here.
183 # endif // unix, WIN32
184 #endif // __AVR...
185
186 #if defined(__AVR_XMEGA__)
187 # define _CONCAT(a,b) a##b
188 # define CONCAT(a,b) _CONCAT(a,b)
189 # define IRSND_PORT IRSND_PORT_PRE.OUT
190 # define IRSND_DDR IRSND_DDR_PRE.DIR
191 # define IRSND_PIN IRSND_PIN_PRE.IN
192 # define IRSND_BIT IRSND_BIT_NUMBER
193
194 #elif defined(ATMEL_AVR)
195 # define _CONCAT(a,b) a##b
196 # define CONCAT(a,b) _CONCAT(a,b)
197 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
198 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
199 # define IRSND_BIT IRSND_BIT_NUMBER
200 #endif
201
202 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
203 typedef uint16_t IRSND_PAUSE_LEN;
204 #else
205 typedef uint8_t IRSND_PAUSE_LEN;
206 #endif
207
208 /*---------------------------------------------------------------------------------------------------------------------------------------------------
209 * IR timings
210 *---------------------------------------------------------------------------------------------------------------------------------------------------
211 */
212 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
213 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
214 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
215 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
216 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
217 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
218 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
219
220 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
221 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
222 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
223 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
224 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
225 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
226 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
227
228 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
229 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
230 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
231 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
232 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
233 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
234
235 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
236 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
237
238 #define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
239 #define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
240
241 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
242 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
243 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
244 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
245 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
246 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
247
248 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
249 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
250 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
251 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
252 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
253 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
254 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
255
256 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
257 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
258 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
259 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
260 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
261 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
262
263 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
264 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
265 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
266
267 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
268 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
269 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
270 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
271 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
272
273 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
274 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
275 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
276 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
277 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
278
279 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
280 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
281 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
282 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
283 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
284
285 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
286 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
287 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
288 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
289 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
290 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
291
292 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
293 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
294 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
295 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
296 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
297 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
298 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
299
300 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
301 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
302 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
303 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
304 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
305 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
306 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
307 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
308
309 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
310 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
311 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
312 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
313 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
314 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
315 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
316 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
317
318 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
319 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
320 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
321 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
322 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
323 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
324 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
325 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
326 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
327 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
328 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
329 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
330
331 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
332 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
333 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
334 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
335 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
336
337 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
338
339 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
340 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
341 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
342
343 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
344 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
345 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
346 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
347 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
348
349 #ifdef PIC_C18 // PIC C18
350 # define IRSND_FREQ_TYPE uint8_t
351 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
352 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
353 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
354 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
355 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
356 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
357 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
358 #elif defined (ARM_STM32) // STM32
359 # define IRSND_FREQ_TYPE uint32_t
360 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
361 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
362 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
363 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
364 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
365 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
366 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
367 #else // AVR
368 # if F_CPU >= 16000000L
369 # define AVR_PRESCALER 8
370 # else
371 # define AVR_PRESCALER 1
372 # endif
373 # define IRSND_FREQ_TYPE uint8_t
374 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
375 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
376 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
377 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
378 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
379 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
380 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
381 #endif
382
383 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
384 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
385 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
386 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
387 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
388 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
389
390 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
391 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
392 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
393 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
394 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
395 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
396
397 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
398 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
399 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
400 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
401 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
402 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
403 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
404
405 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
406 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
407 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
408 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
409 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
410 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
411 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
412
413 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
414 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
415 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
416 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
417 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
418 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
419 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
420
421 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
422 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
423 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
424 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
425 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
426 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
427
428 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
429 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
430 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
431 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
432 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
433 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
434 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
435
436 static volatile uint8_t irsnd_busy = 0;
437 static volatile uint8_t irsnd_protocol = 0;
438 static volatile uint8_t irsnd_buffer[6] = {0};
439 static volatile uint8_t irsnd_repeat = 0;
440 static volatile uint8_t irsnd_is_on = FALSE;
441
442 #if IRSND_USE_CALLBACK == 1
443 static void (*irsnd_callback_ptr) (uint8_t);
444 #endif // IRSND_USE_CALLBACK == 1
445
446 /*---------------------------------------------------------------------------------------------------------------------------------------------------
447 * Switch PWM on
448 *---------------------------------------------------------------------------------------------------------------------------------------------------
449 */
450 static void
451 irsnd_on (void)
452 {
453 if (! irsnd_is_on)
454 {
455 #ifndef ANALYZE
456 # if defined(PIC_C18) // PIC C18
457 PWMon();
458 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
459
460 # elif defined (ARM_STM32) // STM32
461 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
462 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
463 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
464
465 # elif defined (__AVR_XMEGA__)
466 # if ( (IRSND_OCx == IRSND_XMEGA_OC0A) | (IRSND_OCx == IRSND_XMEGA_OC1A) ) // use OC0A or OC1A
467 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A
468 # elif ((IRSND_OCx == IRSND_XMEGA_OC0B) | (IRSND_OCx == IRSND_XMEGA_OC1B) ) // use OC0B or OC1B
469 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B
470 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
471 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C
472 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
473 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D
474 # else
475 # error wrong value of IRSND_OCx
476 # endif // IRSND_OCx
477
478 # else // AVR
479 # if IRSND_OCx == IRSND_OC2 // use OC2
480 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
481 # elif IRSND_OCx == IRSND_OC2A // use OC2A
482 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
483 # elif IRSND_OCx == IRSND_OC2B // use OC2B
484 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
485 # elif IRSND_OCx == IRSND_OC0 // use OC0
486 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
487 # elif IRSND_OCx == IRSND_OC0A // use OC0A
488 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
489 # elif IRSND_OCx == IRSND_OC0B // use OC0B
490 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
491 # else
492 # error wrong value of IRSND_OCx
493 # endif // IRSND_OCx
494 # endif // C18
495 #endif // ANALYZE
496
497 #if IRSND_USE_CALLBACK == 1
498 if (irsnd_callback_ptr)
499 {
500 (*irsnd_callback_ptr) (TRUE);
501 }
502 #endif // IRSND_USE_CALLBACK == 1
503
504 irsnd_is_on = TRUE;
505 }
506 }
507
508 /*---------------------------------------------------------------------------------------------------------------------------------------------------
509 * Switch PWM off
510 * @details Switches PWM off
511 *---------------------------------------------------------------------------------------------------------------------------------------------------
512 */
513 static void
514 irsnd_off (void)
515 {
516 if (irsnd_is_on)
517 {
518 #ifndef ANALYZE
519
520 # if defined(PIC_C18) // PIC C18
521 PWMoff();
522 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
523
524 # elif defined (ARM_STM32) // STM32
525 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
526 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
527 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
528 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
529
530 # elif defined (__AVR_XMEGA__)
531 # if ( (IRSND_OCx == IRSND_XMEGA_OC0A) | (IRSND_OCx == IRSND_XMEGA_OC1A) ) // use OC0A or OC1A
532 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected
533 # elif ((IRSND_OCx == IRSND_XMEGA_OC0B) | (IRSND_OCx == IRSND_XMEGA_OC1B) ) // use OC0B or OC1B
534 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected
535 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
536 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected
537 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
538 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected
539 # else
540 # error wrong value of IRSND_OCx
541 # endif // IRSND_OCx
542
543 # else //AVR
544
545 # if IRSND_OCx == IRSND_OC2 // use OC2
546 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
547 # elif IRSND_OCx == IRSND_OC2A // use OC2A
548 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
549 # elif IRSND_OCx == IRSND_OC2B // use OC2B
550 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
551 # elif IRSND_OCx == IRSND_OC0 // use OC0
552 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
553 # elif IRSND_OCx == IRSND_OC0A // use OC0A
554 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
555 # elif IRSND_OCx == IRSND_OC0B // use OC0B
556 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
557 # else
558 # error wrong value of IRSND_OCx
559 # endif // IRSND_OCx
560 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
561 # endif //C18
562 #endif // ANALYZE
563
564 #if IRSND_USE_CALLBACK == 1
565 if (irsnd_callback_ptr)
566 {
567 (*irsnd_callback_ptr) (FALSE);
568 }
569 #endif // IRSND_USE_CALLBACK == 1
570
571 irsnd_is_on = FALSE;
572 }
573 }
574
575 /*---------------------------------------------------------------------------------------------------------------------------------------------------
576 * Set PWM frequency
577 * @details sets pwm frequency
578 *---------------------------------------------------------------------------------------------------------------------------------------------------
579 */
580 #if defined(__12F1840)
581 extern void pwm_init(uint16_t freq);
582 #include <stdio.h>
583 #endif
584
585 static void
586 irsnd_set_freq (IRSND_FREQ_TYPE freq)
587 {
588 #ifndef ANALYZE
589 # if defined(PIC_C18) // PIC C18 or XC8
590 # if defined(__12F1840) // XC8
591 TRISA2=0;
592 PR2=freq;
593 CCP1M0=1;
594 CCP1M1=1;
595 CCP1M2=1;
596 CCP1M3=1;
597 DC1B0=1;
598 DC1B1=0;
599 CCPR1L = 0b01101001;
600 TMR2IF = 0;
601 TMR2ON=1;
602 CCP1CON &=(~0b0011); // p 197 "active high"
603 # else // PIC C18
604 OpenPWM(freq);
605 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
606 # endif
607 PWMoff();
608 # elif defined (ARM_STM32) // STM32
609 static uint32_t TimeBaseFreq = 0;
610
611 if (TimeBaseFreq == 0)
612 {
613 RCC_ClocksTypeDef RCC_ClocksStructure;
614 /* Get system clocks and store timer clock in variable */
615 RCC_GetClocksFreq(&RCC_ClocksStructure);
616 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
617 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
618 {
619 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
620 }
621 else
622 {
623 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
624 }
625 # else
626 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
627 {
628 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
629 }
630 else
631 {
632 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
633 }
634 # endif
635 }
636
637 freq = TimeBaseFreq/freq;
638
639 /* Set frequency */
640 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
641 /* Set duty cycle */
642 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
643
644 # elif defined (__AVR_XMEGA__)
645 XMEGA_Timer.CCA = freq;
646
647 # else // AVR
648
649 # if IRSND_OCx == IRSND_OC2
650 OCR2 = freq; // use register OCR2 for OC2
651 # elif IRSND_OCx == IRSND_OC2A // use OC2A
652 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
653 # elif IRSND_OCx == IRSND_OC2B // use OC2B
654 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
655 # elif IRSND_OCx == IRSND_OC0 // use OC0
656 OCR0 = freq; // use register OCR2 for OC2
657 # elif IRSND_OCx == IRSND_OC0A // use OC0A
658 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
659 # elif IRSND_OCx == IRSND_OC0B // use OC0B
660 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
661 # else
662 # error wrong value of IRSND_OCx
663 # endif
664 # endif //PIC_C18
665 #endif // ANALYZE
666 }
667
668 /*---------------------------------------------------------------------------------------------------------------------------------------------------
669 * Initialize the PWM
670 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
671 *---------------------------------------------------------------------------------------------------------------------------------------------------
672 */
673 void
674 irsnd_init (void)
675 {
676 #ifndef ANALYZE
677 # if defined(PIC_C18) // PIC C18 or XC8 compiler
678 # if ! defined(__12F1840) // only C18:
679 OpenTimer;
680 # endif
681 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
682 IRSND_PIN = 0; // set IO to outout
683 PWMoff();
684 # elif defined (ARM_STM32) // STM32
685 GPIO_InitTypeDef GPIO_InitStructure;
686 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
687 TIM_OCInitTypeDef TIM_OCInitStructure;
688
689 /* GPIOx clock enable */
690 # if defined (ARM_STM32L1XX)
691 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
692 # elif defined (ARM_STM32F10X)
693 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
694 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping
695 # elif defined (ARM_STM32F4XX)
696 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
697 # endif
698
699 /* GPIO Configuration */
700 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
701 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
702 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
703 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
704 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
705 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
706 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
707 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
708 # elif defined (ARM_STM32F10X)
709 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
710 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
711 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
712 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping
713 # endif
714
715 /* TIMx clock enable */
716 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
717 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
718 # else
719 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
720 # endif
721
722 /* Time base configuration */
723 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
724 TIM_TimeBaseStructure.TIM_Prescaler = 0;
725 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
726 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
727 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
728
729 /* PWM1 Mode configuration */
730 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
731 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
732 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
733 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
734 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
735
736 /* Preload configuration */
737 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
738 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
739
740 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
741 # else // AVR
742 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
743 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
744
745 # if IRSND_OCx == IRSND_OC2 // use OC2
746 TCCR2 = (1<<WGM21); // CTC mode
747 # if AVR_PRESCALER == 8
748 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
749 # else
750 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
751 # endif
752 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
753 TCCR2A = (1<<WGM21); // CTC mode
754 # if AVR_PRESCALER == 8
755 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
756 # else
757 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
758 # endif
759 # elif IRSND_OCx == IRSND_OC0 // use OC0
760 TCCR0 = (1<<WGM01); // CTC mode
761 # if AVR_PRESCALER == 8
762 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
763 # else
764 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
765 # endif
766 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
767 TCCR0A = (1<<WGM01); // CTC mode
768 # if AVR_PRESCALER == 8
769 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
770 # else
771 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
772 # endif
773 # else
774 # error wrong value of IRSND_OCx
775 # endif
776 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
777 # endif //PIC_C18
778 #endif // ANALYZE
779 }
780
781 #if IRSND_USE_CALLBACK == 1
782 void
783 irsnd_set_callback_ptr (void (*cb)(uint8_t))
784 {
785 irsnd_callback_ptr = cb;
786 }
787 #endif // IRSND_USE_CALLBACK == 1
788
789 uint8_t
790 irsnd_is_busy (void)
791 {
792 return irsnd_busy;
793 }
794
795 static uint16_t
796 bitsrevervse (uint16_t x, uint8_t len)
797 {
798 uint16_t xx = 0;
799
800 while(len)
801 {
802 xx <<= 1;
803 if (x & 1)
804 {
805 xx |= 1;
806 }
807 x >>= 1;
808 len--;
809 }
810 return xx;
811 }
812
813
814 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
815 static uint8_t sircs_additional_bitlen;
816 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
817
818 uint8_t
819 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
820 {
821 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
822 static uint8_t toggle_bit_recs80;
823 #endif
824 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
825 static uint8_t toggle_bit_recs80ext;
826 #endif
827 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
828 static uint8_t toggle_bit_rc5;
829 #endif
830 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
831 static uint8_t toggle_bit_rc6;
832 #endif
833 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
834 static uint8_t toggle_bit_thomson;
835 #endif
836 uint16_t address;
837 uint16_t command;
838
839 if (do_wait)
840 {
841 while (irsnd_busy)
842 {
843 // do nothing;
844 }
845 }
846 else if (irsnd_busy)
847 {
848 return (FALSE);
849 }
850
851 irsnd_protocol = irmp_data_p->protocol;
852 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
853
854 switch (irsnd_protocol)
855 {
856 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
857 case IRMP_SIRCS_PROTOCOL:
858 {
859 // uint8_t sircs_additional_command_len;
860 uint8_t sircs_additional_address_len;
861
862 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
863
864 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
865 {
866 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
867 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
868 }
869 else
870 {
871 // sircs_additional_command_len = sircs_additional_bitlen;
872 sircs_additional_address_len = 0;
873 }
874
875 command = bitsrevervse (irmp_data_p->command, 15);
876
877 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
878 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
879
880 if (sircs_additional_address_len > 0)
881 {
882 address = bitsrevervse (irmp_data_p->address, 5);
883 irsnd_buffer[1] |= (address & 0x0010) >> 4;
884 irsnd_buffer[2] = (address & 0x000F) << 4;
885 }
886 irsnd_busy = TRUE;
887 break;
888 }
889 #endif
890 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
891 case IRMP_APPLE_PROTOCOL:
892 {
893 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
894 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
895
896 address = bitsrevervse (address, NEC_ADDRESS_LEN);
897 command = bitsrevervse (command, NEC_COMMAND_LEN);
898
899 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
900
901 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
902 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
903 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
904 irsnd_buffer[3] = 0x8B; // 10001011 (id)
905 irsnd_busy = TRUE;
906 break;
907 }
908 case IRMP_NEC_PROTOCOL:
909 {
910 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
911 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
912
913 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
914 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
915 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
916 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
917 irsnd_busy = TRUE;
918 break;
919 }
920 #endif
921 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
922 case IRMP_NEC16_PROTOCOL:
923 {
924 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
925 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
926
927 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
928 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
929 irsnd_busy = TRUE;
930 break;
931 }
932 #endif
933 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
934 case IRMP_NEC42_PROTOCOL:
935 {
936 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
937 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
938
939 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
940 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
941 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
942 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
943 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
944 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
945 irsnd_busy = TRUE;
946 break;
947 }
948 #endif
949 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
950 case IRMP_LGAIR_PROTOCOL:
951 {
952 address = irmp_data_p->address;
953 command = irmp_data_p->command;
954
955 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
956 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
957 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
958 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
959 ((command & 0x0F00) >> 8) +
960 ((command & 0x00F0) >>4 ) +
961 ((command & 0x000F))) & 0x000F) << 4;
962 irsnd_busy = TRUE;
963 break;
964 }
965 #endif
966 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
967 case IRMP_SAMSUNG_PROTOCOL:
968 {
969 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
970 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
971
972 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
973 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
974 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
975 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
976 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
977 irsnd_busy = TRUE;
978 break;
979 }
980 case IRMP_SAMSUNG32_PROTOCOL:
981 {
982 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
983 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
984
985 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
986 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
987 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
988 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
989 irsnd_busy = TRUE;
990 break;
991 }
992 #endif
993 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
994 case IRMP_SAMSUNG48_PROTOCOL:
995 {
996 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
997 command = bitsrevervse (irmp_data_p->command, 16);
998
999 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1000 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1001 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC
1002 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
1003 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC
1004 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc
1005 irsnd_busy = TRUE;
1006 break;
1007 }
1008 #endif
1009 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1010 case IRMP_MATSUSHITA_PROTOCOL:
1011 {
1012 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
1013 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
1014
1015 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
1016 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
1017 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
1018 irsnd_busy = TRUE;
1019 break;
1020 }
1021 #endif
1022 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1023 case IRMP_KASEIKYO_PROTOCOL:
1024 {
1025 uint8_t xor_value;
1026 uint16_t genre2;
1027
1028 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
1029 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
1030 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
1031
1032 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
1033
1034 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1035 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1036 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
1037 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
1038 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
1039
1040 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
1041
1042 irsnd_buffer[5] = xor_value;
1043 irsnd_busy = TRUE;
1044 break;
1045 }
1046 #endif
1047 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1048 case IRMP_RECS80_PROTOCOL:
1049 {
1050 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
1051
1052 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
1053 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
1054 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
1055 irsnd_busy = TRUE;
1056 break;
1057 }
1058 #endif
1059 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1060 case IRMP_RECS80EXT_PROTOCOL:
1061 {
1062 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
1063
1064 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
1065 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
1066 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
1067 irsnd_busy = TRUE;
1068 break;
1069 }
1070 #endif
1071 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1072 case IRMP_RC5_PROTOCOL:
1073 {
1074 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
1075
1076 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
1077 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
1078 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
1079 irsnd_busy = TRUE;
1080 break;
1081 }
1082 #endif
1083 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1084 case IRMP_RC6_PROTOCOL:
1085 {
1086 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1087
1088 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
1089 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
1090 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
1091 irsnd_busy = TRUE;
1092 break;
1093 }
1094 #endif
1095 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1096 case IRMP_RC6A_PROTOCOL:
1097 {
1098 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1099
1100 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
1101 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
1102 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
1103 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1104 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
1105 irsnd_busy = TRUE;
1106 break;
1107 }
1108 #endif
1109 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1110 case IRMP_DENON_PROTOCOL:
1111 {
1112 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
1113 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
1114 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
1115 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
1116 irsnd_busy = TRUE;
1117 break;
1118 }
1119 #endif
1120 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1121 case IRMP_THOMSON_PROTOCOL:
1122 {
1123 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1124
1125 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1126 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1127 irsnd_busy = TRUE;
1128 break;
1129 }
1130 #endif
1131 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1132 case IRMP_NUBERT_PROTOCOL:
1133 {
1134 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1135 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1136 irsnd_busy = TRUE;
1137 break;
1138 }
1139 #endif
1140 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1141 case IRMP_SPEAKER_PROTOCOL:
1142 {
1143 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1144 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1145 irsnd_busy = TRUE;
1146 break;
1147 }
1148 #endif
1149 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1150 case IRMP_BANG_OLUFSEN_PROTOCOL:
1151 {
1152 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1153 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1154 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1155 irsnd_busy = TRUE;
1156 break;
1157 }
1158 #endif
1159 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1160 case IRMP_GRUNDIG_PROTOCOL:
1161 {
1162 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1163
1164 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1165 irsnd_buffer[1] = 0xC0; // 11
1166 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1167 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1168
1169 irsnd_busy = TRUE;
1170 break;
1171 }
1172 #endif
1173 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1174 case IRMP_TELEFUNKEN_PROTOCOL:
1175 {
1176 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1177 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1178
1179 irsnd_busy = TRUE;
1180 break;
1181 }
1182 #endif
1183 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1184 case IRMP_IR60_PROTOCOL:
1185 {
1186 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1187 #if 0
1188 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1189 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1190 #else
1191 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1192 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1193 #endif
1194
1195 irsnd_busy = TRUE;
1196 break;
1197 }
1198 #endif
1199 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1200 case IRMP_NOKIA_PROTOCOL:
1201 {
1202 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1203 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1204
1205 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1206 irsnd_buffer[1] = 0xFF; // 11111111
1207 irsnd_buffer[2] = 0x80; // 1
1208 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1209 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1210 irsnd_buffer[5] = (address << 7); // A
1211
1212 irsnd_busy = TRUE;
1213 break;
1214 }
1215 #endif
1216 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1217 case IRMP_SIEMENS_PROTOCOL:
1218 {
1219 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1220 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1221 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1222
1223 irsnd_busy = TRUE;
1224 break;
1225 }
1226 #endif
1227 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1228 case IRMP_RUWIDO_PROTOCOL:
1229 {
1230 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1231 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1232 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1233 irsnd_busy = TRUE;
1234 break;
1235 }
1236 #endif
1237 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1238 case IRMP_FDC_PROTOCOL:
1239 {
1240 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1241 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1242
1243 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1244 irsnd_buffer[1] = 0; // 00000000
1245 irsnd_buffer[2] = 0; // 0000RRRR
1246 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1247 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1248 irsnd_busy = TRUE;
1249 break;
1250 }
1251 #endif
1252 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1253 case IRMP_RCCAR_PROTOCOL:
1254 {
1255 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1256 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1257
1258 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1259 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1260
1261 irsnd_busy = TRUE;
1262 break;
1263 }
1264 #endif
1265 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1266 case IRMP_JVC_PROTOCOL:
1267 {
1268 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1269 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1270
1271 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1272 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1273
1274 irsnd_busy = TRUE;
1275 break;
1276 }
1277 #endif
1278 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1279 case IRMP_NIKON_PROTOCOL:
1280 {
1281 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1282 irsnd_busy = TRUE;
1283 break;
1284 }
1285 #endif
1286 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1287 case IRMP_LEGO_PROTOCOL:
1288 {
1289 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1290
1291 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1292 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1293 irsnd_busy = TRUE;
1294 break;
1295 }
1296 #endif
1297 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1298 case IRMP_A1TVBOX_PROTOCOL:
1299 {
1300 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1301 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1302 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1303
1304 irsnd_busy = TRUE;
1305 break;
1306 }
1307 #endif
1308 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1309 case IRMP_ROOMBA_PROTOCOL:
1310 {
1311
1312 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1313 irsnd_busy = TRUE;
1314 break;
1315 }
1316 #endif
1317 default:
1318 {
1319 break;
1320 }
1321 }
1322
1323 return irsnd_busy;
1324 }
1325
1326 void
1327 irsnd_stop (void)
1328 {
1329 irsnd_repeat = 0;
1330 }
1331
1332 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1333 * ISR routine
1334 * @details ISR routine, called 10000 times per second
1335 *---------------------------------------------------------------------------------------------------------------------------------------------------
1336 */
1337 uint8_t
1338 irsnd_ISR (void)
1339 {
1340 static uint8_t send_trailer = FALSE;
1341 static uint8_t current_bit = 0xFF;
1342 static uint8_t pulse_counter = 0;
1343 static IRSND_PAUSE_LEN pause_counter = 0;
1344 static uint8_t startbit_pulse_len = 0;
1345 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1346 static uint8_t pulse_1_len = 0;
1347 static uint8_t pause_1_len = 0;
1348 static uint8_t pulse_0_len = 0;
1349 static uint8_t pause_0_len = 0;
1350 static uint8_t has_stop_bit = 0;
1351 static uint8_t new_frame = TRUE;
1352 static uint8_t complete_data_len = 0;
1353 static uint8_t n_repeat_frames = 0; // number of repetition frames
1354 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1355 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1356 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1357 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1358 static uint8_t repeat_counter = 0; // repeat counter
1359 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1360 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1361 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1362 static uint8_t last_bit_value;
1363 #endif
1364 static uint8_t pulse_len = 0xFF;
1365 static IRSND_PAUSE_LEN pause_len = 0xFF;
1366
1367 if (irsnd_busy)
1368 {
1369 if (current_bit == 0xFF && new_frame) // start of transmission...
1370 {
1371 if (auto_repetition_counter > 0)
1372 {
1373 auto_repetition_pause_counter++;
1374
1375 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1376 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1377 {
1378 repeat_frame_pause_len--;
1379 }
1380 #endif
1381
1382 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1383 {
1384 auto_repetition_pause_counter = 0;
1385
1386 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1387 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1388 {
1389 current_bit = 16;
1390 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1391 }
1392 else
1393 #endif
1394 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1395 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1396 {
1397 current_bit = 15;
1398 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1399 }
1400 else
1401 #endif
1402 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1403 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1404 {
1405 current_bit = 7;
1406 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1407 }
1408 else
1409 #endif
1410 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1411 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1412 {
1413 if (auto_repetition_counter + 1 < n_auto_repetitions)
1414 {
1415 current_bit = 23;
1416 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1417 }
1418 else // nokia stop frame
1419 {
1420 current_bit = 0xFF;
1421 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1422 }
1423 }
1424 else
1425 #endif
1426 {
1427 ;
1428 }
1429 }
1430 else
1431 {
1432 #ifdef ANALYZE
1433 if (irsnd_is_on)
1434 {
1435 putchar ('0');
1436 }
1437 else
1438 {
1439 putchar ('1');
1440 }
1441 #endif
1442 return irsnd_busy;
1443 }
1444 }
1445 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1446 {
1447 packet_repeat_pause_counter++;
1448 #ifdef ANALYZE
1449 if (irsnd_is_on)
1450 {
1451 putchar ('0');
1452 }
1453 else
1454 {
1455 putchar ('1');
1456 }
1457 #endif
1458 return irsnd_busy;
1459 }
1460 else
1461 {
1462 if (send_trailer)
1463 {
1464 irsnd_busy = FALSE;
1465 send_trailer = FALSE;
1466 return irsnd_busy;
1467 }
1468
1469 n_repeat_frames = irsnd_repeat;
1470
1471 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1472 {
1473 n_repeat_frames = 255;
1474 }
1475
1476 packet_repeat_pause_counter = 0;
1477 pulse_counter = 0;
1478 pause_counter = 0;
1479
1480 switch (irsnd_protocol)
1481 {
1482 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1483 case IRMP_SIRCS_PROTOCOL:
1484 {
1485 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1486 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1487 pulse_1_len = SIRCS_1_PULSE_LEN;
1488 pause_1_len = SIRCS_PAUSE_LEN - 1;
1489 pulse_0_len = SIRCS_0_PULSE_LEN;
1490 pause_0_len = SIRCS_PAUSE_LEN - 1;
1491 has_stop_bit = SIRCS_STOP_BIT;
1492 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1493 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1494 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1495 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1496 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1497 break;
1498 }
1499 #endif
1500 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1501 case IRMP_NEC_PROTOCOL:
1502 {
1503 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1504
1505 if (repeat_counter > 0)
1506 {
1507 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1508 complete_data_len = 0;
1509 }
1510 else
1511 {
1512 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1513 complete_data_len = NEC_COMPLETE_DATA_LEN;
1514 }
1515
1516 pulse_1_len = NEC_PULSE_LEN;
1517 pause_1_len = NEC_1_PAUSE_LEN - 1;
1518 pulse_0_len = NEC_PULSE_LEN;
1519 pause_0_len = NEC_0_PAUSE_LEN - 1;
1520 has_stop_bit = NEC_STOP_BIT;
1521 n_auto_repetitions = 1; // 1 frame
1522 auto_repetition_pause_len = 0;
1523 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1524 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1525 break;
1526 }
1527 #endif
1528 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1529 case IRMP_NEC16_PROTOCOL:
1530 {
1531 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1532 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1533 pulse_1_len = NEC_PULSE_LEN;
1534 pause_1_len = NEC_1_PAUSE_LEN - 1;
1535 pulse_0_len = NEC_PULSE_LEN;
1536 pause_0_len = NEC_0_PAUSE_LEN - 1;
1537 has_stop_bit = NEC_STOP_BIT;
1538 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1539 n_auto_repetitions = 1; // 1 frame
1540 auto_repetition_pause_len = 0;
1541 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1542 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1543 break;
1544 }
1545 #endif
1546 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1547 case IRMP_NEC42_PROTOCOL:
1548 {
1549 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1550 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1551 pulse_1_len = NEC_PULSE_LEN;
1552 pause_1_len = NEC_1_PAUSE_LEN - 1;
1553 pulse_0_len = NEC_PULSE_LEN;
1554 pause_0_len = NEC_0_PAUSE_LEN - 1;
1555 has_stop_bit = NEC_STOP_BIT;
1556 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1557 n_auto_repetitions = 1; // 1 frame
1558 auto_repetition_pause_len = 0;
1559 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1560 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1561 break;
1562 }
1563 #endif
1564 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1565 case IRMP_LGAIR_PROTOCOL:
1566 {
1567 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1568 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1569 pulse_1_len = NEC_PULSE_LEN;
1570 pause_1_len = NEC_1_PAUSE_LEN - 1;
1571 pulse_0_len = NEC_PULSE_LEN;
1572 pause_0_len = NEC_0_PAUSE_LEN - 1;
1573 has_stop_bit = NEC_STOP_BIT;
1574 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1575 n_auto_repetitions = 1; // 1 frame
1576 auto_repetition_pause_len = 0;
1577 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1578 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1579 break;
1580 }
1581 #endif
1582 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1583 case IRMP_SAMSUNG_PROTOCOL:
1584 {
1585 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1586 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1587 pulse_1_len = SAMSUNG_PULSE_LEN;
1588 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1589 pulse_0_len = SAMSUNG_PULSE_LEN;
1590 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1591 has_stop_bit = SAMSUNG_STOP_BIT;
1592 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1593 n_auto_repetitions = 1; // 1 frame
1594 auto_repetition_pause_len = 0;
1595 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1596 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1597 break;
1598 }
1599
1600 case IRMP_SAMSUNG32_PROTOCOL:
1601 {
1602 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1603 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1604 pulse_1_len = SAMSUNG_PULSE_LEN;
1605 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1606 pulse_0_len = SAMSUNG_PULSE_LEN;
1607 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1608 has_stop_bit = SAMSUNG_STOP_BIT;
1609 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1610 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame
1611 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1612 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1613 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1614 break;
1615 }
1616 #endif
1617 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1618 case IRMP_SAMSUNG48_PROTOCOL:
1619 {
1620 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1621 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1622 pulse_1_len = SAMSUNG_PULSE_LEN;
1623 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1624 pulse_0_len = SAMSUNG_PULSE_LEN;
1625 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1626 has_stop_bit = SAMSUNG_STOP_BIT;
1627 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;
1628 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame
1629 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1630 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;
1631 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1632 break;
1633 }
1634 #endif
1635 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1636 case IRMP_MATSUSHITA_PROTOCOL:
1637 {
1638 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1639 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1640 pulse_1_len = MATSUSHITA_PULSE_LEN;
1641 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1642 pulse_0_len = MATSUSHITA_PULSE_LEN;
1643 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1644 has_stop_bit = MATSUSHITA_STOP_BIT;
1645 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1646 n_auto_repetitions = 1; // 1 frame
1647 auto_repetition_pause_len = 0;
1648 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1649 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1650 break;
1651 }
1652 #endif
1653 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1654 case IRMP_KASEIKYO_PROTOCOL:
1655 {
1656 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1657 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1658 pulse_1_len = KASEIKYO_PULSE_LEN;
1659 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1660 pulse_0_len = KASEIKYO_PULSE_LEN;
1661 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1662 has_stop_bit = KASEIKYO_STOP_BIT;
1663 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1664 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1665 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1666 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1667 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1668 break;
1669 }
1670 #endif
1671 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1672 case IRMP_RECS80_PROTOCOL:
1673 {
1674 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1675 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1676 pulse_1_len = RECS80_PULSE_LEN;
1677 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1678 pulse_0_len = RECS80_PULSE_LEN;
1679 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1680 has_stop_bit = RECS80_STOP_BIT;
1681 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1682 n_auto_repetitions = 1; // 1 frame
1683 auto_repetition_pause_len = 0;
1684 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1685 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1686 break;
1687 }
1688 #endif
1689 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1690 case IRMP_RECS80EXT_PROTOCOL:
1691 {
1692 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1693 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1694 pulse_1_len = RECS80EXT_PULSE_LEN;
1695 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1696 pulse_0_len = RECS80EXT_PULSE_LEN;
1697 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1698 has_stop_bit = RECS80EXT_STOP_BIT;
1699 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1700 n_auto_repetitions = 1; // 1 frame
1701 auto_repetition_pause_len = 0;
1702 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1703 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1704 break;
1705 }
1706 #endif
1707 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1708 case IRMP_TELEFUNKEN_PROTOCOL:
1709 {
1710 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1711 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1712 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1713 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1714 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1715 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1716 has_stop_bit = TELEFUNKEN_STOP_BIT;
1717 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1718 n_auto_repetitions = 1; // 1 frames
1719 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1720 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1721 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1722 break;
1723 }
1724 #endif
1725 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1726 case IRMP_RC5_PROTOCOL:
1727 {
1728 startbit_pulse_len = RC5_BIT_LEN;
1729 startbit_pause_len = RC5_BIT_LEN;
1730 pulse_len = RC5_BIT_LEN;
1731 pause_len = RC5_BIT_LEN;
1732 has_stop_bit = RC5_STOP_BIT;
1733 complete_data_len = RC5_COMPLETE_DATA_LEN;
1734 n_auto_repetitions = 1; // 1 frame
1735 auto_repetition_pause_len = 0;
1736 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1737 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1738 break;
1739 }
1740 #endif
1741 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1742 case IRMP_RC6_PROTOCOL:
1743 {
1744 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1745 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1746 pulse_len = RC6_BIT_LEN;
1747 pause_len = RC6_BIT_LEN;
1748 has_stop_bit = RC6_STOP_BIT;
1749 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1750 n_auto_repetitions = 1; // 1 frame
1751 auto_repetition_pause_len = 0;
1752 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1753 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1754 break;
1755 }
1756 #endif
1757 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1758 case IRMP_RC6A_PROTOCOL:
1759 {
1760 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1761 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1762 pulse_len = RC6_BIT_LEN;
1763 pause_len = RC6_BIT_LEN;
1764 has_stop_bit = RC6_STOP_BIT;
1765 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1766 n_auto_repetitions = 1; // 1 frame
1767 auto_repetition_pause_len = 0;
1768 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1769 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1770 break;
1771 }
1772 #endif
1773 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1774 case IRMP_DENON_PROTOCOL:
1775 {
1776 startbit_pulse_len = 0x00;
1777 startbit_pause_len = 0x00;
1778 pulse_1_len = DENON_PULSE_LEN;
1779 pause_1_len = DENON_1_PAUSE_LEN - 1;
1780 pulse_0_len = DENON_PULSE_LEN;
1781 pause_0_len = DENON_0_PAUSE_LEN - 1;
1782 has_stop_bit = DENON_STOP_BIT;
1783 complete_data_len = DENON_COMPLETE_DATA_LEN;
1784 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1785 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1786 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1787 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1788 break;
1789 }
1790 #endif
1791 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1792 case IRMP_THOMSON_PROTOCOL:
1793 {
1794 startbit_pulse_len = 0x00;
1795 startbit_pause_len = 0x00;
1796 pulse_1_len = THOMSON_PULSE_LEN;
1797 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1798 pulse_0_len = THOMSON_PULSE_LEN;
1799 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1800 has_stop_bit = THOMSON_STOP_BIT;
1801 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1802 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1803 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1804 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1805 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1806 break;
1807 }
1808 #endif
1809 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1810 case IRMP_NUBERT_PROTOCOL:
1811 {
1812 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1813 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1814 pulse_1_len = NUBERT_1_PULSE_LEN;
1815 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1816 pulse_0_len = NUBERT_0_PULSE_LEN;
1817 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1818 has_stop_bit = NUBERT_STOP_BIT;
1819 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1820 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1821 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1822 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1823 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1824 break;
1825 }
1826 #endif
1827 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1828 case IRMP_SPEAKER_PROTOCOL:
1829 {
1830 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1831 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1832 pulse_1_len = SPEAKER_1_PULSE_LEN;
1833 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1834 pulse_0_len = SPEAKER_0_PULSE_LEN;
1835 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1836 has_stop_bit = SPEAKER_STOP_BIT;
1837 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1838 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1839 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1840 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1841 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1842 break;
1843 }
1844 #endif
1845 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1846 case IRMP_BANG_OLUFSEN_PROTOCOL:
1847 {
1848 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1849 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1850 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1851 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1852 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1853 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1854 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1855 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1856 n_auto_repetitions = 1; // 1 frame
1857 auto_repetition_pause_len = 0;
1858 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1859 last_bit_value = 0;
1860 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1861 break;
1862 }
1863 #endif
1864 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1865 case IRMP_GRUNDIG_PROTOCOL:
1866 {
1867 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1868 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1869 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1870 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1871 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1872 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1873 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1874 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1875 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1876 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1877 break;
1878 }
1879 #endif
1880 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1881 case IRMP_IR60_PROTOCOL:
1882 {
1883 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1884 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1885 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1886 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1887 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1888 complete_data_len = IR60_COMPLETE_DATA_LEN;
1889 n_auto_repetitions = IR60_FRAMES; // 2 frames
1890 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1891 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1892 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1893 break;
1894 }
1895 #endif
1896 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1897 case IRMP_NOKIA_PROTOCOL:
1898 {
1899 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1900 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1901 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1902 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1903 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1904 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1905 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1906 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1907 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1908 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1909 break;
1910 }
1911 #endif
1912 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1913 case IRMP_SIEMENS_PROTOCOL:
1914 {
1915 startbit_pulse_len = SIEMENS_BIT_LEN;
1916 startbit_pause_len = SIEMENS_BIT_LEN;
1917 pulse_len = SIEMENS_BIT_LEN;
1918 pause_len = SIEMENS_BIT_LEN;
1919 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1920 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1921 n_auto_repetitions = 1; // 1 frame
1922 auto_repetition_pause_len = 0;
1923 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1924 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1925 break;
1926 }
1927 #endif
1928 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1929 case IRMP_RUWIDO_PROTOCOL:
1930 {
1931 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1932 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1933 pulse_len = RUWIDO_BIT_PULSE_LEN;
1934 pause_len = RUWIDO_BIT_PAUSE_LEN;
1935 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1936 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1937 n_auto_repetitions = 1; // 1 frame
1938 auto_repetition_pause_len = 0;
1939 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
1940 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1941 break;
1942 }
1943 #endif
1944 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1945 case IRMP_FDC_PROTOCOL:
1946 {
1947 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1948 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1949 complete_data_len = FDC_COMPLETE_DATA_LEN;
1950 pulse_1_len = FDC_PULSE_LEN;
1951 pause_1_len = FDC_1_PAUSE_LEN - 1;
1952 pulse_0_len = FDC_PULSE_LEN;
1953 pause_0_len = FDC_0_PAUSE_LEN - 1;
1954 has_stop_bit = FDC_STOP_BIT;
1955 n_auto_repetitions = 1; // 1 frame
1956 auto_repetition_pause_len = 0;
1957 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1958 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1959 break;
1960 }
1961 #endif
1962 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1963 case IRMP_RCCAR_PROTOCOL:
1964 {
1965 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1966 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1967 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1968 pulse_1_len = RCCAR_PULSE_LEN;
1969 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1970 pulse_0_len = RCCAR_PULSE_LEN;
1971 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1972 has_stop_bit = RCCAR_STOP_BIT;
1973 n_auto_repetitions = 1; // 1 frame
1974 auto_repetition_pause_len = 0;
1975 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1976 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1977 break;
1978 }
1979 #endif
1980 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1981 case IRMP_JVC_PROTOCOL:
1982 {
1983 if (repeat_counter != 0) // skip start bit if repetition frame
1984 {
1985 current_bit = 0;
1986 }
1987
1988 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1989 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1990 complete_data_len = JVC_COMPLETE_DATA_LEN;
1991 pulse_1_len = JVC_PULSE_LEN;
1992 pause_1_len = JVC_1_PAUSE_LEN - 1;
1993 pulse_0_len = JVC_PULSE_LEN;
1994 pause_0_len = JVC_0_PAUSE_LEN - 1;
1995 has_stop_bit = JVC_STOP_BIT;
1996 n_auto_repetitions = 1; // 1 frame
1997 auto_repetition_pause_len = 0;
1998 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1999 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2000 break;
2001 }
2002 #endif
2003 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2004 case IRMP_NIKON_PROTOCOL:
2005 {
2006 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
2007 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
2008 complete_data_len = NIKON_COMPLETE_DATA_LEN;
2009 pulse_1_len = NIKON_PULSE_LEN;
2010 pause_1_len = NIKON_1_PAUSE_LEN - 1;
2011 pulse_0_len = NIKON_PULSE_LEN;
2012 pause_0_len = NIKON_0_PAUSE_LEN - 1;
2013 has_stop_bit = NIKON_STOP_BIT;
2014 n_auto_repetitions = 1; // 1 frame
2015 auto_repetition_pause_len = 0;
2016 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
2017 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2018 break;
2019 }
2020 #endif
2021 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2022 case IRMP_LEGO_PROTOCOL:
2023 {
2024 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
2025 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
2026 complete_data_len = LEGO_COMPLETE_DATA_LEN;
2027 pulse_1_len = LEGO_PULSE_LEN;
2028 pause_1_len = LEGO_1_PAUSE_LEN - 1;
2029 pulse_0_len = LEGO_PULSE_LEN;
2030 pause_0_len = LEGO_0_PAUSE_LEN - 1;
2031 has_stop_bit = LEGO_STOP_BIT;
2032 n_auto_repetitions = 1; // 1 frame
2033 auto_repetition_pause_len = 0;
2034 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
2035 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2036 break;
2037 }
2038 #endif
2039 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2040 case IRMP_A1TVBOX_PROTOCOL:
2041 {
2042 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
2043 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
2044 pulse_len = A1TVBOX_BIT_PULSE_LEN;
2045 pause_len = A1TVBOX_BIT_PAUSE_LEN;
2046 has_stop_bit = A1TVBOX_STOP_BIT;
2047 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
2048 n_auto_repetitions = 1; // 1 frame
2049 auto_repetition_pause_len = 0;
2050 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
2051 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2052 break;
2053 }
2054 #endif
2055 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2056 case IRMP_ROOMBA_PROTOCOL:
2057 {
2058 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
2059 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
2060 pulse_1_len = ROOMBA_1_PULSE_LEN;
2061 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
2062 pulse_0_len = ROOMBA_0_PULSE_LEN;
2063 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
2064 has_stop_bit = ROOMBA_STOP_BIT;
2065 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
2066 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
2067 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2068 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2069 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2070 break;
2071 }
2072 #endif
2073 default:
2074 {
2075 irsnd_busy = FALSE;
2076 break;
2077 }
2078 }
2079 }
2080 }
2081
2082 if (irsnd_busy)
2083 {
2084 new_frame = FALSE;
2085
2086 switch (irsnd_protocol)
2087 {
2088 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
2089 case IRMP_SIRCS_PROTOCOL:
2090 #endif
2091 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
2092 case IRMP_NEC_PROTOCOL:
2093 #endif
2094 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2095 case IRMP_NEC16_PROTOCOL:
2096 #endif
2097 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
2098 case IRMP_NEC42_PROTOCOL:
2099 #endif
2100 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
2101 case IRMP_LGAIR_PROTOCOL:
2102 #endif
2103 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2104 case IRMP_SAMSUNG_PROTOCOL:
2105 case IRMP_SAMSUNG32_PROTOCOL:
2106 #endif
2107 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
2108 case IRMP_SAMSUNG48_PROTOCOL:
2109 #endif
2110 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2111 case IRMP_MATSUSHITA_PROTOCOL:
2112 #endif
2113 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
2114 case IRMP_KASEIKYO_PROTOCOL:
2115 #endif
2116 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
2117 case IRMP_RECS80_PROTOCOL:
2118 #endif
2119 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
2120 case IRMP_RECS80EXT_PROTOCOL:
2121 #endif
2122 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2123 case IRMP_TELEFUNKEN_PROTOCOL:
2124 #endif
2125 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2126 case IRMP_DENON_PROTOCOL:
2127 #endif
2128 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2129 case IRMP_NUBERT_PROTOCOL:
2130 #endif
2131 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2132 case IRMP_SPEAKER_PROTOCOL:
2133 #endif
2134 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2135 case IRMP_BANG_OLUFSEN_PROTOCOL:
2136 #endif
2137 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2138 case IRMP_FDC_PROTOCOL:
2139 #endif
2140 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2141 case IRMP_RCCAR_PROTOCOL:
2142 #endif
2143 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2144 case IRMP_JVC_PROTOCOL:
2145 #endif
2146 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2147 case IRMP_NIKON_PROTOCOL:
2148 #endif
2149 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2150 case IRMP_LEGO_PROTOCOL:
2151 #endif
2152 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2153 case IRMP_THOMSON_PROTOCOL:
2154 #endif
2155 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2156 case IRMP_ROOMBA_PROTOCOL:
2157 #endif
2158
2159 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2160 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
2161 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2162 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
2163 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \
2164 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2165 {
2166 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2167 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
2168 {
2169 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
2170 {
2171 auto_repetition_pause_len--;
2172 }
2173
2174 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
2175 {
2176 repeat_frame_pause_len--;
2177 }
2178 }
2179 #endif
2180
2181 if (pulse_counter == 0)
2182 {
2183 if (current_bit == 0xFF) // send start bit
2184 {
2185 pulse_len = startbit_pulse_len;
2186 pause_len = startbit_pause_len;
2187 }
2188 else if (current_bit < complete_data_len) // send n'th bit
2189 {
2190 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2191 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2192 {
2193 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2194 {
2195 pulse_len = SAMSUNG_PULSE_LEN;
2196 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2197 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2198 }
2199 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2200 {
2201 pulse_len = SAMSUNG_PULSE_LEN;
2202 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2203 }
2204 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2205 {
2206 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2207
2208 pulse_len = SAMSUNG_PULSE_LEN;
2209 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2210 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2211 }
2212 }
2213 else
2214 #endif
2215
2216 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2217 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2218 {
2219 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2220 {
2221 pulse_len = NEC_PULSE_LEN;
2222 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2223 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2224 }
2225 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2226 {
2227 pulse_len = NEC_PULSE_LEN;
2228 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2229 }
2230 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2231 {
2232 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2233
2234 pulse_len = NEC_PULSE_LEN;
2235 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2236 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2237 }
2238 }
2239 else
2240 #endif
2241
2242 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2243 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2244 {
2245 if (current_bit == 0) // send 2nd start bit
2246 {
2247 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2248 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2249 }
2250 else if (current_bit == 1) // send 3rd start bit
2251 {
2252 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2253 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2254 }
2255 else if (current_bit == 2) // send 4th start bit
2256 {
2257 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2258 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2259 }
2260 else if (current_bit == 19) // send trailer bit
2261 {
2262 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2263 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2264 }
2265 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2266 {
2267 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;
2268 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2269
2270 if (cur_bit_value == last_bit_value)
2271 {
2272 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2273 }
2274 else
2275 {
2276 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2277 last_bit_value = cur_bit_value;
2278 }
2279 }
2280 }
2281 else
2282 #endif
2283 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))
2284 {
2285 pulse_len = pulse_1_len;
2286 pause_len = pause_1_len;
2287 }
2288 else
2289 {
2290 pulse_len = pulse_0_len;
2291 pause_len = pause_0_len;
2292 }
2293 }
2294 else if (has_stop_bit) // send stop bit
2295 {
2296 pulse_len = pulse_0_len;
2297
2298 if (auto_repetition_counter < n_auto_repetitions)
2299 {
2300 pause_len = pause_0_len;
2301 }
2302 else
2303 {
2304 pause_len = 255; // last frame: pause of 255
2305 }
2306 }
2307 }
2308
2309 if (pulse_counter < pulse_len)
2310 {
2311 if (pulse_counter == 0)
2312 {
2313 irsnd_on ();
2314 }
2315 pulse_counter++;
2316 }
2317 else if (pause_counter < pause_len)
2318 {
2319 if (pause_counter == 0)
2320 {
2321 irsnd_off ();
2322 }
2323 pause_counter++;
2324 }
2325 else
2326 {
2327 current_bit++;
2328
2329 if (current_bit >= complete_data_len + has_stop_bit)
2330 {
2331 current_bit = 0xFF;
2332 auto_repetition_counter++;
2333
2334 if (auto_repetition_counter == n_auto_repetitions)
2335 {
2336 irsnd_busy = FALSE;
2337 auto_repetition_counter = 0;
2338 }
2339 new_frame = TRUE;
2340 }
2341
2342 pulse_counter = 0;
2343 pause_counter = 0;
2344 }
2345 break;
2346 }
2347 #endif
2348
2349 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2350 case IRMP_RC5_PROTOCOL:
2351 #endif
2352 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2353 case IRMP_RC6_PROTOCOL:
2354 #endif
2355 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2356 case IRMP_RC6A_PROTOCOL:
2357 #endif
2358 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2359 case IRMP_SIEMENS_PROTOCOL:
2360 #endif
2361 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2362 case IRMP_RUWIDO_PROTOCOL:
2363 #endif
2364 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2365 case IRMP_GRUNDIG_PROTOCOL:
2366 #endif
2367 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2368 case IRMP_IR60_PROTOCOL:
2369 #endif
2370 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2371 case IRMP_NOKIA_PROTOCOL:
2372 #endif
2373 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2374 case IRMP_A1TVBOX_PROTOCOL:
2375 #endif
2376
2377 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2378 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2379 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2380 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2381 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2382 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2383 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2384 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2385 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2386 {
2387 if (pulse_counter == pulse_len && pause_counter == pause_len)
2388 {
2389 current_bit++;
2390
2391 if (current_bit >= complete_data_len)
2392 {
2393 current_bit = 0xFF;
2394
2395 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2396 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2397 {
2398 auto_repetition_counter++;
2399
2400 if (repeat_counter > 0)
2401 { // set 117 msec pause time
2402 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2403 }
2404
2405 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2406 {
2407 n_auto_repetitions++; // increment number of auto repetitions
2408 repeat_counter++;
2409 }
2410 else if (auto_repetition_counter == n_auto_repetitions)
2411 {
2412 irsnd_busy = FALSE;
2413 auto_repetition_counter = 0;
2414 }
2415 }
2416 else
2417 #endif
2418 {
2419 irsnd_busy = FALSE;
2420 }
2421
2422 new_frame = TRUE;
2423 irsnd_off ();
2424 }
2425
2426 pulse_counter = 0;
2427 pause_counter = 0;
2428 }
2429
2430 if (! new_frame)
2431 {
2432 uint8_t first_pulse;
2433
2434 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2435 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2436 {
2437 if (current_bit == 0xFF || // start bit of start-frame
2438 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2439 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2440 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2441 {
2442 pulse_len = startbit_pulse_len;
2443 pause_len = startbit_pause_len;
2444 first_pulse = TRUE;
2445 }
2446 else // send n'th bit
2447 {
2448 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2449 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2450 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2451 }
2452 }
2453 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2454 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2455 #endif
2456 {
2457 if (current_bit == 0xFF) // 1 start bit
2458 {
2459 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2460 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2461 {
2462 pulse_len = startbit_pulse_len;
2463 pause_len = startbit_pause_len;
2464 }
2465 else
2466 #endif
2467 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2468 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2469 {
2470 current_bit = 0;
2471 }
2472 else
2473 #endif
2474 {
2475 ;
2476 }
2477
2478 first_pulse = TRUE;
2479 }
2480 else // send n'th bit
2481 {
2482 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2483 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2484 {
2485 pulse_len = RC6_BIT_LEN;
2486 pause_len = RC6_BIT_LEN;
2487
2488 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2489 {
2490 if (current_bit == 4) // toggle bit (double len)
2491 {
2492 pulse_len = 2 * RC6_BIT_LEN;
2493 pause_len = 2 * RC6_BIT_LEN;
2494 }
2495 }
2496 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2497 {
2498 if (current_bit == 4) // toggle bit (double len)
2499 {
2500 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2501 pause_len = 2 * RC6_BIT_LEN;
2502 }
2503 else if (current_bit == 5) // toggle bit (double len)
2504 {
2505 pause_len = 2 * RC6_BIT_LEN;
2506 }
2507 }
2508 }
2509 #endif
2510 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2511 }
2512
2513 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2514 {
2515 first_pulse = first_pulse ? FALSE : TRUE;
2516 }
2517 }
2518
2519 if (first_pulse)
2520 {
2521 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2522
2523 if (pulse_counter < pulse_len)
2524 {
2525 if (pulse_counter == 0)
2526 {
2527 irsnd_on ();
2528 }
2529 pulse_counter++;
2530 }
2531 else // if (pause_counter < pause_len)
2532 {
2533 if (pause_counter == 0)
2534 {
2535 irsnd_off ();
2536 }
2537 pause_counter++;
2538 }
2539 }
2540 else
2541 {
2542 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2543
2544 if (pause_counter < pause_len)
2545 {
2546 if (pause_counter == 0)
2547 {
2548 irsnd_off ();
2549 }
2550 pause_counter++;
2551 }
2552 else // if (pulse_counter < pulse_len)
2553 {
2554 if (pulse_counter == 0)
2555 {
2556 irsnd_on ();
2557 }
2558 pulse_counter++;
2559 }
2560 }
2561 }
2562 break;
2563 }
2564 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2565 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2566
2567 default:
2568 {
2569 irsnd_busy = FALSE;
2570 break;
2571 }
2572 }
2573 }
2574
2575 if (! irsnd_busy)
2576 {
2577 if (repeat_counter < n_repeat_frames)
2578 {
2579 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2580 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2581 {
2582 irsnd_buffer[2] |= 0x0F;
2583 }
2584 #endif
2585 repeat_counter++;
2586 irsnd_busy = TRUE;
2587 }
2588 else
2589 {
2590 irsnd_busy = TRUE; //Rainer
2591 send_trailer = TRUE;
2592 n_repeat_frames = 0;
2593 repeat_counter = 0;
2594 }
2595 }
2596 }
2597
2598 #ifdef ANALYZE
2599 if (irsnd_is_on)
2600 {
2601 putchar ('0');
2602 }
2603 else
2604 {
2605 putchar ('1');
2606 }
2607 #endif
2608
2609 return irsnd_busy;
2610 }
2611
2612 #ifdef ANALYZE
2613
2614 // main function - for unix/linux + windows only!
2615 // AVR: see main.c!
2616 // Compile it under linux with:
2617 // cc irsnd.c -o irsnd
2618 //
2619 // usage: ./irsnd protocol hex-address hex-command >filename
2620
2621 int
2622 main (int argc, char ** argv)
2623 {
2624 int protocol;
2625 int address;
2626 int command;
2627 IRMP_DATA irmp_data;
2628
2629 if (argc != 4 && argc != 5)
2630 {
2631 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2632 return 1;
2633 }
2634
2635 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2636 sscanf (argv[2], "%x", &address) == 1 &&
2637 sscanf (argv[3], "%x", &command) == 1)
2638 {
2639 irmp_data.protocol = protocol;
2640 irmp_data.address = address;
2641 irmp_data.command = command;
2642
2643 if (argc == 5)
2644 {
2645 irmp_data.flags = atoi (argv[4]);
2646 }
2647 else
2648 {
2649 irmp_data.flags = 0;
2650 }
2651
2652 irsnd_init ();
2653
2654 (void) irsnd_send_data (&irmp_data, TRUE);
2655
2656 while (irsnd_busy)
2657 {
2658 irsnd_ISR ();
2659 }
2660
2661 putchar ('\n');
2662
2663 #if 1 // enable here to send twice
2664 (void) irsnd_send_data (&irmp_data, TRUE);
2665
2666 while (irsnd_busy)
2667 {
2668 irsnd_ISR ();
2669 }
2670
2671 putchar ('\n');
2672 #endif
2673 }
2674 else
2675 {
2676 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2677 return 1;
2678 }
2679 return 0;
2680 }
2681
2682 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)