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[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.59 2012/06/18 09:00:46 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 /*---------------------------------------------------------------------------------------------------------------------------------------------------
28 * ATtiny pin definition of OC0A / OC0B
29 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
30 *---------------------------------------------------------------------------------------------------------------------------------------------------
31 */
32 #if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7
33 # if IRSND_OCx == IRSND_OC0A // OC0A
34 # define IRSND_PORT PORTB // port B
35 # define IRSND_DDR DDRB // ddr B
36 # define IRSND_BIT 2 // OC0A
37 # elif IRSND_OCx == IRSND_OC0B // OC0B
38 # define IRSND_PORT PORTA // port A
39 # define IRSND_DDR DDRA // ddr A
40 # define IRSND_BIT 7 // OC0B
41 # else
42 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
43 # endif // IRSND_OCx
44 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
45 # if IRSND_OCx == IRSND_OC0A // OC0A
46 # define IRSND_PORT PORTB // port B
47 # define IRSND_DDR DDRB // ddr B
48 # define IRSND_BIT 0 // OC0A
49 # elif IRSND_OCx == IRSND_OC0B // OC0B
50 # define IRSND_PORT PORTB // port B
51 # define IRSND_DDR DDRB // ddr B
52 # define IRSND_BIT 1 // OC0B
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT PORTA // port A
59 # define IRSND_DDR DDRA // ddr A
60 # define IRSND_BIT 2 // OC0A
61 # else
62 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
63 # endif // IRSND_OCx
64 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
65 # if IRSND_OCx == IRSND_OC2 // OC0A
66 # define IRSND_PORT PORTB // port B
67 # define IRSND_DDR DDRB // ddr B
68 # define IRSND_BIT 3 // OC0A
69 # else
70 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
71 # endif // IRSND_OCx
72 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
73 # if IRSND_OCx == IRSND_OC2 // OC2
74 # define IRSND_PORT PORTD // port D
75 # define IRSND_DDR DDRD // ddr D
76 # define IRSND_BIT 7 // OC2
77 # else
78 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
79 # endif // IRSND_OCx
80 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
81 # if IRSND_OCx == IRSND_OC2 // OC2
82 # define IRSND_PORT PORTB // port B
83 # define IRSND_DDR DDRB // ddr B
84 # define IRSND_BIT 1 // OC2
85 # elif IRSND_OCx == IRSND_OC0 // OC0
86 # define IRSND_PORT PORTB // port B
87 # define IRSND_DDR DDRB // ddr B
88 # define IRSND_BIT 0 // OC0
89 # else
90 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
91 # endif // IRSND_OCx
92 #elif defined (__AVR_ATmega164__) \
93 || defined (__AVR_ATmega324__) \
94 || defined (__AVR_ATmega644__) \
95 || defined (__AVR_ATmega644P__) \
96 || defined (__AVR_ATmega1284__) \
97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
98 # if IRSND_OCx == IRSND_OC2A // OC2A
99 # define IRSND_PORT PORTD // port D
100 # define IRSND_DDR DDRD // ddr D
101 # define IRSND_BIT 7 // OC2A
102 # elif IRSND_OCx == IRSND_OC2B // OC2B
103 # define IRSND_PORT PORTD // port D
104 # define IRSND_DDR DDRD // ddr D
105 # define IRSND_BIT 6 // OC2B
106 # elif IRSND_OCx == IRSND_OC0A // OC0A
107 # define IRSND_PORT PORTB // port B
108 # define IRSND_DDR DDRB // ddr B
109 # define IRSND_BIT 3 // OC0A
110 # elif IRSND_OCx == IRSND_OC0B // OC0B
111 # define IRSND_PORT PORTB // port B
112 # define IRSND_DDR DDRB // ddr B
113 # define IRSND_BIT 4 // OC0B
114 # else
115 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
116 # endif // IRSND_OCx
117 #elif defined (__AVR_ATmega48__) \
118 || defined (__AVR_ATmega88__) \
119 || defined (__AVR_ATmega88P__) \
120 || defined (__AVR_ATmega168__) \
121 || defined (__AVR_ATmega168P__) \
122 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
123 # if IRSND_OCx == IRSND_OC2A // OC2A
124 # define IRSND_PORT PORTB // port B
125 # define IRSND_DDR DDRB // ddr B
126 # define IRSND_BIT 3 // OC2A
127 # elif IRSND_OCx == IRSND_OC2B // OC2B
128 # define IRSND_PORT PORTD // port D
129 # define IRSND_DDR DDRD // ddr D
130 # define IRSND_BIT 3 // OC2B
131 # elif IRSND_OCx == IRSND_OC0A // OC0A
132 # define IRSND_PORT PORTB // port B
133 # define IRSND_DDR DDRB // ddr B
134 # define IRSND_BIT 6 // OC0A
135 # elif IRSND_OCx == IRSND_OC0B // OC0B
136 # define IRSND_PORT PORTD // port D
137 # define IRSND_DDR DDRD // ddr D
138 # define IRSND_BIT 5 // OC0B
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (__AVR_ATmega8515__)
143 # if IRSND_OCx == IRSND_OC0
144 # define IRSND_PORT PORTB // port B
145 # define IRSND_DDR DDRB // ddr B
146 # define IRSND_BIT 0 // OC0
147 # elif IRSND_OCx == IRSND_OC1A
148 # define IRSND_PORT PORTD // port D
149 # define IRSND_DDR DDRD // ddr D
150 # define IRSND_BIT 5 // OC1A
151 # elif IRSND_OCx == IRSND_OC1B
152 # define IRSND_PORT PORTE // port E
153 # define IRSND_DDR DDRE // ddr E
154 # define IRSND_BIT 2 // OC1E
155 # else
156 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
157 # endif // IRSND_OCx
158 #elif defined (PIC_C18) //Microchip C18 compiler
159 //Nothing here to do here -> See irsndconfig.h
160 #elif defined (ARM_STM32) //STM32
161 //Nothing here to do here -> See irsndconfig.h
162 #else
163 # if !defined (unix) && !defined (WIN32)
164 # error mikrocontroller not defined, please fill in definitions here.
165 # endif // unix, WIN32
166 #endif // __AVR...
167
168 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
169 typedef uint16_t IRSND_PAUSE_LEN;
170 #else
171 typedef uint8_t IRSND_PAUSE_LEN;
172 #endif
173
174 /*---------------------------------------------------------------------------------------------------------------------------------------------------
175 * IR timings
176 *---------------------------------------------------------------------------------------------------------------------------------------------------
177 */
178 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
179 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
180 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
181 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
182 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
183 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
184 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
187 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
188 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
189 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
190 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
191 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
192 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
193
194 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
195 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
196 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
197 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
198 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
199 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
200
201 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
202 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
203
204 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
205 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
206 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
207 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
208 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
209 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
210
211 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
212 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
213 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
214 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
215 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
216 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
217 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
218
219 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
220 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
221 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
222 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
223 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
224 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
225
226 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
227 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
228 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
229
230 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
231 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
232 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
233 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
234 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
235
236 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
237 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
238 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
239 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
240 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
241
242 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
243 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
244 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
245 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
246 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
247
248 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
249 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
250 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
251 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
252 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
253 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
254
255 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
256 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
257 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
258 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
259 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
260 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
261 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
262 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
263
264 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
265 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
266 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
267 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
268 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
269 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
270 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
271 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
272 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
273 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
274 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
275 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
276
277 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
278 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
279 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
280 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
281 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
282
283 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
284
285 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
286 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
287 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
288
289
290 #ifdef PIC_C18 // PIC C18
291 # define IRSND_FREQ_TYPE uint8_t
292 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
293 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
294 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
295 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
296 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
297 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
298 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
299 #elif defined (ARM_STM32) // STM32
300 # define IRSND_FREQ_TYPE uint32_t
301 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
302 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
303 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
304 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
305 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
306 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
307 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
308 #else // AVR
309 # define IRSND_FREQ_TYPE uint8_t
310 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2) - 1)
311 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2) - 1)
312 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2) - 1)
313 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2) - 1)
314 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2) - 1)
315 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2) - 1)
316 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2) - 1)
317 #endif
318
319 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
320 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
321 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
322 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
323 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
324 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
325
326 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
327 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
328 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
329 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
330 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
331 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
332
333 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
334 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
335 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
336 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
337 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
338 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
339 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
340
341 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
342 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
343 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
344 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
345 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
346 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
347 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
348
349 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
350 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
351 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
352 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
353 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
354 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
355 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
356
357 static volatile uint8_t irsnd_busy = 0;
358 static volatile uint8_t irsnd_protocol = 0;
359 static volatile uint8_t irsnd_buffer[6] = {0};
360 static volatile uint8_t irsnd_repeat = 0;
361 static volatile uint8_t irsnd_is_on = FALSE;
362
363 #if IRSND_USE_CALLBACK == 1
364 static void (*irsnd_callback_ptr) (uint8_t);
365 #endif // IRSND_USE_CALLBACK == 1
366
367 /*---------------------------------------------------------------------------------------------------------------------------------------------------
368 * Switch PWM on
369 * @details Switches PWM on with a narrow spike on all 3 channels -> leds glowing
370 *---------------------------------------------------------------------------------------------------------------------------------------------------
371 */
372 static void
373 irsnd_on (void)
374 {
375 if (! irsnd_is_on)
376 {
377 #ifndef DEBUG
378 # if defined(PIC_C18) // PIC C18
379 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
380 # elif defined (ARM_STM32) // STM32
381 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
382 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
383 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
384 # else // AVR
385 # if IRSND_OCx == IRSND_OC2 // use OC2
386 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
387 # elif IRSND_OCx == IRSND_OC2A // use OC2A
388 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
389 # elif IRSND_OCx == IRSND_OC2B // use OC2B
390 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
391 # elif IRSND_OCx == IRSND_OC0 // use OC0
392 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
393 # elif IRSND_OCx == IRSND_OC0A // use OC0A
394 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
395 # elif IRSND_OCx == IRSND_OC0B // use OC0B
396 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
397 # else
398 # error wrong value of IRSND_OCx
399 # endif // IRSND_OCx
400 # endif // C18
401 #endif // DEBUG
402
403 #if IRSND_USE_CALLBACK == 1
404 if (irsnd_callback_ptr)
405 {
406 (*irsnd_callback_ptr) (TRUE);
407 }
408 #endif // IRSND_USE_CALLBACK == 1
409
410 irsnd_is_on = TRUE;
411 }
412 }
413
414 /*---------------------------------------------------------------------------------------------------------------------------------------------------
415 * Switch PWM off
416 * @details Switches PWM off
417 *---------------------------------------------------------------------------------------------------------------------------------------------------
418 */
419 static void
420 irsnd_off (void)
421 {
422 if (irsnd_is_on)
423 {
424 #ifndef DEBUG
425
426 # if defined(PIC_C18) // PIC C18
427 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
428 # elif defined (ARM_STM32) // STM32
429 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
430 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
431 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
432 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
433 # else //AVR
434
435 # if IRSND_OCx == IRSND_OC2 // use OC2
436 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
437 # elif IRSND_OCx == IRSND_OC2A // use OC2A
438 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
439 # elif IRSND_OCx == IRSND_OC2B // use OC2B
440 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
441 # elif IRSND_OCx == IRSND_OC0 // use OC0
442 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
443 # elif IRSND_OCx == IRSND_OC0A // use OC0A
444 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
445 # elif IRSND_OCx == IRSND_OC0B // use OC0B
446 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
447 # else
448 # error wrong value of IRSND_OCx
449 # endif // IRSND_OCx
450 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
451 # endif //C18
452 #endif // DEBUG
453
454 #if IRSND_USE_CALLBACK == 1
455 if (irsnd_callback_ptr)
456 {
457 (*irsnd_callback_ptr) (FALSE);
458 }
459 #endif // IRSND_USE_CALLBACK == 1
460
461 irsnd_is_on = FALSE;
462 }
463 }
464
465 /*---------------------------------------------------------------------------------------------------------------------------------------------------
466 * Set PWM frequency
467 * @details sets pwm frequency
468 *---------------------------------------------------------------------------------------------------------------------------------------------------
469 */
470 static void
471 irsnd_set_freq (IRSND_FREQ_TYPE freq)
472 {
473 #ifndef DEBUG
474 # if defined(PIC_C18) // PIC C18
475 OpenPWM(freq);
476 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%
477 # elif defined (ARM_STM32) // STM32
478 static uint32_t TimeBaseFreq = 0;
479
480 if (TimeBaseFreq == 0)
481 {
482 RCC_ClocksTypeDef RCC_ClocksStructure;
483 /* Get system clocks and store timer clock in variable */
484 RCC_GetClocksFreq(&RCC_ClocksStructure);
485 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
486 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
487 {
488 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
489 }
490 else
491 {
492 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
493 }
494 # else
495 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
496 {
497 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
498 }
499 else
500 {
501 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
502 }
503 # endif
504 }
505
506 freq = TimeBaseFreq/freq;
507
508 /* Set frequency */
509 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
510 /* Set duty cycle */
511 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
512 # else // AVR
513
514 # if IRSND_OCx == IRSND_OC2
515 OCR2 = freq; // use register OCR2 for OC2
516 # elif IRSND_OCx == IRSND_OC2A // use OC2A
517 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
518 # elif IRSND_OCx == IRSND_OC2B // use OC2B
519 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
520 # elif IRSND_OCx == IRSND_OC0 // use OC0
521 OCR0 = freq; // use register OCR2 for OC2
522 # elif IRSND_OCx == IRSND_OC0A // use OC0A
523 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
524 # elif IRSND_OCx == IRSND_OC0B // use OC0B
525 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
526 # else
527 # error wrong value of IRSND_OCx
528 # endif
529 # endif //PIC_C18
530 #endif // DEBUG
531 }
532
533 /*---------------------------------------------------------------------------------------------------------------------------------------------------
534 * Initialize the PWM
535 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
536 *---------------------------------------------------------------------------------------------------------------------------------------------------
537 */
538 void
539 irsnd_init (void)
540 {
541 #ifndef DEBUG
542 # if defined(PIC_C18) // PIC C18
543 OpenTimer;
544 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency
545 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)
546 # elif defined (ARM_STM32) // STM32
547 GPIO_InitTypeDef GPIO_InitStructure;
548 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
549 TIM_OCInitTypeDef TIM_OCInitStructure;
550
551 /* GPIOx clock enable */
552 # if defined (ARM_STM32L1XX)
553 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
554 # elif defined (ARM_STM32F10X)
555 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
556 # elif defined (ARM_STM32F4XX)
557 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
558 # endif
559
560 /* GPIO Configuration */
561 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
562 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
563 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
564 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
565 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
566 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
567 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
568 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
569 # elif defined (ARM_STM32F10X)
570 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
571 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
572 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
573 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
574 # endif
575
576 /* TIMx clock enable */
577 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
578 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
579 # else
580 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
581 # endif
582
583 /* Time base configuration */
584 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
585 TIM_TimeBaseStructure.TIM_Prescaler = 0;
586 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
587 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
588 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
589
590 /* PWM1 Mode configuration */
591 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
592 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
593 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
594 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
595 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
596
597 /* Preload configuration */
598 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
599 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
600
601 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
602 # else // AVR
603 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
604 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
605
606 # if IRSND_OCx == IRSND_OC2 // use OC2
607 TCCR2 = (1<<WGM21); // CTC mode
608 TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling
609 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
610 TCCR2A = (1<<WGM21); // CTC mode
611 TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling
612 # elif IRSND_OCx == IRSND_OC0 // use OC0
613 TCCR0 = (1<<WGM01); // CTC mode
614 TCCR0 |= (1<<CS00); // 0x01, start Timer 0, no prescaling
615 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
616 TCCR0A = (1<<WGM01); // CTC mode
617 TCCR0B |= (1<<CS00); // 0x01, start Timer 0, no prescaling
618 # else
619 # error wrong value of IRSND_OCx
620 # endif
621 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
622 # endif //PIC_C18
623 #endif // DEBUG
624 }
625
626 #if IRSND_USE_CALLBACK == 1
627 void
628 irsnd_set_callback_ptr (void (*cb)(uint8_t))
629 {
630 irsnd_callback_ptr = cb;
631 }
632 #endif // IRSND_USE_CALLBACK == 1
633
634 uint8_t
635 irsnd_is_busy (void)
636 {
637 return irsnd_busy;
638 }
639
640 static uint16_t
641 bitsrevervse (uint16_t x, uint8_t len)
642 {
643 uint16_t xx = 0;
644
645 while(len)
646 {
647 xx <<= 1;
648 if (x & 1)
649 {
650 xx |= 1;
651 }
652 x >>= 1;
653 len--;
654 }
655 return xx;
656 }
657
658
659 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
660 static uint8_t sircs_additional_bitlen;
661 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
662
663 uint8_t
664 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
665 {
666 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
667 static uint8_t toggle_bit_recs80;
668 #endif
669 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
670 static uint8_t toggle_bit_recs80ext;
671 #endif
672 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
673 static uint8_t toggle_bit_rc5;
674 #endif
675 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
676 static uint8_t toggle_bit_rc6;
677 #endif
678 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
679 static uint8_t toggle_bit_thomson;
680 #endif
681 uint16_t address;
682 uint16_t command;
683
684 if (do_wait)
685 {
686 while (irsnd_busy)
687 {
688 // do nothing;
689 }
690 }
691 else if (irsnd_busy)
692 {
693 return (FALSE);
694 }
695
696 irsnd_protocol = irmp_data_p->protocol;
697 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
698
699 switch (irsnd_protocol)
700 {
701 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
702 case IRMP_SIRCS_PROTOCOL:
703 {
704 // uint8_t sircs_additional_command_len;
705 uint8_t sircs_additional_address_len;
706
707 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
708
709 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
710 {
711 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
712 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
713 }
714 else
715 {
716 // sircs_additional_command_len = sircs_additional_bitlen;
717 sircs_additional_address_len = 0;
718 }
719
720 command = bitsrevervse (irmp_data_p->command, 15);
721
722 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
723 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
724
725 if (sircs_additional_address_len > 0)
726 {
727 address = bitsrevervse (irmp_data_p->address, 5);
728 irsnd_buffer[1] |= (address & 0x0010) >> 4;
729 irsnd_buffer[2] = (address & 0x000F) << 4;
730 }
731 irsnd_busy = TRUE;
732 break;
733 }
734 #endif
735 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
736 case IRMP_APPLE_PROTOCOL:
737 {
738 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
739 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
740
741 address = bitsrevervse (address, NEC_ADDRESS_LEN);
742 command = bitsrevervse (command, NEC_COMMAND_LEN);
743
744 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
745
746 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
747 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
748 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
749 irsnd_buffer[3] = 0x8B; // 10001011 (id)
750 irsnd_busy = TRUE;
751 break;
752 }
753 case IRMP_NEC_PROTOCOL:
754 {
755 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
756 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
757
758 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
759 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
760 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
761 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
762 irsnd_busy = TRUE;
763 break;
764 }
765 #endif
766 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
767 case IRMP_NEC16_PROTOCOL:
768 {
769 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
770 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
771
772 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
773 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
774 irsnd_busy = TRUE;
775 break;
776 }
777 #endif
778 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
779 case IRMP_NEC42_PROTOCOL:
780 {
781 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
782 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
783
784 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
785 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
786 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
787 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
788 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
789 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
790 irsnd_busy = TRUE;
791 break;
792 }
793 #endif
794 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
795 case IRMP_SAMSUNG_PROTOCOL:
796 {
797 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
798 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
799
800 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
801 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
802 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
803 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
804 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
805 irsnd_busy = TRUE;
806 break;
807 }
808 case IRMP_SAMSUNG32_PROTOCOL:
809 {
810 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
811 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
812
813 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
814 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
815 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
816 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
817 irsnd_busy = TRUE;
818 break;
819 }
820 #endif
821 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
822 case IRMP_MATSUSHITA_PROTOCOL:
823 {
824 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
825 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
826
827 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
828 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
829 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
830 irsnd_busy = TRUE;
831 break;
832 }
833 #endif
834 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
835 case IRMP_KASEIKYO_PROTOCOL:
836 {
837 uint8_t xor;
838 uint16_t genre2;
839
840 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
841 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
842 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
843
844 xor = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
845
846 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
847 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
848 irsnd_buffer[2] = xor << 4 | (command & 0x000F); // XXXXCCCC
849 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
850 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
851
852 xor = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
853
854 irsnd_buffer[5] = xor;
855 irsnd_busy = TRUE;
856 break;
857 }
858 #endif
859 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
860 case IRMP_RECS80_PROTOCOL:
861 {
862 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
863
864 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
865 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
866 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
867 irsnd_busy = TRUE;
868 break;
869 }
870 #endif
871 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
872 case IRMP_RECS80EXT_PROTOCOL:
873 {
874 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
875
876 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
877 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
878 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
879 irsnd_busy = TRUE;
880 break;
881 }
882 #endif
883 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
884 case IRMP_RC5_PROTOCOL:
885 {
886 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
887
888 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
889 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
890 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
891 irsnd_busy = TRUE;
892 break;
893 }
894 #endif
895 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
896 case IRMP_RC6_PROTOCOL:
897 {
898 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
899
900 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
901 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
902 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
903 irsnd_busy = TRUE;
904 break;
905 }
906 #endif
907 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
908 case IRMP_RC6A_PROTOCOL:
909 {
910 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
911
912 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
913 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
914 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
915 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
916 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
917 irsnd_busy = TRUE;
918 break;
919 }
920 #endif
921 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
922 case IRMP_DENON_PROTOCOL:
923 {
924 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
925 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
926 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
927 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
928 irsnd_busy = TRUE;
929 break;
930 }
931 #endif
932 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
933 case IRMP_THOMSON_PROTOCOL:
934 {
935 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
936
937 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
938 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
939 irsnd_busy = TRUE;
940 break;
941 }
942 #endif
943 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
944 case IRMP_NUBERT_PROTOCOL:
945 {
946 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
947 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
948 irsnd_busy = TRUE;
949 break;
950 }
951 #endif
952 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
953 case IRMP_BANG_OLUFSEN_PROTOCOL:
954 {
955 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
956 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
957 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
958 irsnd_busy = TRUE;
959 break;
960 }
961 #endif
962 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
963 case IRMP_GRUNDIG_PROTOCOL:
964 {
965 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);
966
967 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
968 irsnd_buffer[1] = 0xC0; // 11
969 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
970 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
971
972 irsnd_busy = TRUE;
973 break;
974 }
975 #endif
976 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
977 case IRMP_IR60_PROTOCOL:
978 {
979 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
980 #if 0
981 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
982 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
983 #else
984 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
985 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
986 #endif
987
988 irsnd_busy = TRUE;
989 break;
990 }
991 #endif
992 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
993 case IRMP_NOKIA_PROTOCOL:
994 {
995 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
996 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
997
998 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
999 irsnd_buffer[1] = 0xFF; // 11111111
1000 irsnd_buffer[2] = 0x80; // 1
1001 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1002 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1003 irsnd_buffer[5] = (address << 7); // A
1004
1005 irsnd_busy = TRUE;
1006 break;
1007 }
1008 #endif
1009 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1010 case IRMP_SIEMENS_PROTOCOL:
1011 {
1012 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA
1013 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC
1014 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1015
1016 irsnd_busy = TRUE;
1017 break;
1018 }
1019 #endif
1020 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1021 case IRMP_FDC_PROTOCOL:
1022 {
1023 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1024 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1025
1026 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1027 irsnd_buffer[1] = 0; // 00000000
1028 irsnd_buffer[2] = 0; // 0000RRRR
1029 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1030 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1031 irsnd_busy = TRUE;
1032 break;
1033 }
1034 #endif
1035 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1036 case IRMP_RCCAR_PROTOCOL:
1037 {
1038 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1039 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1040
1041 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1042 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1043
1044 irsnd_busy = TRUE;
1045 break;
1046 }
1047 #endif
1048 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1049 case IRMP_JVC_PROTOCOL:
1050 {
1051 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1052 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1053
1054 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1055 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1056
1057 irsnd_busy = TRUE;
1058 break;
1059 }
1060 #endif
1061 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1062 case IRMP_NIKON_PROTOCOL:
1063 {
1064 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1065 irsnd_busy = TRUE;
1066 break;
1067 }
1068 #endif
1069 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1070 case IRMP_LEGO_PROTOCOL:
1071 {
1072 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1073
1074 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1075 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1076
1077 irsnd_protocol = IRMP_LEGO_PROTOCOL;
1078 irsnd_busy = TRUE;
1079 break;
1080 }
1081 #endif
1082 default:
1083 {
1084 break;
1085 }
1086 }
1087
1088 return irsnd_busy;
1089 }
1090
1091 void
1092 irsnd_stop (void)
1093 {
1094 irsnd_repeat = 0;
1095 }
1096
1097 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1098 * ISR routine
1099 * @details ISR routine, called 10000 times per second
1100 *---------------------------------------------------------------------------------------------------------------------------------------------------
1101 */
1102 uint8_t
1103 irsnd_ISR (void)
1104 {
1105 static uint8_t send_trailer = FALSE;
1106 static uint8_t current_bit = 0xFF;
1107 static uint8_t pulse_counter = 0;
1108 static IRSND_PAUSE_LEN pause_counter = 0;
1109 static uint8_t startbit_pulse_len = 0;
1110 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1111 static uint8_t pulse_1_len = 0;
1112 static uint8_t pause_1_len = 0;
1113 static uint8_t pulse_0_len = 0;
1114 static uint8_t pause_0_len = 0;
1115 static uint8_t has_stop_bit = 0;
1116 static uint8_t new_frame = TRUE;
1117 static uint8_t complete_data_len = 0;
1118 static uint8_t n_repeat_frames = 0; // number of repetition frames
1119 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1120 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1121 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1122 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1123 static uint8_t repeat_counter = 0; // repeat counter
1124 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1125 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1126 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1127 static uint8_t last_bit_value;
1128 #endif
1129 static uint8_t pulse_len = 0xFF;
1130 static IRSND_PAUSE_LEN pause_len = 0xFF;
1131
1132 if (irsnd_busy)
1133 {
1134 if (current_bit == 0xFF && new_frame) // start of transmission...
1135 {
1136 if (auto_repetition_counter > 0)
1137 {
1138 auto_repetition_pause_counter++;
1139
1140 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1141 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1142 {
1143 repeat_frame_pause_len--;
1144 }
1145 #endif
1146
1147 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1148 {
1149 auto_repetition_pause_counter = 0;
1150
1151 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1152 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1153 {
1154 current_bit = 16;
1155 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1156 }
1157 else
1158 #endif
1159 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1160 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1161 {
1162 current_bit = 15;
1163 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1164 }
1165 else
1166 #endif
1167 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1168 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1169 {
1170 current_bit = 7;
1171 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1172 }
1173 else
1174 #endif
1175 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1176 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1177 {
1178 if (auto_repetition_counter + 1 < n_auto_repetitions)
1179 {
1180 current_bit = 23;
1181 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1182 }
1183 else // nokia stop frame
1184 {
1185 current_bit = 0xFF;
1186 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1187 }
1188 }
1189 else
1190 #endif
1191 {
1192 ;
1193 }
1194 }
1195 else
1196 {
1197 #ifdef DEBUG
1198 if (irsnd_is_on)
1199 {
1200 putchar ('0');
1201 }
1202 else
1203 {
1204 putchar ('1');
1205 }
1206 #endif
1207 return irsnd_busy;
1208 }
1209 }
1210 #if 0
1211 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)
1212 #else
1213 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1214 #endif
1215 {
1216 packet_repeat_pause_counter++;
1217
1218 #ifdef DEBUG
1219 if (irsnd_is_on)
1220 {
1221 putchar ('0');
1222 }
1223 else
1224 {
1225 putchar ('1');
1226 }
1227 #endif
1228 return irsnd_busy;
1229 }
1230 else
1231 {
1232 if (send_trailer)
1233 {
1234 irsnd_busy = FALSE;
1235 send_trailer = FALSE;
1236 return irsnd_busy;
1237 }
1238
1239 n_repeat_frames = irsnd_repeat;
1240
1241 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1242 {
1243 n_repeat_frames = 255;
1244 }
1245
1246 packet_repeat_pause_counter = 0;
1247 pulse_counter = 0;
1248 pause_counter = 0;
1249
1250 switch (irsnd_protocol)
1251 {
1252 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1253 case IRMP_SIRCS_PROTOCOL:
1254 {
1255 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1256 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1257 pulse_1_len = SIRCS_1_PULSE_LEN;
1258 pause_1_len = SIRCS_PAUSE_LEN - 1;
1259 pulse_0_len = SIRCS_0_PULSE_LEN;
1260 pause_0_len = SIRCS_PAUSE_LEN - 1;
1261 has_stop_bit = SIRCS_STOP_BIT;
1262 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1263 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1264 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1265 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1266 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1267 break;
1268 }
1269 #endif
1270 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1271 case IRMP_NEC_PROTOCOL:
1272 {
1273 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1274
1275 if (repeat_counter > 0)
1276 {
1277 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1278 complete_data_len = 0;
1279 }
1280 else
1281 {
1282 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1283 complete_data_len = NEC_COMPLETE_DATA_LEN;
1284 }
1285
1286 pulse_1_len = NEC_PULSE_LEN;
1287 pause_1_len = NEC_1_PAUSE_LEN - 1;
1288 pulse_0_len = NEC_PULSE_LEN;
1289 pause_0_len = NEC_0_PAUSE_LEN - 1;
1290 has_stop_bit = NEC_STOP_BIT;
1291 n_auto_repetitions = 1; // 1 frame
1292 auto_repetition_pause_len = 0;
1293 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1294 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1295 break;
1296 }
1297 #endif
1298 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1299 case IRMP_NEC16_PROTOCOL:
1300 {
1301 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1302 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1303 pulse_1_len = NEC_PULSE_LEN;
1304 pause_1_len = NEC_1_PAUSE_LEN - 1;
1305 pulse_0_len = NEC_PULSE_LEN;
1306 pause_0_len = NEC_0_PAUSE_LEN - 1;
1307 has_stop_bit = NEC_STOP_BIT;
1308 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1309 n_auto_repetitions = 1; // 1 frame
1310 auto_repetition_pause_len = 0;
1311 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1312 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1313 break;
1314 }
1315 #endif
1316 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1317 case IRMP_NEC42_PROTOCOL:
1318 {
1319 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1320 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1321 pulse_1_len = NEC_PULSE_LEN;
1322 pause_1_len = NEC_1_PAUSE_LEN - 1;
1323 pulse_0_len = NEC_PULSE_LEN;
1324 pause_0_len = NEC_0_PAUSE_LEN - 1;
1325 has_stop_bit = NEC_STOP_BIT;
1326 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1327 n_auto_repetitions = 1; // 1 frame
1328 auto_repetition_pause_len = 0;
1329 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1330 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1331 break;
1332 }
1333 #endif
1334 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1335 case IRMP_SAMSUNG_PROTOCOL:
1336 {
1337 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1338 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1339 pulse_1_len = SAMSUNG_PULSE_LEN;
1340 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1341 pulse_0_len = SAMSUNG_PULSE_LEN;
1342 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1343 has_stop_bit = SAMSUNG_STOP_BIT;
1344 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1345 n_auto_repetitions = 1; // 1 frame
1346 auto_repetition_pause_len = 0;
1347 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1348 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1349 break;
1350 }
1351
1352 case IRMP_SAMSUNG32_PROTOCOL:
1353 {
1354 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1355 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1356 pulse_1_len = SAMSUNG_PULSE_LEN;
1357 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1358 pulse_0_len = SAMSUNG_PULSE_LEN;
1359 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1360 has_stop_bit = SAMSUNG_STOP_BIT;
1361 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1362 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames
1363 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1364 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1365 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1366 break;
1367 }
1368 #endif
1369 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1370 case IRMP_MATSUSHITA_PROTOCOL:
1371 {
1372 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1373 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1374 pulse_1_len = MATSUSHITA_PULSE_LEN;
1375 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1376 pulse_0_len = MATSUSHITA_PULSE_LEN;
1377 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1378 has_stop_bit = MATSUSHITA_STOP_BIT;
1379 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1380 n_auto_repetitions = 1; // 1 frame
1381 auto_repetition_pause_len = 0;
1382 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1383 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1384 break;
1385 }
1386 #endif
1387 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1388 case IRMP_KASEIKYO_PROTOCOL:
1389 {
1390 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1391 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1392 pulse_1_len = KASEIKYO_PULSE_LEN;
1393 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1394 pulse_0_len = KASEIKYO_PULSE_LEN;
1395 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1396 has_stop_bit = KASEIKYO_STOP_BIT;
1397 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1398 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1399 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1400 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1401 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1402 break;
1403 }
1404 #endif
1405 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1406 case IRMP_RECS80_PROTOCOL:
1407 {
1408 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1409 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1410 pulse_1_len = RECS80_PULSE_LEN;
1411 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1412 pulse_0_len = RECS80_PULSE_LEN;
1413 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1414 has_stop_bit = RECS80_STOP_BIT;
1415 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1416 n_auto_repetitions = 1; // 1 frame
1417 auto_repetition_pause_len = 0;
1418 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1419 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1420 break;
1421 }
1422 #endif
1423 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1424 case IRMP_RECS80EXT_PROTOCOL:
1425 {
1426 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1427 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1428 pulse_1_len = RECS80EXT_PULSE_LEN;
1429 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1430 pulse_0_len = RECS80EXT_PULSE_LEN;
1431 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1432 has_stop_bit = RECS80EXT_STOP_BIT;
1433 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1434 n_auto_repetitions = 1; // 1 frame
1435 auto_repetition_pause_len = 0;
1436 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1437 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1438 break;
1439 }
1440 #endif
1441 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1442 case IRMP_RC5_PROTOCOL:
1443 {
1444 startbit_pulse_len = RC5_BIT_LEN;
1445 startbit_pause_len = RC5_BIT_LEN;
1446 pulse_len = RC5_BIT_LEN;
1447 pause_len = RC5_BIT_LEN;
1448 has_stop_bit = RC5_STOP_BIT;
1449 complete_data_len = RC5_COMPLETE_DATA_LEN;
1450 n_auto_repetitions = 1; // 1 frame
1451 auto_repetition_pause_len = 0;
1452 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1453 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1454 break;
1455 }
1456 #endif
1457 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1458 case IRMP_RC6_PROTOCOL:
1459 {
1460 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1461 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1462 pulse_len = RC6_BIT_LEN;
1463 pause_len = RC6_BIT_LEN;
1464 has_stop_bit = RC6_STOP_BIT;
1465 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1466 n_auto_repetitions = 1; // 1 frame
1467 auto_repetition_pause_len = 0;
1468 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1469 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1470 break;
1471 }
1472 #endif
1473 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1474 case IRMP_RC6A_PROTOCOL:
1475 {
1476 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1477 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1478 pulse_len = RC6_BIT_LEN;
1479 pause_len = RC6_BIT_LEN;
1480 has_stop_bit = RC6_STOP_BIT;
1481 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1482 n_auto_repetitions = 1; // 1 frame
1483 auto_repetition_pause_len = 0;
1484 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1485 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1486 break;
1487 }
1488 #endif
1489 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1490 case IRMP_DENON_PROTOCOL:
1491 {
1492 startbit_pulse_len = 0x00;
1493 startbit_pause_len = 0x00;
1494 pulse_1_len = DENON_PULSE_LEN;
1495 pause_1_len = DENON_1_PAUSE_LEN - 1;
1496 pulse_0_len = DENON_PULSE_LEN;
1497 pause_0_len = DENON_0_PAUSE_LEN - 1;
1498 has_stop_bit = DENON_STOP_BIT;
1499 complete_data_len = DENON_COMPLETE_DATA_LEN;
1500 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1501 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1502 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1503 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1504 break;
1505 }
1506 #endif
1507 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1508 case IRMP_THOMSON_PROTOCOL:
1509 {
1510 startbit_pulse_len = 0x00;
1511 startbit_pause_len = 0x00;
1512 pulse_1_len = THOMSON_PULSE_LEN;
1513 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1514 pulse_0_len = THOMSON_PULSE_LEN;
1515 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1516 has_stop_bit = THOMSON_STOP_BIT;
1517 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1518 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1519 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1520 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1521 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1522 break;
1523 }
1524 #endif
1525 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1526 case IRMP_NUBERT_PROTOCOL:
1527 {
1528 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1529 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1530 pulse_1_len = NUBERT_1_PULSE_LEN;
1531 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1532 pulse_0_len = NUBERT_0_PULSE_LEN;
1533 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1534 has_stop_bit = NUBERT_STOP_BIT;
1535 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1536 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1537 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1538 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1539 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1540 break;
1541 }
1542 #endif
1543 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1544 case IRMP_BANG_OLUFSEN_PROTOCOL:
1545 {
1546 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1547 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1548 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1549 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1550 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1551 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1552 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1553 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1554 n_auto_repetitions = 1; // 1 frame
1555 auto_repetition_pause_len = 0;
1556 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1557 last_bit_value = 0;
1558 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1559 break;
1560 }
1561 #endif
1562 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1563 case IRMP_GRUNDIG_PROTOCOL:
1564 {
1565 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1566 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1567 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1568 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1569 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1570 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1571 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1572 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1573 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1574 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1575 break;
1576 }
1577 #endif
1578 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1579 case IRMP_IR60_PROTOCOL:
1580 {
1581 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1582 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1583 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1584 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1585 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1586 complete_data_len = IR60_COMPLETE_DATA_LEN;
1587 n_auto_repetitions = IR60_FRAMES; // 2 frames
1588 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1589 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1590 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1591 break;
1592 }
1593 #endif
1594 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1595 case IRMP_NOKIA_PROTOCOL:
1596 {
1597 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1598 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1599 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1600 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1601 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1602 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1603 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1604 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1605 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1606 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1607 break;
1608 }
1609 #endif
1610 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1611 case IRMP_SIEMENS_PROTOCOL:
1612 {
1613 startbit_pulse_len = SIEMENS_BIT_LEN;
1614 startbit_pause_len = SIEMENS_BIT_LEN;
1615 pulse_len = SIEMENS_BIT_LEN;
1616 pause_len = SIEMENS_BIT_LEN;
1617 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1618 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;
1619 n_auto_repetitions = 1; // 1 frame
1620 auto_repetition_pause_len = 0;
1621 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1622 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1623 break;
1624 }
1625 #endif
1626 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1627 case IRMP_FDC_PROTOCOL:
1628 {
1629 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1630 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1631 complete_data_len = FDC_COMPLETE_DATA_LEN;
1632 pulse_1_len = FDC_PULSE_LEN;
1633 pause_1_len = FDC_1_PAUSE_LEN - 1;
1634 pulse_0_len = FDC_PULSE_LEN;
1635 pause_0_len = FDC_0_PAUSE_LEN - 1;
1636 has_stop_bit = FDC_STOP_BIT;
1637 n_auto_repetitions = 1; // 1 frame
1638 auto_repetition_pause_len = 0;
1639 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1640 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1641 break;
1642 }
1643 #endif
1644 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1645 case IRMP_RCCAR_PROTOCOL:
1646 {
1647 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1648 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1649 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1650 pulse_1_len = RCCAR_PULSE_LEN;
1651 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1652 pulse_0_len = RCCAR_PULSE_LEN;
1653 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1654 has_stop_bit = RCCAR_STOP_BIT;
1655 n_auto_repetitions = 1; // 1 frame
1656 auto_repetition_pause_len = 0;
1657 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1658 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1659 break;
1660 }
1661 #endif
1662 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1663 case IRMP_JVC_PROTOCOL:
1664 {
1665 if (repeat_counter != 0) // skip start bit if repetition frame
1666 {
1667 current_bit = 0;
1668 }
1669
1670 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1671 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1672 complete_data_len = JVC_COMPLETE_DATA_LEN;
1673 pulse_1_len = JVC_PULSE_LEN;
1674 pause_1_len = JVC_1_PAUSE_LEN - 1;
1675 pulse_0_len = JVC_PULSE_LEN;
1676 pause_0_len = JVC_0_PAUSE_LEN - 1;
1677 has_stop_bit = JVC_STOP_BIT;
1678 n_auto_repetitions = 1; // 1 frame
1679 auto_repetition_pause_len = 0;
1680 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1681 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1682 break;
1683 }
1684 #endif
1685 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1686 case IRMP_NIKON_PROTOCOL:
1687 {
1688 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1689 startbit_pause_len = 271 - 1; // NIKON_START_BIT_PAUSE_LEN;
1690 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1691 pulse_1_len = NIKON_PULSE_LEN;
1692 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1693 pulse_0_len = NIKON_PULSE_LEN;
1694 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1695 has_stop_bit = NIKON_STOP_BIT;
1696 n_auto_repetitions = 1; // 1 frame
1697 auto_repetition_pause_len = 0;
1698 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1699 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1700 break;
1701 }
1702 #endif
1703 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1704 case IRMP_LEGO_PROTOCOL:
1705 {
1706 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1707 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1708 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1709 pulse_1_len = LEGO_PULSE_LEN;
1710 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1711 pulse_0_len = LEGO_PULSE_LEN;
1712 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1713 has_stop_bit = LEGO_STOP_BIT;
1714 n_auto_repetitions = 1; // 1 frame
1715 auto_repetition_pause_len = 0;
1716 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1717 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1718 break;
1719 }
1720 #endif
1721 default:
1722 {
1723 irsnd_busy = FALSE;
1724 break;
1725 }
1726 }
1727 }
1728 }
1729
1730 if (irsnd_busy)
1731 {
1732 new_frame = FALSE;
1733
1734 switch (irsnd_protocol)
1735 {
1736 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1737 case IRMP_SIRCS_PROTOCOL:
1738 #endif
1739 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1740 case IRMP_NEC_PROTOCOL:
1741 #endif
1742 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1743 case IRMP_NEC16_PROTOCOL:
1744 #endif
1745 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1746 case IRMP_NEC42_PROTOCOL:
1747 #endif
1748 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1749 case IRMP_SAMSUNG_PROTOCOL:
1750 case IRMP_SAMSUNG32_PROTOCOL:
1751 #endif
1752 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1753 case IRMP_MATSUSHITA_PROTOCOL:
1754 #endif
1755 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1756 case IRMP_KASEIKYO_PROTOCOL:
1757 #endif
1758 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1759 case IRMP_RECS80_PROTOCOL:
1760 #endif
1761 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1762 case IRMP_RECS80EXT_PROTOCOL:
1763 #endif
1764 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1765 case IRMP_DENON_PROTOCOL:
1766 #endif
1767 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1768 case IRMP_THOMSON_PROTOCOL:
1769 #endif
1770 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1771 case IRMP_NUBERT_PROTOCOL:
1772 #endif
1773 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1774 case IRMP_BANG_OLUFSEN_PROTOCOL:
1775 #endif
1776 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1777 case IRMP_FDC_PROTOCOL:
1778 #endif
1779 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1780 case IRMP_RCCAR_PROTOCOL:
1781 #endif
1782 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1783 case IRMP_JVC_PROTOCOL:
1784 #endif
1785 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1786 case IRMP_NIKON_PROTOCOL:
1787 #endif
1788 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1789 case IRMP_LEGO_PROTOCOL:
1790 #endif
1791
1792
1793 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
1794 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
1795 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
1796 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
1797 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1798 {
1799 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1800 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
1801 {
1802 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
1803 {
1804 auto_repetition_pause_len--;
1805 }
1806
1807 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1808 {
1809 repeat_frame_pause_len--;
1810 }
1811 }
1812 #endif
1813
1814 if (pulse_counter == 0)
1815 {
1816 if (current_bit == 0xFF) // send start bit
1817 {
1818 pulse_len = startbit_pulse_len;
1819 pause_len = startbit_pause_len;
1820 }
1821 else if (current_bit < complete_data_len) // send n'th bit
1822 {
1823 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1824 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
1825 {
1826 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
1827 {
1828 pulse_len = SAMSUNG_PULSE_LEN;
1829 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1830 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1831 }
1832 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
1833 {
1834 pulse_len = SAMSUNG_PULSE_LEN;
1835 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1836 }
1837 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
1838 {
1839 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1840
1841 pulse_len = SAMSUNG_PULSE_LEN;
1842 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1843 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1844 }
1845 }
1846 else
1847 #endif
1848
1849 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1850 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
1851 {
1852 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
1853 {
1854 pulse_len = NEC_PULSE_LEN;
1855 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1856 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1857 }
1858 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
1859 {
1860 pulse_len = NEC_PULSE_LEN;
1861 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1862 }
1863 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
1864 {
1865 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1866
1867 pulse_len = NEC_PULSE_LEN;
1868 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1869 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1870 }
1871 }
1872 else
1873 #endif
1874
1875 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1876 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
1877 {
1878 if (current_bit == 0) // send 2nd start bit
1879 {
1880 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1881 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1882 }
1883 else if (current_bit == 1) // send 3rd start bit
1884 {
1885 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
1886 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
1887 }
1888 else if (current_bit == 2) // send 4th start bit
1889 {
1890 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1891 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1892 }
1893 else if (current_bit == 19) // send trailer bit
1894 {
1895 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1896 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
1897 }
1898 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
1899 {
1900 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
1901 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1902
1903 if (cur_bit_value == last_bit_value)
1904 {
1905 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
1906 }
1907 else
1908 {
1909 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
1910 last_bit_value = cur_bit_value;
1911 }
1912 }
1913 }
1914 else
1915 #endif
1916 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
1917 {
1918 pulse_len = pulse_1_len;
1919 pause_len = pause_1_len;
1920 }
1921 else
1922 {
1923 pulse_len = pulse_0_len;
1924 pause_len = pause_0_len;
1925 }
1926 }
1927 else if (has_stop_bit) // send stop bit
1928 {
1929 pulse_len = pulse_0_len;
1930
1931 if (auto_repetition_counter < n_auto_repetitions)
1932 {
1933 pause_len = pause_0_len;
1934 }
1935 else
1936 {
1937 pause_len = 255; // last frame: pause of 255
1938 }
1939 }
1940 }
1941
1942 if (pulse_counter < pulse_len)
1943 {
1944 if (pulse_counter == 0)
1945 {
1946 irsnd_on ();
1947 }
1948 pulse_counter++;
1949 }
1950 else if (pause_counter < pause_len)
1951 {
1952 if (pause_counter == 0)
1953 {
1954 irsnd_off ();
1955 }
1956 pause_counter++;
1957 }
1958 else
1959 {
1960 current_bit++;
1961
1962 if (current_bit >= complete_data_len + has_stop_bit)
1963 {
1964 current_bit = 0xFF;
1965 auto_repetition_counter++;
1966
1967 if (auto_repetition_counter == n_auto_repetitions)
1968 {
1969 irsnd_busy = FALSE;
1970 auto_repetition_counter = 0;
1971 }
1972 new_frame = TRUE;
1973 }
1974
1975 pulse_counter = 0;
1976 pause_counter = 0;
1977 }
1978 break;
1979 }
1980 #endif
1981
1982 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1983 case IRMP_RC5_PROTOCOL:
1984 #endif
1985 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1986 case IRMP_RC6_PROTOCOL:
1987 #endif
1988 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1989 case IRMP_RC6A_PROTOCOL:
1990 #endif
1991 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1992 case IRMP_SIEMENS_PROTOCOL:
1993 #endif
1994 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1995 case IRMP_GRUNDIG_PROTOCOL:
1996 #endif
1997 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1998 case IRMP_IR60_PROTOCOL:
1999 #endif
2000 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2001 case IRMP_NOKIA_PROTOCOL:
2002 #endif
2003
2004 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2005 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2006 {
2007 if (pulse_counter == pulse_len && pause_counter == pause_len)
2008 {
2009 current_bit++;
2010
2011 if (current_bit >= complete_data_len)
2012 {
2013 current_bit = 0xFF;
2014
2015 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2016 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2017 {
2018 auto_repetition_counter++;
2019
2020 if (repeat_counter > 0)
2021 { // set 117 msec pause time
2022 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2023 }
2024
2025 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2026 {
2027 n_auto_repetitions++; // increment number of auto repetitions
2028 repeat_counter++;
2029 }
2030 else if (auto_repetition_counter == n_auto_repetitions)
2031 {
2032 irsnd_busy = FALSE;
2033 auto_repetition_counter = 0;
2034 }
2035 }
2036 else
2037 #endif
2038 {
2039 irsnd_busy = FALSE;
2040 }
2041
2042 new_frame = TRUE;
2043 irsnd_off ();
2044 }
2045
2046 pulse_counter = 0;
2047 pause_counter = 0;
2048 }
2049
2050 if (! new_frame)
2051 {
2052 uint8_t first_pulse;
2053
2054 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2055 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2056 {
2057 if (current_bit == 0xFF || // start bit of start-frame
2058 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2059 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2060 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2061 {
2062 pulse_len = startbit_pulse_len;
2063 pause_len = startbit_pause_len;
2064 first_pulse = TRUE;
2065 }
2066 else // send n'th bit
2067 {
2068 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2069 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2070 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2071 }
2072 }
2073 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2074 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)
2075 #endif
2076 {
2077 if (current_bit == 0xFF) // 1 start bit
2078 {
2079 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2080 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2081 {
2082 pulse_len = startbit_pulse_len;
2083 pause_len = startbit_pause_len;
2084 }
2085 #endif
2086 first_pulse = TRUE;
2087 }
2088 else // send n'th bit
2089 {
2090 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2091 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2092 {
2093 pulse_len = RC6_BIT_LEN;
2094 pause_len = RC6_BIT_LEN;
2095
2096 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2097 {
2098 if (current_bit == 4) // toggle bit (double len)
2099 {
2100 pulse_len = 2 * RC6_BIT_LEN;
2101 pause_len = 2 * RC6_BIT_LEN;
2102 }
2103 }
2104 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2105 {
2106 if (current_bit == 4) // toggle bit (double len)
2107 {
2108 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2109 pause_len = 2 * RC6_BIT_LEN;
2110 }
2111 else if (current_bit == 5) // toggle bit (double len)
2112 {
2113 pause_len = 2 * RC6_BIT_LEN;
2114 }
2115 }
2116 }
2117 #endif
2118 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2119 }
2120
2121 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2122 {
2123 first_pulse = first_pulse ? FALSE : TRUE;
2124 }
2125 }
2126
2127 if (first_pulse)
2128 {
2129 if (pulse_counter < pulse_len)
2130 {
2131 if (pulse_counter == 0)
2132 {
2133 irsnd_on ();
2134 }
2135 pulse_counter++;
2136 }
2137 else // if (pause_counter < pause_len)
2138 {
2139 if (pause_counter == 0)
2140 {
2141 irsnd_off ();
2142 }
2143 pause_counter++;
2144 }
2145 }
2146 else
2147 {
2148 if (pause_counter < pause_len)
2149 {
2150 if (pause_counter == 0)
2151 {
2152 irsnd_off ();
2153 }
2154 pause_counter++;
2155 }
2156 else // if (pulse_counter < pulse_len)
2157 {
2158 if (pulse_counter == 0)
2159 {
2160 irsnd_on ();
2161 }
2162 pulse_counter++;
2163 }
2164 }
2165 }
2166 break;
2167 }
2168 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2169 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2170
2171 default:
2172 {
2173 irsnd_busy = FALSE;
2174 break;
2175 }
2176 }
2177 }
2178
2179 if (! irsnd_busy)
2180 {
2181 if (repeat_counter < n_repeat_frames)
2182 {
2183 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2184 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2185 {
2186 irsnd_buffer[2] |= 0x0F;
2187 }
2188 #endif
2189 repeat_counter++;
2190 irsnd_busy = TRUE;
2191 }
2192 else
2193 {
2194 irsnd_busy = TRUE; //Rainer
2195 send_trailer = TRUE;
2196 n_repeat_frames = 0;
2197 repeat_counter = 0;
2198 }
2199 }
2200 }
2201
2202 #ifdef DEBUG
2203 if (irsnd_is_on)
2204 {
2205 putchar ('0');
2206 }
2207 else
2208 {
2209 putchar ('1');
2210 }
2211 #endif
2212
2213 return irsnd_busy;
2214 }
2215
2216 #ifdef DEBUG
2217
2218 // main function - for unix/linux + windows only!
2219 // AVR: see main.c!
2220 // Compile it under linux with:
2221 // cc irsnd.c -o irsnd
2222 //
2223 // usage: ./irsnd protocol hex-address hex-command >filename
2224
2225 int
2226 main (int argc, char ** argv)
2227 {
2228 int protocol;
2229 int address;
2230 int command;
2231 IRMP_DATA irmp_data;
2232
2233 if (argc != 4 && argc != 5)
2234 {
2235 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2236 return 1;
2237 }
2238
2239 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2240 sscanf (argv[2], "%x", &address) == 1 &&
2241 sscanf (argv[3], "%x", &command) == 1)
2242 {
2243 irmp_data.protocol = protocol;
2244 irmp_data.address = address;
2245 irmp_data.command = command;
2246
2247 if (argc == 5)
2248 {
2249 irmp_data.flags = atoi (argv[4]);
2250 }
2251 else
2252 {
2253 irmp_data.flags = 0;
2254 }
2255
2256 irsnd_init ();
2257
2258 (void) irsnd_send_data (&irmp_data, TRUE);
2259
2260 while (irsnd_busy)
2261 {
2262 irsnd_ISR ();
2263 }
2264
2265 putchar ('\n');
2266 }
2267 else
2268 {
2269 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2270 return 1;
2271 }
2272 return 0;
2273 }
2274
2275 #endif // DEBUG
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)