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Version 2.4.0:
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.72 2014/02/20 14:55:17 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
47 # if IRSND_OCx == IRSND_OC0A // OC0A
48 # define IRSND_PORT_LETTER B
49 # define IRSND_BIT_NUMBER 0
50 # elif IRSND_OCx == IRSND_OC0B // OC0B
51 # define IRSND_PORT_LETTER B
52 # define IRSND_BIT_NUMBER 1
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT_LETTER A
59 # define IRSND_BIT_NUMBER 2
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
64 # if IRSND_OCx == IRSND_OC2 // OC0A
65 # define IRSND_PORT_LETTER B
66 # define IRSND_BIT_NUMBER 3
67 # else
68 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
69 # endif // IRSND_OCx
70 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
71 # if IRSND_OCx == IRSND_OC2 // OC2
72 # define IRSND_PORT_LETTER D
73 # define IRSND_BIT_NUMBER 7
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
76 # endif // IRSND_OCx
77 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
78 # if IRSND_OCx == IRSND_OC2 // OC2
79 # define IRSND_PORT_LETTER B
80 # define IRSND_BIT_NUMBER 1
81 # elif IRSND_OCx == IRSND_OC0 // OC0
82 # define IRSND_PORT_LETTER B
83 # define IRSND_BIT_NUMBER 0
84 # else
85 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
86 # endif // IRSND_OCx
87 #elif defined (__AVR_ATmega164__) \
88 || defined (__AVR_ATmega324__) \
89 || defined (__AVR_ATmega644__) \
90 || defined (__AVR_ATmega644P__) \
91 || defined (__AVR_ATmega1284__) \
92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
93 # if IRSND_OCx == IRSND_OC2A // OC2A
94 # define IRSND_PORT_LETTER D
95 # define IRSND_BIT_NUMBER 7
96 # elif IRSND_OCx == IRSND_OC2B // OC2B
97 # define IRSND_PORT_LETTER D
98 # define IRSND_BIT_NUMBER 6
99 # elif IRSND_OCx == IRSND_OC0A // OC0A
100 # define IRSND_PORT_LETTER B
101 # define IRSND_BIT_NUMBER 3
102 # elif IRSND_OCx == IRSND_OC0B // OC0B
103 # define IRSND_PORT_LETTER B
104 # define IRSND_BIT_NUMBER 4
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT_LETTER B
116 # define IRSND_BIT_NUMBER 3
117 # elif IRSND_OCx == IRSND_OC2B // OC2B
118 # define IRSND_PORT_LETTER D
119 # define IRSND_BIT_NUMBER 3
120 # elif IRSND_OCx == IRSND_OC0A // OC0A
121 # define IRSND_PORT_LETTER D
122 # define IRSND_BIT_NUMBER 6
123 # elif IRSND_OCx == IRSND_OC0B // OC0B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 5
126 # else
127 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
128 # endif // IRSND_OCx
129 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
130 # if IRSND_OCx == IRSND_OC0
131 # define IRSND_PORT_LETTER B
132 # define IRSND_BIT_NUMBER 0
133 # elif IRSND_OCx == IRSND_OC1A
134 # define IRSND_PORT_LETTER D
135 # define IRSND_BIT_NUMBER 5
136 # elif IRSND_OCx == IRSND_OC1B
137 # define IRSND_PORT_LETTER E
138 # define IRSND_BIT_NUMBER 2
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (PIC_C18) //Microchip C18 compiler
143 //Nothing here to do here -> See irsndconfig.h
144 #elif defined (ARM_STM32) //STM32
145 //Nothing here to do here -> See irsndconfig.h
146 #else
147 # if !defined (unix) && !defined (WIN32)
148 # error mikrocontroller not defined, please fill in definitions here.
149 # endif // unix, WIN32
150 #endif // __AVR...
151
152 #if defined(ATMEL_AVR)
153 # define _CONCAT(a,b) a##b
154 # define CONCAT(a,b) _CONCAT(a,b)
155 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
156 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
157 # define IRSND_BIT IRSND_BIT_NUMBER
158 #endif
159
160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
161 typedef uint16_t IRSND_PAUSE_LEN;
162 #else
163 typedef uint8_t IRSND_PAUSE_LEN;
164 #endif
165
166 /*---------------------------------------------------------------------------------------------------------------------------------------------------
167 * IR timings
168 *---------------------------------------------------------------------------------------------------------------------------------------------------
169 */
170 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
171 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
172 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
173 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
174 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
175 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
176 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
177
178 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
179 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
181 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
182 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
183 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
184 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
187 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
188 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
189 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
190 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
191 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
192
193 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
194 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
195
196 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
197 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
198 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
199 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
200 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
201 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
202
203 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
204 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
205 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
206 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
207 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
208 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
209 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
210
211 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
212 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
213 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
214 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
215 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
216 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
217
218 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
219 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
220 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
221
222 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
223 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
224 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
225 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
226 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
227
228 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
229 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
230 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
231 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
232 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
233
234 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
235 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
236 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
237 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
238 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
239
240 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
241 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
242 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
243 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
244 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
245 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
246
247 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
248 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
249 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
250 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
251 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
252 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
253 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
254 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
255
256 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
257 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
258 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
259 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
260 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
261 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
262 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
263 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
264 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
265 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
266 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
267 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
268
269 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
270 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
271 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
272 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
273 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
274
275 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
276
277 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
278 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
279 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
280
281 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
282 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
283 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
284 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
285 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
286
287 #ifdef PIC_C18 // PIC C18
288 # define IRSND_FREQ_TYPE uint8_t
289 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
290 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
291 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
292 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
293 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
294 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
295 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
296 #elif defined (ARM_STM32) // STM32
297 # define IRSND_FREQ_TYPE uint32_t
298 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
299 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
300 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
301 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
302 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
303 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
304 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
305 #else // AVR
306 # if F_CPU >= 16000000L
307 # define AVR_PRESCALER 8
308 # else
309 # define AVR_PRESCALER 1
310 # endif
311 # define IRSND_FREQ_TYPE uint8_t
312 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
313 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
314 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
315 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
316 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
317 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
318 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
319 #endif
320
321 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
322 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
323 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
324 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
325 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
326 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
327
328 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
329 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
330 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
331 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
332 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
333 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
334
335 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
336 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
337 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
338 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
339 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
340 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
341 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
342
343 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
344 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
345 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
346 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
347 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
348 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
349 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
350
351 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
352 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
353 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
354 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
355 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
356 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
357 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
358
359 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
360 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
361 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
362 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
363 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
364 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
365
366 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
367 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
368 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
369 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
370 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
371 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
372 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
373
374 static volatile uint8_t irsnd_busy = 0;
375 static volatile uint8_t irsnd_protocol = 0;
376 static volatile uint8_t irsnd_buffer[6] = {0};
377 static volatile uint8_t irsnd_repeat = 0;
378 static volatile uint8_t irsnd_is_on = FALSE;
379
380 #if IRSND_USE_CALLBACK == 1
381 static void (*irsnd_callback_ptr) (uint8_t);
382 #endif // IRSND_USE_CALLBACK == 1
383
384 /*---------------------------------------------------------------------------------------------------------------------------------------------------
385 * Switch PWM on
386 *---------------------------------------------------------------------------------------------------------------------------------------------------
387 */
388 static void
389 irsnd_on (void)
390 {
391 if (! irsnd_is_on)
392 {
393 #ifndef ANALYZE
394 # if defined(PIC_C18) // PIC C18
395 PWMon();
396 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
397 # elif defined (ARM_STM32) // STM32
398 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
399 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
400 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
401 # else // AVR
402 # if IRSND_OCx == IRSND_OC2 // use OC2
403 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
404 # elif IRSND_OCx == IRSND_OC2A // use OC2A
405 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
406 # elif IRSND_OCx == IRSND_OC2B // use OC2B
407 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
408 # elif IRSND_OCx == IRSND_OC0 // use OC0
409 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
410 # elif IRSND_OCx == IRSND_OC0A // use OC0A
411 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
412 # elif IRSND_OCx == IRSND_OC0B // use OC0B
413 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
414 # else
415 # error wrong value of IRSND_OCx
416 # endif // IRSND_OCx
417 # endif // C18
418 #endif // ANALYZE
419
420 #if IRSND_USE_CALLBACK == 1
421 if (irsnd_callback_ptr)
422 {
423 (*irsnd_callback_ptr) (TRUE);
424 }
425 #endif // IRSND_USE_CALLBACK == 1
426
427 irsnd_is_on = TRUE;
428 }
429 }
430
431 /*---------------------------------------------------------------------------------------------------------------------------------------------------
432 * Switch PWM off
433 * @details Switches PWM off
434 *---------------------------------------------------------------------------------------------------------------------------------------------------
435 */
436 static void
437 irsnd_off (void)
438 {
439 if (irsnd_is_on)
440 {
441 #ifndef ANALYZE
442
443 # if defined(PIC_C18) // PIC C18
444 PWMoff();
445 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
446 # elif defined (ARM_STM32) // STM32
447 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
448 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
449 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
450 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
451 # else //AVR
452
453 # if IRSND_OCx == IRSND_OC2 // use OC2
454 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
455 # elif IRSND_OCx == IRSND_OC2A // use OC2A
456 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
457 # elif IRSND_OCx == IRSND_OC2B // use OC2B
458 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
459 # elif IRSND_OCx == IRSND_OC0 // use OC0
460 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
461 # elif IRSND_OCx == IRSND_OC0A // use OC0A
462 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
463 # elif IRSND_OCx == IRSND_OC0B // use OC0B
464 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
465 # else
466 # error wrong value of IRSND_OCx
467 # endif // IRSND_OCx
468 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
469 # endif //C18
470 #endif // ANALYZE
471
472 #if IRSND_USE_CALLBACK == 1
473 if (irsnd_callback_ptr)
474 {
475 (*irsnd_callback_ptr) (FALSE);
476 }
477 #endif // IRSND_USE_CALLBACK == 1
478
479 irsnd_is_on = FALSE;
480 }
481 }
482
483 /*---------------------------------------------------------------------------------------------------------------------------------------------------
484 * Set PWM frequency
485 * @details sets pwm frequency
486 *---------------------------------------------------------------------------------------------------------------------------------------------------
487 */
488 static void
489 irsnd_set_freq (IRSND_FREQ_TYPE freq)
490 {
491 #ifndef ANALYZE
492 # if defined(PIC_C18) // PIC C18
493 OpenPWM(freq);
494 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
495 PWMoff();
496 # elif defined (ARM_STM32) // STM32
497 static uint32_t TimeBaseFreq = 0;
498
499 if (TimeBaseFreq == 0)
500 {
501 RCC_ClocksTypeDef RCC_ClocksStructure;
502 /* Get system clocks and store timer clock in variable */
503 RCC_GetClocksFreq(&RCC_ClocksStructure);
504 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
505 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
506 {
507 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
508 }
509 else
510 {
511 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
512 }
513 # else
514 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
515 {
516 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
517 }
518 else
519 {
520 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
521 }
522 # endif
523 }
524
525 freq = TimeBaseFreq/freq;
526
527 /* Set frequency */
528 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
529 /* Set duty cycle */
530 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
531 # else // AVR
532
533 # if IRSND_OCx == IRSND_OC2
534 OCR2 = freq; // use register OCR2 for OC2
535 # elif IRSND_OCx == IRSND_OC2A // use OC2A
536 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
537 # elif IRSND_OCx == IRSND_OC2B // use OC2B
538 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
539 # elif IRSND_OCx == IRSND_OC0 // use OC0
540 OCR0 = freq; // use register OCR2 for OC2
541 # elif IRSND_OCx == IRSND_OC0A // use OC0A
542 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
543 # elif IRSND_OCx == IRSND_OC0B // use OC0B
544 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
545 # else
546 # error wrong value of IRSND_OCx
547 # endif
548 # endif //PIC_C18
549 #endif // ANALYZE
550 }
551
552 /*---------------------------------------------------------------------------------------------------------------------------------------------------
553 * Initialize the PWM
554 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
555 *---------------------------------------------------------------------------------------------------------------------------------------------------
556 */
557 void
558 irsnd_init (void)
559 {
560 #ifndef ANALYZE
561 # if defined(PIC_C18) // PIC C18
562 OpenTimer;
563 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
564 IRSND_PIN = 0; // set IO to outout
565 PWMoff();
566 # elif defined (ARM_STM32) // STM32
567 GPIO_InitTypeDef GPIO_InitStructure;
568 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
569 TIM_OCInitTypeDef TIM_OCInitStructure;
570
571 /* GPIOx clock enable */
572 # if defined (ARM_STM32L1XX)
573 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
574 # elif defined (ARM_STM32F10X)
575 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
576 # elif defined (ARM_STM32F4XX)
577 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
578 # endif
579
580 /* GPIO Configuration */
581 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
582 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
583 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
584 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
585 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
586 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
587 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
588 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
589 # elif defined (ARM_STM32F10X)
590 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
591 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
592 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
593 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
594 # endif
595
596 /* TIMx clock enable */
597 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
598 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
599 # else
600 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
601 # endif
602
603 /* Time base configuration */
604 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
605 TIM_TimeBaseStructure.TIM_Prescaler = 0;
606 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
607 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
608 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
609
610 /* PWM1 Mode configuration */
611 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
612 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
613 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
614 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
615 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
616
617 /* Preload configuration */
618 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
619 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
620
621 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
622 # else // AVR
623 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
624 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
625
626 # if IRSND_OCx == IRSND_OC2 // use OC2
627 TCCR2 = (1<<WGM21); // CTC mode
628 # if AVR_PRESCALER == 8
629 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
630 # else
631 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
632 # endif
633 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
634 TCCR2A = (1<<WGM21); // CTC mode
635 # if AVR_PRESCALER == 8
636 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
637 # else
638 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
639 # endif
640 # elif IRSND_OCx == IRSND_OC0 // use OC0
641 TCCR0 = (1<<WGM01); // CTC mode
642 # if AVR_PRESCALER == 8
643 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
644 # else
645 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
646 # endif
647 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
648 TCCR0A = (1<<WGM01); // CTC mode
649 # if AVR_PRESCALER == 8
650 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
651 # else
652 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
653 # endif
654 # else
655 # error wrong value of IRSND_OCx
656 # endif
657 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
658 # endif //PIC_C18
659 #endif // ANALYZE
660 }
661
662 #if IRSND_USE_CALLBACK == 1
663 void
664 irsnd_set_callback_ptr (void (*cb)(uint8_t))
665 {
666 irsnd_callback_ptr = cb;
667 }
668 #endif // IRSND_USE_CALLBACK == 1
669
670 uint8_t
671 irsnd_is_busy (void)
672 {
673 return irsnd_busy;
674 }
675
676 static uint16_t
677 bitsrevervse (uint16_t x, uint8_t len)
678 {
679 uint16_t xx = 0;
680
681 while(len)
682 {
683 xx <<= 1;
684 if (x & 1)
685 {
686 xx |= 1;
687 }
688 x >>= 1;
689 len--;
690 }
691 return xx;
692 }
693
694
695 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
696 static uint8_t sircs_additional_bitlen;
697 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
698
699 uint8_t
700 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
701 {
702 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
703 static uint8_t toggle_bit_recs80;
704 #endif
705 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
706 static uint8_t toggle_bit_recs80ext;
707 #endif
708 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
709 static uint8_t toggle_bit_rc5;
710 #endif
711 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
712 static uint8_t toggle_bit_rc6;
713 #endif
714 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
715 static uint8_t toggle_bit_thomson;
716 #endif
717 uint16_t address;
718 uint16_t command;
719
720 if (do_wait)
721 {
722 while (irsnd_busy)
723 {
724 // do nothing;
725 }
726 }
727 else if (irsnd_busy)
728 {
729 return (FALSE);
730 }
731
732 irsnd_protocol = irmp_data_p->protocol;
733 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
734
735 switch (irsnd_protocol)
736 {
737 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
738 case IRMP_SIRCS_PROTOCOL:
739 {
740 // uint8_t sircs_additional_command_len;
741 uint8_t sircs_additional_address_len;
742
743 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
744
745 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
746 {
747 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
748 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
749 }
750 else
751 {
752 // sircs_additional_command_len = sircs_additional_bitlen;
753 sircs_additional_address_len = 0;
754 }
755
756 command = bitsrevervse (irmp_data_p->command, 15);
757
758 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
759 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
760
761 if (sircs_additional_address_len > 0)
762 {
763 address = bitsrevervse (irmp_data_p->address, 5);
764 irsnd_buffer[1] |= (address & 0x0010) >> 4;
765 irsnd_buffer[2] = (address & 0x000F) << 4;
766 }
767 irsnd_busy = TRUE;
768 break;
769 }
770 #endif
771 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
772 case IRMP_APPLE_PROTOCOL:
773 {
774 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
775 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
776
777 address = bitsrevervse (address, NEC_ADDRESS_LEN);
778 command = bitsrevervse (command, NEC_COMMAND_LEN);
779
780 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
781
782 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
783 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
784 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
785 irsnd_buffer[3] = 0x8B; // 10001011 (id)
786 irsnd_busy = TRUE;
787 break;
788 }
789 case IRMP_NEC_PROTOCOL:
790 {
791 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
792 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
793
794 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
795 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
796 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
797 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
798 irsnd_busy = TRUE;
799 break;
800 }
801 #endif
802 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
803 case IRMP_NEC16_PROTOCOL:
804 {
805 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
806 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
807
808 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
809 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
810 irsnd_busy = TRUE;
811 break;
812 }
813 #endif
814 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
815 case IRMP_NEC42_PROTOCOL:
816 {
817 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
818 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
819
820 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
821 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
822 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
823 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
824 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
825 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
826 irsnd_busy = TRUE;
827 break;
828 }
829 #endif
830 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
831 case IRMP_SAMSUNG_PROTOCOL:
832 {
833 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
834 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
835
836 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
837 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
838 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
839 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
840 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
841 irsnd_busy = TRUE;
842 break;
843 }
844 case IRMP_SAMSUNG32_PROTOCOL:
845 {
846 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
847 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
848
849 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
850 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
851 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
852 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
853 irsnd_busy = TRUE;
854 break;
855 }
856 #endif
857 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
858 case IRMP_MATSUSHITA_PROTOCOL:
859 {
860 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
861 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
862
863 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
864 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
865 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
866 irsnd_busy = TRUE;
867 break;
868 }
869 #endif
870 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
871 case IRMP_KASEIKYO_PROTOCOL:
872 {
873 uint8_t xor_value;
874 uint16_t genre2;
875
876 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
877 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
878 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
879
880 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
881
882 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
883 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
884 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
885 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
886 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
887
888 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
889
890 irsnd_buffer[5] = xor_value;
891 irsnd_busy = TRUE;
892 break;
893 }
894 #endif
895 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
896 case IRMP_RECS80_PROTOCOL:
897 {
898 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
899
900 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
901 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
902 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
903 irsnd_busy = TRUE;
904 break;
905 }
906 #endif
907 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
908 case IRMP_RECS80EXT_PROTOCOL:
909 {
910 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
911
912 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
913 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
914 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
915 irsnd_busy = TRUE;
916 break;
917 }
918 #endif
919 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
920 case IRMP_RC5_PROTOCOL:
921 {
922 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
923
924 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
925 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
926 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
927 irsnd_busy = TRUE;
928 break;
929 }
930 #endif
931 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
932 case IRMP_RC6_PROTOCOL:
933 {
934 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
935
936 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
937 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
938 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
939 irsnd_busy = TRUE;
940 break;
941 }
942 #endif
943 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
944 case IRMP_RC6A_PROTOCOL:
945 {
946 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
947
948 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
949 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
950 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
951 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
952 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
953 irsnd_busy = TRUE;
954 break;
955 }
956 #endif
957 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
958 case IRMP_DENON_PROTOCOL:
959 {
960 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
961 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
962 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
963 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
964 irsnd_busy = TRUE;
965 break;
966 }
967 #endif
968 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
969 case IRMP_THOMSON_PROTOCOL:
970 {
971 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
972
973 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
974 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
975 irsnd_busy = TRUE;
976 break;
977 }
978 #endif
979 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
980 case IRMP_NUBERT_PROTOCOL:
981 {
982 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
983 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
984 irsnd_busy = TRUE;
985 break;
986 }
987 #endif
988 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
989 case IRMP_BANG_OLUFSEN_PROTOCOL:
990 {
991 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
992 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
993 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
994 irsnd_busy = TRUE;
995 break;
996 }
997 #endif
998 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
999 case IRMP_GRUNDIG_PROTOCOL:
1000 {
1001 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);
1002
1003 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1004 irsnd_buffer[1] = 0xC0; // 11
1005 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1006 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1007
1008 irsnd_busy = TRUE;
1009 break;
1010 }
1011 #endif
1012 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1013 case IRMP_IR60_PROTOCOL:
1014 {
1015 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1016 #if 0
1017 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1018 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1019 #else
1020 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1021 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1022 #endif
1023
1024 irsnd_busy = TRUE;
1025 break;
1026 }
1027 #endif
1028 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1029 case IRMP_NOKIA_PROTOCOL:
1030 {
1031 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1032 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1033
1034 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1035 irsnd_buffer[1] = 0xFF; // 11111111
1036 irsnd_buffer[2] = 0x80; // 1
1037 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1038 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1039 irsnd_buffer[5] = (address << 7); // A
1040
1041 irsnd_busy = TRUE;
1042 break;
1043 }
1044 #endif
1045 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1046 case IRMP_SIEMENS_PROTOCOL:
1047 {
1048 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1049 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1050 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1051
1052 irsnd_busy = TRUE;
1053 break;
1054 }
1055 #endif
1056 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1057 case IRMP_RUWIDO_PROTOCOL:
1058 {
1059 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1060 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1061 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1062 irsnd_busy = TRUE;
1063 break;
1064 }
1065 #endif
1066 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1067 case IRMP_FDC_PROTOCOL:
1068 {
1069 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1070 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1071
1072 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1073 irsnd_buffer[1] = 0; // 00000000
1074 irsnd_buffer[2] = 0; // 0000RRRR
1075 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1076 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1077 irsnd_busy = TRUE;
1078 break;
1079 }
1080 #endif
1081 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1082 case IRMP_RCCAR_PROTOCOL:
1083 {
1084 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1085 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1086
1087 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1088 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1089
1090 irsnd_busy = TRUE;
1091 break;
1092 }
1093 #endif
1094 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1095 case IRMP_JVC_PROTOCOL:
1096 {
1097 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1098 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1099
1100 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1101 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1102
1103 irsnd_busy = TRUE;
1104 break;
1105 }
1106 #endif
1107 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1108 case IRMP_NIKON_PROTOCOL:
1109 {
1110 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1111 irsnd_busy = TRUE;
1112 break;
1113 }
1114 #endif
1115 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1116 case IRMP_LEGO_PROTOCOL:
1117 {
1118 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1119
1120 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1121 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1122 irsnd_busy = TRUE;
1123 break;
1124 }
1125 #endif
1126 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1127 case IRMP_A1TVBOX_PROTOCOL:
1128 {
1129 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1130 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1131 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1132
1133 irsnd_busy = TRUE;
1134 break;
1135 }
1136 #endif
1137 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1138 case IRMP_ROOMBA_PROTOCOL:
1139 {
1140
1141 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1142 irsnd_busy = TRUE;
1143 break;
1144 }
1145 #endif
1146 default:
1147 {
1148 break;
1149 }
1150 }
1151
1152 return irsnd_busy;
1153 }
1154
1155 void
1156 irsnd_stop (void)
1157 {
1158 irsnd_repeat = 0;
1159 }
1160
1161 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1162 * ISR routine
1163 * @details ISR routine, called 10000 times per second
1164 *---------------------------------------------------------------------------------------------------------------------------------------------------
1165 */
1166 uint8_t
1167 irsnd_ISR (void)
1168 {
1169 static uint8_t send_trailer = FALSE;
1170 static uint8_t current_bit = 0xFF;
1171 static uint8_t pulse_counter = 0;
1172 static IRSND_PAUSE_LEN pause_counter = 0;
1173 static uint8_t startbit_pulse_len = 0;
1174 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1175 static uint8_t pulse_1_len = 0;
1176 static uint8_t pause_1_len = 0;
1177 static uint8_t pulse_0_len = 0;
1178 static uint8_t pause_0_len = 0;
1179 static uint8_t has_stop_bit = 0;
1180 static uint8_t new_frame = TRUE;
1181 static uint8_t complete_data_len = 0;
1182 static uint8_t n_repeat_frames = 0; // number of repetition frames
1183 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1184 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1185 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1186 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1187 static uint8_t repeat_counter = 0; // repeat counter
1188 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1189 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1190 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1191 static uint8_t last_bit_value;
1192 #endif
1193 static uint8_t pulse_len = 0xFF;
1194 static IRSND_PAUSE_LEN pause_len = 0xFF;
1195
1196 if (irsnd_busy)
1197 {
1198 if (current_bit == 0xFF && new_frame) // start of transmission...
1199 {
1200 if (auto_repetition_counter > 0)
1201 {
1202 auto_repetition_pause_counter++;
1203
1204 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1205 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1206 {
1207 repeat_frame_pause_len--;
1208 }
1209 #endif
1210
1211 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1212 {
1213 auto_repetition_pause_counter = 0;
1214
1215 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1216 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1217 {
1218 current_bit = 16;
1219 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1220 }
1221 else
1222 #endif
1223 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1224 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1225 {
1226 current_bit = 15;
1227 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1228 }
1229 else
1230 #endif
1231 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1232 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1233 {
1234 current_bit = 7;
1235 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1236 }
1237 else
1238 #endif
1239 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1240 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1241 {
1242 if (auto_repetition_counter + 1 < n_auto_repetitions)
1243 {
1244 current_bit = 23;
1245 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1246 }
1247 else // nokia stop frame
1248 {
1249 current_bit = 0xFF;
1250 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1251 }
1252 }
1253 else
1254 #endif
1255 {
1256 ;
1257 }
1258 }
1259 else
1260 {
1261 #ifdef ANALYZE
1262 if (irsnd_is_on)
1263 {
1264 putchar ('0');
1265 }
1266 else
1267 {
1268 putchar ('1');
1269 }
1270 #endif
1271 return irsnd_busy;
1272 }
1273 }
1274 #if 0
1275 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1276 #else
1277 // fm 2013-05-06: SIRCs has 2 autorepetitions and N normal repetitions.
1278 // if auto_repetition_counter == 0, we have to repeat the frame according to flags
1279 if (auto_repetition_counter == 0 && packet_repeat_pause_counter < repeat_frame_pause_len)
1280 #endif
1281 {
1282 packet_repeat_pause_counter++;
1283 // fprintf (stdout, "!%d %d!\n", packet_repeat_pause_counter, repeat_frame_pause_len);
1284 // fflush (stdout);
1285 #ifdef ANALYZE
1286 if (irsnd_is_on)
1287 {
1288 putchar ('0');
1289 }
1290 else
1291 {
1292 putchar ('1');
1293 }
1294 #endif
1295 return irsnd_busy;
1296 }
1297 else
1298 {
1299 if (send_trailer)
1300 {
1301 irsnd_busy = FALSE;
1302 send_trailer = FALSE;
1303 return irsnd_busy;
1304 }
1305
1306 n_repeat_frames = irsnd_repeat;
1307
1308 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1309 {
1310 n_repeat_frames = 255;
1311 }
1312
1313 packet_repeat_pause_counter = 0;
1314 pulse_counter = 0;
1315 pause_counter = 0;
1316
1317 switch (irsnd_protocol)
1318 {
1319 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1320 case IRMP_SIRCS_PROTOCOL:
1321 {
1322 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1323 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1324 pulse_1_len = SIRCS_1_PULSE_LEN;
1325 pause_1_len = SIRCS_PAUSE_LEN - 1;
1326 pulse_0_len = SIRCS_0_PULSE_LEN;
1327 pause_0_len = SIRCS_PAUSE_LEN - 1;
1328 has_stop_bit = SIRCS_STOP_BIT;
1329 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1330 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1331 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1332 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1333 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1334 break;
1335 }
1336 #endif
1337 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1338 case IRMP_NEC_PROTOCOL:
1339 {
1340 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1341
1342 if (repeat_counter > 0)
1343 {
1344 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1345 complete_data_len = 0;
1346 }
1347 else
1348 {
1349 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1350 complete_data_len = NEC_COMPLETE_DATA_LEN;
1351 }
1352
1353 pulse_1_len = NEC_PULSE_LEN;
1354 pause_1_len = NEC_1_PAUSE_LEN - 1;
1355 pulse_0_len = NEC_PULSE_LEN;
1356 pause_0_len = NEC_0_PAUSE_LEN - 1;
1357 has_stop_bit = NEC_STOP_BIT;
1358 n_auto_repetitions = 1; // 1 frame
1359 auto_repetition_pause_len = 0;
1360 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1361 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1362 break;
1363 }
1364 #endif
1365 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1366 case IRMP_NEC16_PROTOCOL:
1367 {
1368 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1369 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1370 pulse_1_len = NEC_PULSE_LEN;
1371 pause_1_len = NEC_1_PAUSE_LEN - 1;
1372 pulse_0_len = NEC_PULSE_LEN;
1373 pause_0_len = NEC_0_PAUSE_LEN - 1;
1374 has_stop_bit = NEC_STOP_BIT;
1375 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1376 n_auto_repetitions = 1; // 1 frame
1377 auto_repetition_pause_len = 0;
1378 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1379 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1380 break;
1381 }
1382 #endif
1383 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1384 case IRMP_NEC42_PROTOCOL:
1385 {
1386 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1387 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1388 pulse_1_len = NEC_PULSE_LEN;
1389 pause_1_len = NEC_1_PAUSE_LEN - 1;
1390 pulse_0_len = NEC_PULSE_LEN;
1391 pause_0_len = NEC_0_PAUSE_LEN - 1;
1392 has_stop_bit = NEC_STOP_BIT;
1393 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1394 n_auto_repetitions = 1; // 1 frame
1395 auto_repetition_pause_len = 0;
1396 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1397 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1398 break;
1399 }
1400 #endif
1401 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1402 case IRMP_SAMSUNG_PROTOCOL:
1403 {
1404 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1405 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1406 pulse_1_len = SAMSUNG_PULSE_LEN;
1407 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1408 pulse_0_len = SAMSUNG_PULSE_LEN;
1409 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1410 has_stop_bit = SAMSUNG_STOP_BIT;
1411 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1412 n_auto_repetitions = 1; // 1 frame
1413 auto_repetition_pause_len = 0;
1414 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1415 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1416 break;
1417 }
1418
1419 case IRMP_SAMSUNG32_PROTOCOL:
1420 {
1421 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1422 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1423 pulse_1_len = SAMSUNG_PULSE_LEN;
1424 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1425 pulse_0_len = SAMSUNG_PULSE_LEN;
1426 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1427 has_stop_bit = SAMSUNG_STOP_BIT;
1428 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1429 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames
1430 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1431 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1432 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1433 break;
1434 }
1435 #endif
1436 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1437 case IRMP_MATSUSHITA_PROTOCOL:
1438 {
1439 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1440 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1441 pulse_1_len = MATSUSHITA_PULSE_LEN;
1442 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1443 pulse_0_len = MATSUSHITA_PULSE_LEN;
1444 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1445 has_stop_bit = MATSUSHITA_STOP_BIT;
1446 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1447 n_auto_repetitions = 1; // 1 frame
1448 auto_repetition_pause_len = 0;
1449 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1450 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1451 break;
1452 }
1453 #endif
1454 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1455 case IRMP_KASEIKYO_PROTOCOL:
1456 {
1457 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1458 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1459 pulse_1_len = KASEIKYO_PULSE_LEN;
1460 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1461 pulse_0_len = KASEIKYO_PULSE_LEN;
1462 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1463 has_stop_bit = KASEIKYO_STOP_BIT;
1464 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1465 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1466 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1467 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1468 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1469 break;
1470 }
1471 #endif
1472 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1473 case IRMP_RECS80_PROTOCOL:
1474 {
1475 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1476 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1477 pulse_1_len = RECS80_PULSE_LEN;
1478 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1479 pulse_0_len = RECS80_PULSE_LEN;
1480 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1481 has_stop_bit = RECS80_STOP_BIT;
1482 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1483 n_auto_repetitions = 1; // 1 frame
1484 auto_repetition_pause_len = 0;
1485 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1486 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1487 break;
1488 }
1489 #endif
1490 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1491 case IRMP_RECS80EXT_PROTOCOL:
1492 {
1493 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1494 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1495 pulse_1_len = RECS80EXT_PULSE_LEN;
1496 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1497 pulse_0_len = RECS80EXT_PULSE_LEN;
1498 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1499 has_stop_bit = RECS80EXT_STOP_BIT;
1500 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1501 n_auto_repetitions = 1; // 1 frame
1502 auto_repetition_pause_len = 0;
1503 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1504 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1505 break;
1506 }
1507 #endif
1508 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1509 case IRMP_RC5_PROTOCOL:
1510 {
1511 startbit_pulse_len = RC5_BIT_LEN;
1512 startbit_pause_len = RC5_BIT_LEN;
1513 pulse_len = RC5_BIT_LEN;
1514 pause_len = RC5_BIT_LEN;
1515 has_stop_bit = RC5_STOP_BIT;
1516 complete_data_len = RC5_COMPLETE_DATA_LEN;
1517 n_auto_repetitions = 1; // 1 frame
1518 auto_repetition_pause_len = 0;
1519 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1520 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1521 break;
1522 }
1523 #endif
1524 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1525 case IRMP_RC6_PROTOCOL:
1526 {
1527 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1528 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1529 pulse_len = RC6_BIT_LEN;
1530 pause_len = RC6_BIT_LEN;
1531 has_stop_bit = RC6_STOP_BIT;
1532 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1533 n_auto_repetitions = 1; // 1 frame
1534 auto_repetition_pause_len = 0;
1535 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1536 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1537 break;
1538 }
1539 #endif
1540 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1541 case IRMP_RC6A_PROTOCOL:
1542 {
1543 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1544 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1545 pulse_len = RC6_BIT_LEN;
1546 pause_len = RC6_BIT_LEN;
1547 has_stop_bit = RC6_STOP_BIT;
1548 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1549 n_auto_repetitions = 1; // 1 frame
1550 auto_repetition_pause_len = 0;
1551 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1552 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1553 break;
1554 }
1555 #endif
1556 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1557 case IRMP_DENON_PROTOCOL:
1558 {
1559 startbit_pulse_len = 0x00;
1560 startbit_pause_len = 0x00;
1561 pulse_1_len = DENON_PULSE_LEN;
1562 pause_1_len = DENON_1_PAUSE_LEN - 1;
1563 pulse_0_len = DENON_PULSE_LEN;
1564 pause_0_len = DENON_0_PAUSE_LEN - 1;
1565 has_stop_bit = DENON_STOP_BIT;
1566 complete_data_len = DENON_COMPLETE_DATA_LEN;
1567 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1568 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1569 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1570 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1571 break;
1572 }
1573 #endif
1574 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1575 case IRMP_THOMSON_PROTOCOL:
1576 {
1577 startbit_pulse_len = 0x00;
1578 startbit_pause_len = 0x00;
1579 pulse_1_len = THOMSON_PULSE_LEN;
1580 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1581 pulse_0_len = THOMSON_PULSE_LEN;
1582 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1583 has_stop_bit = THOMSON_STOP_BIT;
1584 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1585 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1586 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1587 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1588 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1589 break;
1590 }
1591 #endif
1592 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1593 case IRMP_NUBERT_PROTOCOL:
1594 {
1595 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1596 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1597 pulse_1_len = NUBERT_1_PULSE_LEN;
1598 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1599 pulse_0_len = NUBERT_0_PULSE_LEN;
1600 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1601 has_stop_bit = NUBERT_STOP_BIT;
1602 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1603 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1604 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1605 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1606 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1607 break;
1608 }
1609 #endif
1610 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1611 case IRMP_BANG_OLUFSEN_PROTOCOL:
1612 {
1613 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1614 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1615 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1616 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1617 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1618 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1619 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1620 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1621 n_auto_repetitions = 1; // 1 frame
1622 auto_repetition_pause_len = 0;
1623 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1624 last_bit_value = 0;
1625 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1626 break;
1627 }
1628 #endif
1629 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1630 case IRMP_GRUNDIG_PROTOCOL:
1631 {
1632 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1633 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1634 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1635 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1636 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1637 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1638 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1639 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1640 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1641 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1642 break;
1643 }
1644 #endif
1645 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1646 case IRMP_IR60_PROTOCOL:
1647 {
1648 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1649 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1650 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1651 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1652 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1653 complete_data_len = IR60_COMPLETE_DATA_LEN;
1654 n_auto_repetitions = IR60_FRAMES; // 2 frames
1655 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1656 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1657 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1658 break;
1659 }
1660 #endif
1661 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1662 case IRMP_NOKIA_PROTOCOL:
1663 {
1664 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1665 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1666 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1667 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1668 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1669 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1670 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1671 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1672 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1673 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1674 break;
1675 }
1676 #endif
1677 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1678 case IRMP_SIEMENS_PROTOCOL:
1679 {
1680 startbit_pulse_len = SIEMENS_BIT_LEN;
1681 startbit_pause_len = SIEMENS_BIT_LEN;
1682 pulse_len = SIEMENS_BIT_LEN;
1683 pause_len = SIEMENS_BIT_LEN;
1684 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1685 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1686 n_auto_repetitions = 1; // 1 frame
1687 auto_repetition_pause_len = 0;
1688 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1689 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1690 break;
1691 }
1692 #endif
1693 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1694 case IRMP_RUWIDO_PROTOCOL:
1695 {
1696 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1697 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1698 pulse_len = RUWIDO_BIT_PULSE_LEN;
1699 pause_len = RUWIDO_BIT_PAUSE_LEN;
1700 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1701 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1702 n_auto_repetitions = 1; // 1 frame
1703 auto_repetition_pause_len = 0;
1704 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
1705 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1706 break;
1707 }
1708 #endif
1709 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1710 case IRMP_FDC_PROTOCOL:
1711 {
1712 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1713 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1714 complete_data_len = FDC_COMPLETE_DATA_LEN;
1715 pulse_1_len = FDC_PULSE_LEN;
1716 pause_1_len = FDC_1_PAUSE_LEN - 1;
1717 pulse_0_len = FDC_PULSE_LEN;
1718 pause_0_len = FDC_0_PAUSE_LEN - 1;
1719 has_stop_bit = FDC_STOP_BIT;
1720 n_auto_repetitions = 1; // 1 frame
1721 auto_repetition_pause_len = 0;
1722 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1723 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1724 break;
1725 }
1726 #endif
1727 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1728 case IRMP_RCCAR_PROTOCOL:
1729 {
1730 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1731 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1732 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1733 pulse_1_len = RCCAR_PULSE_LEN;
1734 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1735 pulse_0_len = RCCAR_PULSE_LEN;
1736 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1737 has_stop_bit = RCCAR_STOP_BIT;
1738 n_auto_repetitions = 1; // 1 frame
1739 auto_repetition_pause_len = 0;
1740 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1741 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1742 break;
1743 }
1744 #endif
1745 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1746 case IRMP_JVC_PROTOCOL:
1747 {
1748 if (repeat_counter != 0) // skip start bit if repetition frame
1749 {
1750 current_bit = 0;
1751 }
1752
1753 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1754 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1755 complete_data_len = JVC_COMPLETE_DATA_LEN;
1756 pulse_1_len = JVC_PULSE_LEN;
1757 pause_1_len = JVC_1_PAUSE_LEN - 1;
1758 pulse_0_len = JVC_PULSE_LEN;
1759 pause_0_len = JVC_0_PAUSE_LEN - 1;
1760 has_stop_bit = JVC_STOP_BIT;
1761 n_auto_repetitions = 1; // 1 frame
1762 auto_repetition_pause_len = 0;
1763 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1764 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1765 break;
1766 }
1767 #endif
1768 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1769 case IRMP_NIKON_PROTOCOL:
1770 {
1771 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1772 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
1773 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1774 pulse_1_len = NIKON_PULSE_LEN;
1775 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1776 pulse_0_len = NIKON_PULSE_LEN;
1777 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1778 has_stop_bit = NIKON_STOP_BIT;
1779 n_auto_repetitions = 1; // 1 frame
1780 auto_repetition_pause_len = 0;
1781 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1782 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1783 break;
1784 }
1785 #endif
1786 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1787 case IRMP_LEGO_PROTOCOL:
1788 {
1789 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1790 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1791 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1792 pulse_1_len = LEGO_PULSE_LEN;
1793 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1794 pulse_0_len = LEGO_PULSE_LEN;
1795 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1796 has_stop_bit = LEGO_STOP_BIT;
1797 n_auto_repetitions = 1; // 1 frame
1798 auto_repetition_pause_len = 0;
1799 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1800 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1801 break;
1802 }
1803 #endif
1804 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1805 case IRMP_A1TVBOX_PROTOCOL:
1806 {
1807 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
1808 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
1809 pulse_len = A1TVBOX_BIT_PULSE_LEN;
1810 pause_len = A1TVBOX_BIT_PAUSE_LEN;
1811 has_stop_bit = A1TVBOX_STOP_BIT;
1812 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
1813 n_auto_repetitions = 1; // 1 frame
1814 auto_repetition_pause_len = 0;
1815 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
1816 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1817 break;
1818 }
1819 #endif
1820 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1821 case IRMP_ROOMBA_PROTOCOL:
1822 {
1823 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
1824 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
1825 pulse_1_len = ROOMBA_1_PULSE_LEN;
1826 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
1827 pulse_0_len = ROOMBA_0_PULSE_LEN;
1828 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
1829 has_stop_bit = ROOMBA_STOP_BIT;
1830 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
1831 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
1832 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1833 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1834 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1835 break;
1836 }
1837 #endif
1838 default:
1839 {
1840 irsnd_busy = FALSE;
1841 break;
1842 }
1843 }
1844 }
1845 }
1846
1847 if (irsnd_busy)
1848 {
1849 new_frame = FALSE;
1850
1851 switch (irsnd_protocol)
1852 {
1853 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1854 case IRMP_SIRCS_PROTOCOL:
1855 #endif
1856 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1857 case IRMP_NEC_PROTOCOL:
1858 #endif
1859 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1860 case IRMP_NEC16_PROTOCOL:
1861 #endif
1862 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1863 case IRMP_NEC42_PROTOCOL:
1864 #endif
1865 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1866 case IRMP_SAMSUNG_PROTOCOL:
1867 case IRMP_SAMSUNG32_PROTOCOL:
1868 #endif
1869 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1870 case IRMP_MATSUSHITA_PROTOCOL:
1871 #endif
1872 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1873 case IRMP_KASEIKYO_PROTOCOL:
1874 #endif
1875 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1876 case IRMP_RECS80_PROTOCOL:
1877 #endif
1878 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1879 case IRMP_RECS80EXT_PROTOCOL:
1880 #endif
1881 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1882 case IRMP_DENON_PROTOCOL:
1883 #endif
1884 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1885 case IRMP_NUBERT_PROTOCOL:
1886 #endif
1887 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1888 case IRMP_BANG_OLUFSEN_PROTOCOL:
1889 #endif
1890 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1891 case IRMP_FDC_PROTOCOL:
1892 #endif
1893 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1894 case IRMP_RCCAR_PROTOCOL:
1895 #endif
1896 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1897 case IRMP_JVC_PROTOCOL:
1898 #endif
1899 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1900 case IRMP_NIKON_PROTOCOL:
1901 #endif
1902 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1903 case IRMP_LEGO_PROTOCOL:
1904 #endif
1905 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1906 case IRMP_THOMSON_PROTOCOL:
1907 #endif
1908 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1909 case IRMP_ROOMBA_PROTOCOL:
1910 #endif
1911
1912 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
1913 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
1914 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
1915 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
1916 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \
1917 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1918 {
1919 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1920 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
1921 {
1922 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
1923 {
1924 auto_repetition_pause_len--;
1925 }
1926
1927 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1928 {
1929 repeat_frame_pause_len--;
1930 }
1931 }
1932 #endif
1933
1934 if (pulse_counter == 0)
1935 {
1936 if (current_bit == 0xFF) // send start bit
1937 {
1938 pulse_len = startbit_pulse_len;
1939 pause_len = startbit_pause_len;
1940 }
1941 else if (current_bit < complete_data_len) // send n'th bit
1942 {
1943 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1944 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
1945 {
1946 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
1947 {
1948 pulse_len = SAMSUNG_PULSE_LEN;
1949 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1950 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1951 }
1952 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
1953 {
1954 pulse_len = SAMSUNG_PULSE_LEN;
1955 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1956 }
1957 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
1958 {
1959 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1960
1961 pulse_len = SAMSUNG_PULSE_LEN;
1962 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1963 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1964 }
1965 }
1966 else
1967 #endif
1968
1969 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1970 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
1971 {
1972 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
1973 {
1974 pulse_len = NEC_PULSE_LEN;
1975 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1976 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1977 }
1978 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
1979 {
1980 pulse_len = NEC_PULSE_LEN;
1981 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1982 }
1983 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
1984 {
1985 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1986
1987 pulse_len = NEC_PULSE_LEN;
1988 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1989 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1990 }
1991 }
1992 else
1993 #endif
1994
1995 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1996 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
1997 {
1998 if (current_bit == 0) // send 2nd start bit
1999 {
2000 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2001 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2002 }
2003 else if (current_bit == 1) // send 3rd start bit
2004 {
2005 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2006 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2007 }
2008 else if (current_bit == 2) // send 4th start bit
2009 {
2010 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2011 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2012 }
2013 else if (current_bit == 19) // send trailer bit
2014 {
2015 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2016 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2017 }
2018 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2019 {
2020 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
2021 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2022
2023 if (cur_bit_value == last_bit_value)
2024 {
2025 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2026 }
2027 else
2028 {
2029 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2030 last_bit_value = cur_bit_value;
2031 }
2032 }
2033 }
2034 else
2035 #endif
2036 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
2037 {
2038 pulse_len = pulse_1_len;
2039 pause_len = pause_1_len;
2040 }
2041 else
2042 {
2043 pulse_len = pulse_0_len;
2044 pause_len = pause_0_len;
2045 }
2046 }
2047 else if (has_stop_bit) // send stop bit
2048 {
2049 pulse_len = pulse_0_len;
2050
2051 if (auto_repetition_counter < n_auto_repetitions)
2052 {
2053 pause_len = pause_0_len;
2054 }
2055 else
2056 {
2057 pause_len = 255; // last frame: pause of 255
2058 }
2059 }
2060 }
2061
2062 if (pulse_counter < pulse_len)
2063 {
2064 if (pulse_counter == 0)
2065 {
2066 irsnd_on ();
2067 }
2068 pulse_counter++;
2069 }
2070 else if (pause_counter < pause_len)
2071 {
2072 if (pause_counter == 0)
2073 {
2074 irsnd_off ();
2075 }
2076 pause_counter++;
2077 }
2078 else
2079 {
2080 current_bit++;
2081
2082 if (current_bit >= complete_data_len + has_stop_bit)
2083 {
2084 current_bit = 0xFF;
2085 auto_repetition_counter++;
2086
2087 if (auto_repetition_counter == n_auto_repetitions)
2088 {
2089 irsnd_busy = FALSE;
2090 auto_repetition_counter = 0;
2091 }
2092 new_frame = TRUE;
2093 }
2094
2095 pulse_counter = 0;
2096 pause_counter = 0;
2097 }
2098 break;
2099 }
2100 #endif
2101
2102 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2103 case IRMP_RC5_PROTOCOL:
2104 #endif
2105 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2106 case IRMP_RC6_PROTOCOL:
2107 #endif
2108 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2109 case IRMP_RC6A_PROTOCOL:
2110 #endif
2111 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2112 case IRMP_SIEMENS_PROTOCOL:
2113 #endif
2114 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2115 case IRMP_RUWIDO_PROTOCOL:
2116 #endif
2117 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2118 case IRMP_GRUNDIG_PROTOCOL:
2119 #endif
2120 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2121 case IRMP_IR60_PROTOCOL:
2122 #endif
2123 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2124 case IRMP_NOKIA_PROTOCOL:
2125 #endif
2126 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2127 case IRMP_A1TVBOX_PROTOCOL:
2128 #endif
2129
2130 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2131 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2132 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2133 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2134 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2135 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2136 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2137 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2138 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2139 {
2140 if (pulse_counter == pulse_len && pause_counter == pause_len)
2141 {
2142 current_bit++;
2143
2144 if (current_bit >= complete_data_len)
2145 {
2146 current_bit = 0xFF;
2147
2148 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2149 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2150 {
2151 auto_repetition_counter++;
2152
2153 if (repeat_counter > 0)
2154 { // set 117 msec pause time
2155 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2156 }
2157
2158 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2159 {
2160 n_auto_repetitions++; // increment number of auto repetitions
2161 repeat_counter++;
2162 }
2163 else if (auto_repetition_counter == n_auto_repetitions)
2164 {
2165 irsnd_busy = FALSE;
2166 auto_repetition_counter = 0;
2167 }
2168 }
2169 else
2170 #endif
2171 {
2172 irsnd_busy = FALSE;
2173 }
2174
2175 new_frame = TRUE;
2176 irsnd_off ();
2177 }
2178
2179 pulse_counter = 0;
2180 pause_counter = 0;
2181 }
2182
2183 if (! new_frame)
2184 {
2185 uint8_t first_pulse;
2186
2187 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2188 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2189 {
2190 if (current_bit == 0xFF || // start bit of start-frame
2191 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2192 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2193 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2194 {
2195 pulse_len = startbit_pulse_len;
2196 pause_len = startbit_pause_len;
2197 first_pulse = TRUE;
2198 }
2199 else // send n'th bit
2200 {
2201 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2202 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2203 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2204 }
2205 }
2206 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2207 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2208 #endif
2209 {
2210 if (current_bit == 0xFF) // 1 start bit
2211 {
2212 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2213 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2214 {
2215 pulse_len = startbit_pulse_len;
2216 pause_len = startbit_pause_len;
2217 }
2218 else
2219 #endif
2220 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2221 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2222 {
2223 current_bit = 0;
2224 }
2225 else
2226 #endif
2227 {
2228 ;
2229 }
2230
2231 first_pulse = TRUE;
2232 }
2233 else // send n'th bit
2234 {
2235 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2236 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2237 {
2238 pulse_len = RC6_BIT_LEN;
2239 pause_len = RC6_BIT_LEN;
2240
2241 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2242 {
2243 if (current_bit == 4) // toggle bit (double len)
2244 {
2245 pulse_len = 2 * RC6_BIT_LEN;
2246 pause_len = 2 * RC6_BIT_LEN;
2247 }
2248 }
2249 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2250 {
2251 if (current_bit == 4) // toggle bit (double len)
2252 {
2253 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2254 pause_len = 2 * RC6_BIT_LEN;
2255 }
2256 else if (current_bit == 5) // toggle bit (double len)
2257 {
2258 pause_len = 2 * RC6_BIT_LEN;
2259 }
2260 }
2261 }
2262 #endif
2263 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2264 }
2265
2266 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2267 {
2268 first_pulse = first_pulse ? FALSE : TRUE;
2269 }
2270 }
2271
2272 if (first_pulse)
2273 {
2274 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2275
2276 if (pulse_counter < pulse_len)
2277 {
2278 if (pulse_counter == 0)
2279 {
2280 irsnd_on ();
2281 }
2282 pulse_counter++;
2283 }
2284 else // if (pause_counter < pause_len)
2285 {
2286 if (pause_counter == 0)
2287 {
2288 irsnd_off ();
2289 }
2290 pause_counter++;
2291 }
2292 }
2293 else
2294 {
2295 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2296
2297 if (pause_counter < pause_len)
2298 {
2299 if (pause_counter == 0)
2300 {
2301 irsnd_off ();
2302 }
2303 pause_counter++;
2304 }
2305 else // if (pulse_counter < pulse_len)
2306 {
2307 if (pulse_counter == 0)
2308 {
2309 irsnd_on ();
2310 }
2311 pulse_counter++;
2312 }
2313 }
2314 }
2315 break;
2316 }
2317 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2318 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2319
2320 default:
2321 {
2322 irsnd_busy = FALSE;
2323 break;
2324 }
2325 }
2326 }
2327
2328 if (! irsnd_busy)
2329 {
2330 if (repeat_counter < n_repeat_frames)
2331 {
2332 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2333 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2334 {
2335 irsnd_buffer[2] |= 0x0F;
2336 }
2337 #endif
2338 repeat_counter++;
2339 irsnd_busy = TRUE;
2340 }
2341 else
2342 {
2343 irsnd_busy = TRUE; //Rainer
2344 send_trailer = TRUE;
2345 n_repeat_frames = 0;
2346 repeat_counter = 0;
2347 }
2348 }
2349 }
2350
2351 #ifdef ANALYZE
2352 if (irsnd_is_on)
2353 {
2354 putchar ('0');
2355 }
2356 else
2357 {
2358 putchar ('1');
2359 }
2360 #endif
2361
2362 return irsnd_busy;
2363 }
2364
2365 #ifdef ANALYZE
2366
2367 // main function - for unix/linux + windows only!
2368 // AVR: see main.c!
2369 // Compile it under linux with:
2370 // cc irsnd.c -o irsnd
2371 //
2372 // usage: ./irsnd protocol hex-address hex-command >filename
2373
2374 int
2375 main (int argc, char ** argv)
2376 {
2377 int protocol;
2378 int address;
2379 int command;
2380 IRMP_DATA irmp_data;
2381
2382 if (argc != 4 && argc != 5)
2383 {
2384 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2385 return 1;
2386 }
2387
2388 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2389 sscanf (argv[2], "%x", &address) == 1 &&
2390 sscanf (argv[3], "%x", &command) == 1)
2391 {
2392 irmp_data.protocol = protocol;
2393 irmp_data.address = address;
2394 irmp_data.command = command;
2395
2396 if (argc == 5)
2397 {
2398 irmp_data.flags = atoi (argv[4]);
2399 }
2400 else
2401 {
2402 irmp_data.flags = 0;
2403 }
2404
2405 irsnd_init ();
2406
2407 (void) irsnd_send_data (&irmp_data, TRUE);
2408
2409 while (irsnd_busy)
2410 {
2411 irsnd_ISR ();
2412 }
2413
2414 putchar ('\n');
2415
2416 #if 1 // enable here to send twice
2417 (void) irsnd_send_data (&irmp_data, TRUE);
2418
2419 while (irsnd_busy)
2420 {
2421 irsnd_ISR ();
2422 }
2423
2424 putchar ('\n');
2425 #endif
2426 }
2427 else
2428 {
2429 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2430 return 1;
2431 }
2432 return 0;
2433 }
2434
2435 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)