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[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported AVR mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.88 2015/05/27 09:33:14 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46
47 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
48 # if IRSND_OCx == IRSND_OC0A // OC0A
49 # define IRSND_PORT_LETTER B
50 # define IRSND_BIT_NUMBER 0
51 # elif IRSND_OCx == IRSND_OC0B // OC0B
52 # define IRSND_PORT_LETTER B
53 # define IRSND_BIT_NUMBER 1
54 # else
55 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
56 # endif // IRSND_OCx
57
58 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
59 # if IRSND_OCx == IRSND_OC0A // OC0A
60 # define IRSND_PORT_LETTER A
61 # define IRSND_BIT_NUMBER 2
62 # else
63 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
64 # endif // IRSND_OCx
65
66 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
67 # if IRSND_OCx == IRSND_OC2 // OC0A
68 # define IRSND_PORT_LETTER B
69 # define IRSND_BIT_NUMBER 3
70 # else
71 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
72 # endif // IRSND_OCx
73 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
74 # if IRSND_OCx == IRSND_OC2 // OC2
75 # define IRSND_PORT_LETTER D
76 # define IRSND_BIT_NUMBER 7
77 # else
78 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
79 # endif // IRSND_OCx
80
81 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
82 # if IRSND_OCx == IRSND_OC2 // OC2
83 # define IRSND_PORT_LETTER B
84 # define IRSND_BIT_NUMBER 1
85 # elif IRSND_OCx == IRSND_OC0 // OC0
86 # define IRSND_PORT_LETTER B
87 # define IRSND_BIT_NUMBER 0
88 # else
89 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
90 # endif // IRSND_OCx
91
92 #elif defined (__AVR_ATmega164__) \
93 || defined (__AVR_ATmega324__) \
94 || defined (__AVR_ATmega644__) \
95 || defined (__AVR_ATmega644P__) \
96 || defined (__AVR_ATmega1284__) \
97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
98 # if IRSND_OCx == IRSND_OC2A // OC2A
99 # define IRSND_PORT_LETTER D
100 # define IRSND_BIT_NUMBER 7
101 # elif IRSND_OCx == IRSND_OC2B // OC2B
102 # define IRSND_PORT_LETTER D
103 # define IRSND_BIT_NUMBER 6
104 # elif IRSND_OCx == IRSND_OC0A // OC0A
105 # define IRSND_PORT_LETTER B
106 # define IRSND_BIT_NUMBER 3
107 # elif IRSND_OCx == IRSND_OC0B // OC0B
108 # define IRSND_PORT_LETTER B
109 # define IRSND_BIT_NUMBER 4
110 # else
111 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
112 # endif // IRSND_OCx
113
114 #elif defined (__AVR_ATmega48__) \
115 || defined (__AVR_ATmega88__) \
116 || defined (__AVR_ATmega88P__) \
117 || defined (__AVR_ATmega168__) \
118 || defined (__AVR_ATmega168P__) \
119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
120 # if IRSND_OCx == IRSND_OC2A // OC2A
121 # define IRSND_PORT_LETTER B
122 # define IRSND_BIT_NUMBER 3
123 # elif IRSND_OCx == IRSND_OC2B // OC2B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 3
126 # elif IRSND_OCx == IRSND_OC0A // OC0A
127 # define IRSND_PORT_LETTER D
128 # define IRSND_BIT_NUMBER 6
129 # elif IRSND_OCx == IRSND_OC0B // OC0B
130 # define IRSND_PORT_LETTER D
131 # define IRSND_BIT_NUMBER 5
132 # else
133 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
134 # endif // IRSND_OCx
135
136 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
137 # if IRSND_OCx == IRSND_OC0
138 # define IRSND_PORT_LETTER B
139 # define IRSND_BIT_NUMBER 0
140 # elif IRSND_OCx == IRSND_OC1A
141 # define IRSND_PORT_LETTER D
142 # define IRSND_BIT_NUMBER 5
143 # elif IRSND_OCx == IRSND_OC1B
144 # define IRSND_PORT_LETTER E
145 # define IRSND_BIT_NUMBER 2
146 # endif // IRSND_OCx
147
148 #elif defined (__AVR_ATxmega128A1U__) // ATxmega128A1U
149 # if IRSND_OCx == IRSND_XMEGA_OC0A
150 # define IRSND_BIT_NUMBER 0
151 # elif IRSND_OCx == IRSND_XMEGA_OC0B
152 # define IRSND_BIT_NUMBER 1
153 # elif IRSND_OCx == IRSND_XMEGA_OC0C
154 # define IRSND_BIT_NUMBER 2
155 # elif IRSND_OCx == IRSND_XMEGA_OC0D
156 # define IRSND_BIT_NUMBER 3
157 # elif IRSND_OCx == IRSND_XMEGA_OC1A
158 # define IRSND_BIT_NUMBER 4
159 # elif IRSND_OCx == IRSND_XMEGA_OC1B
160 # define IRSND_BIT_NUMBER 5
161 # else
162 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
163 # endif // IRSND_OCx
164
165 #elif defined (PIC_C18) //Microchip C18 compiler
166 //Nothing here to do here -> See irsndconfig.h
167 #elif defined (ARM_STM32) //STM32
168 //Nothing here to do here -> See irsndconfig.h
169 #else
170 # if !defined (unix) && !defined (WIN32)
171 # error mikrocontroller not defined, please fill in definitions here.
172 # endif // unix, WIN32
173 #endif // __AVR...
174
175 #if defined(__AVR_XMEGA__)
176 # define _CONCAT(a,b) a##b
177 # define CONCAT(a,b) _CONCAT(a,b)
178 # define IRSND_PORT IRSND_PORT_PRE.OUT
179 # define IRSND_DDR IRSND_PORT_PRE.DIR
180 # define IRSND_PIN IRSND_PORT_PRE.IN
181 # define IRSND_BIT IRSND_BIT_NUMBER
182 #elif defined(ATMEL_AVR)
183 # define _CONCAT(a,b) a##b
184 # define CONCAT(a,b) _CONCAT(a,b)
185 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
186 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
187 # define IRSND_BIT IRSND_BIT_NUMBER
188 #endif
189
190 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
191 typedef uint16_t IRSND_PAUSE_LEN;
192 #else
193 typedef uint8_t IRSND_PAUSE_LEN;
194 #endif
195
196 /*---------------------------------------------------------------------------------------------------------------------------------------------------
197 * IR timings
198 *---------------------------------------------------------------------------------------------------------------------------------------------------
199 */
200 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
201 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
202 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
203 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
204 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
205 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
206 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
207
208 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
209 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
210 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
211 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
212 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
213 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
214 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
215
216 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
217 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
218 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
219 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
220 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
221 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
222
223 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
224 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
225
226 #define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
227 #define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
228
229 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
230 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
231 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
232 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
233 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
234 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
235
236 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
237 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
238 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
239 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
240 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
241 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
242 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
243
244 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
245 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
246 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
247 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
248 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
249 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
250
251 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
252 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
253 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
254
255 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
256 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
257 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
258 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
259 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
260
261 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
262 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
263 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
264 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
265 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
266
267 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
268 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
269 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
270 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
271 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
272
273 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
274 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
275 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
276 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
277 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
278 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
279
280 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
281 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
282 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
283 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
284 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
285 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
286 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
287
288 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
289 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
290 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
291 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
292 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
293 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
294 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
295 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
296
297 #define FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5)
298 #define FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5)
299 #define FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5)
300 #define FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5)
301 #define FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5)
302 #define FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5)
303 #define FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
304 #define FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
305
306 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
307 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
308 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
309 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
310 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
311 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
312 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
313 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
314
315 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
316 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
317 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
318 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
319 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
320 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
321 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
322 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
323 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
324 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
325 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
326 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
327
328 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
329 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
330 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
331 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
332 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
333
334 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
335
336 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
337 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
338 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
339
340 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
341 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
342 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
343 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
344 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
345
346 #ifdef PIC_C18 // PIC C18
347 # define IRSND_FREQ_TYPE uint8_t
348 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
349 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
350 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
351 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
352 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
353 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
354 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
355 #elif defined (ARM_STM32) // STM32
356 # define IRSND_FREQ_TYPE uint32_t
357 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
358 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
359 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
360 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
361 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
362 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
363 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
364 #else // AVR
365 # if F_CPU >= 16000000L
366 # define AVR_PRESCALER 8
367 # else
368 # define AVR_PRESCALER 1
369 # endif
370 # define IRSND_FREQ_TYPE uint8_t
371 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
372 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
373 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
374 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
375 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
376 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
377 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
378 #endif
379
380 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
381 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
382 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
383 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
384 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
385 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
386
387 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
388 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
389 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
390 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
391 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
392 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
393
394 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
395 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
396 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
397 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
398 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
399 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
400 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
401
402 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
403 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
404 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
405 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
406 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
407 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
408 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
409
410 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
411 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
412 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
413 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
414 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
415 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
416 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
417
418 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
419 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
420 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
421 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
422 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
423 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
424
425 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
426 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
427 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
428 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
429 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
430 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
431 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
432
433 #define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)
434 #define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)
435 #define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)
436 #define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)
437 #define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)
438 #define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)
439 #define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
440
441 static volatile uint8_t irsnd_busy = 0;
442 static volatile uint8_t irsnd_protocol = 0;
443 static volatile uint8_t irsnd_buffer[6] = {0};
444 static volatile uint8_t irsnd_repeat = 0;
445 static volatile uint8_t irsnd_is_on = FALSE;
446
447 #if IRSND_USE_CALLBACK == 1
448 static void (*irsnd_callback_ptr) (uint8_t);
449 #endif // IRSND_USE_CALLBACK == 1
450
451 /*---------------------------------------------------------------------------------------------------------------------------------------------------
452 * Switch PWM on
453 *---------------------------------------------------------------------------------------------------------------------------------------------------
454 */
455 static void
456 irsnd_on (void)
457 {
458 if (! irsnd_is_on)
459 {
460 #ifndef ANALYZE
461 # if defined(PIC_C18) // PIC C18
462 PWMon();
463 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
464
465 # elif defined (ARM_STM32) // STM32
466 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
467 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
468 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
469
470 # elif defined (__AVR_XMEGA__)
471 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
472 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A
473 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
474 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B
475 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
476 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C
477 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
478 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D
479 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
480 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A
481 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
482 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B
483 # else
484 # error wrong value of IRSND_OCx
485 # endif // IRSND_OCx
486
487 # else // AVR
488 # if IRSND_OCx == IRSND_OC2 // use OC2
489 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
490 # elif IRSND_OCx == IRSND_OC2A // use OC2A
491 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
492 # elif IRSND_OCx == IRSND_OC2B // use OC2B
493 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
494 # elif IRSND_OCx == IRSND_OC0 // use OC0
495 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
496 # elif IRSND_OCx == IRSND_OC0A // use OC0A
497 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
498 # elif IRSND_OCx == IRSND_OC0B // use OC0B
499 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
500 # else
501 # error wrong value of IRSND_OCx
502 # endif // IRSND_OCx
503 # endif // C18
504 #endif // ANALYZE
505
506 #if IRSND_USE_CALLBACK == 1
507 if (irsnd_callback_ptr)
508 {
509 (*irsnd_callback_ptr) (TRUE);
510 }
511 #endif // IRSND_USE_CALLBACK == 1
512
513 irsnd_is_on = TRUE;
514 }
515 }
516
517 /*---------------------------------------------------------------------------------------------------------------------------------------------------
518 * Switch PWM off
519 * @details Switches PWM off
520 *---------------------------------------------------------------------------------------------------------------------------------------------------
521 */
522 static void
523 irsnd_off (void)
524 {
525 if (irsnd_is_on)
526 {
527 #ifndef ANALYZE
528
529 # if defined(PIC_C18) // PIC C18
530 PWMoff();
531 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
532
533 # elif defined (ARM_STM32) // STM32
534 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
535 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
536 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
537 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
538
539 # elif defined (__AVR_XMEGA__)
540 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
541 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected
542 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
543 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected
544 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
545 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected
546 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
547 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected
548 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
549 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected
550 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
551 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected
552 # else
553 # error wrong value of IRSND_OCx
554 # endif // IRSND_OCx
555
556 # else //AVR
557
558 # if IRSND_OCx == IRSND_OC2 // use OC2
559 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
560 # elif IRSND_OCx == IRSND_OC2A // use OC2A
561 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
562 # elif IRSND_OCx == IRSND_OC2B // use OC2B
563 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
564 # elif IRSND_OCx == IRSND_OC0 // use OC0
565 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
566 # elif IRSND_OCx == IRSND_OC0A // use OC0A
567 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
568 # elif IRSND_OCx == IRSND_OC0B // use OC0B
569 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
570 # else
571 # error wrong value of IRSND_OCx
572 # endif // IRSND_OCx
573 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
574 # endif //C18
575 #endif // ANALYZE
576
577 #if IRSND_USE_CALLBACK == 1
578 if (irsnd_callback_ptr)
579 {
580 (*irsnd_callback_ptr) (FALSE);
581 }
582 #endif // IRSND_USE_CALLBACK == 1
583
584 irsnd_is_on = FALSE;
585 }
586 }
587
588 /*---------------------------------------------------------------------------------------------------------------------------------------------------
589 * Set PWM frequency
590 * @details sets pwm frequency
591 *---------------------------------------------------------------------------------------------------------------------------------------------------
592 */
593 #if defined(__12F1840)
594 extern void pwm_init(uint16_t freq);
595 #include <stdio.h>
596 #endif
597
598 static void
599 irsnd_set_freq (IRSND_FREQ_TYPE freq)
600 {
601 #ifndef ANALYZE
602 # if defined(PIC_C18) // PIC C18 or XC8
603 # if defined(__12F1840) // XC8
604 TRISA2=0;
605 PR2=freq;
606 CCP1M0=1;
607 CCP1M1=1;
608 CCP1M2=1;
609 CCP1M3=1;
610 DC1B0=1;
611 DC1B1=0;
612 CCPR1L = 0b01101001;
613 TMR2IF = 0;
614 TMR2ON=1;
615 CCP1CON &=(~0b0011); // p 197 "active high"
616 # else // PIC C18
617 OpenPWM(freq);
618 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
619 # endif
620 PWMoff();
621 # elif defined (ARM_STM32) // STM32
622 static uint32_t TimeBaseFreq = 0;
623
624 if (TimeBaseFreq == 0)
625 {
626 RCC_ClocksTypeDef RCC_ClocksStructure;
627 /* Get system clocks and store timer clock in variable */
628 RCC_GetClocksFreq(&RCC_ClocksStructure);
629 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
630 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
631 {
632 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
633 }
634 else
635 {
636 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
637 }
638 # else
639 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
640 {
641 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
642 }
643 else
644 {
645 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
646 }
647 # endif
648 }
649
650 freq = TimeBaseFreq/freq;
651
652 /* Set frequency */
653 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
654 /* Set duty cycle */
655 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
656
657 # elif defined (__AVR_XMEGA__)
658 XMEGA_Timer.CCA = freq;
659
660 # else // AVR
661
662 # if IRSND_OCx == IRSND_OC2
663 OCR2 = freq; // use register OCR2 for OC2
664 # elif IRSND_OCx == IRSND_OC2A // use OC2A
665 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
666 # elif IRSND_OCx == IRSND_OC2B // use OC2B
667 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
668 # elif IRSND_OCx == IRSND_OC0 // use OC0
669 OCR0 = freq; // use register OCR2 for OC2
670 # elif IRSND_OCx == IRSND_OC0A // use OC0A
671 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
672 # elif IRSND_OCx == IRSND_OC0B // use OC0B
673 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
674 # else
675 # error wrong value of IRSND_OCx
676 # endif
677 # endif //PIC_C18
678 #endif // ANALYZE
679 }
680
681 /*---------------------------------------------------------------------------------------------------------------------------------------------------
682 * Initialize the PWM
683 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
684 *---------------------------------------------------------------------------------------------------------------------------------------------------
685 */
686 void
687 irsnd_init (void)
688 {
689 #ifndef ANALYZE
690 # if defined(PIC_C18) // PIC C18 or XC8 compiler
691 # if ! defined(__12F1840) // only C18:
692 OpenTimer;
693 # endif
694 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
695 IRSND_PIN = 0; // set IO to outout
696 PWMoff();
697 # elif defined (ARM_STM32) // STM32
698 GPIO_InitTypeDef GPIO_InitStructure;
699 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
700 TIM_OCInitTypeDef TIM_OCInitStructure;
701
702 /* GPIOx clock enable */
703 # if defined (ARM_STM32L1XX)
704 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
705 # elif defined (ARM_STM32F10X)
706 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
707 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping
708 # elif defined (ARM_STM32F4XX)
709 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
710 # endif
711
712 /* GPIO Configuration */
713 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
714 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
715 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
716 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
717 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
718 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
719 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
720 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
721 # elif defined (ARM_STM32F10X)
722 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
723 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
724 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
725 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping
726 # endif
727
728 /* TIMx clock enable */
729 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
730 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
731 # else
732 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
733 # endif
734
735 /* Time base configuration */
736 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
737 TIM_TimeBaseStructure.TIM_Prescaler = 0;
738 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
739 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
740 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
741
742 /* PWM1 Mode configuration */
743 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
744 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
745 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
746 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
747 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
748
749 /* Preload configuration */
750 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
751 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
752
753 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
754
755 # elif defined (__AVR_XMEGA__)
756 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
757 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
758
759 XMEGA_Timer.PER = 0xFFFF; //Topwert
760 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC
761
762 # if AVR_PRESCALER == 8
763 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8
764 # else
765 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1
766 # endif
767
768 # else // AVR
769 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
770 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
771
772 # if IRSND_OCx == IRSND_OC2 // use OC2
773 TCCR2 = (1<<WGM21); // CTC mode
774 # if AVR_PRESCALER == 8
775 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
776 # else
777 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
778 # endif
779 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
780 TCCR2A = (1<<WGM21); // CTC mode
781 # if AVR_PRESCALER == 8
782 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
783 # else
784 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
785 # endif
786 # elif IRSND_OCx == IRSND_OC0 // use OC0
787 TCCR0 = (1<<WGM01); // CTC mode
788 # if AVR_PRESCALER == 8
789 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
790 # else
791 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
792 # endif
793 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
794 TCCR0A = (1<<WGM01); // CTC mode
795 # if AVR_PRESCALER == 8
796 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
797 # else
798 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
799 # endif
800 # else
801 # error wrong value of IRSND_OCx
802 # endif
803 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
804 # endif //PIC_C18
805 #endif // ANALYZE
806 }
807
808 #if IRSND_USE_CALLBACK == 1
809 void
810 irsnd_set_callback_ptr (void (*cb)(uint8_t))
811 {
812 irsnd_callback_ptr = cb;
813 }
814 #endif // IRSND_USE_CALLBACK == 1
815
816 uint8_t
817 irsnd_is_busy (void)
818 {
819 return irsnd_busy;
820 }
821
822 static uint16_t
823 bitsrevervse (uint16_t x, uint8_t len)
824 {
825 uint16_t xx = 0;
826
827 while(len)
828 {
829 xx <<= 1;
830 if (x & 1)
831 {
832 xx |= 1;
833 }
834 x >>= 1;
835 len--;
836 }
837 return xx;
838 }
839
840
841 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
842 static uint8_t sircs_additional_bitlen;
843 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
844
845 uint8_t
846 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
847 {
848 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
849 static uint8_t toggle_bit_recs80;
850 #endif
851 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
852 static uint8_t toggle_bit_recs80ext;
853 #endif
854 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
855 static uint8_t toggle_bit_rc5;
856 #endif
857 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
858 static uint8_t toggle_bit_rc6;
859 #endif
860 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
861 static uint8_t toggle_bit_thomson;
862 #endif
863 uint16_t address;
864 uint16_t command;
865
866 if (do_wait)
867 {
868 while (irsnd_busy)
869 {
870 // do nothing;
871 }
872 }
873 else if (irsnd_busy)
874 {
875 return (FALSE);
876 }
877
878 irsnd_protocol = irmp_data_p->protocol;
879 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
880
881 switch (irsnd_protocol)
882 {
883 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
884 case IRMP_SIRCS_PROTOCOL:
885 {
886 // uint8_t sircs_additional_command_len;
887 uint8_t sircs_additional_address_len;
888
889 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
890
891 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
892 {
893 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
894 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
895 }
896 else
897 {
898 // sircs_additional_command_len = sircs_additional_bitlen;
899 sircs_additional_address_len = 0;
900 }
901
902 command = bitsrevervse (irmp_data_p->command, 15);
903
904 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
905 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
906
907 if (sircs_additional_address_len > 0)
908 {
909 address = bitsrevervse (irmp_data_p->address, 5);
910 irsnd_buffer[1] |= (address & 0x0010) >> 4;
911 irsnd_buffer[2] = (address & 0x000F) << 4;
912 }
913 irsnd_busy = TRUE;
914 break;
915 }
916 #endif
917 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
918 case IRMP_APPLE_PROTOCOL:
919 {
920 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
921 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
922
923 address = bitsrevervse (address, NEC_ADDRESS_LEN);
924 command = bitsrevervse (command, NEC_COMMAND_LEN);
925
926 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
927
928 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
929 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
930 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
931 irsnd_buffer[3] = 0x8B; // 10001011 (id)
932 irsnd_busy = TRUE;
933 break;
934 }
935 case IRMP_NEC_PROTOCOL:
936 {
937 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
938 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
939
940 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
941 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
942 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
943 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
944 irsnd_busy = TRUE;
945 break;
946 }
947 #endif
948 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
949 case IRMP_NEC16_PROTOCOL:
950 {
951 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
952 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
953
954 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
955 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
956 irsnd_busy = TRUE;
957 break;
958 }
959 #endif
960 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
961 case IRMP_NEC42_PROTOCOL:
962 {
963 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
964 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
965
966 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
967 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
968 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
969 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
970 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
971 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
972 irsnd_busy = TRUE;
973 break;
974 }
975 #endif
976 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
977 case IRMP_LGAIR_PROTOCOL:
978 {
979 address = irmp_data_p->address;
980 command = irmp_data_p->command;
981
982 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
983 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
984 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
985 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
986 ((command & 0x0F00) >> 8) +
987 ((command & 0x00F0) >>4 ) +
988 ((command & 0x000F))) & 0x000F) << 4;
989 irsnd_busy = TRUE;
990 break;
991 }
992 #endif
993 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
994 case IRMP_SAMSUNG_PROTOCOL:
995 {
996 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
997 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
998
999 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1000 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1001 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
1002 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
1003 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
1004 irsnd_busy = TRUE;
1005 break;
1006 }
1007 case IRMP_SAMSUNG32_PROTOCOL:
1008 {
1009 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1010 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
1011
1012 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1013 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1014 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
1015 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
1016 irsnd_busy = TRUE;
1017 break;
1018 }
1019 #endif
1020 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1021 case IRMP_SAMSUNG48_PROTOCOL:
1022 {
1023 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1024 command = bitsrevervse (irmp_data_p->command, 16);
1025
1026 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1027 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1028 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC
1029 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
1030 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC
1031 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc
1032 irsnd_busy = TRUE;
1033 break;
1034 }
1035 #endif
1036 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1037 case IRMP_MATSUSHITA_PROTOCOL:
1038 {
1039 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
1040 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
1041
1042 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
1043 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
1044 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
1045 irsnd_busy = TRUE;
1046 break;
1047 }
1048 #endif
1049 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1050 case IRMP_KASEIKYO_PROTOCOL:
1051 {
1052 uint8_t xor_value;
1053 uint16_t genre2;
1054
1055 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
1056 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
1057 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
1058
1059 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
1060
1061 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1062 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1063 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
1064 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
1065 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
1066
1067 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
1068
1069 irsnd_buffer[5] = xor_value;
1070 irsnd_busy = TRUE;
1071 break;
1072 }
1073 #endif
1074 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1075 case IRMP_RECS80_PROTOCOL:
1076 {
1077 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
1078
1079 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
1080 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
1081 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
1082 irsnd_busy = TRUE;
1083 break;
1084 }
1085 #endif
1086 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1087 case IRMP_RECS80EXT_PROTOCOL:
1088 {
1089 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
1090
1091 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
1092 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
1093 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
1094 irsnd_busy = TRUE;
1095 break;
1096 }
1097 #endif
1098 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1099 case IRMP_RC5_PROTOCOL:
1100 {
1101 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
1102
1103 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
1104 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
1105 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
1106 irsnd_busy = TRUE;
1107 break;
1108 }
1109 #endif
1110 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1111 case IRMP_RC6_PROTOCOL:
1112 {
1113 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1114
1115 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
1116 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
1117 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
1118 irsnd_busy = TRUE;
1119 break;
1120 }
1121 #endif
1122 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1123 case IRMP_RC6A_PROTOCOL:
1124 {
1125 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1126
1127 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
1128 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
1129 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
1130 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1131 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
1132 irsnd_busy = TRUE;
1133 break;
1134 }
1135 #endif
1136 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1137 case IRMP_DENON_PROTOCOL:
1138 {
1139 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
1140 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
1141 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
1142 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
1143 irsnd_busy = TRUE;
1144 break;
1145 }
1146 #endif
1147 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1148 case IRMP_THOMSON_PROTOCOL:
1149 {
1150 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1151
1152 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1153 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1154 irsnd_busy = TRUE;
1155 break;
1156 }
1157 #endif
1158 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1159 case IRMP_NUBERT_PROTOCOL:
1160 {
1161 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1162 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1163 irsnd_busy = TRUE;
1164 break;
1165 }
1166 #endif
1167 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
1168 case IRMP_FAN_PROTOCOL:
1169 {
1170 irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC
1171 irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1172 irsnd_busy = TRUE;
1173 break;
1174 }
1175 #endif
1176 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1177 case IRMP_SPEAKER_PROTOCOL:
1178 {
1179 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1180 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1181 irsnd_busy = TRUE;
1182 break;
1183 }
1184 #endif
1185 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1186 case IRMP_BANG_OLUFSEN_PROTOCOL:
1187 {
1188 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1189 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1190 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1191 irsnd_busy = TRUE;
1192 break;
1193 }
1194 #endif
1195 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1196 case IRMP_GRUNDIG_PROTOCOL:
1197 {
1198 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1199
1200 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1201 irsnd_buffer[1] = 0xC0; // 11
1202 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1203 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1204
1205 irsnd_busy = TRUE;
1206 break;
1207 }
1208 #endif
1209 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1210 case IRMP_TELEFUNKEN_PROTOCOL:
1211 {
1212 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1213 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1214
1215 irsnd_busy = TRUE;
1216 break;
1217 }
1218 #endif
1219 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1220 case IRMP_IR60_PROTOCOL:
1221 {
1222 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1223 #if 0
1224 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1225 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1226 #else
1227 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1228 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1229 #endif
1230
1231 irsnd_busy = TRUE;
1232 break;
1233 }
1234 #endif
1235 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1236 case IRMP_NOKIA_PROTOCOL:
1237 {
1238 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1239 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1240
1241 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1242 irsnd_buffer[1] = 0xFF; // 11111111
1243 irsnd_buffer[2] = 0x80; // 1
1244 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1245 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1246 irsnd_buffer[5] = (address << 7); // A
1247
1248 irsnd_busy = TRUE;
1249 break;
1250 }
1251 #endif
1252 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1253 case IRMP_SIEMENS_PROTOCOL:
1254 {
1255 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1256 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1257 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1258
1259 irsnd_busy = TRUE;
1260 break;
1261 }
1262 #endif
1263 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1264 case IRMP_RUWIDO_PROTOCOL:
1265 {
1266 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1267 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1268 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1269 irsnd_busy = TRUE;
1270 break;
1271 }
1272 #endif
1273 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1274 case IRMP_FDC_PROTOCOL:
1275 {
1276 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1277 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1278
1279 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1280 irsnd_buffer[1] = 0; // 00000000
1281 irsnd_buffer[2] = 0; // 0000RRRR
1282 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1283 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1284 irsnd_busy = TRUE;
1285 break;
1286 }
1287 #endif
1288 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1289 case IRMP_RCCAR_PROTOCOL:
1290 {
1291 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1292 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1293
1294 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1295 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1296
1297 irsnd_busy = TRUE;
1298 break;
1299 }
1300 #endif
1301 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1302 case IRMP_JVC_PROTOCOL:
1303 {
1304 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1305 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1306
1307 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1308 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1309
1310 irsnd_busy = TRUE;
1311 break;
1312 }
1313 #endif
1314 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1315 case IRMP_NIKON_PROTOCOL:
1316 {
1317 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1318 irsnd_busy = TRUE;
1319 break;
1320 }
1321 #endif
1322 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1323 case IRMP_LEGO_PROTOCOL:
1324 {
1325 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1326
1327 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1328 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1329 irsnd_busy = TRUE;
1330 break;
1331 }
1332 #endif
1333 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1334 case IRMP_A1TVBOX_PROTOCOL:
1335 {
1336 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1337 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1338 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1339
1340 irsnd_busy = TRUE;
1341 break;
1342 }
1343 #endif
1344 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1345 case IRMP_ROOMBA_PROTOCOL:
1346 {
1347 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1348 irsnd_busy = TRUE;
1349 break;
1350 }
1351 #endif
1352 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
1353 case IRMP_PENTAX_PROTOCOL:
1354 {
1355 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..
1356 irsnd_busy = TRUE;
1357 break;
1358 }
1359 #endif
1360
1361 default:
1362 {
1363 break;
1364 }
1365 }
1366
1367 return irsnd_busy;
1368 }
1369
1370 void
1371 irsnd_stop (void)
1372 {
1373 irsnd_repeat = 0;
1374 }
1375
1376 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1377 * ISR routine
1378 * @details ISR routine, called 10000 times per second
1379 *---------------------------------------------------------------------------------------------------------------------------------------------------
1380 */
1381 uint8_t
1382 irsnd_ISR (void)
1383 {
1384 static uint8_t send_trailer = FALSE;
1385 static uint8_t current_bit = 0xFF;
1386 static uint8_t pulse_counter = 0;
1387 static IRSND_PAUSE_LEN pause_counter = 0;
1388 static uint8_t startbit_pulse_len = 0;
1389 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1390 static uint8_t pulse_1_len = 0;
1391 static uint8_t pause_1_len = 0;
1392 static uint8_t pulse_0_len = 0;
1393 static uint8_t pause_0_len = 0;
1394 static uint8_t has_stop_bit = 0;
1395 static uint8_t new_frame = TRUE;
1396 static uint8_t complete_data_len = 0;
1397 static uint8_t n_repeat_frames = 0; // number of repetition frames
1398 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1399 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1400 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1401 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1402 static uint8_t repeat_counter = 0; // repeat counter
1403 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1404 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1405 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1406 static uint8_t last_bit_value;
1407 #endif
1408 static uint8_t pulse_len = 0xFF;
1409 static IRSND_PAUSE_LEN pause_len = 0xFF;
1410
1411 if (irsnd_busy)
1412 {
1413 if (current_bit == 0xFF && new_frame) // start of transmission...
1414 {
1415 if (auto_repetition_counter > 0)
1416 {
1417 auto_repetition_pause_counter++;
1418
1419 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1420 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1421 {
1422 repeat_frame_pause_len--;
1423 }
1424 #endif
1425
1426 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1427 {
1428 auto_repetition_pause_counter = 0;
1429
1430 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1431 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1432 {
1433 current_bit = 16;
1434 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1435 }
1436 else
1437 #endif
1438 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1439 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1440 {
1441 current_bit = 15;
1442 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1443 }
1444 else
1445 #endif
1446 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1447 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1448 {
1449 current_bit = 7;
1450 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1451 }
1452 else
1453 #endif
1454 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1455 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1456 {
1457 if (auto_repetition_counter + 1 < n_auto_repetitions)
1458 {
1459 current_bit = 23;
1460 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1461 }
1462 else // nokia stop frame
1463 {
1464 current_bit = 0xFF;
1465 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1466 }
1467 }
1468 else
1469 #endif
1470 {
1471 ;
1472 }
1473 }
1474 else
1475 {
1476 #ifdef ANALYZE
1477 if (irsnd_is_on)
1478 {
1479 putchar ('0');
1480 }
1481 else
1482 {
1483 putchar ('1');
1484 }
1485 #endif
1486 return irsnd_busy;
1487 }
1488 }
1489 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1490 {
1491 packet_repeat_pause_counter++;
1492 #ifdef ANALYZE
1493 if (irsnd_is_on)
1494 {
1495 putchar ('0');
1496 }
1497 else
1498 {
1499 putchar ('1');
1500 }
1501 #endif
1502 return irsnd_busy;
1503 }
1504 else
1505 {
1506 if (send_trailer)
1507 {
1508 irsnd_busy = FALSE;
1509 send_trailer = FALSE;
1510 return irsnd_busy;
1511 }
1512
1513 n_repeat_frames = irsnd_repeat;
1514
1515 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1516 {
1517 n_repeat_frames = 255;
1518 }
1519
1520 packet_repeat_pause_counter = 0;
1521 pulse_counter = 0;
1522 pause_counter = 0;
1523
1524 switch (irsnd_protocol)
1525 {
1526 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1527 case IRMP_SIRCS_PROTOCOL:
1528 {
1529 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1530 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1531 pulse_1_len = SIRCS_1_PULSE_LEN;
1532 pause_1_len = SIRCS_PAUSE_LEN - 1;
1533 pulse_0_len = SIRCS_0_PULSE_LEN;
1534 pause_0_len = SIRCS_PAUSE_LEN - 1;
1535 has_stop_bit = SIRCS_STOP_BIT;
1536 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1537 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1538 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1539 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1540 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1541 break;
1542 }
1543 #endif
1544 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1545 case IRMP_NEC_PROTOCOL:
1546 {
1547 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1548
1549 if (repeat_counter > 0)
1550 {
1551 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1552 complete_data_len = 0;
1553 }
1554 else
1555 {
1556 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1557 complete_data_len = NEC_COMPLETE_DATA_LEN;
1558 }
1559
1560 pulse_1_len = NEC_PULSE_LEN;
1561 pause_1_len = NEC_1_PAUSE_LEN - 1;
1562 pulse_0_len = NEC_PULSE_LEN;
1563 pause_0_len = NEC_0_PAUSE_LEN - 1;
1564 has_stop_bit = NEC_STOP_BIT;
1565 n_auto_repetitions = 1; // 1 frame
1566 auto_repetition_pause_len = 0;
1567 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1568 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1569 break;
1570 }
1571 #endif
1572 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1573 case IRMP_NEC16_PROTOCOL:
1574 {
1575 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1576 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1577 pulse_1_len = NEC_PULSE_LEN;
1578 pause_1_len = NEC_1_PAUSE_LEN - 1;
1579 pulse_0_len = NEC_PULSE_LEN;
1580 pause_0_len = NEC_0_PAUSE_LEN - 1;
1581 has_stop_bit = NEC_STOP_BIT;
1582 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1583 n_auto_repetitions = 1; // 1 frame
1584 auto_repetition_pause_len = 0;
1585 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1586 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1587 break;
1588 }
1589 #endif
1590 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1591 case IRMP_NEC42_PROTOCOL:
1592 {
1593 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1594 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1595 pulse_1_len = NEC_PULSE_LEN;
1596 pause_1_len = NEC_1_PAUSE_LEN - 1;
1597 pulse_0_len = NEC_PULSE_LEN;
1598 pause_0_len = NEC_0_PAUSE_LEN - 1;
1599 has_stop_bit = NEC_STOP_BIT;
1600 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1601 n_auto_repetitions = 1; // 1 frame
1602 auto_repetition_pause_len = 0;
1603 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1604 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1605 break;
1606 }
1607 #endif
1608 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1609 case IRMP_LGAIR_PROTOCOL:
1610 {
1611 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1612 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1613 pulse_1_len = NEC_PULSE_LEN;
1614 pause_1_len = NEC_1_PAUSE_LEN - 1;
1615 pulse_0_len = NEC_PULSE_LEN;
1616 pause_0_len = NEC_0_PAUSE_LEN - 1;
1617 has_stop_bit = NEC_STOP_BIT;
1618 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1619 n_auto_repetitions = 1; // 1 frame
1620 auto_repetition_pause_len = 0;
1621 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1622 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1623 break;
1624 }
1625 #endif
1626 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1627 case IRMP_SAMSUNG_PROTOCOL:
1628 {
1629 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1630 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1631 pulse_1_len = SAMSUNG_PULSE_LEN;
1632 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1633 pulse_0_len = SAMSUNG_PULSE_LEN;
1634 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1635 has_stop_bit = SAMSUNG_STOP_BIT;
1636 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1637 n_auto_repetitions = 1; // 1 frame
1638 auto_repetition_pause_len = 0;
1639 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1640 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1641 break;
1642 }
1643
1644 case IRMP_SAMSUNG32_PROTOCOL:
1645 {
1646 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1647 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1648 pulse_1_len = SAMSUNG_PULSE_LEN;
1649 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1650 pulse_0_len = SAMSUNG_PULSE_LEN;
1651 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1652 has_stop_bit = SAMSUNG_STOP_BIT;
1653 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1654 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame
1655 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1656 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1657 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1658 break;
1659 }
1660 #endif
1661 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1662 case IRMP_SAMSUNG48_PROTOCOL:
1663 {
1664 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1665 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1666 pulse_1_len = SAMSUNG_PULSE_LEN;
1667 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1668 pulse_0_len = SAMSUNG_PULSE_LEN;
1669 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1670 has_stop_bit = SAMSUNG_STOP_BIT;
1671 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;
1672 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame
1673 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1674 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;
1675 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1676 break;
1677 }
1678 #endif
1679 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1680 case IRMP_MATSUSHITA_PROTOCOL:
1681 {
1682 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1683 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1684 pulse_1_len = MATSUSHITA_PULSE_LEN;
1685 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1686 pulse_0_len = MATSUSHITA_PULSE_LEN;
1687 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1688 has_stop_bit = MATSUSHITA_STOP_BIT;
1689 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1690 n_auto_repetitions = 1; // 1 frame
1691 auto_repetition_pause_len = 0;
1692 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1693 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1694 break;
1695 }
1696 #endif
1697 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1698 case IRMP_KASEIKYO_PROTOCOL:
1699 {
1700 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1701 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1702 pulse_1_len = KASEIKYO_PULSE_LEN;
1703 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1704 pulse_0_len = KASEIKYO_PULSE_LEN;
1705 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1706 has_stop_bit = KASEIKYO_STOP_BIT;
1707 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1708 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1709 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1710 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1711 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1712 break;
1713 }
1714 #endif
1715 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1716 case IRMP_RECS80_PROTOCOL:
1717 {
1718 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1719 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1720 pulse_1_len = RECS80_PULSE_LEN;
1721 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1722 pulse_0_len = RECS80_PULSE_LEN;
1723 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1724 has_stop_bit = RECS80_STOP_BIT;
1725 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1726 n_auto_repetitions = 1; // 1 frame
1727 auto_repetition_pause_len = 0;
1728 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1729 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1730 break;
1731 }
1732 #endif
1733 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1734 case IRMP_RECS80EXT_PROTOCOL:
1735 {
1736 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1737 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1738 pulse_1_len = RECS80EXT_PULSE_LEN;
1739 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1740 pulse_0_len = RECS80EXT_PULSE_LEN;
1741 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1742 has_stop_bit = RECS80EXT_STOP_BIT;
1743 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1744 n_auto_repetitions = 1; // 1 frame
1745 auto_repetition_pause_len = 0;
1746 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1747 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1748 break;
1749 }
1750 #endif
1751 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1752 case IRMP_TELEFUNKEN_PROTOCOL:
1753 {
1754 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1755 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1756 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1757 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1758 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1759 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1760 has_stop_bit = TELEFUNKEN_STOP_BIT;
1761 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1762 n_auto_repetitions = 1; // 1 frames
1763 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1764 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1765 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1766 break;
1767 }
1768 #endif
1769 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1770 case IRMP_RC5_PROTOCOL:
1771 {
1772 startbit_pulse_len = RC5_BIT_LEN;
1773 startbit_pause_len = RC5_BIT_LEN;
1774 pulse_len = RC5_BIT_LEN;
1775 pause_len = RC5_BIT_LEN;
1776 has_stop_bit = RC5_STOP_BIT;
1777 complete_data_len = RC5_COMPLETE_DATA_LEN;
1778 n_auto_repetitions = 1; // 1 frame
1779 auto_repetition_pause_len = 0;
1780 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1781 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1782 break;
1783 }
1784 #endif
1785 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1786 case IRMP_RC6_PROTOCOL:
1787 {
1788 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1789 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1790 pulse_len = RC6_BIT_LEN;
1791 pause_len = RC6_BIT_LEN;
1792 has_stop_bit = RC6_STOP_BIT;
1793 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1794 n_auto_repetitions = 1; // 1 frame
1795 auto_repetition_pause_len = 0;
1796 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1797 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1798 break;
1799 }
1800 #endif
1801 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1802 case IRMP_RC6A_PROTOCOL:
1803 {
1804 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1805 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1806 pulse_len = RC6_BIT_LEN;
1807 pause_len = RC6_BIT_LEN;
1808 has_stop_bit = RC6_STOP_BIT;
1809 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1810 n_auto_repetitions = 1; // 1 frame
1811 auto_repetition_pause_len = 0;
1812 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1813 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1814 break;
1815 }
1816 #endif
1817 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1818 case IRMP_DENON_PROTOCOL:
1819 {
1820 startbit_pulse_len = 0x00;
1821 startbit_pause_len = 0x00;
1822 pulse_1_len = DENON_PULSE_LEN;
1823 pause_1_len = DENON_1_PAUSE_LEN - 1;
1824 pulse_0_len = DENON_PULSE_LEN;
1825 pause_0_len = DENON_0_PAUSE_LEN - 1;
1826 has_stop_bit = DENON_STOP_BIT;
1827 complete_data_len = DENON_COMPLETE_DATA_LEN;
1828 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1829 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1830 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1831 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1832 break;
1833 }
1834 #endif
1835 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1836 case IRMP_THOMSON_PROTOCOL:
1837 {
1838 startbit_pulse_len = 0x00;
1839 startbit_pause_len = 0x00;
1840 pulse_1_len = THOMSON_PULSE_LEN;
1841 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1842 pulse_0_len = THOMSON_PULSE_LEN;
1843 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1844 has_stop_bit = THOMSON_STOP_BIT;
1845 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1846 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1847 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1848 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1849 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1850 break;
1851 }
1852 #endif
1853 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1854 case IRMP_NUBERT_PROTOCOL:
1855 {
1856 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1857 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1858 pulse_1_len = NUBERT_1_PULSE_LEN;
1859 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1860 pulse_0_len = NUBERT_0_PULSE_LEN;
1861 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1862 has_stop_bit = NUBERT_STOP_BIT;
1863 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1864 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1865 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1866 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1867 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1868 break;
1869 }
1870 #endif
1871 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
1872 case IRMP_FAN_PROTOCOL:
1873 {
1874 startbit_pulse_len = FAN_START_BIT_PULSE_LEN;
1875 startbit_pause_len = FAN_START_BIT_PAUSE_LEN - 1;
1876 pulse_1_len = FAN_1_PULSE_LEN;
1877 pause_1_len = FAN_1_PAUSE_LEN - 1;
1878 pulse_0_len = FAN_0_PULSE_LEN;
1879 pause_0_len = FAN_0_PAUSE_LEN - 1;
1880 has_stop_bit = FAN_STOP_BIT;
1881 complete_data_len = FAN_COMPLETE_DATA_LEN;
1882 n_auto_repetitions = FAN_FRAMES; // only 1 frame
1883 auto_repetition_pause_len = FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1884 repeat_frame_pause_len = FAN_FRAME_REPEAT_PAUSE_LEN;
1885 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1886 break;
1887 }
1888 #endif
1889 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1890 case IRMP_SPEAKER_PROTOCOL:
1891 {
1892 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1893 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1894 pulse_1_len = SPEAKER_1_PULSE_LEN;
1895 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1896 pulse_0_len = SPEAKER_0_PULSE_LEN;
1897 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1898 has_stop_bit = SPEAKER_STOP_BIT;
1899 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1900 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1901 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1902 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1903 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1904 break;
1905 }
1906 #endif
1907 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1908 case IRMP_BANG_OLUFSEN_PROTOCOL:
1909 {
1910 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1911 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1912 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1913 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1914 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1915 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1916 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1917 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1918 n_auto_repetitions = 1; // 1 frame
1919 auto_repetition_pause_len = 0;
1920 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1921 last_bit_value = 0;
1922 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1923 break;
1924 }
1925 #endif
1926 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1927 case IRMP_GRUNDIG_PROTOCOL:
1928 {
1929 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1930 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1931 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1932 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1933 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1934 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1935 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1936 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1937 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1938 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1939 break;
1940 }
1941 #endif
1942 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1943 case IRMP_IR60_PROTOCOL:
1944 {
1945 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1946 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1947 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1948 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1949 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1950 complete_data_len = IR60_COMPLETE_DATA_LEN;
1951 n_auto_repetitions = IR60_FRAMES; // 2 frames
1952 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1953 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1954 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1955 break;
1956 }
1957 #endif
1958 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1959 case IRMP_NOKIA_PROTOCOL:
1960 {
1961 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1962 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1963 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1964 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1965 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1966 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1967 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1968 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1969 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1970 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1971 break;
1972 }
1973 #endif
1974 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1975 case IRMP_SIEMENS_PROTOCOL:
1976 {
1977 startbit_pulse_len = SIEMENS_BIT_LEN;
1978 startbit_pause_len = SIEMENS_BIT_LEN;
1979 pulse_len = SIEMENS_BIT_LEN;
1980 pause_len = SIEMENS_BIT_LEN;
1981 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1982 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
1983 n_auto_repetitions = 1; // 1 frame
1984 auto_repetition_pause_len = 0;
1985 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1986 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1987 break;
1988 }
1989 #endif
1990 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1991 case IRMP_RUWIDO_PROTOCOL:
1992 {
1993 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
1994 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
1995 pulse_len = RUWIDO_BIT_PULSE_LEN;
1996 pause_len = RUWIDO_BIT_PAUSE_LEN;
1997 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1998 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
1999 n_auto_repetitions = 1; // 1 frame
2000 auto_repetition_pause_len = 0;
2001 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
2002 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2003 break;
2004 }
2005 #endif
2006 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2007 case IRMP_FDC_PROTOCOL:
2008 {
2009 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
2010 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
2011 complete_data_len = FDC_COMPLETE_DATA_LEN;
2012 pulse_1_len = FDC_PULSE_LEN;
2013 pause_1_len = FDC_1_PAUSE_LEN - 1;
2014 pulse_0_len = FDC_PULSE_LEN;
2015 pause_0_len = FDC_0_PAUSE_LEN - 1;
2016 has_stop_bit = FDC_STOP_BIT;
2017 n_auto_repetitions = 1; // 1 frame
2018 auto_repetition_pause_len = 0;
2019 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
2020 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2021 break;
2022 }
2023 #endif
2024 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2025 case IRMP_RCCAR_PROTOCOL:
2026 {
2027 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
2028 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
2029 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
2030 pulse_1_len = RCCAR_PULSE_LEN;
2031 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
2032 pulse_0_len = RCCAR_PULSE_LEN;
2033 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
2034 has_stop_bit = RCCAR_STOP_BIT;
2035 n_auto_repetitions = 1; // 1 frame
2036 auto_repetition_pause_len = 0;
2037 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
2038 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2039 break;
2040 }
2041 #endif
2042 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2043 case IRMP_JVC_PROTOCOL:
2044 {
2045 if (repeat_counter != 0) // skip start bit if repetition frame
2046 {
2047 current_bit = 0;
2048 }
2049
2050 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
2051 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
2052 complete_data_len = JVC_COMPLETE_DATA_LEN;
2053 pulse_1_len = JVC_PULSE_LEN;
2054 pause_1_len = JVC_1_PAUSE_LEN - 1;
2055 pulse_0_len = JVC_PULSE_LEN;
2056 pause_0_len = JVC_0_PAUSE_LEN - 1;
2057 has_stop_bit = JVC_STOP_BIT;
2058 n_auto_repetitions = 1; // 1 frame
2059 auto_repetition_pause_len = 0;
2060 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
2061 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2062 break;
2063 }
2064 #endif
2065 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2066 case IRMP_NIKON_PROTOCOL:
2067 {
2068 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
2069 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
2070 complete_data_len = NIKON_COMPLETE_DATA_LEN;
2071 pulse_1_len = NIKON_PULSE_LEN;
2072 pause_1_len = NIKON_1_PAUSE_LEN - 1;
2073 pulse_0_len = NIKON_PULSE_LEN;
2074 pause_0_len = NIKON_0_PAUSE_LEN - 1;
2075 has_stop_bit = NIKON_STOP_BIT;
2076 n_auto_repetitions = 1; // 1 frame
2077 auto_repetition_pause_len = 0;
2078 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
2079 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2080 break;
2081 }
2082 #endif
2083 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2084 case IRMP_LEGO_PROTOCOL:
2085 {
2086 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
2087 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
2088 complete_data_len = LEGO_COMPLETE_DATA_LEN;
2089 pulse_1_len = LEGO_PULSE_LEN;
2090 pause_1_len = LEGO_1_PAUSE_LEN - 1;
2091 pulse_0_len = LEGO_PULSE_LEN;
2092 pause_0_len = LEGO_0_PAUSE_LEN - 1;
2093 has_stop_bit = LEGO_STOP_BIT;
2094 n_auto_repetitions = 1; // 1 frame
2095 auto_repetition_pause_len = 0;
2096 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
2097 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2098 break;
2099 }
2100 #endif
2101 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2102 case IRMP_A1TVBOX_PROTOCOL:
2103 {
2104 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
2105 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
2106 pulse_len = A1TVBOX_BIT_PULSE_LEN;
2107 pause_len = A1TVBOX_BIT_PAUSE_LEN;
2108 has_stop_bit = A1TVBOX_STOP_BIT;
2109 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
2110 n_auto_repetitions = 1; // 1 frame
2111 auto_repetition_pause_len = 0;
2112 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
2113 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2114 break;
2115 }
2116 #endif
2117 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2118 case IRMP_ROOMBA_PROTOCOL:
2119 {
2120 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
2121 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
2122 pulse_1_len = ROOMBA_1_PULSE_LEN;
2123 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
2124 pulse_0_len = ROOMBA_0_PULSE_LEN;
2125 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
2126 has_stop_bit = ROOMBA_STOP_BIT;
2127 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
2128 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
2129 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2130 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2131 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2132 break;
2133 }
2134 #endif
2135 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2136 case IRMP_PENTAX_PROTOCOL:
2137 {
2138 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;
2139 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;
2140 complete_data_len = PENTAX_COMPLETE_DATA_LEN;
2141 pulse_1_len = PENTAX_PULSE_LEN;
2142 pause_1_len = PENTAX_1_PAUSE_LEN - 1;
2143 pulse_0_len = PENTAX_PULSE_LEN;
2144 pause_0_len = PENTAX_0_PAUSE_LEN - 1;
2145 has_stop_bit = PENTAX_STOP_BIT;
2146 n_auto_repetitions = 1; // 1 frame
2147 auto_repetition_pause_len = 0;
2148 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;
2149 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2150 break;
2151 }
2152 #endif
2153 default:
2154 {
2155 irsnd_busy = FALSE;
2156 break;
2157 }
2158 }
2159 }
2160 }
2161
2162 if (irsnd_busy)
2163 {
2164 new_frame = FALSE;
2165
2166 switch (irsnd_protocol)
2167 {
2168 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
2169 case IRMP_SIRCS_PROTOCOL:
2170 #endif
2171 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
2172 case IRMP_NEC_PROTOCOL:
2173 #endif
2174 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2175 case IRMP_NEC16_PROTOCOL:
2176 #endif
2177 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
2178 case IRMP_NEC42_PROTOCOL:
2179 #endif
2180 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
2181 case IRMP_LGAIR_PROTOCOL:
2182 #endif
2183 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2184 case IRMP_SAMSUNG_PROTOCOL:
2185 case IRMP_SAMSUNG32_PROTOCOL:
2186 #endif
2187 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
2188 case IRMP_SAMSUNG48_PROTOCOL:
2189 #endif
2190 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2191 case IRMP_MATSUSHITA_PROTOCOL:
2192 #endif
2193 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
2194 case IRMP_KASEIKYO_PROTOCOL:
2195 #endif
2196 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
2197 case IRMP_RECS80_PROTOCOL:
2198 #endif
2199 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
2200 case IRMP_RECS80EXT_PROTOCOL:
2201 #endif
2202 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2203 case IRMP_TELEFUNKEN_PROTOCOL:
2204 #endif
2205 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2206 case IRMP_DENON_PROTOCOL:
2207 #endif
2208 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2209 case IRMP_NUBERT_PROTOCOL:
2210 #endif
2211 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
2212 case IRMP_FAN_PROTOCOL:
2213 #endif
2214 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2215 case IRMP_SPEAKER_PROTOCOL:
2216 #endif
2217 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2218 case IRMP_BANG_OLUFSEN_PROTOCOL:
2219 #endif
2220 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2221 case IRMP_FDC_PROTOCOL:
2222 #endif
2223 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2224 case IRMP_RCCAR_PROTOCOL:
2225 #endif
2226 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2227 case IRMP_JVC_PROTOCOL:
2228 #endif
2229 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2230 case IRMP_NIKON_PROTOCOL:
2231 #endif
2232 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2233 case IRMP_LEGO_PROTOCOL:
2234 #endif
2235 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2236 case IRMP_THOMSON_PROTOCOL:
2237 #endif
2238 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2239 case IRMP_ROOMBA_PROTOCOL:
2240 #endif
2241 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2242 case IRMP_PENTAX_PROTOCOL:
2243 #endif
2244
2245 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2246 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
2247 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2248 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \
2249 IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \
2250 IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \
2251 IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2252 {
2253 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2254 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
2255 {
2256 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
2257 {
2258 auto_repetition_pause_len--;
2259 }
2260
2261 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
2262 {
2263 repeat_frame_pause_len--;
2264 }
2265 }
2266 #endif
2267
2268 if (pulse_counter == 0)
2269 {
2270 if (current_bit == 0xFF) // send start bit
2271 {
2272 pulse_len = startbit_pulse_len;
2273 pause_len = startbit_pause_len;
2274 }
2275 else if (current_bit < complete_data_len) // send n'th bit
2276 {
2277 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2278 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2279 {
2280 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2281 {
2282 pulse_len = SAMSUNG_PULSE_LEN;
2283 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2284 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2285 }
2286 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2287 {
2288 pulse_len = SAMSUNG_PULSE_LEN;
2289 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2290 }
2291 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2292 {
2293 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2294
2295 pulse_len = SAMSUNG_PULSE_LEN;
2296 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2297 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2298 }
2299 }
2300 else
2301 #endif
2302
2303 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2304 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2305 {
2306 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2307 {
2308 pulse_len = NEC_PULSE_LEN;
2309 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2310 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2311 }
2312 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2313 {
2314 pulse_len = NEC_PULSE_LEN;
2315 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2316 }
2317 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2318 {
2319 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2320
2321 pulse_len = NEC_PULSE_LEN;
2322 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2323 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2324 }
2325 }
2326 else
2327 #endif
2328
2329 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2330 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2331 {
2332 if (current_bit == 0) // send 2nd start bit
2333 {
2334 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2335 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2336 }
2337 else if (current_bit == 1) // send 3rd start bit
2338 {
2339 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2340 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2341 }
2342 else if (current_bit == 2) // send 4th start bit
2343 {
2344 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2345 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2346 }
2347 else if (current_bit == 19) // send trailer bit
2348 {
2349 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2350 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2351 }
2352 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2353 {
2354 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;
2355 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2356
2357 if (cur_bit_value == last_bit_value)
2358 {
2359 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2360 }
2361 else
2362 {
2363 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2364 last_bit_value = cur_bit_value;
2365 }
2366 }
2367 }
2368 else
2369 #endif
2370 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))
2371 {
2372 pulse_len = pulse_1_len;
2373 pause_len = pause_1_len;
2374 }
2375 else
2376 {
2377 pulse_len = pulse_0_len;
2378 pause_len = pause_0_len;
2379 }
2380 }
2381 else if (has_stop_bit) // send stop bit
2382 {
2383 pulse_len = pulse_0_len;
2384
2385 if (auto_repetition_counter < n_auto_repetitions)
2386 {
2387 pause_len = pause_0_len;
2388 }
2389 else
2390 {
2391 pause_len = 255; // last frame: pause of 255
2392 }
2393 }
2394 }
2395
2396 if (pulse_counter < pulse_len)
2397 {
2398 if (pulse_counter == 0)
2399 {
2400 irsnd_on ();
2401 }
2402 pulse_counter++;
2403 }
2404 else if (pause_counter < pause_len)
2405 {
2406 if (pause_counter == 0)
2407 {
2408 irsnd_off ();
2409 }
2410 pause_counter++;
2411 }
2412 else
2413 {
2414 current_bit++;
2415
2416 if (current_bit >= complete_data_len + has_stop_bit)
2417 {
2418 current_bit = 0xFF;
2419 auto_repetition_counter++;
2420
2421 if (auto_repetition_counter == n_auto_repetitions)
2422 {
2423 irsnd_busy = FALSE;
2424 auto_repetition_counter = 0;
2425 }
2426 new_frame = TRUE;
2427 }
2428
2429 pulse_counter = 0;
2430 pause_counter = 0;
2431 }
2432 break;
2433 }
2434 #endif
2435
2436 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2437 case IRMP_RC5_PROTOCOL:
2438 #endif
2439 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2440 case IRMP_RC6_PROTOCOL:
2441 #endif
2442 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2443 case IRMP_RC6A_PROTOCOL:
2444 #endif
2445 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2446 case IRMP_SIEMENS_PROTOCOL:
2447 #endif
2448 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2449 case IRMP_RUWIDO_PROTOCOL:
2450 #endif
2451 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2452 case IRMP_GRUNDIG_PROTOCOL:
2453 #endif
2454 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2455 case IRMP_IR60_PROTOCOL:
2456 #endif
2457 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2458 case IRMP_NOKIA_PROTOCOL:
2459 #endif
2460 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2461 case IRMP_A1TVBOX_PROTOCOL:
2462 #endif
2463
2464 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2465 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2466 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2467 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2468 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2469 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2470 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2471 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2472 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2473 {
2474 if (pulse_counter == pulse_len && pause_counter == pause_len)
2475 {
2476 current_bit++;
2477
2478 if (current_bit >= complete_data_len)
2479 {
2480 current_bit = 0xFF;
2481
2482 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2483 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2484 {
2485 auto_repetition_counter++;
2486
2487 if (repeat_counter > 0)
2488 { // set 117 msec pause time
2489 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2490 }
2491
2492 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2493 {
2494 n_auto_repetitions++; // increment number of auto repetitions
2495 repeat_counter++;
2496 }
2497 else if (auto_repetition_counter == n_auto_repetitions)
2498 {
2499 irsnd_busy = FALSE;
2500 auto_repetition_counter = 0;
2501 }
2502 }
2503 else
2504 #endif
2505 {
2506 irsnd_busy = FALSE;
2507 }
2508
2509 new_frame = TRUE;
2510 irsnd_off ();
2511 }
2512
2513 pulse_counter = 0;
2514 pause_counter = 0;
2515 }
2516
2517 if (! new_frame)
2518 {
2519 uint8_t first_pulse;
2520
2521 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2522 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2523 {
2524 if (current_bit == 0xFF || // start bit of start-frame
2525 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2526 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2527 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2528 {
2529 pulse_len = startbit_pulse_len;
2530 pause_len = startbit_pause_len;
2531 first_pulse = TRUE;
2532 }
2533 else // send n'th bit
2534 {
2535 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2536 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2537 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2538 }
2539 }
2540 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2541 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2542 #endif
2543 {
2544 if (current_bit == 0xFF) // 1 start bit
2545 {
2546 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2547 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2548 {
2549 pulse_len = startbit_pulse_len;
2550 pause_len = startbit_pause_len;
2551 }
2552 else
2553 #endif
2554 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2555 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2556 {
2557 current_bit = 0;
2558 }
2559 else
2560 #endif
2561 {
2562 ;
2563 }
2564
2565 first_pulse = TRUE;
2566 }
2567 else // send n'th bit
2568 {
2569 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2570 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2571 {
2572 pulse_len = RC6_BIT_LEN;
2573 pause_len = RC6_BIT_LEN;
2574
2575 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2576 {
2577 if (current_bit == 4) // toggle bit (double len)
2578 {
2579 pulse_len = 2 * RC6_BIT_LEN;
2580 pause_len = 2 * RC6_BIT_LEN;
2581 }
2582 }
2583 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2584 {
2585 if (current_bit == 4) // toggle bit (double len)
2586 {
2587 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2588 pause_len = 2 * RC6_BIT_LEN;
2589 }
2590 else if (current_bit == 5) // toggle bit (double len)
2591 {
2592 pause_len = 2 * RC6_BIT_LEN;
2593 }
2594 }
2595 }
2596 #endif
2597 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2598 }
2599
2600 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2601 {
2602 first_pulse = first_pulse ? FALSE : TRUE;
2603 }
2604 }
2605
2606 if (first_pulse)
2607 {
2608 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2609
2610 if (pulse_counter < pulse_len)
2611 {
2612 if (pulse_counter == 0)
2613 {
2614 irsnd_on ();
2615 }
2616 pulse_counter++;
2617 }
2618 else // if (pause_counter < pause_len)
2619 {
2620 if (pause_counter == 0)
2621 {
2622 irsnd_off ();
2623 }
2624 pause_counter++;
2625 }
2626 }
2627 else
2628 {
2629 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2630
2631 if (pause_counter < pause_len)
2632 {
2633 if (pause_counter == 0)
2634 {
2635 irsnd_off ();
2636 }
2637 pause_counter++;
2638 }
2639 else // if (pulse_counter < pulse_len)
2640 {
2641 if (pulse_counter == 0)
2642 {
2643 irsnd_on ();
2644 }
2645 pulse_counter++;
2646 }
2647 }
2648 }
2649 break;
2650 }
2651 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2652 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2653
2654 default:
2655 {
2656 irsnd_busy = FALSE;
2657 break;
2658 }
2659 }
2660 }
2661
2662 if (! irsnd_busy)
2663 {
2664 if (repeat_counter < n_repeat_frames)
2665 {
2666 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2667 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2668 {
2669 irsnd_buffer[2] |= 0x0F;
2670 }
2671 #endif
2672 repeat_counter++;
2673 irsnd_busy = TRUE;
2674 }
2675 else
2676 {
2677 irsnd_busy = TRUE; //Rainer
2678 send_trailer = TRUE;
2679 n_repeat_frames = 0;
2680 repeat_counter = 0;
2681 }
2682 }
2683 }
2684
2685 #ifdef ANALYZE
2686 if (irsnd_is_on)
2687 {
2688 putchar ('0');
2689 }
2690 else
2691 {
2692 putchar ('1');
2693 }
2694 #endif
2695
2696 return irsnd_busy;
2697 }
2698
2699 #ifdef ANALYZE
2700
2701 // main function - for unix/linux + windows only!
2702 // AVR: see main.c!
2703 // Compile it under linux with:
2704 // cc irsnd.c -o irsnd
2705 //
2706 // usage: ./irsnd protocol hex-address hex-command >filename
2707
2708 int
2709 main (int argc, char ** argv)
2710 {
2711 int protocol;
2712 int address;
2713 int command;
2714 IRMP_DATA irmp_data;
2715
2716 if (argc != 4 && argc != 5)
2717 {
2718 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2719 return 1;
2720 }
2721
2722 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2723 sscanf (argv[2], "%x", &address) == 1 &&
2724 sscanf (argv[3], "%x", &command) == 1)
2725 {
2726 irmp_data.protocol = protocol;
2727 irmp_data.address = address;
2728 irmp_data.command = command;
2729
2730 if (argc == 5)
2731 {
2732 irmp_data.flags = atoi (argv[4]);
2733 }
2734 else
2735 {
2736 irmp_data.flags = 0;
2737 }
2738
2739 irsnd_init ();
2740
2741 (void) irsnd_send_data (&irmp_data, TRUE);
2742
2743 while (irsnd_busy)
2744 {
2745 irsnd_ISR ();
2746 }
2747
2748 putchar ('\n');
2749
2750 #if 1 // enable here to send twice
2751 (void) irsnd_send_data (&irmp_data, TRUE);
2752
2753 while (irsnd_busy)
2754 {
2755 irsnd_ISR ();
2756 }
2757
2758 putchar ('\n');
2759 #endif
2760 }
2761 else
2762 {
2763 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2764 return 1;
2765 }
2766 return 0;
2767 }
2768
2769 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)