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Version 2.3.8: changed timing tolerances for RECS80(EXT) in IRMP, allowed 15kHz for...
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.68 2013/03/12 12:49:59 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
47 # if IRSND_OCx == IRSND_OC0A // OC0A
48 # define IRSND_PORT_LETTER B
49 # define IRSND_BIT_NUMBER 0
50 # elif IRSND_OCx == IRSND_OC0B // OC0B
51 # define IRSND_PORT_LETTER B
52 # define IRSND_BIT_NUMBER 1
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT_LETTER A
59 # define IRSND_BIT_NUMBER 2
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
64 # if IRSND_OCx == IRSND_OC2 // OC0A
65 # define IRSND_PORT_LETTER B
66 # define IRSND_BIT_NUMBER 3
67 # else
68 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
69 # endif // IRSND_OCx
70 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
71 # if IRSND_OCx == IRSND_OC2 // OC2
72 # define IRSND_PORT_LETTER D
73 # define IRSND_BIT_NUMBER 7
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
76 # endif // IRSND_OCx
77 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
78 # if IRSND_OCx == IRSND_OC2 // OC2
79 # define IRSND_PORT_LETTER B
80 # define IRSND_BIT_NUMBER 1
81 # elif IRSND_OCx == IRSND_OC0 // OC0
82 # define IRSND_PORT_LETTER B
83 # define IRSND_BIT_NUMBER 0
84 # else
85 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
86 # endif // IRSND_OCx
87 #elif defined (__AVR_ATmega164__) \
88 || defined (__AVR_ATmega324__) \
89 || defined (__AVR_ATmega644__) \
90 || defined (__AVR_ATmega644P__) \
91 || defined (__AVR_ATmega1284__) \
92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
93 # if IRSND_OCx == IRSND_OC2A // OC2A
94 # define IRSND_PORT_LETTER D
95 # define IRSND_BIT_NUMBER 7
96 # elif IRSND_OCx == IRSND_OC2B // OC2B
97 # define IRSND_PORT_LETTER D
98 # define IRSND_BIT_NUMBER 6
99 # elif IRSND_OCx == IRSND_OC0A // OC0A
100 # define IRSND_PORT_LETTER B
101 # define IRSND_BIT_NUMBER 3
102 # elif IRSND_OCx == IRSND_OC0B // OC0B
103 # define IRSND_PORT_LETTER B
104 # define IRSND_BIT_NUMBER 4
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT_LETTER B
116 # define IRSND_BIT_NUMBER 3
117 # elif IRSND_OCx == IRSND_OC2B // OC2B
118 # define IRSND_PORT_LETTER D
119 # define IRSND_BIT_NUMBER 3
120 # elif IRSND_OCx == IRSND_OC0A // OC0A
121 # define IRSND_PORT_LETTER D
122 # define IRSND_BIT_NUMBER 6
123 # elif IRSND_OCx == IRSND_OC0B // OC0B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 5
126 # else
127 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
128 # endif // IRSND_OCx
129 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
130 # if IRSND_OCx == IRSND_OC0
131 # define IRSND_PORT_LETTER B
132 # define IRSND_BIT_NUMBER 0
133 # elif IRSND_OCx == IRSND_OC1A
134 # define IRSND_PORT_LETTER D
135 # define IRSND_BIT_NUMBER 5
136 # elif IRSND_OCx == IRSND_OC1B
137 # define IRSND_PORT_LETTER E
138 # define IRSND_BIT_NUMBER 2
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (PIC_C18) //Microchip C18 compiler
143 //Nothing here to do here -> See irsndconfig.h
144 #elif defined (ARM_STM32) //STM32
145 //Nothing here to do here -> See irsndconfig.h
146 #else
147 # if !defined (unix) && !defined (WIN32)
148 # error mikrocontroller not defined, please fill in definitions here.
149 # endif // unix, WIN32
150 #endif // __AVR...
151
152 #if defined(ATMEL_AVR)
153 # define _CONCAT(a,b) a##b
154 # define CONCAT(a,b) _CONCAT(a,b)
155 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
156 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
157 # define IRSND_BIT IRSND_BIT_NUMBER
158 #endif
159
160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
161 typedef uint16_t IRSND_PAUSE_LEN;
162 #else
163 typedef uint8_t IRSND_PAUSE_LEN;
164 #endif
165
166 /*---------------------------------------------------------------------------------------------------------------------------------------------------
167 * IR timings
168 *---------------------------------------------------------------------------------------------------------------------------------------------------
169 */
170 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
171 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
172 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
173 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
174 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
175 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
176 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
177
178 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
179 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
181 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
182 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
183 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
184 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
187 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
188 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
189 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
190 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
191 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
192
193 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
194 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
195
196 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
197 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
198 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
199 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
200 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
201 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
202
203 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
204 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
205 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
206 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
207 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
208 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
209 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
210
211 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
212 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
213 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
214 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
215 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
216 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
217
218 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
219 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
220 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
221
222 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
223 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
224 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
225 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
226 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
227
228 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
229 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
230 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
231 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
232 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
233
234 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
235 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
236 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
237 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
238 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
239
240 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
241 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
242 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
243 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
244 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
245 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
246
247 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
248 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
249 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
250 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
251 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
252 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
253 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
254 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
255
256 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
257 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
258 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
259 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
260 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
261 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
262 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
263 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
264 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
265 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
266 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
267 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
268
269 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
270 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
271 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
272 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
273 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
274
275 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
276
277 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
278 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
279 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
280
281 #ifdef PIC_C18 // PIC C18
282 # define IRSND_FREQ_TYPE uint8_t
283 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
284 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
285 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
286 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
287 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
288 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
289 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
290 #elif defined (ARM_STM32) // STM32
291 # define IRSND_FREQ_TYPE uint32_t
292 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
293 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
294 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
295 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
296 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
297 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
298 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
299 #else // AVR
300 # if F_CPU >= 16000000L
301 # define AVR_PRESCALER 8
302 # else
303 # define AVR_PRESCALER 1
304 # endif
305 # define IRSND_FREQ_TYPE uint8_t
306 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
307 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
308 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
309 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
310 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
311 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
312 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
313 #endif
314
315 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
316 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
317 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
318 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
319 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
320 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
321
322 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
323 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
324 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
325 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
326 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
327 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
328
329 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
330 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
331 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
332 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
333 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
334 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
335 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
336
337 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
338 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
339 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
340 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
341 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
342 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
343 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
344
345 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
346 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
347 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
348 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
349 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
350 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
351 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
352
353 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
354 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
355 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
356 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
357 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
358 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
359
360 static volatile uint8_t irsnd_busy = 0;
361 static volatile uint8_t irsnd_protocol = 0;
362 static volatile uint8_t irsnd_buffer[6] = {0};
363 static volatile uint8_t irsnd_repeat = 0;
364 static volatile uint8_t irsnd_is_on = FALSE;
365
366 #if IRSND_USE_CALLBACK == 1
367 static void (*irsnd_callback_ptr) (uint8_t);
368 #endif // IRSND_USE_CALLBACK == 1
369
370 /*---------------------------------------------------------------------------------------------------------------------------------------------------
371 * Switch PWM on
372 *---------------------------------------------------------------------------------------------------------------------------------------------------
373 */
374 static void
375 irsnd_on (void)
376 {
377 if (! irsnd_is_on)
378 {
379 #ifndef DEBUG
380 # if defined(PIC_C18) // PIC C18
381 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
382 # elif defined (ARM_STM32) // STM32
383 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
384 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
385 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
386 # else // AVR
387 # if IRSND_OCx == IRSND_OC2 // use OC2
388 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
389 # elif IRSND_OCx == IRSND_OC2A // use OC2A
390 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
391 # elif IRSND_OCx == IRSND_OC2B // use OC2B
392 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
393 # elif IRSND_OCx == IRSND_OC0 // use OC0
394 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
395 # elif IRSND_OCx == IRSND_OC0A // use OC0A
396 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
397 # elif IRSND_OCx == IRSND_OC0B // use OC0B
398 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
399 # else
400 # error wrong value of IRSND_OCx
401 # endif // IRSND_OCx
402 # endif // C18
403 #endif // DEBUG
404
405 #if IRSND_USE_CALLBACK == 1
406 if (irsnd_callback_ptr)
407 {
408 (*irsnd_callback_ptr) (TRUE);
409 }
410 #endif // IRSND_USE_CALLBACK == 1
411
412 irsnd_is_on = TRUE;
413 }
414 }
415
416 /*---------------------------------------------------------------------------------------------------------------------------------------------------
417 * Switch PWM off
418 * @details Switches PWM off
419 *---------------------------------------------------------------------------------------------------------------------------------------------------
420 */
421 static void
422 irsnd_off (void)
423 {
424 if (irsnd_is_on)
425 {
426 #ifndef DEBUG
427
428 # if defined(PIC_C18) // PIC C18
429 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
430 # elif defined (ARM_STM32) // STM32
431 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
432 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
433 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
434 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
435 # else //AVR
436
437 # if IRSND_OCx == IRSND_OC2 // use OC2
438 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
439 # elif IRSND_OCx == IRSND_OC2A // use OC2A
440 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
441 # elif IRSND_OCx == IRSND_OC2B // use OC2B
442 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
443 # elif IRSND_OCx == IRSND_OC0 // use OC0
444 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
445 # elif IRSND_OCx == IRSND_OC0A // use OC0A
446 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
447 # elif IRSND_OCx == IRSND_OC0B // use OC0B
448 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
449 # else
450 # error wrong value of IRSND_OCx
451 # endif // IRSND_OCx
452 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
453 # endif //C18
454 #endif // DEBUG
455
456 #if IRSND_USE_CALLBACK == 1
457 if (irsnd_callback_ptr)
458 {
459 (*irsnd_callback_ptr) (FALSE);
460 }
461 #endif // IRSND_USE_CALLBACK == 1
462
463 irsnd_is_on = FALSE;
464 }
465 }
466
467 /*---------------------------------------------------------------------------------------------------------------------------------------------------
468 * Set PWM frequency
469 * @details sets pwm frequency
470 *---------------------------------------------------------------------------------------------------------------------------------------------------
471 */
472 static void
473 irsnd_set_freq (IRSND_FREQ_TYPE freq)
474 {
475 #ifndef DEBUG
476 # if defined(PIC_C18) // PIC C18
477 OpenPWM(freq);
478 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%
479 # elif defined (ARM_STM32) // STM32
480 static uint32_t TimeBaseFreq = 0;
481
482 if (TimeBaseFreq == 0)
483 {
484 RCC_ClocksTypeDef RCC_ClocksStructure;
485 /* Get system clocks and store timer clock in variable */
486 RCC_GetClocksFreq(&RCC_ClocksStructure);
487 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
488 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
489 {
490 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
491 }
492 else
493 {
494 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
495 }
496 # else
497 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
498 {
499 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
500 }
501 else
502 {
503 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
504 }
505 # endif
506 }
507
508 freq = TimeBaseFreq/freq;
509
510 /* Set frequency */
511 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
512 /* Set duty cycle */
513 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
514 # else // AVR
515
516 # if IRSND_OCx == IRSND_OC2
517 OCR2 = freq; // use register OCR2 for OC2
518 # elif IRSND_OCx == IRSND_OC2A // use OC2A
519 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
520 # elif IRSND_OCx == IRSND_OC2B // use OC2B
521 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
522 # elif IRSND_OCx == IRSND_OC0 // use OC0
523 OCR0 = freq; // use register OCR2 for OC2
524 # elif IRSND_OCx == IRSND_OC0A // use OC0A
525 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
526 # elif IRSND_OCx == IRSND_OC0B // use OC0B
527 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
528 # else
529 # error wrong value of IRSND_OCx
530 # endif
531 # endif //PIC_C18
532 #endif // DEBUG
533 }
534
535 /*---------------------------------------------------------------------------------------------------------------------------------------------------
536 * Initialize the PWM
537 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
538 *---------------------------------------------------------------------------------------------------------------------------------------------------
539 */
540 void
541 irsnd_init (void)
542 {
543 #ifndef DEBUG
544 # if defined(PIC_C18) // PIC C18
545 OpenTimer;
546 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency
547 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)
548 # elif defined (ARM_STM32) // STM32
549 GPIO_InitTypeDef GPIO_InitStructure;
550 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
551 TIM_OCInitTypeDef TIM_OCInitStructure;
552
553 /* GPIOx clock enable */
554 # if defined (ARM_STM32L1XX)
555 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
556 # elif defined (ARM_STM32F10X)
557 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
558 # elif defined (ARM_STM32F4XX)
559 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
560 # endif
561
562 /* GPIO Configuration */
563 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
564 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
565 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
566 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
567 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
568 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
569 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
570 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
571 # elif defined (ARM_STM32F10X)
572 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
573 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
574 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
575 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
576 # endif
577
578 /* TIMx clock enable */
579 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
580 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
581 # else
582 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
583 # endif
584
585 /* Time base configuration */
586 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
587 TIM_TimeBaseStructure.TIM_Prescaler = 0;
588 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
589 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
590 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
591
592 /* PWM1 Mode configuration */
593 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
594 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
595 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
596 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
597 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
598
599 /* Preload configuration */
600 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
601 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
602
603 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
604 # else // AVR
605 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
606 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
607
608 # if IRSND_OCx == IRSND_OC2 // use OC2
609 TCCR2 = (1<<WGM21); // CTC mode
610 # if AVR_PRESCALER == 8
611 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
612 # else
613 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
614 # endif
615 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
616 TCCR2A = (1<<WGM21); // CTC mode
617 # if AVR_PRESCALER == 8
618 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
619 # else
620 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
621 # endif
622 # elif IRSND_OCx == IRSND_OC0 // use OC0
623 TCCR0 = (1<<WGM01); // CTC mode
624 # if AVR_PRESCALER == 8
625 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
626 # else
627 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
628 # endif
629 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
630 TCCR0A = (1<<WGM01); // CTC mode
631 # if AVR_PRESCALER == 8
632 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
633 # else
634 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
635 # endif
636 # else
637 # error wrong value of IRSND_OCx
638 # endif
639 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
640 # endif //PIC_C18
641 #endif // DEBUG
642 }
643
644 #if IRSND_USE_CALLBACK == 1
645 void
646 irsnd_set_callback_ptr (void (*cb)(uint8_t))
647 {
648 irsnd_callback_ptr = cb;
649 }
650 #endif // IRSND_USE_CALLBACK == 1
651
652 uint8_t
653 irsnd_is_busy (void)
654 {
655 return irsnd_busy;
656 }
657
658 static uint16_t
659 bitsrevervse (uint16_t x, uint8_t len)
660 {
661 uint16_t xx = 0;
662
663 while(len)
664 {
665 xx <<= 1;
666 if (x & 1)
667 {
668 xx |= 1;
669 }
670 x >>= 1;
671 len--;
672 }
673 return xx;
674 }
675
676
677 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
678 static uint8_t sircs_additional_bitlen;
679 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
680
681 uint8_t
682 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
683 {
684 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
685 static uint8_t toggle_bit_recs80;
686 #endif
687 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
688 static uint8_t toggle_bit_recs80ext;
689 #endif
690 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
691 static uint8_t toggle_bit_rc5;
692 #endif
693 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
694 static uint8_t toggle_bit_rc6;
695 #endif
696 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
697 static uint8_t toggle_bit_thomson;
698 #endif
699 uint16_t address;
700 uint16_t command;
701
702 if (do_wait)
703 {
704 while (irsnd_busy)
705 {
706 // do nothing;
707 }
708 }
709 else if (irsnd_busy)
710 {
711 return (FALSE);
712 }
713
714 irsnd_protocol = irmp_data_p->protocol;
715 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
716
717 switch (irsnd_protocol)
718 {
719 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
720 case IRMP_SIRCS_PROTOCOL:
721 {
722 // uint8_t sircs_additional_command_len;
723 uint8_t sircs_additional_address_len;
724
725 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
726
727 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
728 {
729 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
730 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
731 }
732 else
733 {
734 // sircs_additional_command_len = sircs_additional_bitlen;
735 sircs_additional_address_len = 0;
736 }
737
738 command = bitsrevervse (irmp_data_p->command, 15);
739
740 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
741 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
742
743 if (sircs_additional_address_len > 0)
744 {
745 address = bitsrevervse (irmp_data_p->address, 5);
746 irsnd_buffer[1] |= (address & 0x0010) >> 4;
747 irsnd_buffer[2] = (address & 0x000F) << 4;
748 }
749 irsnd_busy = TRUE;
750 break;
751 }
752 #endif
753 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
754 case IRMP_APPLE_PROTOCOL:
755 {
756 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
757 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
758
759 address = bitsrevervse (address, NEC_ADDRESS_LEN);
760 command = bitsrevervse (command, NEC_COMMAND_LEN);
761
762 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
763
764 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
765 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
766 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
767 irsnd_buffer[3] = 0x8B; // 10001011 (id)
768 irsnd_busy = TRUE;
769 break;
770 }
771 case IRMP_NEC_PROTOCOL:
772 {
773 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
774 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
775
776 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
777 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
778 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
779 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
780 irsnd_busy = TRUE;
781 break;
782 }
783 #endif
784 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
785 case IRMP_NEC16_PROTOCOL:
786 {
787 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
788 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
789
790 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
791 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
792 irsnd_busy = TRUE;
793 break;
794 }
795 #endif
796 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
797 case IRMP_NEC42_PROTOCOL:
798 {
799 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
800 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
801
802 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
803 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
804 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
805 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
806 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
807 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
808 irsnd_busy = TRUE;
809 break;
810 }
811 #endif
812 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
813 case IRMP_SAMSUNG_PROTOCOL:
814 {
815 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
816 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
817
818 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
819 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
820 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
821 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
822 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
823 irsnd_busy = TRUE;
824 break;
825 }
826 case IRMP_SAMSUNG32_PROTOCOL:
827 {
828 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
829 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
830
831 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
832 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
833 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
834 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
835 irsnd_busy = TRUE;
836 break;
837 }
838 #endif
839 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
840 case IRMP_MATSUSHITA_PROTOCOL:
841 {
842 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
843 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
844
845 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
846 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
847 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
848 irsnd_busy = TRUE;
849 break;
850 }
851 #endif
852 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
853 case IRMP_KASEIKYO_PROTOCOL:
854 {
855 uint8_t xor_value;
856 uint16_t genre2;
857
858 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
859 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
860 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
861
862 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
863
864 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
865 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
866 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
867 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
868 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
869
870 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
871
872 irsnd_buffer[5] = xor_value;
873 irsnd_busy = TRUE;
874 break;
875 }
876 #endif
877 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
878 case IRMP_RECS80_PROTOCOL:
879 {
880 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
881
882 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
883 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
884 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
885 irsnd_busy = TRUE;
886 break;
887 }
888 #endif
889 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
890 case IRMP_RECS80EXT_PROTOCOL:
891 {
892 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
893
894 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
895 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
896 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
897 irsnd_busy = TRUE;
898 break;
899 }
900 #endif
901 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
902 case IRMP_RC5_PROTOCOL:
903 {
904 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
905
906 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
907 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
908 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
909 irsnd_busy = TRUE;
910 break;
911 }
912 #endif
913 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
914 case IRMP_RC6_PROTOCOL:
915 {
916 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
917
918 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
919 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
920 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
921 irsnd_busy = TRUE;
922 break;
923 }
924 #endif
925 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
926 case IRMP_RC6A_PROTOCOL:
927 {
928 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
929
930 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
931 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
932 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
933 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
934 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
935 irsnd_busy = TRUE;
936 break;
937 }
938 #endif
939 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
940 case IRMP_DENON_PROTOCOL:
941 {
942 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
943 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
944 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
945 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
946 irsnd_busy = TRUE;
947 break;
948 }
949 #endif
950 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
951 case IRMP_THOMSON_PROTOCOL:
952 {
953 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
954
955 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
956 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
957 irsnd_busy = TRUE;
958 break;
959 }
960 #endif
961 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
962 case IRMP_NUBERT_PROTOCOL:
963 {
964 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
965 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
966 irsnd_busy = TRUE;
967 break;
968 }
969 #endif
970 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
971 case IRMP_BANG_OLUFSEN_PROTOCOL:
972 {
973 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
974 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
975 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
976 irsnd_busy = TRUE;
977 break;
978 }
979 #endif
980 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
981 case IRMP_GRUNDIG_PROTOCOL:
982 {
983 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);
984
985 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
986 irsnd_buffer[1] = 0xC0; // 11
987 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
988 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
989
990 irsnd_busy = TRUE;
991 break;
992 }
993 #endif
994 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
995 case IRMP_IR60_PROTOCOL:
996 {
997 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
998 #if 0
999 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1000 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1001 #else
1002 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1003 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1004 #endif
1005
1006 irsnd_busy = TRUE;
1007 break;
1008 }
1009 #endif
1010 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1011 case IRMP_NOKIA_PROTOCOL:
1012 {
1013 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1014 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1015
1016 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1017 irsnd_buffer[1] = 0xFF; // 11111111
1018 irsnd_buffer[2] = 0x80; // 1
1019 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1020 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1021 irsnd_buffer[5] = (address << 7); // A
1022
1023 irsnd_busy = TRUE;
1024 break;
1025 }
1026 #endif
1027 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1028 case IRMP_SIEMENS_PROTOCOL:
1029 {
1030 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA
1031 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC
1032 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1033
1034 irsnd_busy = TRUE;
1035 break;
1036 }
1037 #endif
1038 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1039 case IRMP_FDC_PROTOCOL:
1040 {
1041 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1042 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1043
1044 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1045 irsnd_buffer[1] = 0; // 00000000
1046 irsnd_buffer[2] = 0; // 0000RRRR
1047 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1048 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1049 irsnd_busy = TRUE;
1050 break;
1051 }
1052 #endif
1053 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1054 case IRMP_RCCAR_PROTOCOL:
1055 {
1056 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1057 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1058
1059 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1060 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1061
1062 irsnd_busy = TRUE;
1063 break;
1064 }
1065 #endif
1066 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1067 case IRMP_JVC_PROTOCOL:
1068 {
1069 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1070 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1071
1072 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1073 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1074
1075 irsnd_busy = TRUE;
1076 break;
1077 }
1078 #endif
1079 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1080 case IRMP_NIKON_PROTOCOL:
1081 {
1082 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1083 irsnd_busy = TRUE;
1084 break;
1085 }
1086 #endif
1087 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1088 case IRMP_LEGO_PROTOCOL:
1089 {
1090 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1091
1092 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1093 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1094 irsnd_busy = TRUE;
1095 break;
1096 }
1097 #endif
1098 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1099 case IRMP_A1TVBOX_PROTOCOL:
1100 {
1101 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1102 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1103 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1104
1105 irsnd_busy = TRUE;
1106 break;
1107 }
1108 #endif
1109 default:
1110 {
1111 break;
1112 }
1113 }
1114
1115 return irsnd_busy;
1116 }
1117
1118 void
1119 irsnd_stop (void)
1120 {
1121 irsnd_repeat = 0;
1122 }
1123
1124 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1125 * ISR routine
1126 * @details ISR routine, called 10000 times per second
1127 *---------------------------------------------------------------------------------------------------------------------------------------------------
1128 */
1129 uint8_t
1130 irsnd_ISR (void)
1131 {
1132 static uint8_t send_trailer = FALSE;
1133 static uint8_t current_bit = 0xFF;
1134 static uint8_t pulse_counter = 0;
1135 static IRSND_PAUSE_LEN pause_counter = 0;
1136 static uint8_t startbit_pulse_len = 0;
1137 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1138 static uint8_t pulse_1_len = 0;
1139 static uint8_t pause_1_len = 0;
1140 static uint8_t pulse_0_len = 0;
1141 static uint8_t pause_0_len = 0;
1142 static uint8_t has_stop_bit = 0;
1143 static uint8_t new_frame = TRUE;
1144 static uint8_t complete_data_len = 0;
1145 static uint8_t n_repeat_frames = 0; // number of repetition frames
1146 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1147 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1148 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1149 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1150 static uint8_t repeat_counter = 0; // repeat counter
1151 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1152 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1153 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1154 static uint8_t last_bit_value;
1155 #endif
1156 static uint8_t pulse_len = 0xFF;
1157 static IRSND_PAUSE_LEN pause_len = 0xFF;
1158
1159 if (irsnd_busy)
1160 {
1161 if (current_bit == 0xFF && new_frame) // start of transmission...
1162 {
1163 if (auto_repetition_counter > 0)
1164 {
1165 auto_repetition_pause_counter++;
1166
1167 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1168 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1169 {
1170 repeat_frame_pause_len--;
1171 }
1172 #endif
1173
1174 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1175 {
1176 auto_repetition_pause_counter = 0;
1177
1178 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1179 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1180 {
1181 current_bit = 16;
1182 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1183 }
1184 else
1185 #endif
1186 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1187 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1188 {
1189 current_bit = 15;
1190 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1191 }
1192 else
1193 #endif
1194 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1195 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1196 {
1197 current_bit = 7;
1198 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1199 }
1200 else
1201 #endif
1202 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1203 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1204 {
1205 if (auto_repetition_counter + 1 < n_auto_repetitions)
1206 {
1207 current_bit = 23;
1208 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1209 }
1210 else // nokia stop frame
1211 {
1212 current_bit = 0xFF;
1213 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1214 }
1215 }
1216 else
1217 #endif
1218 {
1219 ;
1220 }
1221 }
1222 else
1223 {
1224 #ifdef DEBUG
1225 if (irsnd_is_on)
1226 {
1227 putchar ('0');
1228 }
1229 else
1230 {
1231 putchar ('1');
1232 }
1233 #endif
1234 return irsnd_busy;
1235 }
1236 }
1237 #if 0
1238 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)
1239 #else
1240 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1241 #endif
1242 {
1243 packet_repeat_pause_counter++;
1244
1245 #ifdef DEBUG
1246 if (irsnd_is_on)
1247 {
1248 putchar ('0');
1249 }
1250 else
1251 {
1252 putchar ('1');
1253 }
1254 #endif
1255 return irsnd_busy;
1256 }
1257 else
1258 {
1259 if (send_trailer)
1260 {
1261 irsnd_busy = FALSE;
1262 send_trailer = FALSE;
1263 return irsnd_busy;
1264 }
1265
1266 n_repeat_frames = irsnd_repeat;
1267
1268 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1269 {
1270 n_repeat_frames = 255;
1271 }
1272
1273 packet_repeat_pause_counter = 0;
1274 pulse_counter = 0;
1275 pause_counter = 0;
1276
1277 switch (irsnd_protocol)
1278 {
1279 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1280 case IRMP_SIRCS_PROTOCOL:
1281 {
1282 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1283 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1284 pulse_1_len = SIRCS_1_PULSE_LEN;
1285 pause_1_len = SIRCS_PAUSE_LEN - 1;
1286 pulse_0_len = SIRCS_0_PULSE_LEN;
1287 pause_0_len = SIRCS_PAUSE_LEN - 1;
1288 has_stop_bit = SIRCS_STOP_BIT;
1289 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1290 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1291 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1292 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1293 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1294 break;
1295 }
1296 #endif
1297 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1298 case IRMP_NEC_PROTOCOL:
1299 {
1300 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1301
1302 if (repeat_counter > 0)
1303 {
1304 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1305 complete_data_len = 0;
1306 }
1307 else
1308 {
1309 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1310 complete_data_len = NEC_COMPLETE_DATA_LEN;
1311 }
1312
1313 pulse_1_len = NEC_PULSE_LEN;
1314 pause_1_len = NEC_1_PAUSE_LEN - 1;
1315 pulse_0_len = NEC_PULSE_LEN;
1316 pause_0_len = NEC_0_PAUSE_LEN - 1;
1317 has_stop_bit = NEC_STOP_BIT;
1318 n_auto_repetitions = 1; // 1 frame
1319 auto_repetition_pause_len = 0;
1320 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1321 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1322 break;
1323 }
1324 #endif
1325 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1326 case IRMP_NEC16_PROTOCOL:
1327 {
1328 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1329 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1330 pulse_1_len = NEC_PULSE_LEN;
1331 pause_1_len = NEC_1_PAUSE_LEN - 1;
1332 pulse_0_len = NEC_PULSE_LEN;
1333 pause_0_len = NEC_0_PAUSE_LEN - 1;
1334 has_stop_bit = NEC_STOP_BIT;
1335 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1336 n_auto_repetitions = 1; // 1 frame
1337 auto_repetition_pause_len = 0;
1338 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1339 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1340 break;
1341 }
1342 #endif
1343 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1344 case IRMP_NEC42_PROTOCOL:
1345 {
1346 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1347 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1348 pulse_1_len = NEC_PULSE_LEN;
1349 pause_1_len = NEC_1_PAUSE_LEN - 1;
1350 pulse_0_len = NEC_PULSE_LEN;
1351 pause_0_len = NEC_0_PAUSE_LEN - 1;
1352 has_stop_bit = NEC_STOP_BIT;
1353 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1354 n_auto_repetitions = 1; // 1 frame
1355 auto_repetition_pause_len = 0;
1356 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1357 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1358 break;
1359 }
1360 #endif
1361 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1362 case IRMP_SAMSUNG_PROTOCOL:
1363 {
1364 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1365 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1366 pulse_1_len = SAMSUNG_PULSE_LEN;
1367 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1368 pulse_0_len = SAMSUNG_PULSE_LEN;
1369 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1370 has_stop_bit = SAMSUNG_STOP_BIT;
1371 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1372 n_auto_repetitions = 1; // 1 frame
1373 auto_repetition_pause_len = 0;
1374 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1375 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1376 break;
1377 }
1378
1379 case IRMP_SAMSUNG32_PROTOCOL:
1380 {
1381 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1382 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1383 pulse_1_len = SAMSUNG_PULSE_LEN;
1384 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1385 pulse_0_len = SAMSUNG_PULSE_LEN;
1386 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1387 has_stop_bit = SAMSUNG_STOP_BIT;
1388 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1389 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames
1390 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1391 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1392 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1393 break;
1394 }
1395 #endif
1396 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1397 case IRMP_MATSUSHITA_PROTOCOL:
1398 {
1399 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1400 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1401 pulse_1_len = MATSUSHITA_PULSE_LEN;
1402 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1403 pulse_0_len = MATSUSHITA_PULSE_LEN;
1404 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1405 has_stop_bit = MATSUSHITA_STOP_BIT;
1406 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1407 n_auto_repetitions = 1; // 1 frame
1408 auto_repetition_pause_len = 0;
1409 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1410 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1411 break;
1412 }
1413 #endif
1414 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1415 case IRMP_KASEIKYO_PROTOCOL:
1416 {
1417 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1418 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1419 pulse_1_len = KASEIKYO_PULSE_LEN;
1420 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1421 pulse_0_len = KASEIKYO_PULSE_LEN;
1422 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1423 has_stop_bit = KASEIKYO_STOP_BIT;
1424 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1425 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1426 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1427 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1428 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1429 break;
1430 }
1431 #endif
1432 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1433 case IRMP_RECS80_PROTOCOL:
1434 {
1435 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1436 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1437 pulse_1_len = RECS80_PULSE_LEN;
1438 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1439 pulse_0_len = RECS80_PULSE_LEN;
1440 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1441 has_stop_bit = RECS80_STOP_BIT;
1442 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1443 n_auto_repetitions = 1; // 1 frame
1444 auto_repetition_pause_len = 0;
1445 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1446 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1447 break;
1448 }
1449 #endif
1450 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1451 case IRMP_RECS80EXT_PROTOCOL:
1452 {
1453 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1454 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1455 pulse_1_len = RECS80EXT_PULSE_LEN;
1456 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1457 pulse_0_len = RECS80EXT_PULSE_LEN;
1458 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1459 has_stop_bit = RECS80EXT_STOP_BIT;
1460 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1461 n_auto_repetitions = 1; // 1 frame
1462 auto_repetition_pause_len = 0;
1463 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1464 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1465 break;
1466 }
1467 #endif
1468 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1469 case IRMP_RC5_PROTOCOL:
1470 {
1471 startbit_pulse_len = RC5_BIT_LEN;
1472 startbit_pause_len = RC5_BIT_LEN;
1473 pulse_len = RC5_BIT_LEN;
1474 pause_len = RC5_BIT_LEN;
1475 has_stop_bit = RC5_STOP_BIT;
1476 complete_data_len = RC5_COMPLETE_DATA_LEN;
1477 n_auto_repetitions = 1; // 1 frame
1478 auto_repetition_pause_len = 0;
1479 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1480 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1481 break;
1482 }
1483 #endif
1484 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1485 case IRMP_RC6_PROTOCOL:
1486 {
1487 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1488 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1489 pulse_len = RC6_BIT_LEN;
1490 pause_len = RC6_BIT_LEN;
1491 has_stop_bit = RC6_STOP_BIT;
1492 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1493 n_auto_repetitions = 1; // 1 frame
1494 auto_repetition_pause_len = 0;
1495 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1496 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1497 break;
1498 }
1499 #endif
1500 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1501 case IRMP_RC6A_PROTOCOL:
1502 {
1503 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1504 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1505 pulse_len = RC6_BIT_LEN;
1506 pause_len = RC6_BIT_LEN;
1507 has_stop_bit = RC6_STOP_BIT;
1508 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1509 n_auto_repetitions = 1; // 1 frame
1510 auto_repetition_pause_len = 0;
1511 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1512 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1513 break;
1514 }
1515 #endif
1516 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1517 case IRMP_DENON_PROTOCOL:
1518 {
1519 startbit_pulse_len = 0x00;
1520 startbit_pause_len = 0x00;
1521 pulse_1_len = DENON_PULSE_LEN;
1522 pause_1_len = DENON_1_PAUSE_LEN - 1;
1523 pulse_0_len = DENON_PULSE_LEN;
1524 pause_0_len = DENON_0_PAUSE_LEN - 1;
1525 has_stop_bit = DENON_STOP_BIT;
1526 complete_data_len = DENON_COMPLETE_DATA_LEN;
1527 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1528 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1529 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1530 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1531 break;
1532 }
1533 #endif
1534 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1535 case IRMP_THOMSON_PROTOCOL:
1536 {
1537 startbit_pulse_len = 0x00;
1538 startbit_pause_len = 0x00;
1539 pulse_1_len = THOMSON_PULSE_LEN;
1540 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1541 pulse_0_len = THOMSON_PULSE_LEN;
1542 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1543 has_stop_bit = THOMSON_STOP_BIT;
1544 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1545 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1546 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1547 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1548 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1549 break;
1550 }
1551 #endif
1552 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1553 case IRMP_NUBERT_PROTOCOL:
1554 {
1555 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1556 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1557 pulse_1_len = NUBERT_1_PULSE_LEN;
1558 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1559 pulse_0_len = NUBERT_0_PULSE_LEN;
1560 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1561 has_stop_bit = NUBERT_STOP_BIT;
1562 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1563 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1564 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1565 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1566 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1567 break;
1568 }
1569 #endif
1570 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1571 case IRMP_BANG_OLUFSEN_PROTOCOL:
1572 {
1573 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1574 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1575 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1576 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1577 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1578 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1579 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1580 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1581 n_auto_repetitions = 1; // 1 frame
1582 auto_repetition_pause_len = 0;
1583 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1584 last_bit_value = 0;
1585 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1586 break;
1587 }
1588 #endif
1589 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1590 case IRMP_GRUNDIG_PROTOCOL:
1591 {
1592 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1593 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1594 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1595 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1596 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1597 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1598 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1599 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1600 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1601 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1602 break;
1603 }
1604 #endif
1605 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1606 case IRMP_IR60_PROTOCOL:
1607 {
1608 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1609 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1610 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1611 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1612 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1613 complete_data_len = IR60_COMPLETE_DATA_LEN;
1614 n_auto_repetitions = IR60_FRAMES; // 2 frames
1615 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1616 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1617 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1618 break;
1619 }
1620 #endif
1621 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1622 case IRMP_NOKIA_PROTOCOL:
1623 {
1624 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1625 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1626 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1627 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1628 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1629 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1630 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1631 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1632 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1633 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1634 break;
1635 }
1636 #endif
1637 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1638 case IRMP_SIEMENS_PROTOCOL:
1639 {
1640 startbit_pulse_len = SIEMENS_BIT_LEN;
1641 startbit_pause_len = SIEMENS_BIT_LEN;
1642 pulse_len = SIEMENS_BIT_LEN;
1643 pause_len = SIEMENS_BIT_LEN;
1644 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1645 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;
1646 n_auto_repetitions = 1; // 1 frame
1647 auto_repetition_pause_len = 0;
1648 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1649 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1650 break;
1651 }
1652 #endif
1653 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1654 case IRMP_FDC_PROTOCOL:
1655 {
1656 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1657 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1658 complete_data_len = FDC_COMPLETE_DATA_LEN;
1659 pulse_1_len = FDC_PULSE_LEN;
1660 pause_1_len = FDC_1_PAUSE_LEN - 1;
1661 pulse_0_len = FDC_PULSE_LEN;
1662 pause_0_len = FDC_0_PAUSE_LEN - 1;
1663 has_stop_bit = FDC_STOP_BIT;
1664 n_auto_repetitions = 1; // 1 frame
1665 auto_repetition_pause_len = 0;
1666 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1667 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1668 break;
1669 }
1670 #endif
1671 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1672 case IRMP_RCCAR_PROTOCOL:
1673 {
1674 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1675 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1676 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1677 pulse_1_len = RCCAR_PULSE_LEN;
1678 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1679 pulse_0_len = RCCAR_PULSE_LEN;
1680 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1681 has_stop_bit = RCCAR_STOP_BIT;
1682 n_auto_repetitions = 1; // 1 frame
1683 auto_repetition_pause_len = 0;
1684 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1685 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1686 break;
1687 }
1688 #endif
1689 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1690 case IRMP_JVC_PROTOCOL:
1691 {
1692 if (repeat_counter != 0) // skip start bit if repetition frame
1693 {
1694 current_bit = 0;
1695 }
1696
1697 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1698 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1699 complete_data_len = JVC_COMPLETE_DATA_LEN;
1700 pulse_1_len = JVC_PULSE_LEN;
1701 pause_1_len = JVC_1_PAUSE_LEN - 1;
1702 pulse_0_len = JVC_PULSE_LEN;
1703 pause_0_len = JVC_0_PAUSE_LEN - 1;
1704 has_stop_bit = JVC_STOP_BIT;
1705 n_auto_repetitions = 1; // 1 frame
1706 auto_repetition_pause_len = 0;
1707 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1708 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1709 break;
1710 }
1711 #endif
1712 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1713 case IRMP_NIKON_PROTOCOL:
1714 {
1715 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1716 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
1717 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1718 pulse_1_len = NIKON_PULSE_LEN;
1719 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1720 pulse_0_len = NIKON_PULSE_LEN;
1721 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1722 has_stop_bit = NIKON_STOP_BIT;
1723 n_auto_repetitions = 1; // 1 frame
1724 auto_repetition_pause_len = 0;
1725 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1726 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1727 break;
1728 }
1729 #endif
1730 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1731 case IRMP_LEGO_PROTOCOL:
1732 {
1733 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1734 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1735 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1736 pulse_1_len = LEGO_PULSE_LEN;
1737 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1738 pulse_0_len = LEGO_PULSE_LEN;
1739 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1740 has_stop_bit = LEGO_STOP_BIT;
1741 n_auto_repetitions = 1; // 1 frame
1742 auto_repetition_pause_len = 0;
1743 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1744 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1745 break;
1746 }
1747 #endif
1748 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1749 case IRMP_A1TVBOX_PROTOCOL:
1750 {
1751 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
1752 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
1753 pulse_len = A1TVBOX_BIT_PULSE_LEN;
1754 pause_len = A1TVBOX_BIT_PAUSE_LEN;
1755 has_stop_bit = A1TVBOX_STOP_BIT;
1756 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
1757 n_auto_repetitions = 1; // 1 frame
1758 auto_repetition_pause_len = 0;
1759 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
1760 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1761 break;
1762 }
1763 #endif
1764 default:
1765 {
1766 irsnd_busy = FALSE;
1767 break;
1768 }
1769 }
1770 }
1771 }
1772
1773 if (irsnd_busy)
1774 {
1775 new_frame = FALSE;
1776
1777 switch (irsnd_protocol)
1778 {
1779 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1780 case IRMP_SIRCS_PROTOCOL:
1781 #endif
1782 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1783 case IRMP_NEC_PROTOCOL:
1784 #endif
1785 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1786 case IRMP_NEC16_PROTOCOL:
1787 #endif
1788 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1789 case IRMP_NEC42_PROTOCOL:
1790 #endif
1791 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1792 case IRMP_SAMSUNG_PROTOCOL:
1793 case IRMP_SAMSUNG32_PROTOCOL:
1794 #endif
1795 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1796 case IRMP_MATSUSHITA_PROTOCOL:
1797 #endif
1798 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1799 case IRMP_KASEIKYO_PROTOCOL:
1800 #endif
1801 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1802 case IRMP_RECS80_PROTOCOL:
1803 #endif
1804 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1805 case IRMP_RECS80EXT_PROTOCOL:
1806 #endif
1807 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1808 case IRMP_DENON_PROTOCOL:
1809 #endif
1810 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1811 case IRMP_THOMSON_PROTOCOL:
1812 #endif
1813 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1814 case IRMP_NUBERT_PROTOCOL:
1815 #endif
1816 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1817 case IRMP_BANG_OLUFSEN_PROTOCOL:
1818 #endif
1819 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1820 case IRMP_FDC_PROTOCOL:
1821 #endif
1822 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1823 case IRMP_RCCAR_PROTOCOL:
1824 #endif
1825 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1826 case IRMP_JVC_PROTOCOL:
1827 #endif
1828 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1829 case IRMP_NIKON_PROTOCOL:
1830 #endif
1831 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1832 case IRMP_LEGO_PROTOCOL:
1833 #endif
1834
1835 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
1836 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
1837 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
1838 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
1839 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1840 {
1841 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1842 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
1843 {
1844 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
1845 {
1846 auto_repetition_pause_len--;
1847 }
1848
1849 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1850 {
1851 repeat_frame_pause_len--;
1852 }
1853 }
1854 #endif
1855
1856 if (pulse_counter == 0)
1857 {
1858 if (current_bit == 0xFF) // send start bit
1859 {
1860 pulse_len = startbit_pulse_len;
1861 pause_len = startbit_pause_len;
1862 }
1863 else if (current_bit < complete_data_len) // send n'th bit
1864 {
1865 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1866 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
1867 {
1868 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
1869 {
1870 pulse_len = SAMSUNG_PULSE_LEN;
1871 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1872 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1873 }
1874 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
1875 {
1876 pulse_len = SAMSUNG_PULSE_LEN;
1877 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1878 }
1879 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
1880 {
1881 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1882
1883 pulse_len = SAMSUNG_PULSE_LEN;
1884 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1885 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1886 }
1887 }
1888 else
1889 #endif
1890
1891 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1892 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
1893 {
1894 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
1895 {
1896 pulse_len = NEC_PULSE_LEN;
1897 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1898 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1899 }
1900 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
1901 {
1902 pulse_len = NEC_PULSE_LEN;
1903 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1904 }
1905 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
1906 {
1907 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1908
1909 pulse_len = NEC_PULSE_LEN;
1910 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1911 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1912 }
1913 }
1914 else
1915 #endif
1916
1917 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1918 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
1919 {
1920 if (current_bit == 0) // send 2nd start bit
1921 {
1922 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1923 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1924 }
1925 else if (current_bit == 1) // send 3rd start bit
1926 {
1927 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
1928 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
1929 }
1930 else if (current_bit == 2) // send 4th start bit
1931 {
1932 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1933 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1934 }
1935 else if (current_bit == 19) // send trailer bit
1936 {
1937 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1938 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
1939 }
1940 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
1941 {
1942 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
1943 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1944
1945 if (cur_bit_value == last_bit_value)
1946 {
1947 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
1948 }
1949 else
1950 {
1951 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
1952 last_bit_value = cur_bit_value;
1953 }
1954 }
1955 }
1956 else
1957 #endif
1958 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
1959 {
1960 pulse_len = pulse_1_len;
1961 pause_len = pause_1_len;
1962 }
1963 else
1964 {
1965 pulse_len = pulse_0_len;
1966 pause_len = pause_0_len;
1967 }
1968 }
1969 else if (has_stop_bit) // send stop bit
1970 {
1971 pulse_len = pulse_0_len;
1972
1973 if (auto_repetition_counter < n_auto_repetitions)
1974 {
1975 pause_len = pause_0_len;
1976 }
1977 else
1978 {
1979 pause_len = 255; // last frame: pause of 255
1980 }
1981 }
1982 }
1983
1984 if (pulse_counter < pulse_len)
1985 {
1986 if (pulse_counter == 0)
1987 {
1988 irsnd_on ();
1989 }
1990 pulse_counter++;
1991 }
1992 else if (pause_counter < pause_len)
1993 {
1994 if (pause_counter == 0)
1995 {
1996 irsnd_off ();
1997 }
1998 pause_counter++;
1999 }
2000 else
2001 {
2002 current_bit++;
2003
2004 if (current_bit >= complete_data_len + has_stop_bit)
2005 {
2006 current_bit = 0xFF;
2007 auto_repetition_counter++;
2008
2009 if (auto_repetition_counter == n_auto_repetitions)
2010 {
2011 irsnd_busy = FALSE;
2012 auto_repetition_counter = 0;
2013 }
2014 new_frame = TRUE;
2015 }
2016
2017 pulse_counter = 0;
2018 pause_counter = 0;
2019 }
2020 break;
2021 }
2022 #endif
2023
2024 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2025 case IRMP_RC5_PROTOCOL:
2026 #endif
2027 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2028 case IRMP_RC6_PROTOCOL:
2029 #endif
2030 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2031 case IRMP_RC6A_PROTOCOL:
2032 #endif
2033 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2034 case IRMP_SIEMENS_PROTOCOL:
2035 #endif
2036 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2037 case IRMP_GRUNDIG_PROTOCOL:
2038 #endif
2039 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2040 case IRMP_IR60_PROTOCOL:
2041 #endif
2042 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2043 case IRMP_NOKIA_PROTOCOL:
2044 #endif
2045 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2046 case IRMP_A1TVBOX_PROTOCOL:
2047 #endif
2048
2049 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2050 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2051 {
2052 if (pulse_counter == pulse_len && pause_counter == pause_len)
2053 {
2054 current_bit++;
2055
2056 if (current_bit >= complete_data_len)
2057 {
2058 current_bit = 0xFF;
2059
2060 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2061 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2062 {
2063 auto_repetition_counter++;
2064
2065 if (repeat_counter > 0)
2066 { // set 117 msec pause time
2067 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2068 }
2069
2070 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2071 {
2072 n_auto_repetitions++; // increment number of auto repetitions
2073 repeat_counter++;
2074 }
2075 else if (auto_repetition_counter == n_auto_repetitions)
2076 {
2077 irsnd_busy = FALSE;
2078 auto_repetition_counter = 0;
2079 }
2080 }
2081 else
2082 #endif
2083 {
2084 irsnd_busy = FALSE;
2085 }
2086
2087 new_frame = TRUE;
2088 irsnd_off ();
2089 }
2090
2091 pulse_counter = 0;
2092 pause_counter = 0;
2093 }
2094
2095 if (! new_frame)
2096 {
2097 uint8_t first_pulse;
2098
2099 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2100 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2101 {
2102 if (current_bit == 0xFF || // start bit of start-frame
2103 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2104 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2105 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2106 {
2107 pulse_len = startbit_pulse_len;
2108 pause_len = startbit_pause_len;
2109 first_pulse = TRUE;
2110 }
2111 else // send n'th bit
2112 {
2113 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2114 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2115 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2116 }
2117 }
2118 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2119 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)
2120 #endif
2121 {
2122 if (current_bit == 0xFF) // 1 start bit
2123 {
2124 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2125 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2126 {
2127 pulse_len = startbit_pulse_len;
2128 pause_len = startbit_pause_len;
2129 }
2130 else
2131 #endif
2132 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2133 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2134 {
2135 current_bit = 0;
2136 }
2137 else
2138 #endif
2139 {
2140 ;
2141 }
2142
2143 first_pulse = TRUE;
2144 }
2145 else // send n'th bit
2146 {
2147 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2148 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2149 {
2150 pulse_len = RC6_BIT_LEN;
2151 pause_len = RC6_BIT_LEN;
2152
2153 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2154 {
2155 if (current_bit == 4) // toggle bit (double len)
2156 {
2157 pulse_len = 2 * RC6_BIT_LEN;
2158 pause_len = 2 * RC6_BIT_LEN;
2159 }
2160 }
2161 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2162 {
2163 if (current_bit == 4) // toggle bit (double len)
2164 {
2165 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2166 pause_len = 2 * RC6_BIT_LEN;
2167 }
2168 else if (current_bit == 5) // toggle bit (double len)
2169 {
2170 pause_len = 2 * RC6_BIT_LEN;
2171 }
2172 }
2173 }
2174 #endif
2175 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2176 }
2177
2178 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2179 {
2180 first_pulse = first_pulse ? FALSE : TRUE;
2181 }
2182 }
2183
2184 if (first_pulse)
2185 {
2186 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2187
2188 if (pulse_counter < pulse_len)
2189 {
2190 if (pulse_counter == 0)
2191 {
2192 irsnd_on ();
2193 }
2194 pulse_counter++;
2195 }
2196 else // if (pause_counter < pause_len)
2197 {
2198 if (pause_counter == 0)
2199 {
2200 irsnd_off ();
2201 }
2202 pause_counter++;
2203 }
2204 }
2205 else
2206 {
2207 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2208
2209 if (pause_counter < pause_len)
2210 {
2211 if (pause_counter == 0)
2212 {
2213 irsnd_off ();
2214 }
2215 pause_counter++;
2216 }
2217 else // if (pulse_counter < pulse_len)
2218 {
2219 if (pulse_counter == 0)
2220 {
2221 irsnd_on ();
2222 }
2223 pulse_counter++;
2224 }
2225 }
2226 }
2227 break;
2228 }
2229 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2230 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2231
2232 default:
2233 {
2234 irsnd_busy = FALSE;
2235 break;
2236 }
2237 }
2238 }
2239
2240 if (! irsnd_busy)
2241 {
2242 if (repeat_counter < n_repeat_frames)
2243 {
2244 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2245 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2246 {
2247 irsnd_buffer[2] |= 0x0F;
2248 }
2249 #endif
2250 repeat_counter++;
2251 irsnd_busy = TRUE;
2252 }
2253 else
2254 {
2255 irsnd_busy = TRUE; //Rainer
2256 send_trailer = TRUE;
2257 n_repeat_frames = 0;
2258 repeat_counter = 0;
2259 }
2260 }
2261 }
2262
2263 #ifdef DEBUG
2264 if (irsnd_is_on)
2265 {
2266 putchar ('0');
2267 }
2268 else
2269 {
2270 putchar ('1');
2271 }
2272 #endif
2273
2274 return irsnd_busy;
2275 }
2276
2277 #ifdef DEBUG
2278
2279 // main function - for unix/linux + windows only!
2280 // AVR: see main.c!
2281 // Compile it under linux with:
2282 // cc irsnd.c -o irsnd
2283 //
2284 // usage: ./irsnd protocol hex-address hex-command >filename
2285
2286 int
2287 main (int argc, char ** argv)
2288 {
2289 int protocol;
2290 int address;
2291 int command;
2292 IRMP_DATA irmp_data;
2293
2294 if (argc != 4 && argc != 5)
2295 {
2296 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2297 return 1;
2298 }
2299
2300 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2301 sscanf (argv[2], "%x", &address) == 1 &&
2302 sscanf (argv[3], "%x", &command) == 1)
2303 {
2304 irmp_data.protocol = protocol;
2305 irmp_data.address = address;
2306 irmp_data.command = command;
2307
2308 if (argc == 5)
2309 {
2310 irmp_data.flags = atoi (argv[4]);
2311 }
2312 else
2313 {
2314 irmp_data.flags = 0;
2315 }
2316
2317 irsnd_init ();
2318
2319 (void) irsnd_send_data (&irmp_data, TRUE);
2320
2321 while (irsnd_busy)
2322 {
2323 irsnd_ISR ();
2324 }
2325
2326 putchar ('\n');
2327
2328 #if 1 // enable here to send twice
2329 (void) irsnd_send_data (&irmp_data, TRUE);
2330
2331 while (irsnd_busy)
2332 {
2333 irsnd_ISR ();
2334 }
2335
2336 putchar ('\n');
2337 #endif
2338 }
2339 else
2340 {
2341 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2342 return 1;
2343 }
2344 return 0;
2345 }
2346
2347 #endif // DEBUG
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)