*\r
* Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.c,v 1.39 2010/06/10 10:09:47 fm Exp $\r
+ * $Id: irmp.c,v 1.42 2010/06/10 23:16:03 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
#define MIN_TOLERANCE_00 1.0 // -0%\r
#define MAX_TOLERANCE_00 1.0 // +0%\r
\r
+#define MIN_TOLERANCE_02 0.98 // -2%\r
+#define MAX_TOLERANCE_02 1.02 // +2%\r
+\r
+#define MIN_TOLERANCE_03 0.97 // -3%\r
+#define MAX_TOLERANCE_03 1.03 // +3%\r
+\r
+#define MIN_TOLERANCE_04 0.96 // -4%\r
+#define MAX_TOLERANCE_04 1.04 // +4%\r
+\r
#define MIN_TOLERANCE_05 0.95 // -5%\r
#define MAX_TOLERANCE_05 1.05 // +5%\r
\r
#define SIEMENS_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) - 1)\r
#define SIEMENS_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) + 1)\r
\r
-#define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+\r
+#define FDC2_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define FDC2_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define FDC2_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define FDC2_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define FDC2_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
+#define FDC2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
+#define FDC2_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
+#define FDC2_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
\r
#define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!\r
\r
#define UART0_URSEL_BIT_VALUE (0)\r
#endif\r
#define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r
-#define UART0_UDR_BIT_VALUE (1<<UDR0)\r
+#define UART0_UDR UDR0\r
\r
#else\r
\r
#define UART0_URSEL_BIT_VALUE (0)\r
#endif\r
#define UART0_TXEN_BIT_VALUE (1<<TXEN)\r
-#define UART0_UDR_BIT_VALUE (1<<UDR)\r
+#define UART0_UDR UDR\r
\r
#endif\r
\r
\r
#endif\r
\r
-#if IRMP_SUPPORT_FDC_PROTOCOL == 1\r
+#if IRMP_SUPPORT_FDC1_PROTOCOL == 1\r
+\r
+static PROGMEM IRMP_PARAMETER fdc1_param =\r
+{\r
+ IRMP_FDC1_PROTOCOL, // protocol: ir protocol\r
+ FDC1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r
+ FDC1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r
+ FDC1_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r
+ FDC1_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r
+ FDC1_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r
+ FDC1_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r
+ FDC1_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r
+ FDC1_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r
+ FDC1_ADDRESS_OFFSET, // address_offset: address offset\r
+ FDC1_ADDRESS_OFFSET + FDC1_ADDRESS_LEN, // address_end: end of address\r
+ FDC1_COMMAND_OFFSET, // command_offset: command offset\r
+ FDC1_COMMAND_OFFSET + FDC1_COMMAND_LEN, // command_end: end of command\r
+ FDC1_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r
+ FDC1_STOP_BIT, // stop_bit: flag: frame has stop bit\r
+ FDC1_LSB // lsb_first: flag: LSB first\r
+};\r
+\r
+#endif\r
+\r
+#if IRMP_SUPPORT_FDC2_PROTOCOL == 1\r
\r
-static PROGMEM IRMP_PARAMETER fdc_param =\r
+static PROGMEM IRMP_PARAMETER fdc2_param =\r
{\r
- IRMP_FDC_PROTOCOL, // protocol: ir protocol\r
- FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r
- FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r
- FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r
- FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r
- FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r
- FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r
- FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r
- FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r
- FDC_ADDRESS_OFFSET, // address_offset: address offset\r
- FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r
- FDC_COMMAND_OFFSET, // command_offset: command offset\r
- FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r
- FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r
- FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r
- FDC_LSB // lsb_first: flag: LSB first\r
+ IRMP_FDC2_PROTOCOL, // protocol: ir protocol\r
+ FDC2_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r
+ FDC2_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r
+ FDC2_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r
+ FDC2_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r
+ FDC2_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r
+ FDC2_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r
+ FDC2_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r
+ FDC2_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r
+ FDC2_ADDRESS_OFFSET, // address_offset: address offset\r
+ FDC2_ADDRESS_OFFSET + FDC2_ADDRESS_LEN, // address_end: end of address\r
+ FDC2_COMMAND_OFFSET, // command_offset: command offset\r
+ FDC2_COMMAND_OFFSET + FDC2_COMMAND_LEN, // command_end: end of command\r
+ FDC2_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r
+ FDC2_STOP_BIT, // stop_bit: flag: frame has stop bit\r
+ FDC2_LSB // lsb_first: flag: LSB first\r
};\r
\r
#endif\r
#if IRMP_SUPPORT_RC5_PROTOCOL == 1\r
static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r
#endif\r
-#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1\r
+#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1\r
static uint8_t last_pause; // last pause value\r
#endif\r
#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \\r
}\r
else\r
#endif // IRMP_SUPPORT_SIEMENS_PROTOCOL == 1\r
-#if IRMP_SUPPORT_FDC_PROTOCOL == 1\r
- if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r
- irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r
+#if IRMP_SUPPORT_FDC1_PROTOCOL == 1\r
+ if (irmp_pulse_time >= FDC1_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC1_START_BIT_PULSE_LEN_MAX &&\r
+ irmp_pause_time >= FDC1_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC1_START_BIT_PAUSE_LEN_MAX)\r
{\r
- DEBUG_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r
- FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r
- FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r
- irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r
+ DEBUG_PRINTF ("protocol = FDC1, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r
+ FDC1_START_BIT_PULSE_LEN_MIN, FDC1_START_BIT_PULSE_LEN_MAX,\r
+ FDC1_START_BIT_PAUSE_LEN_MIN, FDC1_START_BIT_PAUSE_LEN_MAX);\r
+ irmp_param_p = (IRMP_PARAMETER *) &fdc1_param;\r
}\r
else\r
-#endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r
-\r
+#endif // IRMP_SUPPORT_FDC1_PROTOCOL == 1\r
+#if IRMP_SUPPORT_FDC2_PROTOCOL == 1\r
+ if (irmp_pulse_time >= FDC2_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC2_START_BIT_PULSE_LEN_MAX &&\r
+ irmp_pause_time >= FDC2_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC2_START_BIT_PAUSE_LEN_MAX)\r
+ {\r
+ DEBUG_PRINTF ("protocol = FDC2, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r
+ FDC2_START_BIT_PULSE_LEN_MIN, FDC2_START_BIT_PULSE_LEN_MAX,\r
+ FDC2_START_BIT_PAUSE_LEN_MIN, FDC2_START_BIT_PAUSE_LEN_MAX);\r
+ irmp_param_p = (IRMP_PARAMETER *) &fdc2_param;\r
+ }\r
+ else\r
+#endif // IRMP_SUPPORT_FDC2_PROTOCOL == 1\r
{\r
DEBUG_PRINTF ("protocol = UNKNOWN\n");\r
irmp_start_bit_detected = 0; // wait for another start bit...\r
GRUNDIG_OR_NOKIA_START_BIT_LEN_MIN, GRUNDIG_OR_NOKIA_START_BIT_LEN_MAX, GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MIN, GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MAX);\r
printf ("SIEMENS 1 %3d - %3d %3d - %3d\n",\r
SIEMENS_START_BIT_LEN_MIN, SIEMENS_START_BIT_LEN_MAX, SIEMENS_START_BIT_LEN_MIN, SIEMENS_START_BIT_LEN_MAX);\r
- printf ("FDC 1 %3d - %3d %3d - %3d\n",\r
- FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r
+ printf ("FDC1 1 %3d - %3d %3d - %3d\n",\r
+ FDC1_START_BIT_PULSE_LEN_MIN, FDC1_START_BIT_PULSE_LEN_MAX, FDC1_START_BIT_PAUSE_LEN_MIN, FDC1_START_BIT_PAUSE_LEN_MAX);\r
+ printf ("FDC2 1 %3d - %3d %3d - %3d\n",\r
+ FDC2_START_BIT_PULSE_LEN_MIN, FDC2_START_BIT_PULSE_LEN_MAX, FDC2_START_BIT_PAUSE_LEN_MIN, FDC2_START_BIT_PAUSE_LEN_MAX);\r
}\r
\r
int\r
\r
if (! analyze)\r
{\r
- for (i = 0; i < 8000; i++) // newline: long pause of 800 msec\r
+ for (i = 0; i < (int) ((8000.0 * F_INTERRUPTS) / 10000); i++) // newline: long pause of 800 msec\r
{\r
(void) irmp_ISR ();\r
}\r
projects / irmp.git / blobdiff