*\r
* Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.c,v 1.35 2010/06/08 22:22:36 fm Exp $\r
+ * $Id: irmp.c,v 1.42 2010/06/10 23:16:03 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
#define MIN_TOLERANCE_00 1.0 // -0%\r
#define MAX_TOLERANCE_00 1.0 // +0%\r
\r
+#define MIN_TOLERANCE_02 0.98 // -2%\r
+#define MAX_TOLERANCE_02 1.02 // +2%\r
+\r
+#define MIN_TOLERANCE_03 0.97 // -3%\r
+#define MAX_TOLERANCE_03 1.03 // +3%\r
+\r
+#define MIN_TOLERANCE_04 0.96 // -4%\r
+#define MAX_TOLERANCE_04 1.04 // +4%\r
+\r
#define MIN_TOLERANCE_05 0.95 // -5%\r
#define MAX_TOLERANCE_05 1.05 // +5%\r
\r
#define SIEMENS_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) - 1)\r
#define SIEMENS_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) + 1)\r
\r
-#define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+#define FDC1_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
+#define FDC1_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
+\r
+#define FDC2_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define FDC2_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define FDC2_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define FDC2_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define FDC2_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
+#define FDC2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
+#define FDC2_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
+#define FDC2_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
+#define FDC2_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
\r
#define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!\r
\r
#ifdef DEBUG\r
-#define DEBUG_PUTCHAR(a) { if (! silent) { putchar (a); } }\r
-#define DEBUG_PRINTF(...) { if (! silent) { printf (__VA_ARGS__); } }\r
+#define DEBUG_PUTCHAR(a) { if (! silent) { putchar (a); } }\r
+#define DEBUG_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r
+#define DEBUG_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r
+#define DEBUG_NEWLINE() { if (verbose) { putchar ('\n'); } }\r
static int silent;\r
static int time_counter;\r
+static int verbose;\r
#else\r
#define DEBUG_PUTCHAR(a)\r
+#define DEBUG_ONLY_NORMAL_PUTCHAR(a)\r
#define DEBUG_PRINTF(...)\r
+#define DEBUG_NEWLINE()\r
#endif\r
\r
#if IRMP_LOGGING == 1\r
-#define UART_BAUD 9600L\r
+#define BAUD 9600L\r
+#include <util/setbaud.h>\r
+\r
+#ifdef UBRR0H\r
+\r
+#define UART0_UBRRH UBRR0H\r
+#define UART0_UBRRL UBRR0L\r
+#define UART0_UCSRA UCSR0A\r
+#define UART0_UCSRB UCSR0B\r
+#define UART0_UCSRC UCSR0C\r
+#define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r
+#define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r
+#define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r
+#ifdef URSEL0\r
+#define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r
+#else\r
+#define UART0_URSEL_BIT_VALUE (0)\r
+#endif\r
+#define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r
+#define UART0_UDR UDR0\r
\r
-// calculate real baud rate:\r
-#define UBRR_VAL ((F_CPU + UART_BAUD * 8) / (UART_BAUD * 16) - 1) // round\r
-#define BAUD_REAL (F_CPU / (16 * (UBRR_VAL + 1))) // real baudrate\r
-#define BAUD_ERROR ((BAUD_REAL * 1000) / UART_BAUD) // error in promille\r
+#else\r
+\r
+#define UART0_UBRRH UBRRH\r
+#define UART0_UBRRL UBRRL\r
+#define UART0_UCSRA UCSRA\r
+#define UART0_UCSRB UCSRB\r
+#define UART0_UCSRC UCSRC\r
+#define UART0_UDRE_BIT_VALUE (1<<UDRE)\r
+#define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r
+#define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r
+#ifdef URSEL\r
+#define UART0_URSEL_BIT_VALUE (1<<URSEL)\r
+#else\r
+#define UART0_URSEL_BIT_VALUE (0)\r
+#endif\r
+#define UART0_TXEN_BIT_VALUE (1<<TXEN)\r
+#define UART0_UDR UDR\r
\r
-#if ((BAUD_ERROR < 990) || (BAUD_ERROR > 1010))\r
-# error Error of baud rate of RS232 UARTx is more than 1%. That is too high!\r
#endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
void\r
irmp_uart_init (void)\r
{\r
- UCSR0B |= (1<<TXEN0); // activate UART0 TX\r
- UBRR0H = UBRR_VAL >> 8; // store baudrate (upper byte)\r
- UBRR0L = UBRR_VAL & 0xFF; // store baudrate (lower byte)\r
+ UART0_UBRRH = UBRRH_VALUE; // set baud rate\r
+ UART0_UBRRL = UBRRL_VALUE;\r
+\r
+#if USE_2X\r
+ UART0_UCSRA = (1<<U2X);\r
+#else\r
+ UART0_UCSRA = 0;\r
+#endif\r
+\r
+ UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r
+ UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r
}\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
void\r
irmp_uart_putc (unsigned char ch)\r
{\r
- while (!(UCSR0A & (1<<UDRE0)))\r
+ while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r
{\r
;\r
}\r
\r
- UDR0 = ch;\r
+ UART0_UDR = ch;\r
}\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
\r
#endif\r
\r
-#if IRMP_SUPPORT_FDC_PROTOCOL == 1\r
+#if IRMP_SUPPORT_FDC1_PROTOCOL == 1\r
+\r
+static PROGMEM IRMP_PARAMETER fdc1_param =\r
+{\r
+ IRMP_FDC1_PROTOCOL, // protocol: ir protocol\r
+ FDC1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r
+ FDC1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r
+ FDC1_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r
+ FDC1_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r
+ FDC1_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r
+ FDC1_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r
+ FDC1_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r
+ FDC1_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r
+ FDC1_ADDRESS_OFFSET, // address_offset: address offset\r
+ FDC1_ADDRESS_OFFSET + FDC1_ADDRESS_LEN, // address_end: end of address\r
+ FDC1_COMMAND_OFFSET, // command_offset: command offset\r
+ FDC1_COMMAND_OFFSET + FDC1_COMMAND_LEN, // command_end: end of command\r
+ FDC1_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r
+ FDC1_STOP_BIT, // stop_bit: flag: frame has stop bit\r
+ FDC1_LSB // lsb_first: flag: LSB first\r
+};\r
+\r
+#endif\r
+\r
+#if IRMP_SUPPORT_FDC2_PROTOCOL == 1\r
\r
-static PROGMEM IRMP_PARAMETER fdc_param =\r
+static PROGMEM IRMP_PARAMETER fdc2_param =\r
{\r
- IRMP_FDC_PROTOCOL, // protocol: ir protocol\r
- FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r
- FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r
- FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r
- FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r
- FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r
- FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r
- FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r
- FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r
- FDC_ADDRESS_OFFSET, // address_offset: address offset\r
- FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r
- FDC_COMMAND_OFFSET, // command_offset: command offset\r
- FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r
- FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r
- FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r
- FDC_LSB // lsb_first: flag: LSB first\r
+ IRMP_FDC2_PROTOCOL, // protocol: ir protocol\r
+ FDC2_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r
+ FDC2_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r
+ FDC2_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r
+ FDC2_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r
+ FDC2_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r
+ FDC2_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r
+ FDC2_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r
+ FDC2_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r
+ FDC2_ADDRESS_OFFSET, // address_offset: address offset\r
+ FDC2_ADDRESS_OFFSET + FDC2_ADDRESS_LEN, // address_end: end of address\r
+ FDC2_COMMAND_OFFSET, // command_offset: command offset\r
+ FDC2_COMMAND_OFFSET + FDC2_COMMAND_LEN, // command_end: end of command\r
+ FDC2_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r
+ FDC2_STOP_BIT, // stop_bit: flag: frame has stop bit\r
+ FDC2_LSB // lsb_first: flag: LSB first\r
};\r
\r
#endif\r
* @details ISR routine, called 10000 times per second\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-void\r
+uint8_t\r
irmp_ISR (void)\r
{\r
static uint8_t irmp_start_bit_detected; // flag: start bit detected\r
#if IRMP_SUPPORT_RC5_PROTOCOL == 1\r
static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r
#endif\r
-#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1\r
+#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1\r
static uint8_t last_pause; // last pause value\r
#endif\r
#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \\r
if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r
{ // yes...\r
DEBUG_PRINTF ("error 1: pause after start bit pulse %d too long: %d\n", irmp_pulse_time, irmp_pause_time);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit\r
irmp_pulse_time = 0;\r
irmp_pause_time = 0;\r
}\r
else\r
#endif // IRMP_SUPPORT_SIEMENS_PROTOCOL == 1\r
-#if IRMP_SUPPORT_FDC_PROTOCOL == 1\r
- if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r
- irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r
+#if IRMP_SUPPORT_FDC1_PROTOCOL == 1\r
+ if (irmp_pulse_time >= FDC1_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC1_START_BIT_PULSE_LEN_MAX &&\r
+ irmp_pause_time >= FDC1_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC1_START_BIT_PAUSE_LEN_MAX)\r
{\r
- DEBUG_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r
- FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r
- FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r
- irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r
+ DEBUG_PRINTF ("protocol = FDC1, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r
+ FDC1_START_BIT_PULSE_LEN_MIN, FDC1_START_BIT_PULSE_LEN_MAX,\r
+ FDC1_START_BIT_PAUSE_LEN_MIN, FDC1_START_BIT_PAUSE_LEN_MAX);\r
+ irmp_param_p = (IRMP_PARAMETER *) &fdc1_param;\r
}\r
else\r
-#endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r
-\r
+#endif // IRMP_SUPPORT_FDC1_PROTOCOL == 1\r
+#if IRMP_SUPPORT_FDC2_PROTOCOL == 1\r
+ if (irmp_pulse_time >= FDC2_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC2_START_BIT_PULSE_LEN_MAX &&\r
+ irmp_pause_time >= FDC2_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC2_START_BIT_PAUSE_LEN_MAX)\r
+ {\r
+ DEBUG_PRINTF ("protocol = FDC2, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r
+ FDC2_START_BIT_PULSE_LEN_MIN, FDC2_START_BIT_PULSE_LEN_MAX,\r
+ FDC2_START_BIT_PAUSE_LEN_MIN, FDC2_START_BIT_PAUSE_LEN_MAX);\r
+ irmp_param_p = (IRMP_PARAMETER *) &fdc2_param;\r
+ }\r
+ else\r
+#endif // IRMP_SUPPORT_FDC2_PROTOCOL == 1\r
{\r
DEBUG_PRINTF ("protocol = UNKNOWN\n");\r
irmp_start_bit_detected = 0; // wait for another start bit...\r
{\r
DEBUG_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
}\r
else if (! last_value)\r
{\r
DEBUG_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r
DEBUG_PUTCHAR ('0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
}\r
}\r
{\r
DEBUG_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r
DEBUG_PUTCHAR ('0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
}\r
else if (! last_value)\r
{\r
DEBUG_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
}\r
}\r
{\r
DEBUG_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r
DEBUG_PUTCHAR ('0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
}\r
else if (! last_value)\r
{\r
DEBUG_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
}\r
}\r
if (irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX)\r
{ // pause timings correct for "1"?\r
DEBUG_PUTCHAR ('1'); // yes, store 1\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
}\r
else // if (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)\r
{ // pause timings correct for "0"?\r
DEBUG_PUTCHAR ('0'); // yes, store 0\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
}\r
}\r
else\r
{\r
DEBUG_PRINTF ("error 2: pause %d after data bit %d too long\n", irmp_pause_time, irmp_bit);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
\r
irmp_start_bit_detected = 0; // wait for another start bit...\r
irmp_pulse_time = 0;\r
DEBUG_PUTCHAR ('1');\r
irmp_store_bit (1);\r
DEBUG_PUTCHAR ('0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
last_value = 0;\r
}\r
}\r
\r
DEBUG_PUTCHAR (rc5_value + '0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (rc5_value);\r
}\r
\r
DEBUG_PUTCHAR ('0');\r
irmp_store_bit (0);\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
last_value = 1;\r
}\r
}\r
\r
DEBUG_PUTCHAR (grundig_value + '0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (grundig_value);\r
}\r
\r
DEBUG_PUTCHAR ('0');\r
irmp_store_bit (0);\r
last_value = 0;\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
break;\r
\r
default:\r
DEBUG_PUTCHAR ('0');\r
irmp_store_bit (0);\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
last_value = 1;\r
}\r
}\r
\r
DEBUG_PUTCHAR (rc5_value + '0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (rc5_value);\r
}\r
\r
DEBUG_PUTCHAR ('0');\r
irmp_store_bit (0);\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
last_value = 1;\r
}\r
}\r
\r
DEBUG_PUTCHAR (siemens_value + '0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (siemens_value);\r
}\r
\r
if (irmp_pause_time >= SAMSUNG_1_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_1_PAUSE_LEN_MAX)\r
{\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
wait_for_space = 0;\r
}\r
else\r
{\r
DEBUG_PUTCHAR ('0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
wait_for_space = 0;\r
}\r
else\r
{ // timing incorrect!\r
DEBUG_PRINTF ("error 3 Samsung: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r
irmp_pause_time = 0;\r
}\r
else\r
{ // timing incorrect!\r
DEBUG_PRINTF ("error 3a B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r
irmp_pause_time = 0;\r
}\r
else\r
{ // timing incorrect!\r
DEBUG_PRINTF ("error 3b B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r
irmp_pause_time = 0;\r
}\r
if (irmp_pause_time >= BANG_OLUFSEN_1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_1_PAUSE_LEN_MAX)\r
{ // pulse & pause timings correct for "1"?\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
last_value = 1;\r
wait_for_space = 0;\r
else if (irmp_pause_time >= BANG_OLUFSEN_0_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_0_PAUSE_LEN_MAX)\r
{ // pulse & pause timings correct for "0"?\r
DEBUG_PUTCHAR ('0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
last_value = 0;\r
wait_for_space = 0;\r
else if (irmp_pause_time >= BANG_OLUFSEN_R_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_R_PAUSE_LEN_MAX)\r
{\r
DEBUG_PUTCHAR (last_value + '0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (last_value);\r
wait_for_space = 0;\r
}\r
else\r
{ // timing incorrect!\r
DEBUG_PRINTF ("error 3c B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r
irmp_pause_time = 0;\r
}\r
else\r
{ // timing incorrect!\r
DEBUG_PRINTF ("error 3d B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r
irmp_pause_time = 0;\r
}\r
irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r
{ // pulse & pause timings correct for "1"?\r
DEBUG_PUTCHAR ('1');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (1);\r
wait_for_space = 0;\r
}\r
irmp_pause_time >= irmp_param.pause_0_len_min && irmp_pause_time <= irmp_param.pause_0_len_max)\r
{ // pulse & pause timings correct for "0"?\r
DEBUG_PUTCHAR ('0');\r
- DEBUG_PUTCHAR ('\n');\r
+ DEBUG_NEWLINE ();\r
irmp_store_bit (0);\r
wait_for_space = 0;\r
}\r
else\r
{ // timing incorrect!\r
DEBUG_PRINTF ("error 3: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r
irmp_pause_time = 0;\r
}\r
\r
repetition_counter = 0;\r
}\r
+ else\r
+ {\r
+ DEBUG_ONLY_NORMAL_PUTCHAR ('\n');\r
+ }\r
\r
irmp_start_bit_detected = 0; // and wait for next start bit\r
irmp_tmp_command = 0;\r
}\r
}\r
}\r
+ return (irmp_ir_detected);\r
}\r
\r
#ifdef DEBUG\r
GRUNDIG_OR_NOKIA_START_BIT_LEN_MIN, GRUNDIG_OR_NOKIA_START_BIT_LEN_MAX, GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MIN, GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MAX);\r
printf ("SIEMENS 1 %3d - %3d %3d - %3d\n",\r
SIEMENS_START_BIT_LEN_MIN, SIEMENS_START_BIT_LEN_MAX, SIEMENS_START_BIT_LEN_MIN, SIEMENS_START_BIT_LEN_MAX);\r
- printf ("FDC 1 %3d - %3d %3d - %3d\n",\r
- FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r
+ printf ("FDC1 1 %3d - %3d %3d - %3d\n",\r
+ FDC1_START_BIT_PULSE_LEN_MIN, FDC1_START_BIT_PULSE_LEN_MAX, FDC1_START_BIT_PAUSE_LEN_MIN, FDC1_START_BIT_PAUSE_LEN_MAX);\r
+ printf ("FDC2 1 %3d - %3d %3d - %3d\n",\r
+ FDC2_START_BIT_PULSE_LEN_MIN, FDC2_START_BIT_PULSE_LEN_MAX, FDC2_START_BIT_PAUSE_LEN_MIN, FDC2_START_BIT_PAUSE_LEN_MAX);\r
}\r
\r
int\r
main (int argc, char ** argv)\r
{\r
int i;\r
- int verbose = FALSE;\r
int analyze = FALSE;\r
int ch;\r
int last_ch = 0;\r
else if (! strcmp (argv[1], "-a"))\r
{\r
analyze = TRUE;\r
- verbose = TRUE;\r
}\r
else if (! strcmp (argv[1], "-s"))\r
{\r
{\r
if (last_ch != ch)\r
{\r
- if (verbose && pause > 0)\r
+ if (analyze && pause > 0)\r
{\r
printf ("pause: %d\n", pause);\r
\r
{\r
if (last_ch != ch)\r
{\r
- if (verbose)\r
+ if (analyze)\r
{\r
printf ("pulse: %d ", pulse);\r
\r
{\r
IRMP_PIN = 0xff;\r
\r
- if (verbose && pause > 0)\r
+ if (analyze && pause > 0)\r
{\r
printf ("pause: %d\n", pause);\r
}\r
\r
if (! analyze)\r
{\r
- for (i = 0; i < 8000; i++) // newline: long pause of 800 msec\r
+ for (i = 0; i < (int) ((8000.0 * F_INTERRUPTS) / 10000); i++) // newline: long pause of 800 msec\r
{\r
- irmp_ISR ();\r
+ (void) irmp_ISR ();\r
}\r
}\r
first_pulse = TRUE;\r
\r
if (! analyze)\r
{\r
- irmp_ISR ();\r
+ (void) irmp_ISR ();\r
}\r
\r
if (irmp_get_data (&irmp_data))\r
{\r
- printf ("protcol = %d, address = 0x%04x, code = 0x%04x, flags = 0x%02x\n",\r
+ DEBUG_ONLY_NORMAL_PUTCHAR (' ');\r
+ printf ("p = %2d, a = 0x%04x, c = 0x%04x, f = 0x%02x\n",\r
irmp_data.protocol, irmp_data.address, irmp_data.command, irmp_data.flags);\r
}\r
}\r
projects / irmp.git / blobdiff