Version 2.2.1: fixed some bugs for STM32

git-svn-id: svn://mikrocontroller.net/irmp@98 aeb2e35e-bfc4-4214-b83c-9e8de998ed28

diff --git a/irmp.c b/irmp.c
index ef42937f748fcf3517b92ebbc95b5995e1544679..1820e584330f7ec703c8125b596b5e5bf93ce99d 100644 (file)
--- a/irmp.c
+++ b/irmp.c
@@ -3,7 +3,7 @@
  *\r
  * Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de\r
  *\r
- * $Id: irmp.c,v 1.121 2012/05/22 15:08:46 fm Exp $\r
+ * $Id: irmp.c,v 1.122 2012/05/24 06:55:11 fm Exp $\r
  *\r
  * ATMEGA88 @ 8 MHz\r
  *\r
@@ -1238,23 +1238,15 @@ irmp_init (void)
    /* GPIO Configuration */\r
    GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r
  #if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
-   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
+   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
    GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
    GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
  #elif defined (ARM_STM32F10X)\r
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
-   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r
  #endif\r
    GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r
-\r
-   /* GPIO Configuration */\r
-   GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r
-   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r
-   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
-   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
-   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
-   GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r
 #else                                                                   // AVR\r
     IRMP_PORT &= ~(1<<IRMP_BIT);                                        // deactivate pullup\r
     IRMP_DDR &= ~(1<<IRMP_BIT);                                         // set pin to input\r

diff --git a/irsnd.c b/irsnd.c
index ee184e454640cbb8b2d9c757f439540b3980bd6b..9fe95d71f89d0073e42ca5ee8a001dc9d62238c7 100644 (file)
--- a/irsnd.c
+++ b/irsnd.c
@@ -12,7 +12,7 @@
  * ATmega164, ATmega324, ATmega644,  ATmega644P, ATmega1284\r
  * ATmega88,  ATmega88P, ATmega168,  ATmega168P, ATmega328P\r
  *\r
- * $Id: irsnd.c,v 1.54 2012/05/23 12:26:26 fm Exp $\r
+ * $Id: irsnd.c,v 1.55 2012/05/24 06:55:11 fm Exp $\r
  *\r
  * This program is free software; you can redistribute it and/or modify\r
  * it under the terms of the GNU General Public License as published by\r
@@ -369,6 +369,7 @@ irsnd_on (void)
 #  if defined(PIC_C18)                                  // PIC C18\r
         IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
 #  elif defined (ARM_STM32)                             // STM32\r
+        IRSND_TIMER->CCER |= (uint16_t)TIM_CCER_CC1E;\r
         TIM_Cmd(IRSND_TIMER, ENABLE);                   // TIMx enable counter\r
 #  else                                                 // AVR\r
 #    if   IRSND_OCx == IRSND_OC2                        // use OC2\r
@@ -415,6 +416,7 @@ irsnd_off (void)
 #  if defined(PIC_C18)                                  // PIC C18\r
         IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
 #  elif defined (ARM_STM32)                             // STM32\r
+        IRSND_TIMER->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E);\r
         TIM_Cmd(IRSND_TIMER, DISABLE);                  // TIMx enable counter\r
 #  else //AVR\r
 \r
@@ -461,9 +463,7 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq)
          OpenPWM(freq); \r
          SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
 #  elif defined (ARM_STM32)                                                                 // STM32\r
-         static uint32_t             TimeBaseFreq = 0;\r
-         TIM_TimeBaseInitTypeDef     TIM_TimeBaseStructure;\r
-         TIM_OCInitTypeDef           TIM_OCInitStructure;\r
+         static uint32_t      TimeBaseFreq = 0;\r
 \r
          if (TimeBaseFreq == 0)\r
          {\r
@@ -471,28 +471,32 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq)
             /* Get system clocks and store timer clock in variable */\r
             RCC_GetClocksFreq(&RCC_ClocksStructure);\r
 #    if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
-            TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
+            if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
+            {\r
+               TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
+            }\r
+            else\r
+            {\r
+               TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
+            }\r
 #    else\r
-            TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
+            if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
+            {\r
+               TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
+            }\r
+            else\r
+            {\r
+               TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
+            }\r
 #    endif\r
          }\r
 \r
          freq = TimeBaseFreq/freq;\r
 \r
-         /* Time base configuration */\r
-         TIM_TimeBaseStructure.TIM_Period = freq;\r
-         TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
-         TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
-         TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
-         TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
-\r
-         /* PWM1 Mode configuration: Channel1 */\r
-         TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
-         TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
-         TIM_OCInitStructure.TIM_Pulse = (freq + 1) / 2;\r
-         TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
-         TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
-\r
+         /* Set frequency */\r
+         TIM_SetAutoreload(IRSND_TIMER, freq);\r
+         /* Set duty cycle */\r
+         TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
 #  else                                                                                     // AVR\r
 \r
 #    if IRSND_OCx == IRSND_OC2\r
@@ -528,7 +532,9 @@ irsnd_init (void)
         irsnd_set_freq (IRSND_FREQ_36_KHZ);   //default frequency\r
         IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
 #  elif defined (ARM_STM32)                                                 // STM32\r
-        GPIO_InitTypeDef GPIO_InitStructure;\r
+        GPIO_InitTypeDef            GPIO_InitStructure;\r
+        TIM_TimeBaseInitTypeDef     TIM_TimeBaseStructure;\r
+        TIM_OCInitTypeDef           TIM_OCInitStructure;\r
 \r
        /* GPIOx clock enable */\r
 #    if defined (ARM_STM32L1XX)\r
@@ -561,12 +567,26 @@ irsnd_init (void)
 #    else\r
         RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
 #    endif\r
-        irsnd_set_freq (IRSND_FREQ_36_KHZ);                                         // default frequency\r
 \r
-        /* TIMx Configuration */\r
+        /* Time base configuration */\r
+        TIM_TimeBaseStructure.TIM_Period = 0;   // will be initialized later\r
+        TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
+        TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
+        TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
+        TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
+\r
+        /* PWM1 Mode configuration */\r
+        TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
+        TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
+        TIM_OCInitStructure.TIM_Pulse = 0;      // will be initialized later\r
+        TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
+        TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
+\r
+        /* Preload configuration */\r
         TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
         TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
-        TIM_Cmd(IRSND_TIMER, ENABLE);\r
+\r
+        irsnd_set_freq (IRSND_FREQ_36_KHZ);                                         // default frequency\r
 #  else                                                                             // AVR\r
         IRSND_PORT &= ~(1<<IRSND_BIT);                                              // set IRSND_BIT to low\r
         IRSND_DDR |= (1<<IRSND_BIT);                                                // set IRSND_BIT to output\r

diff --git a/irsndconfig.h b/irsndconfig.h
index 388820b58a6c6277d86c9e1758a0682c8d8a2c61..9c08c64aed73cceac8a33276c2a24ebfd08d3e5c 100644 (file)
--- a/irsndconfig.h
+++ b/irsndconfig.h
@@ -5,7 +5,7 @@
  *\r
  * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
  *\r
- * $Id: irsndconfig.h,v 1.36 2012/05/23 12:26:26 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.37 2012/05/24 06:55:11 fm Exp $\r
  *\r
  * ATMEGA88 @ 8 MHz\r
  *\r
@@ -106,10 +106,11 @@
  * ARM STM32 section:\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
-#elif defined (ARM_STM32)                                               // use C13 as IR input on STM32\r
+#elif defined (ARM_STM32)                                               // use A6 as IR output on STM32\r
 #  define IRSND_PORT_LETTER                     A\r
 #  define IRSND_BIT_NUMBER                      6\r
 #  define IRSND_TIMER_NUMBER                    10\r
+#  define IRSND_TIMER_CHANNEL                   1                       // only channel 1 can be used at the moment, others won't work\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * Other target system\r