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ac8504f)
--------------------------------------\r
\r
Version IRMP: 2.6.0 09.07.2014\r
--------------------------------------\r
\r
Version IRMP: 2.6.0 09.07.2014\r
-Version IRSND: 2.6.0 10.07.2014\r
+Version IRSND: 2.6.1 10.07.2014\r
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * $Id: irsnd.c,v 1.78 2014/07/10 09:48:23 fm Exp $\r
+ * $Id: irsnd.c,v 1.79 2014/07/10 10:38:07 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
# elif defined (ARM_STM32F10X)\r
RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
# elif defined (ARM_STM32F10X)\r
RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
+ // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
# elif defined (ARM_STM32F4XX)\r
RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
# endif\r
# elif defined (ARM_STM32F4XX)\r
RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
# endif\r
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
- GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
+ // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
# endif\r
\r
/* TIMx clock enable */\r
# endif\r
\r
/* TIMx clock enable */\r
*\r
* Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r
*\r
*\r
* Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irsndconfig.h,v 1.60 2014/07/10 09:49:24 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.61 2014/07/10 10:38:07 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
* ARM STM32 section:\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
* ARM STM32 section:\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#elif defined (ARM_STM32) // use A6 as IR output on STM32\r
-# define IRSND_PORT_LETTER A\r
+#elif defined (ARM_STM32) // use B6 as IR output on STM32\r
+# define IRSND_PORT_LETTER B\r
# define IRSND_BIT_NUMBER 6\r
# define IRSND_BIT_NUMBER 6\r
-# define IRSND_TIMER_NUMBER 10\r
+# define IRSND_TIMER_NUMBER 4\r
# define IRSND_TIMER_CHANNEL_NUMBER 1 // only channel 1 can be used at the moment, others won't work\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
# define IRSND_TIMER_CHANNEL_NUMBER 1 // only channel 1 can be used at the moment, others won't work\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r