IF NOT lasm\r
.printx * CPXAC.ASM *\r
ENDIF ;NOT lasm\r
+IF lasm\r
+.printx Error: Z80 macro assembler (i.e. M80) required\r
+ END\r
+ENDIF ;lasm\r
; KERMIT - (Celtic for "FREE")\r
;\r
; This is the CP/M-80 implementation of the Columbia University\r
;\r
; Keep module name, edit number, and last revision date in memory.\r
;\r
-family: db 'CPXCP.ASM (1) 3-DEC-2015$' ; First entry for V4.11\r
+family: db 'CPXCA.ASM (1) 3-DEC-2015$' ; First entry for V4.11\r
\r
;\r
; Assembly time message to let me know I'm building the right version.\r
SC16IS740_ADDR equ 90H ;SC16IS740 I2C address. (8bit, A0=VDD, A1=VDD)\r
OUTSIZE equ 64\r
\r
+VERSION_MIN equ 0304H ;Minimum AVR-CP/M firmware version required\r
+\r
; Virtual I2C Interface\r
\r
VI2C_STAT equ 05h\r
I2C_UART_XOFF2 equ I2C_UART_PORT+07H ;R/W Xoff2 word\r
\r
\r
-\r
z80 set TRUE ;This one emulates an Z80.\r
\r
-\r
.z80\r
+;----------------------------------------------------------------------\r
+; Macros\r
+;----------------------------------------------------------------------\r
+\r
+; make a message table\r
+; usage:\r
+; label: mkmsgtab <msg0,msg1,msg2,...>\r
+\r
+mkm_tab macro x\r
+n?msg defl 0\r
+ irp y,<x>\r
+n?msg defl n?msg+1\r
+ endm\r
+ db n?msg\r
+ irp y,<x>\r
+ db '&y','$'\r
+ endm\r
+ endm\r
+\r
+; make a message table\r
+; usage:\r
+; label: mkmsgtab <msg0,msg1,msg2,...>\r
+\r
+mkms_tab macro x\r
+n?msg defl 0\r
+ irp y,<x>\r
+n?msg defl n?msg+1\r
+ endm\r
+ db n?msg\r
+ irp y,<x>\r
+ ifnb <y>\r
+ db y,'$'\r
+ else\r
+ db '$'\r
+ endif\r
+ endm\r
+ endm\r
+\r
+;----------------------------------------------------------------------\r
+; Messages\r
+;----------------------------------------------------------------------\r
+\r
+umsg_tab:\r
+ ; 0 1 2 3 4 5\r
+ mkms_tab <'UART',,' not', ' detected',', crystal frequency: ','!'>\r
+\r
+fmsg_tab:\r
+ mkm_tab <?,1.8432, 3.6864, 5.5296, 7.3728, 9.216, 11.0592, 12.9024, 14.7456, 16.5888, 18.432, 20.2752, 22.1184, 23.9616>\r
+fdim_msg:\r
+ db ' MHz.',cr,lf,'$'\r
+fw_msg:\r
+ db 'AVR firmware to old, at least version 3.4 neded.','$'\r
+exit_msg:\r
+ db cr,lf,'Exiting!',cr,lf,'$'\r
+\r
+;----------------------------------------------------------------------\r
+; Utilities\r
+;----------------------------------------------------------------------\r
+\r
+; Print message from table\r
+;\r
+; hl: message table address\r
+; first byte is number of table entries\r
+; a: number of message to print (0 based, index in table)\r
+;\r
+; If index is out of range, print message #0\r
+\r
+pdecoded:\r
+ push bc\r
+ push de\r
+ push hl\r
+ ld bc,0\r
+ cp (hl) ; number of messages in table\r
+ jr c,pdc_1\r
+ ld a,c\r
+pdc_1:\r
+ inc hl\r
+ ld e,a\r
+ ld a,'$'\r
+ inc e\r
+ jr pdc_2\r
+pdc_nxt_str:\r
+ cpir\r
+pdc_2:\r
+ dec e\r
+ jr nz,pdc_nxt_str\r
+ ex de,hl\r
+ call prtstr\r
+ pop hl\r
+ pop de\r
+ pop bc\r
+ ret\r
+\r
+;----------------------------------------------------------------------\r
+; output bytes to ports\r
+;\r
+; hl: tables of port,value pairs:\r
+; db n ;number of pairs\r
+; db port1,val1, port2,val2,... portn,valn\r
+; ...\r
+; db 0 ; Terminate table\r
+\r
+ioinil:\r
+ push bc\r
+ ld b,(hl) ;count\r
+ inc hl\r
+io1_lp:\r
+ ld c,(hl) ;port address\r
+ inc hl\r
+ outi\r
+ jr nz,io1_lp\r
+ pop bc\r
+ ret\r
+\r
+;----------------------------------------------------------------------\r
+\r
+vi2c_setup_chk:\r
+ ld hl,chkbuf\r
+vi2c_setup:\r
+ out (VI2C_BLEN),a\r
+ ld a,h\r
+ out (VI2C_ADR+1),a\r
+ ld a,l\r
+ out (VI2C_ADR+0),a\r
+ ret\r
+\r
+;----------------------------------------------------------------------\r
+\r
+prspeedmsg:\r
+ ld hl,fmsg_tab\r
+ call pdecoded\r
+ ld de,fdim_msg\r
+ call prtstr\r
+ ret\r
+\r
+;----------------------------------------------------------------------\r
+;\r
+;----------------------------------------------------------------------\r
+\r
+fw_check:\r
+ ld bc,000CH ;\r
+ out (c),b ;write 0 to version port\r
+ in a,(c)\r
+ cp 1 ;result should be 0\r
+ ret nc ;exit (a != 0) if it wasn't\r
+ inc b\r
+ out (c),b\r
+ in h,(c) ;get MAJOR\r
+ inc b\r
+ out (c),b\r
+ in l,(c) ;get MINOR\r
+ ld de,VERSION_MIN\r
+ xor a ;clear carry\r
+ sbc hl,de\r
+ sbc a,a ;z if hl >= VERSION_MIN\r
+ ret\r
+\r
+;----------------------------------------------------------------------\r
+\r
+uart_check:\r
+ ld a,3 ;2 byte + SLA\r
+ call vi2c_setup_chk\r
+ ld a,2 ;write cmd\r
+ out (VI2C_CTRL),a\r
+uc_0:\r
+ in a,(VI2C_CTRL) ;do: get i2c result\r
+ bit 7,a ;\r
+ jr nz,uc_0 ;while busy\r
+ cp 0FH\r
+ jr nz,uc_err ;error in transaction\r
+ in a,(VI2C_BLEN)\r
+ cp 3\r
+ jr nz,uc_err\r
+\r
+ inc hl\r
+ inc hl\r
+ in a,(I2C_UART_SPR)\r
+ cp (hl)\r
+ jr nz,uc_err\r
+ ld (hl),42H\r
+ ld a,2\r
+ out (VI2C_CTRL),a\r
+ in a,(I2C_UART_SPR)\r
+ cp (hl)\r
+ jr nz,uc_err\r
+ xor a\r
+ jr uc_1\r
+uc_err:\r
+ ld a,1\r
+uc_1:\r
+ ld c,a\r
+ ld hl,umsg_tab\r
+ xor a\r
+ call pdecoded\r
+ ld a,1\r
+ add a,c\r
+ call pdecoded\r
+ ld a,3\r
+ call pdecoded\r
+ ld a,4\r
+ add a,c\r
+ call pdecoded\r
+ ld a,c\r
+ or a\r
+ ret\r
+\r
+;----------------------------------------------------------------------\r
+\r
+chkbuf:\r
+ db SC16IS740_ADDR\r
+ db (I2C_UART_SPR - I2C_UART_PORT) shl 3 ;address of scratch pad register\r
+ db 5AH\r
+\r
+;----------------------------------------------------------------------\r
+\r
+speedtest:\r
+ ld hl,spt_tab ;init UART in loop back mode\r
+ call ioinil ; and fill tx fifo with 60 chars\r
+\r
+ in a,(I2C_UART_MSR) ;Clear Modem Status Register\r
+ in a,(I2C_UART_LSR) ;Clear Line Status Register\r
+ in a,(I2C_UART_RHR) ;Clear Receiver Buffers\r
+ in a,(I2C_UART_RHR)\r
+\r
+ ld a,2 ;start write transaction\r
+ out (VI2C_CTRL),a\r
+\r
+ ; get time stamp\r
+ in a,(41H) ;lsb ms\r
+ ld e,a\r
+ in a,(42H) ;msb ms\r
+ ld d,a\r
+ in a,(43H) ;lsb seconds\r
+ ld c,a\r
+\r
+spt_1:\r
+ in a,(I2C_UART_RXLVL) ;wait till all 60 char in rx fifo\r
+ cp 60\r
+ jr nz,spt_1\r
+\r
+ ; get 2nd time stamp\r
+ in a,(41H) ;lsb ms\r
+ ld l,a\r
+ in a,(42H) ;msb ms\r
+ ld h,a\r
+ in a,(43H) ;lsb seconds\r
+ sub c ;seconds diff\r
+ jr z,spt_3\r
+ ld bc,1000\r
+spt_2: ;convert s to ms\r
+ add hl,bc\r
+ dec a\r
+ jr nz,spt_2\r
+spt_3:\r
+ sbc hl,de ;hl = elapsed time (ms) for 60 chars\r
+ ld d,h\r
+ ld e,l\r
+ inc hl\r
+ srl h\r
+ rr l\r
+ ld bc,500\r
+ add hl,bc\r
+\r
+ xor a ;clear carry\r
+spt_4:\r
+ inc a\r
+ sbc hl,de\r
+ jr nc,spt_4\r
+ dec a\r
+ ret\r
+\r
+spt_tab:\r
+ db (spt_tab_end - ($+1))/2\r
+ db I2C_UART_LCR, DLAB+03H ;Set devisor latch access bit\r
+ db I2C_UART_DLL, low 96 ;1200 bit/s at 1.832 MHz\r
+ db I2C_UART_DLH, high 96 ;Out to the MSB divisor port\r
+ db I2C_UART_LCR, 03H ;Disable Divisor Access Latch\r
+ db I2C_UART_FCR, 07H ;Clear and enable fifos\r
+ db I2C_UART_MCR, 10H ;Enable loopback\r
+ db I2C_UART_IER, 0 ;Set no interrupts\r
+ db VI2C_ADR+0, low outbuf\r
+ db VI2C_ADR+1, high outbuf\r
+ db VI2C_BLEN, 60+2\r
+spt_tab_end:\r
+\r
+;----------------------------------------------------------------------\r
+;\r
+;----------------------------------------------------------------------\r
\r
sysxin: ; continuation of system initialisation from sysinit\r
\r
+ call fw_check\r
+ jr nz,si_exit_f\r
+ call uart_check\r
+ jr nz,si_exit\r
call speedtest\r
+ ld (clk_div),a\r
call prspeedmsg\r
\r
ld hl,6 ;set default baud rate\r
out (I2C_UART_MCR),a\r
ret\r
\r
-; ld a,07H ;Enable and clear fifos\r
-; out (I2C_UART_FCR),a ;\r
-; ld a,03H ;8N1\r
-; out (I2C_UART_LCR),a ;\r
-\r
-prspeedmsg:\r
- push af\r
- ld de,freqmsg\r
+si_exit_f:\r
+ ld de,fw_msg\r
call prtstr\r
- pop af\r
- cp 13+1\r
- jr c,$+3\r
- xor a\r
- ld e,a\r
- ld d,0\r
- ld hl,fm_tab\r
- add hl,de\r
- add hl,de\r
- ld e,(hl)\r
- inc hl\r
- ld d,(hl)\r
- call prtstr\r
- ld de,fdimmsg\r
+si_exit:\r
+ ld de,exit_msg\r
call prtstr\r
- ret\r
-\r
-mkftab macro x\r
- irp y,<x>\r
-fm&y:\r
- db '&y','$'\r
- endm\r
-fm_tab:\r
- irp y,<x>\r
- dw fm&y\r
- endm\r
- endm\r
+ jp 0\r
\r
\r
-freqmsg:\r
- db 'UART crystal frequency: ','$'\r
- mkftab <?,1.8432,3.6864,5.5296,7.3728,9.216,11.0592,12.9024,14.7456,16.5888,18.432,20.2752,22.1184,23.9616>\r
-fdimmsg:\r
- db ' MHz.',cr,lf,'$'\r
+; ld a,07H ;Enable and clear fifos\r
+; out (I2C_UART_FCR),a ;\r
+; ld a,03H ;8N1\r
+; out (I2C_UART_LCR),a ;\r
\r
\r
;\r
db 5,'38400$'\r
dw 3\r
db 3,'450$'\r
- dw 288\r
+ dw 256\r
db 4,'4800$'\r
dw 24\r
db 5,'57600$'\r
db cr,lf,' 75 150 450 1200 4800 19200 38400 115200$'\r
\r
\r
-speedtest:\r
- ld hl,spt_tab\r
- call ioinil\r
-\r
- in a,(I2C_UART_MSR) ;Clear Modem Status Register\r
- in a,(I2C_UART_LSR) ;Clear Line Status Register\r
- in a,(I2C_UART_RHR) ;Clear Receiver Buffers\r
- in a,(I2C_UART_RHR)\r
-\r
- ld a,2 ;start write transaction\r
- out (VI2C_CTRL),a\r
-\r
- ; get time stamp\r
- in a,(41H) ;lsb ms\r
- ld e,a\r
- in a,(42H) ;msb ms\r
- ld d,a\r
- in a,(43H) ;lsb seconds\r
- ld c,a\r
-\r
-spt_1:\r
- in a,(I2C_UART_RXLVL)\r
- cp 60\r
- jr nz,spt_1\r
-\r
- ; get 2nd time stamp\r
- in a,(41H) ;lsb ms\r
- ld l,a\r
- in a,(42H) ;msb ms\r
- ld h,a\r
- in a,(43H) ;lsb seconds\r
- sub c\r
- jr z,spt_3\r
- ld bc,1000\r
-spt_2:\r
- add hl,bc\r
- dec a\r
- jr nz,spt_2\r
-spt_3:\r
- sbc hl,de\r
- ld d,h\r
- ld e,l\r
- inc hl\r
- srl h\r
- rr l\r
- ld bc,500\r
- add hl,bc\r
-\r
- xor a ;clear carry\r
-spt_4:\r
- inc a\r
- sbc hl,de\r
- jr nc,spt_4\r
- dec a\r
- ld (clk_div),a\r
- ret\r
-\r
-spt_tab:\r
- db (spt_tab_end - ($+1))/2\r
- db I2C_UART_LCR, DLAB+03H ;Set devisor latch access bit\r
- db I2C_UART_DLL, low 96 ;1200 bit/s at 1.832 MHz\r
- db I2C_UART_DLH, high 96 ;Out to the MSB divisor port\r
- db I2C_UART_LCR, 03H ;Disable Divisor Access Latch\r
- db I2C_UART_FCR, 07H ;Clear and enable fifos\r
- db I2C_UART_MCR, 10H ;Enable loopback\r
- db I2C_UART_IER, 0 ;Set no interrupts\r
- db VI2C_ADR+0, low outbuf\r
- db VI2C_ADR+1, high outbuf\r
- db VI2C_BLEN, 60+2\r
-spt_tab_end:\r
-\r
-;----------------------------------------------------------------------\r
-; output bytes to ports\r
-;\r
-; hl: tables of port,value pairs:\r
-; db n ;number of pairs\r
-; db port1,val1, port2,val2,... portn,valn\r
-; ...\r
-; db 0 ; Terminate table\r
-\r
-ioinil:\r
- push bc\r
- ld b,(hl) ;count\r
- inc hl\r
-io1_lp:\r
- ld c,(hl) ;port address\r
- inc hl\r
- outi\r
- jr nz,io1_lp\r
- pop bc\r
- ret\r
-\r
;\r
; This is the system-dependent SET PORT command.\r
; HL contains the argument from the command table.\r
ret\r
\r
selcon:\r
-IF 1\r
jr omflush\r
-ELSE\r
- ret\r
-ENDIF\r
\r
;\r
; Get character from console, or return zero.\r
; returns nonskip; bc, de, hl preserved.\r
;\r
outmdm:\r
-IF 0\r
- in a,(I2C_UART_LSR) ;Get the output done flag.\r
- and TXRDY ;Is it set?\r
- jr z,outmdm ;If not, loop until it is.\r
- ld a,e\r
- out (I2C_UART_THR),a ;Output it.\r
-ENDIF\r
-IF 1\r
-\r
push hl\r
ld hl,(outptr)\r
ld (hl),e ;return buffered char\r
pop bc\r
pop hl\r
ret\r
-ENDIF\r
+\r
;\r
; get character from modem; return zero if none available.\r
; for IOBYT systems, the modem port has already been selected.\r
; destroys bc, de, hl.\r
;\r
inpmdm:\r
-if 0\r
- in a,(I2C_UART_LSR) ;Get the port status into A.\r
- and RXRDY ;See if the input ready bit is on.\r
- ret z ;If not then return.\r
-\r
- in a,(I2C_UART_MCR) ;debug\r
- xor RTS\r
- out (I2C_UART_MCR),a\r
-\r
- in a,(I2C_UART_RHR);If so, get the char.\r
- ret\r
-endif\r
-\r
-if 1\r
- ld a,(inpcnt)\r
+ ld a,(inpcnt) ;any buffered chars?\r
dec a\r
- jp m,imdrdi2c ;buffer empty\r
- ld (inpcnt),a\r
+ jp m,imdrdi2c ;no, buffer empty\r
+ ld (inpcnt),a ;save updated buffer counter\r
ld hl,(inpptr)\r
- ld a,(hl) ;return buffered char\r
+ ld a,(hl) ;return buffered char\r
inc hl\r
- ld (inpptr),hl\r
+ ld (inpptr),hl ;save buffer pointer\r
ret\r
\r
imdrdi2c:\r
\r
; prepare fifo read\r
inc a ;+ slave address\r
- ld (VI2C_BLEN),a\r
ld hl,inbuf\r
- ld a,h\r
- out (VI2C_ADR+1),a\r
- ld a,l\r
- out (VI2C_ADR+0),a\r
+ call vi2c_setup\r
inc hl\r
ld (hl),0 ;select subaddr 0 (RHR) for next read\r
ld a,3 ;write 1 byte (subaddr.), then read fifo\r
- ld (VI2C_CTRL),a\r
+ out (VI2C_CTRL),a\r
in a,(VI2C_CTRL) ;get i2c result\r
xor 01h\r
and 11h ;transfer completed?\r
ld (inpcnt),a ;save new buffer count\r
ld a,(hl)\r
inc hl\r
- ld (inpptr),hl\r
+ ld (inpptr),hl ;save buffer pointer\r
ret\r
\r
imrdex:\r
xor a\r
ret\r
-endif\r
\r
.8080\r
-\r
;\r
; flsmdm - flush comm line.\r
; Modem is selected.\r
clrtop: lxi d,erascr\r
jmp prtstr\r
\r
+;----------------------------------------------------------------------\r
\r
sysver: db 'AVR-CP/M'\r
db '$'\r
\r
+;----------------------------------------------------------------------\r
\r
clk_div:\r
db 1 ;default div\r
db 0 ;RHR subaddress\r
ds OUTSIZE\r
\r
+;----------------------------------------------------------------------\r
\r
IF lasm\r
LINK CPXVDU.ASM ; get terminal defs etc\r
; edit of 10 Apr 87 by C W Rose\r
; Amended code for pci2651 to handle Telecom Merlin M2215.\r
; (8085 at 5 MHz, 2651 USART, port TTY1:, Ampro 230 terminal equivalent).\r
-; \r
+;\r
; edit of 13 Jul 1987 by C W Rose\r
; Added Micromint SB180 with 6/9 MHz. option.\r
;\r
-; edit 22, 15th July, 1987 by OBSchou for David Moore. \r
+; edit 22, 15th July, 1987 by OBSchou for David Moore.\r
; David submitted a paper copy of Kermit 4.05 overlay for a Teletek\r
; system: I have (hopefully) correctly appended his code. He also\r
; send in the code for ADM 22 terminals.\r
;\r
-; edit 21, 14 July, 1986 by OBSchou for John Shearwood of Birmingham \r
+; edit 21, 14 July, 1986 by OBSchou for John Shearwood of Birmingham\r
; University. His edits:\r
; edit of Apr 7th, 1987 by JA Shearwood. Added entry for Cifer Aux port\r
; edit of Mar 24 1987 by JA Shearwood, Birmingham. Added code for Cifer\r
; [Note: Martins CPXFRK is another version of CPXSWT.ASM]\r
;\r
;\r
-; edit 20, 21 May 1987 by OBSchou for Colin Burns of the Institute \r
+; edit 20, 21 May 1987 by OBSchou for Colin Burns of the Institute\r
; of Neurological Sciences, Glasgow. Added flag for Hazeltine 1500\r
; VDU (h1500)\r
;\r
; Manchester University. NCR code is similar to the PCI2651 code, so\r
; NCRDMV chains to CPXTOR.ASM. CPC cahins to the modified CPXPCW file\r
; as submitted by Chris. *** NOTE *** All Amstrad versions require\r
-; CP/M 3, so the 664 version must both have the system upgraded to \r
+; CP/M 3, so the 664 version must both have the system upgraded to\r
; CP/M 3 and have an aditional RAM pack. All Amstrad systems require\r
; a serial interface.\r
;\r
; * * * Here Begineth kermit-80 Version 4.09 * * *\r
;\r
; Biggest change is the overlay address has been moved (again) to 6000h\r
-; and the files have all been diced into families. M80 (almost) back \r
+; and the files have all been diced into families. M80 (almost) back\r
; in, though I have found some bugs. Will worry about those later.\r
-; CPXSYS.ASM (CP4SYS.ASM in V4.05) now is a family file as well. \r
+; CPXSYS.ASM (CP4SYS.ASM in V4.05) now is a family file as well.\r
;\r
; Comments and all that would be much appreciated.\r
;\r
; Bertil Schou,\r
; The Computer Centre,\r
-; Loughborough University of Technology, \r
+; Loughborough University of Technology,\r
; Loughborough\r
; Leicestershire, LE11 3TU\r
; Great Britain\r
; file being assembled. I hope.\r
;\r
; edit 16 Dec 1st, 1986 by OBSchou. Added entry for Amstrad PCW range (PCW)\r
-; Code in Family file CPXPCW.ASM, submitted by Ian Young of Lattice \r
+; Code in Family file CPXPCW.ASM, submitted by Ian Young of Lattice\r
; Logic Systems.\r
;\r
; Edit 15 June 20 1986. Had to chand org address to 5000h to give room for\r
; multi-fcb space for DIR command and other additions in the system\r
; indepentent part. This starts Kermit-80 version 4.08...\r
;\r
-; Edit 14: March 20, 1986 by OBSchou Loughborough University for \r
+; Edit 14: March 20, 1986 by OBSchou Loughborough University for\r
; B Robertson, Aberdeen Univ. Computing Centre.\r
; Add support for APPLE II with serial cards based on the 6850 ACIA.\r
; Mod 380Z support to allow both MDS (5 1/4" discs) and FDS (8" discs)\r
; edit 12 5 Febuary, 1986 by OBSchou\r
; merged in conditionals for Epson PX8 (px8). Code from Tony Addyman\r
; Salford University, England.\r
-; Added code from other contibutors for Basic Northstar (basicns), \r
+; Added code from other contibutors for Basic Northstar (basicns),\r
; Access-Matrix (access), US Micro Sales s1008 (s1008),\r
-; Micro Mate (mmate), A.C.E. Discovery (disc). \r
+; Micro Mate (mmate), A.C.E. Discovery (disc).\r
; These I cannot test: please send comments back if these are buggy.\r
;\r
; edit 11 29 January 1985 by OBSchou @ multics.lut.ac.uk\r
; thru Data Comm 2 (requires 8th-bit quoting\r
; for binary transfers on Data Comm 2)\r
; set VT52 TRUE\r
-mbee EQU FALSE ; Microbee Systems - Microbee \r
+mbee EQU FALSE ; Microbee Systems - Microbee\r
avrcpm EQU TRUE ;AVR-CP/M (terminal required)\r
\r
\r
\r
IF hp125 OR telcon\r
cpuspd SET 40 ;[MF]HP125 or TELCON\r
-ENDIF;hp125 OR telcon \r
+ENDIF;hp125 OR telcon\r
\r
IF mbee\r
cpuspd SET 33 ; Microbee has 3.375MHz Z80\r
;z80 SET FALSE\r
ENDIF ;FALSE\r
\r
-; Now, lets see what family we are assembling for. Reset all \r
+; Now, lets see what family we are assembling for. Reset all\r
; family file to FALSE\r
\r
torfam SET FALSE ; not Torch family file\r
projects / kermit-80.git / commitdiff