BIOS debugging with ddtz: Set 3F to 81 to en fifo inits.

[z180-stamp-cpm3.git] / cbios / boot.180

	title 'Boot loader module for CP/M 3.0'\r
\r
\r
\r
	public	hwinit,?init,?ldccp,?rlccp\r
	public	f_cpu\r
\r
	extrn	boot,?conin\r
	extrn	pr.inln,pr.crlf,pr.dec,pr.decl\r
	extrn	ioini1l,msginit,mmuinit,intinit,cpu_frq\r
	extrn	prt0ini,gs_rtc\r
	extrn	@civec,@covec,@aivec,@aovec,@lovec\r
	extrn	@cbnk,?move,?xmove\r
\r
	maclib	z180reg.inc\r
	maclib	config.inc\r
	maclib	version.inc\r
\r
\r
ccpsize	equ	0c80h\r
\r
	; CP/M BDOS Function Interfaces\r
\r
resetdsk	equ	13\r
open		equ	15\r
read		equ	20\r
setdma		equ	26\r
setmulti	equ	44\r
bdos		equ	5\r
\r
\r
	 if	banked\r
tpa$bank equ	1\r
	 else\r
tpa$bank equ	0\r
	 endif\r
\r
\r
	dseg			; init done from banked memory\r
\r
hwinit:\r
	ld	a,(INIDONE)\r
	and	80h\r
	cp	INIDONEVAL\r
	jr	z,hwini_skip\r
	ld	hl,hwini_tab\r
	call	ioini1l\r
	ld	a,0c3h\r
	ld	hl,boot\r
	ld	(0),a\r
	ld	(1),hl\r
hwini_skip:\r
	call	msginit\r
	call	cpu_frq\r
	ld	(f_cpu),hl\r
	ld	(f_cpu+2),de\r
	call	intinit			; setup interrupts and vectors\r
	ret\r
\r
?init:\r
;	ld	hl,1000000000000000b	; assign console to AVRCON:\r
	ld	hl,0010000000000000b	; assign console to ASCI1:\r
	ld	(@civec),hl\r
	ld	(@covec),hl\r
	ld	hl,0000000000000000b	; assign printer to nothing:\r
	ld	(@lovec),hl\r
	ld	hl,0000000000000000b	; assign AUX to ASCI0:\r
	ld	(@aivec),hl\r
	ld	(@aovec),hl\r
\r
\r
	call	prt0ini			; init timer\r
	ei\r
	ld	c,2\r
	call	gs_rtc			; get time and date\r
\r
	xor	a\r
	ld	(@cbnk),a		; right now in bank 0\r
\r
	call	pr.inln			; print signon message\r
	db	13,10,13,10,'CP/M Version 3.0, Z180-Stamp BIOS v'\r
	defvers\r
	db	13,10\r
	db	'Estimated CPU clock [Hz]: ',0\r
\r
	ld	hl,(f_cpu)\r
	ld	de,(f_cpu+2)\r
	call	pr.decl\r
	call	pr.crlf\r
	ret\r
\r
\r
	cseg		; boot loading must be done from resident memory\r
\r
; 	This version of the boot loader loads the CCP from a file\r
; 	called CCP.COM on the system drive (A:).\r
\r
	; First time, load the A:CCP.COM file into TPA\r
?ldccp:\r
	ld	c,resetdsk\r
	call	bdos\r
	xor	a\r
	ld	(ccp$fcb+15),a		; zero extent\r
	ld	hl,0\r
	ld	(fcb$nr),hl		; start at beginning of file\r
	ld	de,ccp$fcb\r
	ld	c,open			; open file containing CCP\r
	call	bdos\r
	inc	a\r
	jp	z,no$ccp		; error if no file...\r
	ld	de,0100h\r
	ld	c,setdma		; start of TPA\r
	call	bdos\r
	ld	de,128\r
	ld	c,setmulti		; allow up to 16k bytes\r
	call	bdos\r
	ld	de,ccp$fcb\r
	ld	c,read			; load the thing\r
	call	bdos			; read records\r
\r
	; now, copy CCP to bank 0 for reloading\r
\r
	ld	bc,2*256 + tpa$bank	; c: src$bnk, b: dst$bnk\r
	jr	mov_ccp\r
\r
	; just copy in the other direction\r
?rlccp:\r
	ld	bc,tpa$bank*256 + 2	; c: src$bnk, b: dst$bnk\r
mov_ccp:\r
	call	?xmove\r
	ld	hl,0100h\r
	ld	d,h\r
	ld	e,l\r
	ld	bc,ccpsize		; clone 3K, just in case\r
	call	?move\r
	ret\r
\r
no$ccp:					; here if we couldn't find the file\r
	call	pr.inln			; report this...\r
	db	13,10,'BIOS Err on A: No CCP.COM file',0\r
\r
	call	?conin			; get a response\r
	jr	?ldccp			; and try again\r
\r
\r
ccp$fcb:db	1,'CCP     ','COM',0,0,0,0\r
	ds	16\r
fcb$nr:	db	0,0,0\r
\r
\r
	dseg\r
hwini_tab:\r
	db	(hwini0_e-$)/2	;count\r
	db	rcr,CREFSH	;configure DRAM refresh\r
	db	dcntl,CWAITIO	;wait states\r
	db	ccr,M_NCD	;No Clock Divide\r
	db	cmr,PHI_X2	;X2 Clock Multiplier\r
	db	omcr,~M_IOC	;Operation Mode Control Register\r
hwini0_e:\r
	db	0		;stop mark\r
\r
	cseg\r
f_cpu	dw	0,0		;detected CPU clock frequency [Hz]\r
\r
	end\r