global mmuinit
- global bnk2log,bnk2phy,hwl2phy
+ global bnk2log,bnk2phy,hwl2phy,phy2log
include config.inc
include z180reg.inc
;----------------------------------------------------------------------
-; Memory Map:
+; Memory Map 1:
;
-; Common CAStart ... 0FFFF
-; Bank 0 00000 ... CAStart-1
-; Bank 1 10000 ...
+; Common CAStart .. 0FFFF
+; Bank 0 00000 .. CAStart-1
+; Bank 1 10000 ..
; Bank 2
;
+; Memory Map 2:
+;
+; Common 18000 .. 1BFFF BANK1
+;
+; Bank 0 00000 .. 0BFFF 0
+; Bank 1 0C000 .. 17FFF 1*BNK_SIZE
+; Bank 2 1C000 .. 27FFF 2*BNK_SIZE + CMN_SIZE
+; Bank 3 28000 .. 33FFF 3*BNK_SIZE + CMN_SIZE
+; Bank n n*BNK_SIZE + (n < 2) ? 0 : CMN_SIZE
+;
;----------------------------------------------------------------------
cseg
; in a: Bank number
; out a: bbr value
+ if 0 ; Memory Map 1
+
bnk2log:
or a ;
ret z ; Bank 0 is at physical address 0
- dec a
+ dec a ;
push bc ;
- ld b,a ;
- ld c,CA ;
+ ld c,a ;
+ ld b,BNK_SIZE ;
mlt bc ; bank size * bank number
ld a,c ;
add a,10h ; add bank0 + common
pop bc ;
ret ;
+ else ; Memory Map 2
+
+bnk2log:
+ or a
+ ret z ; Bank 0 is at physical address 0
+
+ push bc
+ ld c,a ;
+ ld b,BNK_SIZE ;
+ mlt bc ; bank size * bank number
+ cp 2 ;
+ ld a,c ;
+ pop bc
+ ret c
+ add a,CMN_SIZE
+ ret
+
+ endif
+
+ if 0 ; table version
+
+ push hl
+ ld hl,bnk_table ;
+ add a,l ;
+ ld l,a ;
+ jr nc,$+3 ;
+ inc h ;
+ ld a,(hl) ;
+ pop hl
+ ret
+
+ endif
+
;--------------------------------------------------------------
;in hl: Log. Address
cp CA*16
ld a,c
pop bc
-
jr c,b2p_banked
- xor a ; address is in common
- jr b2b_cont ; base is 0
+ ; address is in common
+ if 0 ; Memory Map 1
+ ld a,0 ; base is 0
+ else ; Memory Map 2
+ ld a,1 ; same as bank1
+ endif
+
b2p_banked:
call bnk2log ; get address base
-b2b_cont:
; fall thru
;--------------------------------------------------------------
;
-; de: Log. Address
+; hl: Log. Address
;
;
-; OP: ahl = (bankbase<<12) + (d<<8) + e
+; OP: ahl = (bankbase<<12) + (h<<8) + l
;
;out ahl: Phys. (linear) Address
ret ;
+;--------------------------------------------------------------
+; return logical bank 0 address for given physical address.
+;
+; in: ahl: pyhsical addres (20 bit)
+; out hl: logical address.
+; logical address is in bank 0 or common, no bank number returned
+;
+
+phy2log:
+ or a
+ ret z
+
+ push bc
+ push hl
+ ld l,h
+ ld h,0
+ ld bc,-16*SYS$CBR
+ add hl,bc
+ ld h,l
+ pop bc
+ ld l,c
+ pop bc
+ ret
+
+;--------------------------------------------------------------
+; Trampoline for routines in banked ram.
+; Switch stack pointer to "system" stack in top ram
+; Save cbar
+;
+ extrn bs$stack
+
+ cseg ; common!
+
+ public _b0call
+_b0call:
+ push af
+ in0 a,(bbr)
+ jr nz,b0c_doit
+ pop af
+
+ ex (sp),hl ;16
+ push de
+ ld e,(hl)
+ inc hl
+ ld d,(hl)
+ inc hl
+ ld (b0c_fast_go),de
+ pop de
+ ex (sp),hl ;16
+b0c_fast_go equ $+1
+ jp 0
+
+b0c_doit:
+ ld (b0_save_hl),hl
+ ld (b0_save_de),de
+ pop hl
+ ld (b0_save_af),hl
+
+ pop de ;get ptr to 'function address' in de
+ ld hl,2
+ add hl,de
+ push hl ;put return address on stack
+
+ if 0 ; link80
+
+ ld hl,0
+ add hl,sp ;
+ ld a,h
+ cp high (bs$stack-bs$stack$size) ;link80 can't process this
+ jr nc,$ + 5 ;skip if stack allready in common bios ram
+
+ else
+
+ ld hl,bs$stack-bs$stack$size
+ ld a,h
+ dec a
+ ld hl,0
+ add hl,sp ;
+ cp h
+ jr c,$ + 5 ;skip if stack allready in common bios ram
+ endif
+ ld sp,bs$stack ;
+
+ push hl ;save user stack pointer
+
+ in0 h,(bbr) ;
+ push hl ;
+ ld hl,b0c_ret
+ push hl
+ xor a
+ out0 (bbr),a ;
+ ex de,hl ;ptr
+ ld e,(hl) ;get 'function address'
+ inc hl ;
+ ld d,(hl) ;
+ push de ;put on (switched) stack
+
+ ld hl,(b0_save_af) ;get back users registers
+ push hl
+ pop af
+ ld de,(b0_save_de)
+ ld hl,(b0_save_hl)
+ ret ;go to function
+b0c_ret:
+ ld (b0_save_hl),hl
+
+ pop hl ;
+ out0 (bbr),h ;
+ pop hl ;
+ ld sp,hl ;
+ ld hl,(b0_save_hl)
+ ret ;
+
+
+b0_save_hl: dw 0
+b0_save_de: dw 0
+b0_save_af: dw 0
+
+
+
;====================================================================
if 0
projects / z180-stamp-cpm3.git / blobdiff