New memory map: bank 1 and common are now contiguous

diff --git a/cbios/bioskrnl.180 b/cbios/bioskrnl.180
index 79dac2c9a73224c46449b0d3c26863cb9ac6a60e..39927bea80eaba88c94e9ebf388d46d5d56f1612 100644 (file)
--- a/cbios/bioskrnl.180
+++ b/cbios/bioskrnl.180
@@ -67,7 +67,7 @@ ccp   equ     0100h           ; Console Command Processor gets loaded
 \r
     ; External names for BIOS entry points\r
 \r
-       public ?boot,?wboot,?const,?conin,?cono,?list,?auxo,?auxi\r
+       public ?boot,?wboot,boot,?const,?conin,?cono,?list,?auxo,?auxi\r
        public ?home,?sldsk,?sttrk,?stsec,?stdma,?read,?write\r
        public ?lists,?sctrn\r
        public ?conos,?auxis,?auxos,?dvtbl,?devin,?drtbl\r
@@ -129,6 +129,10 @@ ccp        equ     0100h           ; Console Command Processor gets loaded
        dseg                    ; this part can be banked\r
 \r
 boot:\r
+       ld      a,SYS$CBR\r
+       out0    (cbr),a\r
+       ld      a,USR$CBAR\r
+       out0    (cbar),a\r
        ld      sp,bs$stack\r
 \r
        call    hwinit          ; first time hardware initialisation\r

diff --git a/cbios/boot.180 b/cbios/boot.180
index 8d58d1a71a70884f26148c4485c00f720ba7466f..2a43b75671a8bc0b88ae76a35248fa1646ca5bfa 100644 (file)
--- a/cbios/boot.180
+++ b/cbios/boot.180
@@ -6,7 +6,7 @@
 \r
        public  f_cpu\r
 \r
-       extrn   ?boot,?conin\r
+       extrn   boot,?conin\r
        extrn   pr.inln,pr.crlf,pr.dec,pr.decl\r
        extrn   ioini1l,msginit,mmuinit,intinit,cpu_frq\r
        extrn   prt0ini,gs_rtc\r
@@ -45,11 +45,10 @@ hwinit:
        ld      hl,hwini_tab\r
        call    ioini1l\r
        ld      a,0c3h\r
-       ld      hl,?boot\r
+       ld      hl,boot\r
        ld      (0),a\r
        ld      (1),hl\r
 hwini_skip:\r
-       call    mmuinit         ; setup mmu registers\r
        call    msginit\r
        call    cpu_frq\r
        ld      (f_cpu),hl\r

diff --git a/cbios/misc.180 b/cbios/misc.180
index 439fb75519d2d911b3198519d593f6863f3f998e..d39f63204ae85440c7dd9896bee30b4bf1938247 100644 (file)
--- a/cbios/misc.180
+++ b/cbios/misc.180
@@ -158,7 +158,7 @@ get_tmr:
 
 ;--------------------------------------------------------------------
 
-       cseg
+       dseg
 
 fifolst:
        rept 4

diff --git a/cbios/mm.180 b/cbios/mm.180
index 9d1e2561f7e48290f43084c39b898fc5570cee7c..d9efd168f8f10fe380a9cdc963d4bea62fcc3aae 100644 (file)
--- a/cbios/mm.180
+++ b/cbios/mm.180
@@ -3,20 +3,30 @@
 
 
        global mmuinit
-       global bnk2log,bnk2phy,hwl2phy
+       global bnk2log,bnk2phy,hwl2phy,phy2log
 
        include config.inc
        include z180reg.inc
 
 
 ;----------------------------------------------------------------------
-; Memory Map:
+; Memory Map 1:
 ;
-;      Common  CAStart ...     0FFFF
-;      Bank 0    00000 ... CAStart-1
-;      Bank 1    10000 ...
+;      Common  CAStart ..     0FFFF
+;      Bank 0    00000 .. CAStart-1
+;      Bank 1    10000 ..
 ;      Bank 2
 ;
+; Memory Map 2:
+;
+;      Common    18000 .. 1BFFF        BANK1
+;
+;      Bank 0    00000 .. 0BFFF        0
+;      Bank 1    0C000 .. 17FFF        1*BNK_SIZE
+;      Bank 2    1C000 .. 27FFF        2*BNK_SIZE + CMN_SIZE
+;      Bank 3    28000 .. 33FFF        3*BNK_SIZE + CMN_SIZE
+;      Bank n                          n*BNK_SIZE + (n < 2) ? 0 : CMN_SIZE
+;
 ;----------------------------------------------------------------------
 
        cseg
@@ -32,20 +42,55 @@ mmuinit:
 ; in  a: Bank number
 ; out a: bbr value
 
+   if 0        ; Memory Map 1
+
 bnk2log:
        or      a               ;
        ret     z               ; Bank 0 is at physical address 0
 
-       dec     a
+       dec     a               ;
        push    bc              ;
-       ld      b,a             ;
-       ld      c,CA            ;
+       ld      c,a             ;
+       ld      b,BNK_SIZE      ;
        mlt     bc              ; bank size * bank number
        ld      a,c             ;
        add     a,10h           ; add bank0 + common
        pop     bc              ;
        ret                     ;
 
+   else ; Memory Map 2
+
+bnk2log:
+       or      a
+       ret     z               ; Bank 0 is at physical address 0
+
+       push    bc
+       ld      c,a             ;
+       ld      b,BNK_SIZE      ;
+       mlt     bc              ; bank size * bank number
+       cp      2               ;
+       ld      a,c             ;
+       pop     bc
+       ret     c
+       add     a,CMN_SIZE
+       ret
+
+    endif
+
+    if 0 ; table version
+
+       push    hl
+       ld      hl,bnk_table    ;
+       add     a,l             ;
+       ld      l,a             ;
+       jr      nc,$+3          ;
+       inc     h               ;
+       ld      a,(hl)          ;
+       pop     hl
+       ret
+
+    endif
+
 ;--------------------------------------------------------------
 
 ;in  hl: Log. Address
@@ -62,13 +107,16 @@ bnk2phy:
        cp      CA*16
        ld      a,c
        pop     bc
-
        jr      c,b2p_banked
-       xor     a               ; address is in common
-       jr      b2b_cont        ;    base is 0
+                               ; address is in common
+    if 0 ; Memory Map 1
+       ld      a,0             ; base is 0
+    else ; Memory Map 2
+       ld      a,1             ; same as bank1
+    endif
+
 b2p_banked:
        call    bnk2log         ; get address base
-b2b_cont:
 
        ; fall thru
 
@@ -102,10 +150,10 @@ l2p_i:
 
 ;--------------------------------------------------------------
 ;
-; de: Log. Address
+; hl: Log. Address
 ;
 ;
-; OP: ahl = (bankbase<<12) + (d<<8) + e
+; OP: ahl = (bankbase<<12) + (h<<8) + l
 ;
 ;out ahl: Phys. (linear) Address
 
@@ -137,6 +185,30 @@ hl2p_x:
        ret                     ;
 
 
+;--------------------------------------------------------------
+; return logical bank 0 address for given physical address.
+;
+; in: ahl: pyhsical addres (20 bit)
+; out  hl: logical address.
+;         logical address is in bank 0 or common, no bank number returned
+;
+
+phy2log:
+       or      a
+       ret     z
+
+       push    bc
+       push    hl
+       ld      l,h
+       ld      h,0
+       ld      bc,-16*SYS$CBR
+       add     hl,bc
+       ld      h,l
+       pop     bc
+       ld      l,c
+       pop     bc
+       ret
+
 ;--------------------------------------------------------------
 ; Trampoline for routines in banked ram.
 ; Switch stack pointer to "system" stack in top ram

diff --git a/cbios/msgbuf.180 b/cbios/msgbuf.180
index 27c82d4b5278839ea14fd418446497aebf066e43..7b70d5427bd77975b6db30477d6ebd0f263d3a0b 100644 (file)
--- a/cbios/msgbuf.180
+++ b/cbios/msgbuf.180
@@ -7,7 +7,7 @@
 ;      global  msg.sout\r
        global  msg.sm,msg.recv\r
 \r
-       extrn   bufinit,hwl2phy\r
+       extrn   bufinit,hwl2phy,phy2log\r
        extrn   fifolst\r
 \r
        include config.inc\r
@@ -18,9 +18,6 @@
        mkbuf   0,mtx.fifo,mtx.fifo_len\r
        mkbuf   1,mrx.fifo,mrx.fifo_len\r
 \r
-;txfifo_addr   equ     fifolst + (0*2)\r
-;rxfifo_addr   equ     fifolst + (1*2)\r
-\r
 itx    equ     0*2\r
 irx    equ     1*2\r
 \r
@@ -35,7 +32,9 @@ msginit:
        jr      nz,msgi_1\r
 \r
        ld      hl,(040h)\r
-;TODO: physical to logical address translation\r
+       ld      a,(040h+2)\r
+       call    phy2log\r
+\r
        ld      a,l\r
        or      h\r
        jr      z,msgi_1\r
@@ -47,11 +46,13 @@ msginit:
 \r
 msgi_1:\r
        ld      a,(043h)\r
+\r
 ;TODO: value should be 0\r
+\r
        ld      ix,mtx.fifo\r
        call    bufinit\r
-\r
-       ld      hl,fifolst\r
+       push    ix\r
+       pop     hl\r
        call    hwl2phy\r
        ld      (040h),hl\r
        ld      (040h+2),a\r