asci0 int: Save intermediate state. Not working!

diff --git a/cbios/asci-cmn.180 b/cbios/asci-cmn.180
index c8f0c3bacd4b40b0facec6f3512f431f2b3e7adb..63cbe9089f11d16da8294cd7161c08e98f6f680d 100644 (file)
--- a/cbios/asci-cmn.180
+++ b/cbios/asci-cmn.180
@@ -33,7 +33,7 @@ as_init:
        jr      nz,$+5
        ld      hl,initab1
 
-       push    hl
+       push    hl                      ;save initab addr
        ld      c,8                     ;
        mlt     bc                      ;
        ld      hl,@ctbl+7              ;get baudrate index
@@ -59,7 +59,7 @@ as_init:
 as_ini_1:
        ld      b,h
        ld      c,l
-       pop     de
+       pop     de                      ;get back initab addr
        ld      hl,init_br_off
        add     hl,de
        ld      (hl),c

diff --git a/cbios/ascii.180 b/cbios/ascii.180
index 12e18fd40497a538daadbc59f9861222e3097546..54ee706e4556675e77177e9f66c70aeda06a15b1 100644 (file)
--- a/cbios/ascii.180
+++ b/cbios/ascii.180
@@ -125,10 +125,10 @@ as0inp:
        jr      nc,a0i_1\r
        di\r
        in0     a,(cntla0)\r
-       res     RTS0,a\r
-       set     EFR,a\r
-       out0    (cntla0),a\r
+       and     ~M_RTS0                 ;assert RTS\r
+       or      M_EFR                   ;don't reset error flags\r
        ei\r
+       out0    (cntla0),a\r
 a0i_1:\r
        call    ff_get\r
        pop     ix\r
@@ -200,49 +200,59 @@ as1out:
 \r
 \r
 ;------------------------------------------\r
-; ASCI 1 Transmit/Receive interupt routines\r
+; ASCI 0 Transmit/Receive interupt routines\r
 \r
        dseg\r
 rxtxi0:\r
-       in0     e,(stat0)               ;receive flag set?      5\r
-       jp      p,txisv0                ;\r
+       push    ix\r
+rxtxi0_0:\r
+       in0     e,(stat0)               ;receive flag set?\r
+       jp      p,rxtxi0_1              ;\r
+\r
+rxi_0\r
+       in0     a,(asext0)              ;todo: break detection\r
+       and     M_BREAK\r
+       or      e\r
+       ld      e,a\r
 \r
-       in0     a,(rdr0)                ;todo: break detection  9\r
-       in0     d,(cntla0)              ;                       1\r
+       in0     d,(cntla0)              ;\r
        res     EFR,d                   ;\r
-       bit     FE,e                    ;framing error?\r
-       jr      nz,?0ri_1\r
 \r
-       push    ix\r
        ld      ix,s0.inbuf             ;\r
        ld      hl,s0.inbuf             ;\r
-       ld      c,(ix+o.in_idx)         ;\r
+       ld      c,(ix+o.in_idx)         ;-2\r
        ld      b,0\r
        add     hl,bc\r
+       in0     a,(rdr0)                ;\r
        ld      (hl),a\r
 \r
-       ld      a,c                     ;\r
-       inc     a\r
-       and     (ix+o.mask)\r
+       bit     FE,e                    ;framing error?\r
+       jr      nz,?0ri_1\r
+\r
+       ld      a,c                     ;increment buffer in pointer\r
+       inc     a                       ;\r
+       and     (ix+o.mask)             ;-3\r
        ld      c,a\r
-       sub     (ix+o.out_idx)          ;\r
+       inc     hl\r
+       jr      z,$+5\r
+        ld     hl,s0.inbuf             ;\r
+       sub     (ix+o.out_idx)          ;-1\r
        jr      z,$+5                   ;skip if buffer is full\r
-       ld      (ix+o.in_idx),c\r
+        ld     (ix+o.in_idx),c         ;-2\r
        jr      nc,$+6\r
-       add     (ix+o.mask)\r
-       inc     a\r
+        add    (ix+o.mask)             ;-3\r
+        inc    a\r
        cp      96\r
        jr      c,$+4\r
-       set     RTS0,d                  ;RTS inactive\r
-       pop     ix\r
+        set    RTS0,d                  ;RTS inactive\r
 ?0ri_1:\r
-       out0    (cntla0),d              ;                       1\r
+       out0    (cntla0),d              ;\r
+       jr      rxtxi0_0\r
 \r
-txisv0:\r
-       bit     TDRE,e\r
-       ret     z\r
+rxtxi0_1:\r
+       bit     TDRE,e                  ;TX int?\r
+       jr      z,rxtxi0_e\r
 \r
-       push    ix\r
        ld      ix,s0.outbuf            ;\r
 \r
        ld      a,(ix+o.out_idx)        ;\r
@@ -264,6 +274,9 @@ txisv0:
        res     TIE,e                   ;disable tx-int\r
        out0    (stat0),e               ;                       5\r
 ?0ti_3:\r
+       jr      rxtxi0_0\r
+\r
+rxtxi0_e:\r
        pop     ix\r
        ret\r
 \r