[z180-stamp.git] / z180 / r3init.180

	page	255\r
	.z80\r
\r
	extrn ddtz,bpent\r
	extrn $stack\r
	extrn $coninit,$cists,$ci\r
\r
	extrn romend\r
\r
\r
	global	isv_sw\r
\r
	include config.inc\r
	include	z180reg.inc\r
	include z180.lib\r
\r
;CR	equ	0dh\r
\r
\r
\r
;----------------------------------------------------------------------\r
\r
	cseg\r
\r
	jp start\r
\r
; restart vectors\r
\r
rsti	defl	1\r
	rept	7\r
	 db 0, 0, 0, 0, 0\r
	 jp bpent\r
rsti	 defl rsti+1\r
	endm\r
\r
;----------------------------------------------------------------------\r
\r
	if ROMSYS\r
$crom:	 defb c$rom		;\r
	else\r
	 db	0		;\r
	endif\r
\r
dmclrt:				;clear ram per dma\r
	db	dmct_e-dmclrt-2 ;\r
	db	sar0l		;first port\r
	dw	nullbyte	;src (fixed)\r
nullbyte:\r
	db 	000h		;src\r
	dw	romend		;dst (inc), start after "rom" code\r
	db	00h		;dst\r
	dw 	0-romend	;count (64k)\r
dmct_e:\r
\r
INIWAITS defl	CWAITIO\r
	if	ROMSYS\r
INIWAITS defl	INIWAITS+CWAITROM\r
	endif\r
\r
hwini0:\r
	db	3		;count\r
	db	rcr,CREFSH	;configure DRAM refresh\r
	db	dcntl,INIWAITS	;wait states\r
	db	cbar,SYS$CBAR\r
\r
;----------------------------------------------------------------------\r
\r
start:\r
	push af			;003c\r
	in0 a,(itc)		;003d	Illegal opcode trap?\r
	jp p,??st01		;0040\r
	pop af			;0043\r
	jp bpent		;0044	  yes, handle\r
\r
??st01:\r
	ld a,i			;0047	I register == 0 ?\r
	jr z,??st02		;004b     yes, harware reset\r
	pop af			;004d\r
	jp bpent		;004e	  no, allready set up\r
\r
??st02:\r
	di			;0058\r
	ld	a,CREFSH\r
	out0	(rcr),a		;	configure DRAM refresh\r
	ld	a,CWAITIO\r
	out0	(dcntl),a	;	wait states\r
\r
	ld	a,M_NCD		;No Clock Divide\r
	out0	(ccr),a\r
	ld	a,M_X2CM	;X2 Clock Multiplier\r
	out0	(cmr),a\r
\r
; search warm start mark\r
\r
	ld ix,mark_55AA		;00b8	; top of common area\r
	ld a,SYS$CBAR		;\r
	out0 (cbar),a		;\r
	ld a,071h		;00bc\r
	ex af,af'		;00be	;for cbr = 0x70 downto 0x40\r
swsm_l:\r
	ex af,af'		;00bf\r
	dec a			;00c0\r
	cp 03fh			;00c1\r
	jr z,kstart		;00c3	;  break (mark not found)\r
	out0 (cbr),a		;00c5\r
	ex af,af'		;00c8\r
	ld a,0aah		;00c9\r
	cp (ix+000h)		;00cb\r
	jr nz,swsm_l		;00ce\r
	cp (ix+002h)		;00d0\r
	jr nz,swsm_l		;00d3\r
	cpl			;00d5\r
	cp (ix+001h)		;00d6\r
	jr nz,swsm_l		;00d9\r
	cp (ix+003h)		;00db\r
	jr nz,swsm_l		;00de\r
	ld sp,$stack		;00e0	mark found, check\r
	call checkcrc_alv	;00e3\r
	jp z,wstart		;00e6	check ok,\r
\r
;\r
; ram not ok, initialize    --  kstart --\r
\r
kstart:\r
\r
	ld	a,088h		;00e9	0000-7fff: common 0\r
	out0	(cbar),a	;00eb   8000-ffff: common 1\r
	ld	ix,08000h	;00f3\r
	ld	a,0		;00f1	start at 008000 (2. phys. 32k block)\r
??f_0:\r
	out0	(cbr),a		;00f9\r
\r
	ld	(ix+0),a	;0103\r
	cpl\r
	ld	(ix+1),a	;0103\r
	cpl\r
	add	a,8		;010a	next 'bank'\r
	cp	078h		;010c	stop at 078000\r
	jr	nz,??f_0	;010e\r
\r
	ld	de,8000h	;0114   first block not tested, but mark as ok\r
	ld	a,0		;00f1	start at 008000 (2. phys. 32k block)\r
??cp_0:\r
	out0	(cbr),a		;011c\r
	ld	c,a\r
	xor	(ix+0)\r
	ld	b,a\r
	ld	a,c\r
	cpl\r
	xor	(ix+1)\r
	or	b\r
	jr	nz,??cp_1\r
	scf\r
??cp_1:\r
	rr	d\r
	rr	e\r
	ld	a,c\r
	add	a,8\r
	cp	078h		;	stop at 078000\r
	jr	nz,??cp_0\r
\r
;\r
;  ram test found 1 or more error free blocks (32k)\r
;\r
\r
ramok:\r
	ld	a,SYS$CBAR	;01c8\r
	out0	(cbar),a	;01ca\r
	ld	h,d\r
	ld	l,e\r
	ld 	c,070h		;01ce	highest block\r
	ld 	b,15		;01d0\r
??sr_1:\r
	add	hl,hl\r
	jr	c,alloc		;01d4	highest "error free" block\r
	ld	a,c		;01d6\r
	sub	008h		;01d7\r
	ld	c,a		;01d9\r
	djnz	??sr_1		;01da\r
\r
	slp			;01dc	should never be reached\r
\r
alloc:\r
	out0	(cbr),c		;01de\r
	ld	sp,$stack	;01e1\r
\r
; Clear RAM using DMA0\r
\r
	ld	hl,dmclrt	;load DMA registers\r
	call	io.ini.m\r
	ld	a,0cbh		;01ef	dst +1, src fixed, burst\r
	out0	(dmode),a	;01f1\r
\r
	ld	b,512/64\r
	ld	a,062h		;01f4	enable dma0,\r
??cl_1:\r
	out0	(dstat),a	;01f9	clear (up to) 64k\r
	djnz	??cl_1		;	end of RAM?\r
\r
; Init bank manager\r
\r
	ld	hl,banktabsys	;020f\r
	ld	(hl),c		;	Common area\r
	inc	hl		;0213\r
	ld	(hl),c		;	System work area\r
	inc	hl		;0215	Point to bank 0 entry\r
	ld	b,BANKS		;0216\r
l0218h:\r
	ld	(hl),0ffh	;0218	Mark all banks as unassigned\r
	inc	hl		;021a\r
	djnz	l0218h		;021b\r
\r
	ld	hl,memalv	;\r
	ld	b,8		;	8*4k ie. first 32k\r
??a_0:\r
	ld	(hl),0e0h	;	mark as sys ("rom"/monitor)\r
	inc	hl\r
	djnz	??a_0\r
\r
	rr	d		;	shift out bit for block 0\r
	rr	e		;\r
	ld	c,15		;022c	15*32k remaining blocks\r
l022eh:\r
	ld	a,0feh		;	0xfe == block with error(s)\r
	rr	d		;\r
	rr	e\r
	adc	a,0		;	==> 0xff : block ok\r
	ld	b,32/4		;	32k == 8 * 4k\r
l0236h:\r
	ld	(hl),a		;\r
	inc	hl		;\r
	djnz	l0236h		;\r
	dec	c		;\r
	jr	nz,l022eh	;next 32k block\r
\r
	ld	hl,memalv+0ch	;memalv+0ch\r
	ld	a,(banktabsys)	;\r
	call	add_hl_a\r
	ld	b,3		;\r
l024ah:\r
	ld	(hl),0ech	;alloc system ram\r
	inc	hl		;\r
	djnz	l024ah		;\r
	ld	(hl),0efh	;alloc common\r
	call	gencrc_alv\r
\r
	ld	hl,0000h	;bank #\r
	ld	bc,0f0fh	;  size (?) (4k blocks)\r
	xor	a		;\r
	call	sub_0420h	;alloc mem for bank 0\r
	ld	c,l		;\r
	or	a		;\r
	call	z,sub_04b5h	;\r
\r
	ld	hl,0101h	;\r
	ld	bc,0f0fh	;\r
	xor	a		;\r
	call	sub_0420h	;\r
	ld	c,l		;\r
	or	a		;\r
	call	z,sub_04b5h	;\r
\r
	ld	hl,055AAh	;set warm start mark\r
	ld	(mark_55AA),hl	;\r
	ld	(mark_55AA+2),hl;\r
\r
;\r
; crc ok       --  wstart  --\r
;\r
wstart:\r
	call	sysram_init	;027f\r
	call	ivtab_init\r
\r
	call	prt0_init\r
\r
\r
;;;	call	bufferinit\r
\r
\r
	call	$coninit\r
\r
\r
\r
\r
	im 2			;?030e\r
	ei			;0282\r
\r
	call $cists		;0284\r
	call $cists		;0287\r
	or a			;028a\r
	call nz,$ci		;028d\r
\r
	ld a,(banktab)		;\r
	ld e,a			;\r
	jp ddtz			;0290\r
\r
\r
;\r
;----------------------------------------------------------------------\r
;\r
\r
;TODO: Make a ringbuffer module.\r
\r
	global	buf.init\r
\r
buf.init:\r
	ld	(ix+o.in_idx),0\r
	ld	(ix+o.out_idx),0\r
	ld	(ix+o.mask),a\r
	ret\r
\r
;----------------------------------------------------------------------\r
\r
.comment *\r
\r
	extrn	msginit,msg.sout,msg_fifo\r
	extrn	tx.buf,rx.buf\r
\r
\r
bufferinit:\r
	call	 msginit\r
\r
	ld	hl,buffers\r
	ld	bc,0300h\r
bfi_1:\r
	ld	e,(hl)\r
	inc	hl\r
	ld	d,(hl)\r
	inc	hl\r
	push	hl\r
	in0	a,cbr\r
	call	log2phys\r
	ld	(bufdat+1),hl\r
	ld	(bufdat+3),a\r
	ld	a,c\r
	ld	(bufdat+0),a\r
	ld	hl,inimsg\r
	call	msg.sout\r
	pop	hl\r
	inc	c\r
	djnz	bfi_1\r
	ret\r
\r
	rept	20\r
	db	0\r
	endm\r
\r
buffers:\r
	dw	msg_fifo\r
	dw	tx.buf\r
	dw	rx.buf\r
\r
inimsg:\r
	db	inimsg_e - $ -2\r
	db	PMSG\r
	db	81h\r
	db	inimsg_e - $ -1\r
	db	0\r
bufdat:\r
	db	0\r
	dw	0\r
	db	0\r
inimsg_e:\r
\r
	*\r
\r
;\r
;----------------------------------------------------------------------\r
;\r
\r
sysram_init:\r
	ld hl,sysramw\r
	ld de,topcodsys\r
	ld bc,sysrame-sysramw\r
	ldir\r
\r
	ret\r
\r
;----------------------------------------------------------------------\r
\r
ivtab_init:\r
	ld	hl,ivtab	;\r
	ld	a,h		;\r
	ld	i,a		;\r
	out0	(il),l		;\r
\r
; Let all vectors point to spurious int routines.\r
\r
	ld	d,high sp.int0\r
	ld	a,low  sp.int0\r
	ld	b,9\r
ivt_i1:\r
	ld	(hl),a\r
	inc	l\r
	ld	(hl),d\r
	inc	l\r
	add	a,sp.int.len\r
	djnz	ivt_i1\r
	ret\r
\r
;----------------------------------------------------------------------\r
\r
prt0_init:\r
	ld	a,i\r
	ld	h,a\r
	in0	a,(il)\r
	and	0E0h\r
	or	IV$PRT0\r
	ld	l,a\r
	ld	(hl),low  iprt0\r
	inc	hl\r
	ld	(hl),high iprt0\r
	ld	hl,prt0itab\r
	call	io.ini.m\r
	ret\r
\r
prt0itab:\r
	db	prt0it_e-prt0itab-2\r
	db	tmdr0l\r
	dw	PRT_TC10MS\r
	dw	PRT_TC10MS\r
	db	M_TIE0+M_TDE0	;enable timer 0 interrupt and down count.\r
prt0it_e:\r
\r
\r
;\r
;----------------------------------------------------------------------\r
;\r
\r
io.ini:\r
	push	bc\r
	ld	b,0		;high byte port adress\r
	ld	a,(hl)		;count\r
	inc	hl\r
ioi_1:\r
	ld	c,(hl)		;port address\r
	inc	hl\r
	outi\r
	inc	b		;outi decrements b\r
	dec	a\r
	jr	nz,ioi_1\r
	pop	bc\r
	ret\r
\r
io.ini.m:\r
	push	bc\r
	ld	b,(hl)\r
	inc	hl\r
	ld	c,(hl)\r
	inc	hl\r
	otimr\r
	pop	bc\r
	ret\r
\r
io.ini.l:\r
;\r
\r
;----------------------------------------------------------------------\r
;\r
\r
; compute crc\r
; hl: start adr\r
; bc: len\r
; bc returns crc val\r
\r
do_crc16:\r
	ld	de,0FFFFh\r
crc1:\r
	ld	a,(hl)\r
	xor	e\r
	ld	e,a\r
	rrca\r
	rrca\r
	rrca\r
	rrca\r
	and	0Fh\r
	xor	e\r
	ld	e,a\r
	rrca\r
	rrca\r
	rrca\r
	push	af\r
	and	1Fh\r
	xor	d\r
	ld	d,a\r
	pop	af\r
	push	af\r
	rrca\r
	and	0F0h\r
	xor	d\r
	ld	d,a\r
	pop	af\r
	and	0E0h\r
	xor	e\r
	ld	e,d\r
	ld	d,a\r
	cpi\r
	jp	pe,crc1\r
	or	e		;z-flag\r
	ret\r
\r
\r
gencrc_alv:\r
	push hl			;03f6\r
	push de			;03f7\r
	push bc\r
	push af			;03f8\r
	ld hl,banktabsys	;03f9\r
	ld bc,crc_len		;03fc\r
	call do_crc16		;03ff\r
	ld (hl),e\r
	inc hl\r
	ld (hl),d\r
	pop af			;0406\r
	pop bc\r
	pop de			;0407\r
	pop hl			;0408\r
	ret			;0409\r
\r
checkcrc_alv:\r
	push hl			;040a\r
	push de\r
	push bc			;040b\r
	ld hl,banktabsys	;040d\r
	ld bc,crc_len+2		;0410\r
	call do_crc16		;0413\r
	pop bc			;041d\r
	pop de\r
	pop hl			;041e\r
	ret			;041f\r
\r
;----------------------------------------------------------------------\r
\r
;\r
;  alloc\r
;\r
;	h:	max bank #\r
;	l:	min bank #\r
;	b:	max size\r
;	c:	min size\r
;\r
;    ret:\r
;	a: 	0  == ok\r
;		1  ==\r
;		2  == no bank # in requested range\r
;		ff == crc error\r
;\r
\r
sub_0420h:\r
	call checkcrc_alv	;0420\r
	jr nz,l049ch		;0424	crc error, tables corrupt\r
\r
	call sub_049dh		;0427	bank # in req. range available?\r
	jr c,l0499h		;042a\r
	push ix			;042c\r
	push iy			;042e\r
	push de			;0430\r
	push hl			;0431\r
	push bc			;0432\r
	ld c,b			;0433\r
	ld b,alv_len+1		;0434\r
	ld d,0			;0436\r
	ld hl,memalv-1		;0438\r
	jr l0441h		;043b\r
\r
; find free blocks\r
\r
l043dh:\r
	ld a,(hl)		;043d\r
	inc a			;043e	free blocks are marked 0ffh\r
	jr z,l0446h		;043f\r
l0441h:\r
	inc hl			;0441\r
	djnz l043dh		;0442\r
	jr l0464h		;0444\r
l0446h:\r
	push hl			;0446\r
	pop ix			;0447	free blocks start here\r
	ld e,000h		;0449\r
	jr l0451h		;044b\r
l044dh:				;	count free blocks\r
	ld a,(hl)		;044d\r
	inc a			;044e\r
	jr nz,l0457h		;044f\r
l0451h:\r
	inc e			;0451\r
	inc hl			;0452\r
	djnz l044dh		;0453\r
	jr l0464h		;0455\r
\r
; end of free blocks run.\r
\r
l0457h:\r
	ld a,d			;0457\r
	cp e			;0458	nr of blocks >= requested ?\r
	jr nc,l0441h		;0459\r
\r
	ld d,e			;045b\r
	push ix			;045c\r
	pop iy			;045e\r
	ld a,d			;0460\r
	cp c			;0461\r
	jr c,l0441h		;0462\r
l0464h:\r
	pop bc			;0464\r
	ld a,d			;0465\r
	cp b			;0466\r
	jr c,l046ch		;0467\r
	ld d,b			;0469\r
	jr l0471h		;046a\r
l046ch:\r
	cp c			;046c\r
	jr nc,l0471h		;046d\r
	ld d,000h		;046f\r
l0471h:\r
	ld a,d			;0471\r
	push iy			;0472\r
	pop hl			;0474\r
	ld de,memalv		;0475\r
	or a			;0478\r
	sbc hl,de		;0479\r
	ld b,l			;047b\r
	ld c,a			;047c\r
	pop hl			;047d\r
l047eh:\r
	or a			;047e\r
	jr z,l0489h		;047f\r
	ld (iy+0),l		;0481\r
	inc iy			;0484\r
	dec a			;0486\r
	jr l047eh		;0487\r
l0489h:\r
	pop de			;0489\r
	pop iy			;048a\r
	pop ix			;048c\r
	call gencrc_alv		;048e\r
	ld a,c			;0491\r
	or a			;0492\r
	ld a,000h		;0493\r
	ret nz			;0495\r
	or 001h			;0496\r
	ret			;0498\r
\r
l0499h:\r
	ld a,2			;0499\r
l049ch:\r
	or a\r
	ret			;049c\r
\r
\r
; search a free bank number in range\r
;	h: max #\r
;	l: min #\r
;    ret:\r
;	l: bank number available\r
;	nc, if found, bank nr. in l\r
;	cy, if none found\r
\r
sub_049dh:\r
	push de			;049d\r
	push bc			;049e\r
	ex de,hl		;049f\r
	dec e			;04a0\r
l04a1h:\r
	inc e			;04a1	test next #\r
	ld a,d			;04a2\r
	cp e			;04a3\r
	jr c,l04b1h		;04a4\r
	ld a,e			;04a6\r
	ld hl,memalv		;04a7\r
	ld bc,alv_len		;04aa\r
	cpir			;04ad	bank# allready allocated?\r
	jr z,l04a1h		;04af	if yes, search for next\r
l04b1h:\r
	ex de,hl		;04b1\r
	pop bc			;04b2\r
	pop de			;04b3\r
	ret			;04b4\r
\r
\r
sub_04b5h:\r
	ld a,l			;04b5\r
	cp 012h			;04b6\r
	ccf			;04b8\r
	ret c			;04b9\r
	push hl			;04ba\r
	ld hl,banktab		;04bb\r
	call add_hl_a\r
	ld (hl),b		;04c3\r
	call gencrc_alv		;04c4\r
	pop hl			;04c7\r
	or a			;04c8	clear carry\r
	ret			;04c9\r
\r
\r
;--------------------------------------------------------------\r
;\r
; de: Log. Address\r
;  a: Bank number\r
;\r
;out ahl: Phys. (linear) Address\r
\r
\r
bnk2phys:\r
	push	hl\r
	ld	hl,banktab\r
	call	add_hl_a\r
	ld	a,(hl)\r
	pop	hl\r
\r
	; fall thru\r
;--------------------------------------------------------------\r
;\r
; de: Log. Address\r
;  a: Bank (bbr)\r
;\r
; OP: ahl = (a<<12) + (d<<8) + e\r
;\r
;out ahl: Phys. (linear) Address\r
\r
\r
log2phys:\r
	push	bc		;\r
	ld	c,a		;\r
	ld	b,16		;\r
	mlt	bc		;bc = a<<4\r
	ld	l,d		;\r
	ld	h,0		;\r
	add	hl,bc		;bc + d == a<<4 + d\r
	ld	a,h		;\r
	ld	h,l		;\r
	ld	l,e		;\r
	pop	bc		;\r
	ret			;\r
\r
\r
;--------------------------------------------------------------\r
;\r
;return:\r
; hl = hl + a\r
; Flags undefined\r
;\r
\r
add_hl_a:\r
	add a,l\r
	ld l,a\r
	ret nc\r
	inc h\r
	ret\r
\r
; ---------------------------------------------------------\r
\r
sysramw:\r
\r
	.phase isvsw_loc\r
topcodsys:\r
\r
; Trampoline for interrupt routines in banked ram.\r
; Switch stack pointer to "system" stack in top ram\r
; Save cbar\r
\r
isv_sw:				;\r
	ex (sp),hl		;	save hl, return adr in hl\r
	push de			;\r
	push af			;\r
	ex de,hl		;\r
	ld hl,0			;\r
	add hl,sp		;\r
	ld a,h			;\r
	cp 0f8h			;\r
	jr nc,isw_1		;\r
	ld sp,$stack		;\r
isw_1:\r
	push hl			;\r
	in0 h,(cbar)		;\r
	push hl			;\r
	ld a,SYS$CBAR		;\r
	out0 (cbar),a		;\r
	ex de,hl		;\r
	ld e,(hl)		;\r
	inc hl			;\r
	ld d,(hl)		;\r
	ex de,hl		;\r
	push bc			;\r
	call jphl		;\r
\r
	pop bc			;\r
	pop hl			;\r
	out0 (cbar),h		;\r
	pop hl			;\r
	ld sp,hl		;\r
	pop af			;\r
	pop de			;\r
	pop hl			;\r
	ei			;\r
	ret			;\r
jphl:\r
	jp (hl)			;\r
\r
; ---------------------------------------------------------\r
\r
\r
iprt0:\r
	push	af\r
	push	hl\r
	in0	a,(tcr)\r
	in0	a,(tmdr0l)\r
	in0	a,(tmdr0h)\r
	ld	a,(tim_ms)\r
	inc	a\r
	cp	100\r
	jr	nz,iprt_1\r
	xor	a\r
	ld	hl,(tim_s)\r
	inc	hl\r
	ld	(tim_s),hl\r
iprt_1:\r
	ld	(tim_ms),a\r
	pop	hl\r
	pop	af\r
	ei\r
	ret\r
\r
; ---------------------------------------------------------\r
\r
sp.int0:\r
	ld	a,0d0h\r
	jr	sp.i.1\r
sp.int.len equ	$-sp.int0\r
	ld	a,0d1h\r
	jr	sp.i.1\r
	ld	a,0d2h\r
	jr	sp.i.1\r
	ld	a,0d3h\r
	jr	sp.i.1\r
	ld	a,0d4h\r
	jr	sp.i.1\r
	ld	a,0d5h\r
	jr	sp.i.1\r
	ld	a,0d6h\r
	jr	sp.i.1\r
	ld	a,0d7h\r
	jr	sp.i.1\r
	ld	a,0d8h\r
sp.i.1:\r
;	out	(80h),a\r
	halt\r
\r
curph	defl	$\r
	.dephase\r
sysrame:\r
	.phase curph\r
tim_ms:	db	0\r
tim_s:	dw	0\r
	.dephase\r
\r
;-----------------------------------------------------\r
\r
	dseg\r
\r
	ds	1\r
banktabsys:\r
	ds	1	;0c001h\r
	ds	1	;0c002h\r
banktab:\r
	ds	BANKS	;0c003h\r
memalv:\r
	ds	512/4		;Number of 4k blocks\r
alv_len	equ	$-memalv\r
crc_len	equ	$-banktabsys\r
\r
crc_memalv:\r
	ds	2	;\r
\r
	cseg\r
\r
	;.phase	0ffc0h\r
;ivtab	equ	0ffc0h		; 0ffc0h	;int vector table\r
	;.dephase\r
\r
	;.phase	0fffch\r
mark_55AA equ 0fffch\r
	;ds	4		; 0fffch\r
	;.dephase\r
\r
\r
	end\r
\r
Commit	Line	Data
a16ba2b0 L	1	page 255\r
	2	.z80\r
	3	\r
	4	extrn ddtz,bpent\r
	5	extrn $stack\r
	6	extrn $coninit,$cists,$ci\r
	7	\r
	8	extrn romend\r
	9	\r
	10	\r
	11	global isv_sw\r
	12	\r
	13	include config.inc\r
	14	include z180reg.inc\r
	15	include z180.lib\r
815c1735	16	\r
f4d5b4fe	17	;CR equ 0dh\r
a16ba2b0 L	18	\r
	19	\r
	20	\r
	21	;----------------------------------------------------------------------\r
	22	\r
	23	cseg\r
	24	\r
815c1735	25	jp start\r
a16ba2b0 L	26	\r
	27	; restart vectors\r
	28	\r
	29	rsti defl 1\r
	30	rept 7\r
	31	db 0, 0, 0, 0, 0\r
	32	jp bpent\r
	33	rsti defl rsti+1\r
	34	endm\r
	35	\r
	36	;----------------------------------------------------------------------\r
	37	\r
	38	if ROMSYS\r
	39	$crom: defb c$rom ;\r
	40	else\r
	41	db 0 ;\r
	42	endif\r
	43	\r
	44	dmclrt: ;clear ram per dma\r
	45	db dmct_e-dmclrt-2 ;\r
	46	db sar0l ;first port\r
815c1735	47	dw nullbyte ;src (fixed)\r
a16ba2b0 L	48	nullbyte:\r
	49	db 000h ;src\r
	50	dw romend ;dst (inc), start after "rom" code\r
	51	db 00h ;dst\r
	52	dw 0-romend ;count (64k)\r
	53	dmct_e:\r
	54	\r
a16ba2b0 L	55	INIWAITS defl CWAITIO\r
	56	if ROMSYS\r
	57	INIWAITS defl INIWAITS+CWAITROM\r
	58	endif\r
	59	\r
	60	hwini0:\r
	61	db 3 ;count\r
	62	db rcr,CREFSH ;configure DRAM refresh\r
	63	db dcntl,INIWAITS ;wait states\r
	64	db cbar,SYS$CBAR\r
	65	\r
	66	;----------------------------------------------------------------------\r
	67	\r
	68	start:\r
	69	push af ;003c\r
	70	in0 a,(itc) ;003d Illegal opcode trap?\r
	71	jp p,??st01 ;0040\r
	72	pop af ;0043\r
	73	jp bpent ;0044 yes, handle\r
	74	\r
	75	??st01:\r
815c1735	76	ld a,i ;0047 I register == 0 ?\r
a16ba2b0	77	jr z,??st02 ;004b yes, harware reset\r
815c1735	78	pop af ;004d\r
a16ba2b0 L	79	jp bpent ;004e no, allready set up\r
	80	\r
	81	??st02:\r
	82	di ;0058\r
	83	ld a,CREFSH\r
	84	out0 (rcr),a ; configure DRAM refresh\r
	85	ld a,CWAITIO\r
	86	out0 (dcntl),a ; wait states\r
	87	\r
815c1735 L	88	ld a,M_NCD ;No Clock Divide\r
	89	out0 (ccr),a\r
	90	ld a,M_X2CM ;X2 Clock Multiplier\r
	91	out0 (cmr),a\r
	92	\r
a16ba2b0 L	93	; search warm start mark\r
	94	\r
	95	ld ix,mark_55AA ;00b8 ; top of common area\r
	96	ld a,SYS$CBAR ;\r
	97	out0 (cbar),a ;\r
	98	ld a,071h ;00bc\r
	99	ex af,af' ;00be ;for cbr = 0x70 downto 0x40\r
	100	swsm_l:\r
815c1735	101	ex af,af' ;00bf\r
a16ba2b0 L	102	dec a ;00c0\r
	103	cp 03fh ;00c1\r
	104	jr z,kstart ;00c3 ; break (mark not found)\r
	105	out0 (cbr),a ;00c5\r
	106	ex af,af' ;00c8\r
	107	ld a,0aah ;00c9\r
	108	cp (ix+000h) ;00cb\r
	109	jr nz,swsm_l ;00ce\r
	110	cp (ix+002h) ;00d0\r
	111	jr nz,swsm_l ;00d3\r
	112	cpl ;00d5\r
	113	cp (ix+001h) ;00d6\r
	114	jr nz,swsm_l ;00d9\r
	115	cp (ix+003h) ;00db\r
	116	jr nz,swsm_l ;00de\r
	117	ld sp,$stack ;00e0 mark found, check\r
	118	call checkcrc_alv ;00e3\r
	119	jp z,wstart ;00e6 check ok,\r
	120	\r
	121	;\r
	122	; ram not ok, initialize -- kstart --\r
	123	\r
	124	kstart:\r
	125	\r
	126	ld a,088h ;00e9 0000-7fff: common 0\r
	127	out0 (cbar),a ;00eb 8000-ffff: common 1\r
	128	ld ix,08000h ;00f3\r
	129	ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
	130	??f_0:\r
	131	out0 (cbr),a ;00f9\r
	132	\r
815c1735	133	ld (ix+0),a ;0103\r
a16ba2b0	134	cpl\r
815c1735	135	ld (ix+1),a ;0103\r
a16ba2b0 L	136	cpl\r
	137	add a,8 ;010a next 'bank'\r
	138	cp 078h ;010c stop at 078000\r
	139	jr nz,??f_0 ;010e\r
	140	\r
	141	ld de,8000h ;0114 first block not tested, but mark as ok\r
	142	ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
	143	??cp_0:\r
	144	out0 (cbr),a ;011c\r
	145	ld c,a\r
	146	xor (ix+0)\r
	147	ld b,a\r
	148	ld a,c\r
	149	cpl\r
	150	xor (ix+1)\r
	151	or b\r
	152	jr nz,??cp_1\r
	153	scf\r
	154	??cp_1:\r
	155	rr d\r
	156	rr e\r
	157	ld a,c\r
	158	add a,8\r
	159	cp 078h ; stop at 078000\r
	160	jr nz,??cp_0\r
815c1735	161	\r
a16ba2b0 L	162	;\r
	163	; ram test found 1 or more error free blocks (32k)\r
	164	;\r
	165	\r
	166	ramok:\r
	167	ld a,SYS$CBAR ;01c8\r
	168	out0 (cbar),a ;01ca\r
	169	ld h,d\r
	170	ld l,e\r
	171	ld c,070h ;01ce highest block\r
	172	ld b,15 ;01d0\r
	173	??sr_1:\r
	174	add hl,hl\r
	175	jr c,alloc ;01d4 highest "error free" block\r
	176	ld a,c ;01d6\r
	177	sub 008h ;01d7\r
	178	ld c,a ;01d9\r
	179	djnz ??sr_1 ;01da\r
	180	\r
	181	slp ;01dc should never be reached\r
	182	\r
	183	alloc:\r
	184	out0 (cbr),c ;01de\r
	185	ld sp,$stack ;01e1\r
815c1735	186	\r
a16ba2b0 L	187	; Clear RAM using DMA0\r
	188	\r
	189	ld hl,dmclrt ;load DMA registers\r
	190	call io.ini.m\r
	191	ld a,0cbh ;01ef dst +1, src fixed, burst\r
	192	out0 (dmode),a ;01f1\r
	193	\r
	194	ld b,512/64\r
815c1735	195	ld a,062h ;01f4 enable dma0,\r
a16ba2b0 L	196	??cl_1:\r
	197	out0 (dstat),a ;01f9 clear (up to) 64k\r
	198	djnz ??cl_1 ; end of RAM?\r
815c1735	199	\r
a16ba2b0	200	; Init bank manager\r
815c1735	201	\r
a16ba2b0 L	202	ld hl,banktabsys ;020f\r
	203	ld (hl),c ; Common area\r
	204	inc hl ;0213\r
	205	ld (hl),c ; System work area\r
	206	inc hl ;0215 Point to bank 0 entry\r
	207	ld b,BANKS ;0216\r
	208	l0218h:\r
	209	ld (hl),0ffh ;0218 Mark all banks as unassigned\r
	210	inc hl ;021a\r
	211	djnz l0218h ;021b\r
	212	\r
	213	ld hl,memalv ;\r
	214	ld b,8 ; 8*4k ie. first 32k\r
	215	??a_0:\r
	216	ld (hl),0e0h ; mark as sys ("rom"/monitor)\r
	217	inc hl\r
	218	djnz ??a_0\r
815c1735	219	\r
a16ba2b0 L	220	rr d ; shift out bit for block 0\r
	221	rr e ;\r
	222	ld c,15 ;022c 15*32k remaining blocks\r
	223	l022eh:\r
	224	ld a,0feh ; 0xfe == block with error(s)\r
	225	rr d ;\r
	226	rr e\r
	227	adc a,0 ; ==> 0xff : block ok\r
815c1735	228	ld b,32/4 ; 32k == 8 * 4k\r
a16ba2b0 L	229	l0236h:\r
	230	ld (hl),a ;\r
	231	inc hl ;\r
	232	djnz l0236h ;\r
	233	dec c ;\r
	234	jr nz,l022eh ;next 32k block\r
815c1735	235	\r
a16ba2b0 L	236	ld hl,memalv+0ch ;memalv+0ch\r
	237	ld a,(banktabsys) ;\r
	238	call add_hl_a\r
	239	ld b,3 ;\r
	240	l024ah:\r
	241	ld (hl),0ech ;alloc system ram\r
	242	inc hl ;\r
	243	djnz l024ah ;\r
	244	ld (hl),0efh ;alloc common\r
	245	call gencrc_alv\r
	246	\r
815c1735	247	ld hl,0000h ;bank #\r
a16ba2b0 L	248	ld bc,0f0fh ; size (?) (4k blocks)\r
	249	xor a ;\r
	250	call sub_0420h ;alloc mem for bank 0\r
	251	ld c,l ;\r
	252	or a ;\r
	253	call z,sub_04b5h ;\r
	254	\r
	255	ld hl,0101h ;\r
	256	ld bc,0f0fh ;\r
	257	xor a ;\r
	258	call sub_0420h ;\r
	259	ld c,l ;\r
	260	or a ;\r
	261	call z,sub_04b5h ;\r
	262	\r
	263	ld hl,055AAh ;set warm start mark\r
	264	ld (mark_55AA),hl ;\r
	265	ld (mark_55AA+2),hl;\r
	266	\r
	267	;\r
	268	; crc ok -- wstart --\r
	269	;\r
	270	wstart:\r
	271	call sysram_init ;027f\r
	272	call ivtab_init\r
	273	\r
	274	call prt0_init\r
	275	\r
	276	\r
4caee1ec	277	;;; call bufferinit\r
a16ba2b0 L	278	\r
	279	\r
	280	call $coninit\r
	281	\r
	282	\r
	283	\r
	284	\r
	285	im 2 ;?030e\r
	286	ei ;0282\r
	287	\r
	288	call $cists ;0284\r
	289	call $cists ;0287\r
	290	or a ;028a\r
	291	call nz,$ci ;028d\r
815c1735 L	292	\r
	293	ld a,(banktab) ;\r
	294	ld e,a ;\r
a16ba2b0	295	jp ddtz ;0290\r
815c1735	296	\r
a16ba2b0 L	297	\r
	298	;\r
	299	;----------------------------------------------------------------------\r
	300	;\r
	301	\r
a16ba2b0 L	302	;TODO: Make a ringbuffer module.\r
	303	\r
	304	global buf.init\r
815c1735	305	\r
a16ba2b0 L	306	buf.init:\r
	307	ld (ix+o.in_idx),0\r
	308	ld (ix+o.out_idx),0\r
	309	ld (ix+o.mask),a\r
	310	ret\r
	311	\r
	312	;----------------------------------------------------------------------\r
	313	\r
4caee1ec L	314	.comment *\r
	315	\r
	316	extrn msginit,msg.sout,msg_fifo\r
	317	extrn tx.buf,rx.buf\r
	318	\r
	319	\r
a16ba2b0 L	320	bufferinit:\r
a16ba2b0 L	321	call msginit\r
815c1735	322	\r
a16ba2b0 L	323	ld hl,buffers\r
	324	ld bc,0300h\r
	325	bfi_1:\r
	326	ld e,(hl)\r
	327	inc hl\r
	328	ld d,(hl)\r
	329	inc hl\r
	330	push hl\r
	331	in0 a,cbr\r
	332	call log2phys\r
	333	ld (bufdat+1),hl\r
	334	ld (bufdat+3),a\r
	335	ld a,c\r
	336	ld (bufdat+0),a\r
	337	ld hl,inimsg\r
	338	call msg.sout\r
	339	pop hl\r
	340	inc c\r
	341	djnz bfi_1\r
	342	ret\r
	343	\r
	344	rept 20\r
	345	db 0\r
	346	endm\r
815c1735	347	\r
a16ba2b0 L	348	buffers:\r
	349	dw msg_fifo\r
	350	dw tx.buf\r
	351	dw rx.buf\r
815c1735 L	352	\r
815c1735 L	353	inimsg:\r
a16ba2b0 L	354	db inimsg_e - $ -2\r
	355	db PMSG\r
	356	db 81h\r
	357	db inimsg_e - $ -1\r
	358	db 0\r
	359	bufdat:\r
	360	db 0\r
	361	dw 0\r
	362	db 0\r
e598b357	363	inimsg_e:\r
a16ba2b0	364	\r
4caee1ec L	365	*\r
4caee1ec L	366	\r
a16ba2b0 L	367	;\r
	368	;----------------------------------------------------------------------\r
	369	;\r
	370	\r
	371	sysram_init:\r
	372	ld hl,sysramw\r
	373	ld de,topcodsys\r
	374	ld bc,sysrame-sysramw\r
	375	ldir\r
	376	\r
	377	ret\r
	378	\r
	379	;----------------------------------------------------------------------\r
	380	\r
	381	ivtab_init:\r
	382	ld hl,ivtab ;\r
	383	ld a,h ;\r
	384	ld i,a ;\r
	385	out0 (il),l ;\r
	386	\r
	387	; Let all vectors point to spurious int routines.\r
	388	\r
	389	ld d,high sp.int0\r
	390	ld a,low sp.int0\r
	391	ld b,9\r
815c1735	392	ivt_i1:\r
a16ba2b0 L	393	ld (hl),a\r
	394	inc l\r
	395	ld (hl),d\r
	396	inc l\r
	397	add a,sp.int.len\r
	398	djnz ivt_i1\r
	399	ret\r
	400	\r
4caee1ec	401	;----------------------------------------------------------------------\r
a16ba2b0 L	402	\r
	403	prt0_init:\r
	404	ld a,i\r
	405	ld h,a\r
	406	in0 a,(il)\r
	407	and 0E0h\r
	408	or IV$PRT0\r
	409	ld l,a\r
	410	ld (hl),low iprt0\r
	411	inc hl\r
	412	ld (hl),high iprt0\r
	413	ld hl,prt0itab\r
	414	call io.ini.m\r
	415	ret\r
815c1735	416	\r
a16ba2b0 L	417	prt0itab:\r
	418	db prt0it_e-prt0itab-2\r
	419	db tmdr0l\r
	420	dw PRT_TC10MS\r
	421	dw PRT_TC10MS\r
	422	db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r
	423	prt0it_e:\r
	424	\r
4caee1ec	425	\r
a16ba2b0 L	426	;\r
	427	;----------------------------------------------------------------------\r
	428	;\r
	429	\r
	430	io.ini:\r
	431	push bc\r
	432	ld b,0 ;high byte port adress\r
	433	ld a,(hl) ;count\r
	434	inc hl\r
	435	ioi_1:\r
	436	ld c,(hl) ;port address\r
	437	inc hl\r
	438	outi\r
	439	inc b ;outi decrements b\r
	440	dec a\r
	441	jr nz,ioi_1\r
	442	pop bc\r
	443	ret\r
	444	\r
	445	io.ini.m:\r
	446	push bc\r
	447	ld b,(hl)\r
	448	inc hl\r
	449	ld c,(hl)\r
	450	inc hl\r
815c1735 L	451	otimr\r
815c1735 L	452	pop bc\r
a16ba2b0	453	ret\r
815c1735	454	\r
a16ba2b0 L	455	io.ini.l:\r
	456	;\r
	457	\r
	458	;----------------------------------------------------------------------\r
	459	;\r
	460	\r
	461	; compute crc\r
	462	; hl: start adr\r
	463	; bc: len\r
	464	; bc returns crc val\r
	465	\r
	466	do_crc16:\r
	467	ld de,0FFFFh\r
	468	crc1:\r
	469	ld a,(hl)\r
	470	xor e\r
	471	ld e,a\r
	472	rrca\r
	473	rrca\r
	474	rrca\r
	475	rrca\r
	476	and 0Fh\r
	477	xor e\r
	478	ld e,a\r
	479	rrca\r
	480	rrca\r
	481	rrca\r
	482	push af\r
	483	and 1Fh\r
	484	xor d\r
	485	ld d,a\r
	486	pop af\r
	487	push af\r
	488	rrca\r
	489	and 0F0h\r
	490	xor d\r
	491	ld d,a\r
	492	pop af\r
	493	and 0E0h\r
	494	xor e\r
	495	ld e,d\r
	496	ld d,a\r
	497	cpi\r
	498	jp pe,crc1\r
	499	or e ;z-flag\r
	500	ret\r
	501	\r
	502	\r
	503	gencrc_alv:\r
	504	push hl ;03f6\r
	505	push de ;03f7\r
	506	push bc\r
	507	push af ;03f8\r
	508	ld hl,banktabsys ;03f9\r
	509	ld bc,crc_len ;03fc\r
	510	call do_crc16 ;03ff\r
	511	ld (hl),e\r
	512	inc hl\r
	513	ld (hl),d\r
	514	pop af ;0406\r
	515	pop bc\r
	516	pop de ;0407\r
	517	pop hl ;0408\r
	518	ret ;0409\r
519	\r
520	checkcrc_alv:\r
521	push hl ;040a\r
522	push de\r
523	push bc ;040b\r
524	ld hl,banktabsys ;040d\r
525	ld bc,crc_len+2 ;0410\r
526	call do_crc16 ;0413\r
527	pop bc ;041d\r
528	pop de\r
529	pop hl ;041e\r
530	ret ;041f\r
531	\r
4caee1ec L	532	;----------------------------------------------------------------------\r
4caee1ec L	533	\r
a16ba2b0 L	534	;\r
	535	; alloc\r
	536	;\r
	537	; h: max bank #\r
	538	; l: min bank #\r
	539	; b: max size\r
	540	; c: min size\r
	541	;\r
	542	; ret:\r
	543	; a: 0 == ok\r
815c1735	544	; 1 ==\r
a16ba2b0 L	545	; 2 == no bank # in requested range\r
	546	; ff == crc error\r
	547	;\r
	548	\r
	549	sub_0420h:\r
	550	call checkcrc_alv ;0420\r
	551	jr nz,l049ch ;0424 crc error, tables corrupt\r
815c1735	552	\r
a16ba2b0 L	553	call sub_049dh ;0427 bank # in req. range available?\r
	554	jr c,l0499h ;042a\r
	555	push ix ;042c\r
	556	push iy ;042e\r
	557	push de ;0430\r
	558	push hl ;0431\r
	559	push bc ;0432\r
	560	ld c,b ;0433\r
	561	ld b,alv_len+1 ;0434\r
	562	ld d,0 ;0436\r
	563	ld hl,memalv-1 ;0438\r
	564	jr l0441h ;043b\r
	565	\r
	566	; find free blocks\r
	567	\r
	568	l043dh:\r
	569	ld a,(hl) ;043d\r
	570	inc a ;043e free blocks are marked 0ffh\r
	571	jr z,l0446h ;043f\r
	572	l0441h:\r
	573	inc hl ;0441\r
	574	djnz l043dh ;0442\r
	575	jr l0464h ;0444\r
	576	l0446h:\r
815c1735	577	push hl ;0446\r
a16ba2b0 L	578	pop ix ;0447 free blocks start here\r
	579	ld e,000h ;0449\r
	580	jr l0451h ;044b\r
	581	l044dh: ; count free blocks\r
	582	ld a,(hl) ;044d\r
	583	inc a ;044e\r
	584	jr nz,l0457h ;044f\r
	585	l0451h:\r
	586	inc e ;0451\r
	587	inc hl ;0452\r
	588	djnz l044dh ;0453\r
	589	jr l0464h ;0455\r
	590	\r
815c1735	591	; end of free blocks run.\r
a16ba2b0 L	592	\r
	593	l0457h:\r
	594	ld a,d ;0457\r
	595	cp e ;0458 nr of blocks >= requested ?\r
815c1735	596	jr nc,l0441h ;0459\r
a16ba2b0 L	597	\r
	598	ld d,e ;045b\r
	599	push ix ;045c\r
	600	pop iy ;045e\r
	601	ld a,d ;0460\r
	602	cp c ;0461\r
	603	jr c,l0441h ;0462\r
	604	l0464h:\r
	605	pop bc ;0464\r
	606	ld a,d ;0465\r
	607	cp b ;0466\r
	608	jr c,l046ch ;0467\r
	609	ld d,b ;0469\r
	610	jr l0471h ;046a\r
	611	l046ch:\r
	612	cp c ;046c\r
	613	jr nc,l0471h ;046d\r
	614	ld d,000h ;046f\r
	615	l0471h:\r
	616	ld a,d ;0471\r
	617	push iy ;0472\r
	618	pop hl ;0474\r
	619	ld de,memalv ;0475\r
	620	or a ;0478\r
	621	sbc hl,de ;0479\r
	622	ld b,l ;047b\r
	623	ld c,a ;047c\r
	624	pop hl ;047d\r
	625	l047eh:\r
	626	or a ;047e\r
	627	jr z,l0489h ;047f\r
	628	ld (iy+0),l ;0481\r
	629	inc iy ;0484\r
	630	dec a ;0486\r
	631	jr l047eh ;0487\r
	632	l0489h:\r
	633	pop de ;0489\r
	634	pop iy ;048a\r
	635	pop ix ;048c\r
	636	call gencrc_alv ;048e\r
	637	ld a,c ;0491\r
	638	or a ;0492\r
	639	ld a,000h ;0493\r
	640	ret nz ;0495\r
	641	or 001h ;0496\r
	642	ret ;0498\r
	643	\r
	644	l0499h:\r
	645	ld a,2 ;0499\r
	646	l049ch:\r
	647	or a\r
	648	ret ;049c\r
	649	\r
	650	\r
	651	; search a free bank number in range\r
	652	; h: max #\r
	653	; l: min #\r
	654	; ret:\r
	655	; l: bank number available\r
	656	; nc, if found, bank nr. in l\r
	657	; cy, if none found\r
	658	\r
	659	sub_049dh:\r
	660	push de ;049d\r
661	push bc ;049e\r
662	ex de,hl ;049f\r
663	dec e ;04a0\r
664	l04a1h:\r
665	inc e ;04a1 test next #\r
666	ld a,d ;04a2\r
667	cp e ;04a3\r
815c1735	668	jr c,l04b1h ;04a4\r
a16ba2b0 L	669	ld a,e ;04a6\r
	670	ld hl,memalv ;04a7\r
	671	ld bc,alv_len ;04aa\r
	672	cpir ;04ad bank# allready allocated?\r
	673	jr z,l04a1h ;04af if yes, search for next\r
	674	l04b1h:\r
	675	ex de,hl ;04b1\r
	676	pop bc ;04b2\r
	677	pop de ;04b3\r
	678	ret ;04b4\r
	679	\r
	680	\r
	681	sub_04b5h:\r
	682	ld a,l ;04b5\r
	683	cp 012h ;04b6\r
	684	ccf ;04b8\r
	685	ret c ;04b9\r
	686	push hl ;04ba\r
	687	ld hl,banktab ;04bb\r
	688	call add_hl_a\r
	689	ld (hl),b ;04c3\r
	690	call gencrc_alv ;04c4\r
	691	pop hl ;04c7\r
	692	or a ;04c8 clear carry\r
	693	ret ;04c9\r
	694	\r
	695	\r
	696	;--------------------------------------------------------------\r
	697	;\r
	698	; de: Log. Address\r
	699	; a: Bank number\r
	700	;\r
	701	;out ahl: Phys. (linear) Address\r
	702	\r
	703	\r
	704	bnk2phys:\r
	705	push hl\r
	706	ld hl,banktab\r
	707	call add_hl_a\r
	708	ld a,(hl)\r
	709	pop hl\r
	710	\r
	711	; fall thru\r
	712	;--------------------------------------------------------------\r
	713	;\r
	714	; de: Log. Address\r
	715	; a: Bank (bbr)\r
	716	;\r
	717	; OP: ahl = (a<<12) + (d<<8) + e\r
	718	;\r
4caee1ec	719	;out ahl: Phys. (linear) Address\r
a16ba2b0 L	720	\r
	721	\r
	722	log2phys:\r
	723	push bc ;\r
	724	ld c,a ;\r
	725	ld b,16 ;\r
	726	mlt bc ;bc = a<<4\r
	727	ld l,d ;\r
	728	ld h,0 ;\r
815c1735	729	add hl,bc ;bc + d == a<<4 + d\r
a16ba2b0 L	730	ld a,h ;\r
	731	ld h,l ;\r
	732	ld l,e ;\r
	733	pop bc ;\r
	734	ret ;\r
	735	\r
	736	\r
	737	;--------------------------------------------------------------\r
	738	;\r
	739	;return:\r
	740	; hl = hl + a\r
	741	; Flags undefined\r
	742	;\r
	743	\r
	744	add_hl_a:\r
815c1735 L	745	add a,l\r
	746	ld l,a\r
	747	ret nc\r
	748	inc h\r
	749	ret\r
a16ba2b0 L	750	\r
	751	; ---------------------------------------------------------\r
	752	\r
	753	sysramw:\r
	754	\r
	755	.phase isvsw_loc\r
	756	topcodsys:\r
	757	\r
	758	; Trampoline for interrupt routines in banked ram.\r
	759	; Switch stack pointer to "system" stack in top ram\r
	760	; Save cbar\r
815c1735	761	\r
a16ba2b0 L	762	isv_sw: ;\r
	763	ex (sp),hl ; save hl, return adr in hl\r
	764	push de ;\r
	765	push af ;\r
	766	ex de,hl ;\r
	767	ld hl,0 ;\r
	768	add hl,sp ;\r
	769	ld a,h ;\r
	770	cp 0f8h ;\r
	771	jr nc,isw_1 ;\r
	772	ld sp,$stack ;\r
	773	isw_1:\r
	774	push hl ;\r
	775	in0 h,(cbar) ;\r
	776	push hl ;\r
	777	ld a,SYS$CBAR ;\r
	778	out0 (cbar),a ;\r
	779	ex de,hl ;\r
	780	ld e,(hl) ;\r
	781	inc hl ;\r
	782	ld d,(hl) ;\r
	783	ex de,hl ;\r
	784	push bc ;\r
	785	call jphl ;\r
	786	\r
	787	pop bc ;\r
	788	pop hl ;\r
	789	out0 (cbar),h ;\r
	790	pop hl ;\r
	791	ld sp,hl ;\r
	792	pop af ;\r
	793	pop de ;\r
	794	pop hl ;\r
	795	ei ;\r
	796	ret ;\r
	797	jphl:\r
	798	jp (hl) ;\r
	799	\r
	800	; ---------------------------------------------------------\r
	801	\r
4caee1ec	802	\r
a16ba2b0 L	803	iprt0:\r
	804	push af\r
	805	push hl\r
	806	in0 a,(tcr)\r
	807	in0 a,(tmdr0l)\r
	808	in0 a,(tmdr0h)\r
	809	ld a,(tim_ms)\r
	810	inc a\r
	811	cp 100\r
	812	jr nz,iprt_1\r
	813	xor a\r
	814	ld hl,(tim_s)\r
	815	inc hl\r
	816	ld (tim_s),hl\r
	817	iprt_1:\r
	818	ld (tim_ms),a\r
	819	pop hl\r
	820	pop af\r
	821	ei\r
	822	ret\r
	823	\r
	824	; ---------------------------------------------------------\r
	825	\r
	826	sp.int0:\r
	827	ld a,0d0h\r
	828	jr sp.i.1\r
	829	sp.int.len equ $-sp.int0\r
	830	ld a,0d1h\r
	831	jr sp.i.1\r
	832	ld a,0d2h\r
	833	jr sp.i.1\r
	834	ld a,0d3h\r
	835	jr sp.i.1\r
	836	ld a,0d4h\r
	837	jr sp.i.1\r
	838	ld a,0d5h\r
	839	jr sp.i.1\r
	840	ld a,0d6h\r
	841	jr sp.i.1\r
	842	ld a,0d7h\r
	843	jr sp.i.1\r
	844	ld a,0d8h\r
	845	sp.i.1:\r
	846	; out (80h),a\r
	847	halt\r
	848	\r
	849	curph defl $\r
	850	.dephase\r
	851	sysrame:\r
	852	.phase curph\r
	853	tim_ms: db 0\r
	854	tim_s: dw 0\r
	855	.dephase\r
815c1735	856	\r
a16ba2b0 L	857	;-----------------------------------------------------\r
	858	\r
	859	dseg\r
	860	\r
	861	ds 1\r
	862	banktabsys:\r
	863	ds 1 ;0c001h\r
	864	ds 1 ;0c002h\r
	865	banktab:\r
	866	ds BANKS ;0c003h\r
	867	memalv:\r
	868	ds 512/4 ;Number of 4k blocks\r
	869	alv_len equ $-memalv\r
	870	crc_len equ $-banktabsys\r
	871	\r
815c1735	872	crc_memalv:\r
a16ba2b0 L	873	ds 2 ;\r
	874	\r
	875	cseg\r
	876	\r
	877	;.phase 0ffc0h\r
	878	;ivtab equ 0ffc0h ; 0ffc0h ;int vector table\r
	879	;.dephase\r
	880	\r
	881	;.phase 0fffch\r
	882	mark_55AA equ 0fffch\r
	883	;ds 4 ; 0fffch\r
	884	;.dephase\r
	885	\r
	886	\r
	887	end\r
	888	\r