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Disable msg- i/o-fifos for test with avr
[z180-stamp.git] / z180 / r3init.180
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1 page 255\r
2 .z80\r
3\r
4 extrn ddtz,bpent\r
5 extrn $stack\r
6 extrn $coninit,$cists,$ci\r
7\r
8 extrn romend\r
9\r
10\r
11 global isv_sw\r
12\r
13 include config.inc\r
14 include z180reg.inc\r
15 include z180.lib\r
16 \r
f4d5b4fe 17;CR equ 0dh\r
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18\r
19\r
20\r
21;----------------------------------------------------------------------\r
22\r
23 cseg\r
24\r
25 jp start \r
26\r
27; restart vectors\r
28\r
29rsti defl 1\r
30 rept 7\r
31 db 0, 0, 0, 0, 0\r
32 jp bpent\r
33rsti defl rsti+1\r
34 endm\r
35\r
36;----------------------------------------------------------------------\r
37\r
38 if ROMSYS\r
39$crom: defb c$rom ;\r
40 else\r
41 db 0 ;\r
42 endif\r
43\r
44dmclrt: ;clear ram per dma\r
45 db dmct_e-dmclrt-2 ;\r
46 db sar0l ;first port\r
47 dw nullbyte ;src (fixed) \r
48nullbyte:\r
49 db 000h ;src\r
50 dw romend ;dst (inc), start after "rom" code\r
51 db 00h ;dst\r
52 dw 0-romend ;count (64k)\r
53dmct_e:\r
54\r
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55INIWAITS defl CWAITIO\r
56 if ROMSYS\r
57INIWAITS defl INIWAITS+CWAITROM\r
58 endif\r
59\r
60hwini0:\r
61 db 3 ;count\r
62 db rcr,CREFSH ;configure DRAM refresh\r
63 db dcntl,INIWAITS ;wait states\r
64 db cbar,SYS$CBAR\r
65\r
66;----------------------------------------------------------------------\r
67\r
68start:\r
69 push af ;003c\r
70 in0 a,(itc) ;003d Illegal opcode trap?\r
71 jp p,??st01 ;0040\r
72 pop af ;0043\r
73 jp bpent ;0044 yes, handle\r
74\r
75??st01:\r
76 ld a,i ;0047 I register == 0 ? \r
77 jr z,??st02 ;004b yes, harware reset\r
78 pop af ;004d \r
79 jp bpent ;004e no, allready set up\r
80\r
81??st02:\r
82 di ;0058\r
83 ld a,CREFSH\r
84 out0 (rcr),a ; configure DRAM refresh\r
85 ld a,CWAITIO\r
86 out0 (dcntl),a ; wait states\r
87\r
88; search warm start mark\r
89\r
90 ld ix,mark_55AA ;00b8 ; top of common area\r
91 ld a,SYS$CBAR ;\r
92 out0 (cbar),a ;\r
93 ld a,071h ;00bc\r
94 ex af,af' ;00be ;for cbr = 0x70 downto 0x40\r
95swsm_l:\r
96 ex af,af' ;00bf \r
97 dec a ;00c0\r
98 cp 03fh ;00c1\r
99 jr z,kstart ;00c3 ; break (mark not found)\r
100 out0 (cbr),a ;00c5\r
101 ex af,af' ;00c8\r
102 ld a,0aah ;00c9\r
103 cp (ix+000h) ;00cb\r
104 jr nz,swsm_l ;00ce\r
105 cp (ix+002h) ;00d0\r
106 jr nz,swsm_l ;00d3\r
107 cpl ;00d5\r
108 cp (ix+001h) ;00d6\r
109 jr nz,swsm_l ;00d9\r
110 cp (ix+003h) ;00db\r
111 jr nz,swsm_l ;00de\r
112 ld sp,$stack ;00e0 mark found, check\r
113 call checkcrc_alv ;00e3\r
114 jp z,wstart ;00e6 check ok,\r
115\r
116;\r
117; ram not ok, initialize -- kstart --\r
118\r
119kstart:\r
120\r
121 ld a,088h ;00e9 0000-7fff: common 0\r
122 out0 (cbar),a ;00eb 8000-ffff: common 1\r
123 ld ix,08000h ;00f3\r
124 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
125??f_0:\r
126 out0 (cbr),a ;00f9\r
127\r
128 ld (ix+0),a ;0103 \r
129 cpl\r
130 ld (ix+1),a ;0103 \r
131 cpl\r
132 add a,8 ;010a next 'bank'\r
133 cp 078h ;010c stop at 078000\r
134 jr nz,??f_0 ;010e\r
135\r
136 ld de,8000h ;0114 first block not tested, but mark as ok\r
137 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
138??cp_0:\r
139 out0 (cbr),a ;011c\r
140 ld c,a\r
141 xor (ix+0)\r
142 ld b,a\r
143 ld a,c\r
144 cpl\r
145 xor (ix+1)\r
146 or b\r
147 jr nz,??cp_1\r
148 scf\r
149??cp_1:\r
150 rr d\r
151 rr e\r
152 ld a,c\r
153 add a,8\r
154 cp 078h ; stop at 078000\r
155 jr nz,??cp_0\r
156 \r
157;\r
158; ram test found 1 or more error free blocks (32k)\r
159;\r
160\r
161ramok:\r
162 ld a,SYS$CBAR ;01c8\r
163 out0 (cbar),a ;01ca\r
164 ld h,d\r
165 ld l,e\r
166 ld c,070h ;01ce highest block\r
167 ld b,15 ;01d0\r
168??sr_1:\r
169 add hl,hl\r
170 jr c,alloc ;01d4 highest "error free" block\r
171 ld a,c ;01d6\r
172 sub 008h ;01d7\r
173 ld c,a ;01d9\r
174 djnz ??sr_1 ;01da\r
175\r
176 slp ;01dc should never be reached\r
177\r
178alloc:\r
179 out0 (cbr),c ;01de\r
180 ld sp,$stack ;01e1\r
181 \r
182; Clear RAM using DMA0\r
183\r
184 ld hl,dmclrt ;load DMA registers\r
185 call io.ini.m\r
186 ld a,0cbh ;01ef dst +1, src fixed, burst\r
187 out0 (dmode),a ;01f1\r
188\r
189 ld b,512/64\r
190 ld a,062h ;01f4 enable dma0, \r
191??cl_1:\r
192 out0 (dstat),a ;01f9 clear (up to) 64k\r
193 djnz ??cl_1 ; end of RAM?\r
194 \r
195; Init bank manager\r
196 \r
197 ld hl,banktabsys ;020f\r
198 ld (hl),c ; Common area\r
199 inc hl ;0213\r
200 ld (hl),c ; System work area\r
201 inc hl ;0215 Point to bank 0 entry\r
202 ld b,BANKS ;0216\r
203l0218h:\r
204 ld (hl),0ffh ;0218 Mark all banks as unassigned\r
205 inc hl ;021a\r
206 djnz l0218h ;021b\r
207\r
208 ld hl,memalv ;\r
209 ld b,8 ; 8*4k ie. first 32k\r
210??a_0:\r
211 ld (hl),0e0h ; mark as sys ("rom"/monitor)\r
212 inc hl\r
213 djnz ??a_0\r
214 \r
215 rr d ; shift out bit for block 0\r
216 rr e ;\r
217 ld c,15 ;022c 15*32k remaining blocks\r
218l022eh:\r
219 ld a,0feh ; 0xfe == block with error(s)\r
220 rr d ;\r
221 rr e\r
222 adc a,0 ; ==> 0xff : block ok\r
223 ld b,32/4 ; 32k == 8 * 4k \r
224l0236h:\r
225 ld (hl),a ;\r
226 inc hl ;\r
227 djnz l0236h ;\r
228 dec c ;\r
229 jr nz,l022eh ;next 32k block\r
230 \r
231 ld hl,memalv+0ch ;memalv+0ch\r
232 ld a,(banktabsys) ;\r
233 call add_hl_a\r
234 ld b,3 ;\r
235l024ah:\r
236 ld (hl),0ech ;alloc system ram\r
237 inc hl ;\r
238 djnz l024ah ;\r
239 ld (hl),0efh ;alloc common\r
240 call gencrc_alv\r
241\r
242 ld hl,0000h ;bank # \r
243 ld bc,0f0fh ; size (?) (4k blocks)\r
244 xor a ;\r
245 call sub_0420h ;alloc mem for bank 0\r
246 ld c,l ;\r
247 or a ;\r
248 call z,sub_04b5h ;\r
249\r
250 ld hl,0101h ;\r
251 ld bc,0f0fh ;\r
252 xor a ;\r
253 call sub_0420h ;\r
254 ld c,l ;\r
255 or a ;\r
256 call z,sub_04b5h ;\r
257\r
258 ld hl,055AAh ;set warm start mark\r
259 ld (mark_55AA),hl ;\r
260 ld (mark_55AA+2),hl;\r
261\r
262;\r
263; crc ok -- wstart --\r
264;\r
265wstart:\r
266 call sysram_init ;027f\r
267 call ivtab_init\r
268\r
269 call prt0_init\r
270\r
271\r
4caee1ec 272;;; call bufferinit\r
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273\r
274\r
275 call $coninit\r
276\r
277\r
278\r
279\r
280 im 2 ;?030e\r
281 ei ;0282\r
282\r
283 call $cists ;0284\r
284 call $cists ;0287\r
285 or a ;028a\r
286 call nz,$ci ;028d\r
287 \r
288 ld a,(banktab) ; \r
289 ld e,a ; \r
290 jp ddtz ;0290\r
291 \r
292\r
293;\r
294;----------------------------------------------------------------------\r
295;\r
296\r
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297;TODO: Make a ringbuffer module.\r
298\r
299 global buf.init\r
300 \r
301buf.init:\r
302 ld (ix+o.in_idx),0\r
303 ld (ix+o.out_idx),0\r
304 ld (ix+o.mask),a\r
305 ret\r
306\r
307;----------------------------------------------------------------------\r
308\r
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309.comment *\r
310\r
311 extrn msginit,msg.sout,msg_fifo\r
312 extrn tx.buf,rx.buf\r
313\r
314\r
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315bufferinit:\r
316 call msginit\r
317 \r
318 ld hl,buffers\r
319 ld bc,0300h\r
320bfi_1:\r
321 ld e,(hl)\r
322 inc hl\r
323 ld d,(hl)\r
324 inc hl\r
325 push hl\r
326 in0 a,cbr\r
327 call log2phys\r
328 ld (bufdat+1),hl\r
329 ld (bufdat+3),a\r
330 ld a,c\r
331 ld (bufdat+0),a\r
332 ld hl,inimsg\r
333 call msg.sout\r
334 pop hl\r
335 inc c\r
336 djnz bfi_1\r
337 ret\r
338\r
339 rept 20\r
340 db 0\r
341 endm\r
342 \r
343buffers:\r
344 dw msg_fifo\r
345 dw tx.buf\r
346 dw rx.buf\r
347 \r
348inimsg: \r
349 db inimsg_e - $ -2\r
350 db PMSG\r
351 db 81h\r
352 db inimsg_e - $ -1\r
353 db 0\r
354bufdat:\r
355 db 0\r
356 dw 0\r
357 db 0\r
e598b357 358inimsg_e:\r
a16ba2b0 359\r
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360 *\r
361\r
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362;\r
363;----------------------------------------------------------------------\r
364;\r
365\r
366sysram_init:\r
367 ld hl,sysramw\r
368 ld de,topcodsys\r
369 ld bc,sysrame-sysramw\r
370 ldir\r
371\r
372 ret\r
373\r
374;----------------------------------------------------------------------\r
375\r
376ivtab_init:\r
377 ld hl,ivtab ;\r
378 ld a,h ;\r
379 ld i,a ;\r
380 out0 (il),l ;\r
381\r
382; Let all vectors point to spurious int routines.\r
383\r
384 ld d,high sp.int0\r
385 ld a,low sp.int0\r
386 ld b,9\r
387ivt_i1: \r
388 ld (hl),a\r
389 inc l\r
390 ld (hl),d\r
391 inc l\r
392 add a,sp.int.len\r
393 djnz ivt_i1\r
394 ret\r
395\r
4caee1ec 396;----------------------------------------------------------------------\r
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397\r
398prt0_init:\r
399 ld a,i\r
400 ld h,a\r
401 in0 a,(il)\r
402 and 0E0h\r
403 or IV$PRT0\r
404 ld l,a\r
405 ld (hl),low iprt0\r
406 inc hl\r
407 ld (hl),high iprt0\r
408 ld hl,prt0itab\r
409 call io.ini.m\r
410 ret\r
411 \r
412prt0itab:\r
413 db prt0it_e-prt0itab-2\r
414 db tmdr0l\r
415 dw PRT_TC10MS\r
416 dw PRT_TC10MS\r
417 db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r
418prt0it_e:\r
419\r
4caee1ec 420\r
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421;\r
422;----------------------------------------------------------------------\r
423;\r
424\r
425io.ini:\r
426 push bc\r
427 ld b,0 ;high byte port adress\r
428 ld a,(hl) ;count\r
429 inc hl\r
430ioi_1:\r
431 ld c,(hl) ;port address\r
432 inc hl\r
433 outi\r
434 inc b ;outi decrements b\r
435 dec a\r
436 jr nz,ioi_1\r
437 pop bc\r
438 ret\r
439\r
440io.ini.m:\r
441 push bc\r
442 ld b,(hl)\r
443 inc hl\r
444 ld c,(hl)\r
445 inc hl\r
446 otimr \r
447 pop bc \r
448 ret\r
449 \r
450io.ini.l:\r
451;\r
452\r
453;----------------------------------------------------------------------\r
454;\r
455\r
456; compute crc\r
457; hl: start adr\r
458; bc: len\r
459; bc returns crc val\r
460\r
461do_crc16:\r
462 ld de,0FFFFh\r
463crc1:\r
464 ld a,(hl)\r
465 xor e\r
466 ld e,a\r
467 rrca\r
468 rrca\r
469 rrca\r
470 rrca\r
471 and 0Fh\r
472 xor e\r
473 ld e,a\r
474 rrca\r
475 rrca\r
476 rrca\r
477 push af\r
478 and 1Fh\r
479 xor d\r
480 ld d,a\r
481 pop af\r
482 push af\r
483 rrca\r
484 and 0F0h\r
485 xor d\r
486 ld d,a\r
487 pop af\r
488 and 0E0h\r
489 xor e\r
490 ld e,d\r
491 ld d,a\r
492 cpi\r
493 jp pe,crc1\r
494 or e ;z-flag\r
495 ret\r
496\r
497\r
498gencrc_alv:\r
499 push hl ;03f6\r
500 push de ;03f7\r
501 push bc\r
502 push af ;03f8\r
503 ld hl,banktabsys ;03f9\r
504 ld bc,crc_len ;03fc\r
505 call do_crc16 ;03ff\r
506 ld (hl),e\r
507 inc hl\r
508 ld (hl),d\r
509 pop af ;0406\r
510 pop bc\r
511 pop de ;0407\r
512 pop hl ;0408\r
513 ret ;0409\r
514\r
515checkcrc_alv:\r
516 push hl ;040a\r
517 push de\r
518 push bc ;040b\r
519 ld hl,banktabsys ;040d\r
520 ld bc,crc_len+2 ;0410\r
521 call do_crc16 ;0413\r
522 pop bc ;041d\r
523 pop de\r
524 pop hl ;041e\r
525 ret ;041f\r
526\r
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527;----------------------------------------------------------------------\r
528\r
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529;\r
530; alloc\r
531;\r
532; h: max bank #\r
533; l: min bank #\r
534; b: max size\r
535; c: min size\r
536;\r
537; ret:\r
538; a: 0 == ok\r
539; 1 == \r
540; 2 == no bank # in requested range\r
541; ff == crc error\r
542;\r
543\r
544sub_0420h:\r
545 call checkcrc_alv ;0420\r
546 jr nz,l049ch ;0424 crc error, tables corrupt\r
547 \r
548 call sub_049dh ;0427 bank # in req. range available?\r
549 jr c,l0499h ;042a\r
550 push ix ;042c\r
551 push iy ;042e\r
552 push de ;0430\r
553 push hl ;0431\r
554 push bc ;0432\r
555 ld c,b ;0433\r
556 ld b,alv_len+1 ;0434\r
557 ld d,0 ;0436\r
558 ld hl,memalv-1 ;0438\r
559 jr l0441h ;043b\r
560\r
561; find free blocks\r
562\r
563l043dh:\r
564 ld a,(hl) ;043d\r
565 inc a ;043e free blocks are marked 0ffh\r
566 jr z,l0446h ;043f\r
567l0441h:\r
568 inc hl ;0441\r
569 djnz l043dh ;0442\r
570 jr l0464h ;0444\r
571l0446h:\r
572 push hl ;0446 \r
573 pop ix ;0447 free blocks start here\r
574 ld e,000h ;0449\r
575 jr l0451h ;044b\r
576l044dh: ; count free blocks\r
577 ld a,(hl) ;044d\r
578 inc a ;044e\r
579 jr nz,l0457h ;044f\r
580l0451h:\r
581 inc e ;0451\r
582 inc hl ;0452\r
583 djnz l044dh ;0453\r
584 jr l0464h ;0455\r
585\r
586; end of free blocks run. \r
587\r
588l0457h:\r
589 ld a,d ;0457\r
590 cp e ;0458 nr of blocks >= requested ?\r
591 jr nc,l0441h ;0459 \r
592\r
593 ld d,e ;045b\r
594 push ix ;045c\r
595 pop iy ;045e\r
596 ld a,d ;0460\r
597 cp c ;0461\r
598 jr c,l0441h ;0462\r
599l0464h:\r
600 pop bc ;0464\r
601 ld a,d ;0465\r
602 cp b ;0466\r
603 jr c,l046ch ;0467\r
604 ld d,b ;0469\r
605 jr l0471h ;046a\r
606l046ch:\r
607 cp c ;046c\r
608 jr nc,l0471h ;046d\r
609 ld d,000h ;046f\r
610l0471h:\r
611 ld a,d ;0471\r
612 push iy ;0472\r
613 pop hl ;0474\r
614 ld de,memalv ;0475\r
615 or a ;0478\r
616 sbc hl,de ;0479\r
617 ld b,l ;047b\r
618 ld c,a ;047c\r
619 pop hl ;047d\r
620l047eh:\r
621 or a ;047e\r
622 jr z,l0489h ;047f\r
623 ld (iy+0),l ;0481\r
624 inc iy ;0484\r
625 dec a ;0486\r
626 jr l047eh ;0487\r
627l0489h:\r
628 pop de ;0489\r
629 pop iy ;048a\r
630 pop ix ;048c\r
631 call gencrc_alv ;048e\r
632 ld a,c ;0491\r
633 or a ;0492\r
634 ld a,000h ;0493\r
635 ret nz ;0495\r
636 or 001h ;0496\r
637 ret ;0498\r
638\r
639l0499h:\r
640 ld a,2 ;0499\r
641l049ch:\r
642 or a\r
643 ret ;049c\r
644\r
645\r
646; search a free bank number in range\r
647; h: max #\r
648; l: min #\r
649; ret:\r
650; l: bank number available\r
651; nc, if found, bank nr. in l\r
652; cy, if none found\r
653\r
654sub_049dh:\r
655 push de ;049d\r
656 push bc ;049e\r
657 ex de,hl ;049f\r
658 dec e ;04a0\r
659l04a1h:\r
660 inc e ;04a1 test next #\r
661 ld a,d ;04a2\r
662 cp e ;04a3\r
663 jr c,l04b1h ;04a4 \r
664 ld a,e ;04a6\r
665 ld hl,memalv ;04a7\r
666 ld bc,alv_len ;04aa\r
667 cpir ;04ad bank# allready allocated?\r
668 jr z,l04a1h ;04af if yes, search for next\r
669l04b1h:\r
670 ex de,hl ;04b1\r
671 pop bc ;04b2\r
672 pop de ;04b3\r
673 ret ;04b4\r
674\r
675\r
676sub_04b5h:\r
677 ld a,l ;04b5\r
678 cp 012h ;04b6\r
679 ccf ;04b8\r
680 ret c ;04b9\r
681 push hl ;04ba\r
682 ld hl,banktab ;04bb\r
683 call add_hl_a\r
684 ld (hl),b ;04c3\r
685 call gencrc_alv ;04c4\r
686 pop hl ;04c7\r
687 or a ;04c8 clear carry\r
688 ret ;04c9\r
689\r
690\r
691;--------------------------------------------------------------\r
692;\r
693; de: Log. Address\r
694; a: Bank number\r
695;\r
696;out ahl: Phys. (linear) Address\r
697\r
698\r
699bnk2phys:\r
700 push hl\r
701 ld hl,banktab\r
702 call add_hl_a\r
703 ld a,(hl)\r
704 pop hl\r
705\r
706 ; fall thru\r
707;--------------------------------------------------------------\r
708;\r
709; de: Log. Address\r
710; a: Bank (bbr)\r
711;\r
712; OP: ahl = (a<<12) + (d<<8) + e\r
713;\r
4caee1ec 714;out ahl: Phys. (linear) Address\r
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715\r
716\r
717log2phys:\r
718 push bc ;\r
719 ld c,a ;\r
720 ld b,16 ;\r
721 mlt bc ;bc = a<<4\r
722 ld l,d ;\r
723 ld h,0 ;\r
724 add hl,bc ;bc + d == a<<4 + d \r
725 ld a,h ;\r
726 ld h,l ;\r
727 ld l,e ;\r
728 pop bc ;\r
729 ret ;\r
730\r
731\r
732;--------------------------------------------------------------\r
733;\r
734;return:\r
735; hl = hl + a\r
736; Flags undefined\r
737;\r
738\r
739add_hl_a:\r
740 add a,l \r
741 ld l,a \r
742 ret nc \r
743 inc h \r
744 ret \r
745\r
746; ---------------------------------------------------------\r
747\r
748sysramw:\r
749\r
750 .phase isvsw_loc\r
751topcodsys:\r
752\r
753; Trampoline for interrupt routines in banked ram.\r
754; Switch stack pointer to "system" stack in top ram\r
755; Save cbar\r
756 \r
757isv_sw: ;\r
758 ex (sp),hl ; save hl, return adr in hl\r
759 push de ;\r
760 push af ;\r
761 ex de,hl ;\r
762 ld hl,0 ;\r
763 add hl,sp ;\r
764 ld a,h ;\r
765 cp 0f8h ;\r
766 jr nc,isw_1 ;\r
767 ld sp,$stack ;\r
768isw_1:\r
769 push hl ;\r
770 in0 h,(cbar) ;\r
771 push hl ;\r
772 ld a,SYS$CBAR ;\r
773 out0 (cbar),a ;\r
774 ex de,hl ;\r
775 ld e,(hl) ;\r
776 inc hl ;\r
777 ld d,(hl) ;\r
778 ex de,hl ;\r
779 push bc ;\r
780 call jphl ;\r
781\r
782 pop bc ;\r
783 pop hl ;\r
784 out0 (cbar),h ;\r
785 pop hl ;\r
786 ld sp,hl ;\r
787 pop af ;\r
788 pop de ;\r
789 pop hl ;\r
790 ei ;\r
791 ret ;\r
792jphl:\r
793 jp (hl) ;\r
794\r
795; ---------------------------------------------------------\r
796\r
4caee1ec 797\r
a16ba2b0
L
798iprt0:\r
799 push af\r
800 push hl\r
801 in0 a,(tcr)\r
802 in0 a,(tmdr0l)\r
803 in0 a,(tmdr0h)\r
804 ld a,(tim_ms)\r
805 inc a\r
806 cp 100\r
807 jr nz,iprt_1\r
808 xor a\r
809 ld hl,(tim_s)\r
810 inc hl\r
811 ld (tim_s),hl\r
812iprt_1:\r
813 ld (tim_ms),a\r
814 pop hl\r
815 pop af\r
816 ei\r
817 ret\r
818\r
819; ---------------------------------------------------------\r
820\r
821sp.int0:\r
822 ld a,0d0h\r
823 jr sp.i.1\r
824sp.int.len equ $-sp.int0\r
825 ld a,0d1h\r
826 jr sp.i.1\r
827 ld a,0d2h\r
828 jr sp.i.1\r
829 ld a,0d3h\r
830 jr sp.i.1\r
831 ld a,0d4h\r
832 jr sp.i.1\r
833 ld a,0d5h\r
834 jr sp.i.1\r
835 ld a,0d6h\r
836 jr sp.i.1\r
837 ld a,0d7h\r
838 jr sp.i.1\r
839 ld a,0d8h\r
840sp.i.1:\r
841; out (80h),a\r
842 halt\r
843\r
844curph defl $\r
845 .dephase\r
846sysrame:\r
847 .phase curph\r
848tim_ms: db 0\r
849tim_s: dw 0\r
850 .dephase\r
851 \r
852;-----------------------------------------------------\r
853\r
854 dseg\r
855\r
856 ds 1\r
857banktabsys:\r
858 ds 1 ;0c001h\r
859 ds 1 ;0c002h\r
860banktab:\r
861 ds BANKS ;0c003h\r
862memalv:\r
863 ds 512/4 ;Number of 4k blocks\r
864alv_len equ $-memalv\r
865crc_len equ $-banktabsys\r
866\r
867crc_memalv: \r
868 ds 2 ;\r
869\r
870 cseg\r
871\r
872 ;.phase 0ffc0h\r
873;ivtab equ 0ffc0h ; 0ffc0h ;int vector table\r
874 ;.dephase\r
875\r
876 ;.phase 0fffch\r
877mark_55AA equ 0fffch\r
878 ;ds 4 ; 0fffch\r
879 ;.dephase\r
880\r
881\r
882 end\r
883\r