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Use timer2 as 1ms sytem clock (instead timer1).
[z180-stamp.git] / avr / timer.c
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1/*
2 */
3
4
5#include "common.h"
6
7//#include <avr/power.h>
8//#include <avr/pgmspace.h>
9#include <avr/interrupt.h>
10#include <util/atomic.h>
11
12//#include <stdio.h>
13
14
15#include "timer.h"
16
17/* timer interrupt/overflow counter */
68e463ad 18volatile uint32_t timestamp;
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19
20
21/*---------------------------------------------------------*/
68e463ad 22/* 1000Hz timer interrupt generated by OC2A */
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23/*---------------------------------------------------------*/
24
68e463ad 25ISR(TIMER2_COMPA_vect)
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26{
27 static int_fast8_t tick_10ms;
28 int_fast8_t i;
29
30
31 timestamp++;
32
33 i = tick_10ms + 1;
34 if (i == 10) {
35 i = 0;
36 Stat |= S_10MS_TO;
68e463ad 37
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38 /* Drive timer procedure of low level disk I/O module */
39 //disk_timerproc();
40 }
41 tick_10ms = i;
68e463ad 42
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43}
44
45
46
47/*--------------------------------------------------------------------------*/
48
49#if 0
50
68e463ad 51void do_10ms(void)
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52{
53 if (to_counter)
54 to_counter--;
55}
56
57#endif
58
59/*--------------------------------------------------------------------------*/
60
61
68e463ad 62#if 0
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63void timer_setup(void)
64{
65
66 /* Clock */
67 CLKPR = _BV(CLKPCE);
68 CLKPR = 0;
69
70 /* Timer */
71
72 OCR1A = F_CPU / 1000 - 1; // Timer1: 1000Hz interval (OC1A)
73 TCCR1B = 0b00001001;
74 TIMSK1 = _BV(OCIE1A); // Enable TC1.oca interrupt
75}
68e463ad 76#endif
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77
78uint32_t get_timer(uint32_t base)
79{
80 uint32_t ret;
68e463ad 81
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82 ATOMIC_BLOCK(ATOMIC_FORCEON)
83 {
84 ret = timestamp;
85 }
86 return ret - base;
87}
88