Use timer2 as 1ms sytem clock (instead timer1).

diff --git a/avr/main.c b/avr/main.c
index e4c98b8bd8f1fcfb730a649300f484c0b03b686e..65622ccfe5316d11d8cb5908809218bb397508c6 100644 (file)
--- a/avr/main.c
+++ b/avr/main.c
@@ -77,8 +77,8 @@ void setup_avr(void)
        MCUCR = _BV(JTD);
        MCUCR = _BV(JTD);
 
-       /* disable unused periphels */
-       PRR0 = _BV(PRTIM2) | _BV(PRTIM0) | _BV(PRADC);
+       /* disable unused peripherals */
+       PRR0 = _BV(PRTIM0) | _BV(PRADC);
        PRR1 = _BV(PRTIM5) | _BV(PRTIM4) | _BV(PRTIM3) |
                _BV(PRUSART3) | _BV(PRUSART2) | _BV(PRUSART1);
 
@@ -92,9 +92,10 @@ void setup_avr(void)
 
        /* Timer */
 
-       OCR1A = F_CPU / 8 / 1000 - 1; // Timer1: 1000Hz interval (OC1A)
-       TCCR1B = 0b00001010;
-       TIMSK1 = _BV(OCIE1A); // Enable TC1.oca interrupt
+       OCR2A = F_CPU / 256 / 1000 - 1; /* Timer2: 1000Hz interval (OC2A) */
+       TCCR2A = (0b10 << WGM20);       /* CTC Mode */
+       TCCR2B = (0b110 << CS20);       /* Prescaler 256 */
+       TIMSK2 = _BV(OCIE2A);           /* Enable TC2.oca interrupt */
 }
 
 static

diff --git a/avr/timer.c b/avr/timer.c
index 84a97370658ebd669b5d313da966330021d9a038..56c7bedd5d0609f548c762cdff549e19e8046e2b 100644 (file)
--- a/avr/timer.c
+++ b/avr/timer.c
@@ -15,14 +15,14 @@
 #include "timer.h"
 
 /* timer interrupt/overflow counter */
-static volatile uint32_t timestamp;
+volatile uint32_t timestamp;
 
 
 /*---------------------------------------------------------*/
-/* 1000Hz timer interrupt generated by OC1A                 */
+/* 1000Hz timer interrupt generated by OC2A                */
 /*---------------------------------------------------------*/
 
-ISR(TIMER1_COMPA_vect)
+ISR(TIMER2_COMPA_vect)
 {
        static int_fast8_t tick_10ms;
        int_fast8_t i;
@@ -34,12 +34,12 @@ ISR(TIMER1_COMPA_vect)
        if (i == 10) {
                i = 0;
                Stat |= S_10MS_TO;
-               
+
                /* Drive timer procedure of low level disk I/O module */
                //disk_timerproc();
        }
        tick_10ms = i;
-       
+
 }
 
 
@@ -48,7 +48,7 @@ ISR(TIMER1_COMPA_vect)
 
 #if 0
 
-void do_10ms(void) 
+void do_10ms(void)
 {
                if (to_counter)
                        to_counter--;
@@ -59,6 +59,7 @@ void do_10ms(void)
 /*--------------------------------------------------------------------------*/
 
 
+#if 0
 void timer_setup(void)
 {
 
@@ -72,12 +73,12 @@ void timer_setup(void)
        TCCR1B = 0b00001001;
        TIMSK1 = _BV(OCIE1A); // Enable TC1.oca interrupt
 }
-
+#endif
 
 uint32_t get_timer(uint32_t base)
 {
        uint32_t ret;
-       
+
        ATOMIC_BLOCK(ATOMIC_FORCEON)
        {
                ret = timestamp;