[z180-stamp.git] / stm32 / z180-stamp-stm32.c

/*
 * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <stdio.h>

#include <libopencmsis/core_cm3.h>
#include <libopencm3/cm3/nvic.h>
#include <libopencm3/cm3/systick.h>
#include <libopencm3/stm32/rtc.h>
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/timer.h>

#define ODR	0x0c
#define IDR	0x08


#include "debug.h"
#include "serial.h"
#include "z80-if.h"
#include "../z180/hdrom.h"

#define ESCCHAR		('^'-0x40)

#define S_10MS_TO	(1<<0)

/*
 * LED Connections
 */

#define LED_PORT	GPIOC
#define LED_BLUE_PIN	GPIO8
#define BLUE		8
#define LED_GREEN_PIN	GPIO9
#define GREEN		9


#define LED_BLUE_ON()     BBIO_PERIPH(LED_PORT+ODR, BLUE) = 1
#define LED_BLUE_OFF()    BBIO_PERIPH(LED_PORT+ODR, BLUE) = 0
#define LED_BLUE_TOGGLE() BBIO_PERIPH(LED_PORT+ODR, BLUE) = !BBIO_PERIPH(LED_PORT+ODR, BLUE)

#define LED_GREEN_ON()     BBIO_PERIPH(LED_PORT+ODR, GREEN) = 1
#define LED_GREEN_OFF()    BBIO_PERIPH(LED_PORT+ODR, GREEN) = 0
#define LED_GREEN_TOGGLE() BBIO_PERIPH(LED_PORT+ODR, GREEN) = !BBIO_PERIPH(LED_PORT+ODR, GREEN)


/*
 * Button connections
 */

//BBIO_PERIPH(GPIOA+IDR, 0);

#define KEY_PORT	GPIOA_IDR
#define KEY0		GPIO0
//#define KEY1		GPIO1
//#define KEY2		GPIO2

#define REPEAT_MASK	KEY0		// repeat: key0
#define REPEAT_START	100		// after 1s
#define REPEAT_NEXT	20		// every 200ms


typedef enum {
	NOTHING, PULSE, BLINK1, BLINK2
} LED_MODE;

typedef struct {
	uint8_t mode;
	uint8_t ontime, offtime;
} led_stat_t;

volatile uint8_t led_timer[2];
led_stat_t led_stat[2];

volatile int timeout_1s;
volatile uint32_t Stat;


/*--------------------------------------------------------------------------*/


static void clock_setup(void)
{
	//rcc_clock_setup_in_hse_8mhz_out_24mhz();
	rcc_clock_setup_in_hsi_out_24mhz();

	/* Enable clocks for:
		GPIO port A (for GPIO_USART1_TX and Button)
		GPIO port C (LEDs)
		USART1
		TIM16 (RST-Pin)
		TIM1  (IOCS1)
	*/
	rcc_peripheral_enable_clock(&RCC_APB2ENR,
			  RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN
			| RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN
			| RCC_APB2ENR_USART1EN | RCC_APB2ENR_AFIOEN
			| RCC_APB2ENR_TIM1EN | RCC_APB2ENR_TIM16EN);
	/* Enable clocks for:
		TIM3
	*/
	rcc_peripheral_enable_clock(&RCC_APB1ENR,
			RCC_APB1ENR_TIM3EN);

	/* Enable clocks for:
		DMA1
	*/
	rcc_peripheral_enable_clock(&RCC_AHBENR,
			RCC_AHBENR_DMA1EN);
}

static void systick_setup(void)
{
	/* SysTick interrupt every N clock pulses: set reload to N-1 */
	STK_RVR = 24000000/1000 - 1;

	/* Set source to core clock, enable int and start counting. */
	STK_CSR = STK_CSR_CLKSOURCE_AHB | STK_CSR_TICKINT | STK_CSR_ENABLE;
}

#if 0
static void nvic_setup(void)
{
//	nvic_enable_irq(NVIC_RTC_IRQ);
//	nvic_set_priority(NVIC_RTC_IRQ, 1);
}
#endif

static void tim3_setup(void)
{
	TIM3_CR1 = TIM_CR1_CMS_EDGE | TIM_CR1_DIR_UP;

	TIM3_CCMR2 = 0
		| TIM_CCMR2_OC4M_FORCE_LOW
	/*	| TIM_CCMR2_OC4M_FORCE_HIGH	*/
	/*	| TIM_CCMR2_OC4M_PWM2		*/

	/*	| TIM_CCMR2_OC4PE		*/
	/*	| TIM_CCMR2_OC4FE		*/
		| TIM_CCMR2_CC4S_OUT;

	TIM3_CCER = TIM_CCER_CC4E
		| TIM_CCER_CC4P;

	TIM3_ARR = 48;	/* default */
	TIM3_CCR4 = 1;	/*  */
}

static void gpio_setup(void)
{

	/* Disable JTAG-DP, but leave SW-DP Enabled. (free PA15, PB3, PB4)
	   Remap SPI1 to PB3, PB4, PB5 and PA15.
	   Remap TIM3 (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9)
	   Port D0/Port D1 mapping on OSC_IN/OSC_OUT
	*/
	gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON,
			AFIO_MAPR_SPI1_REMAP
			| AFIO_MAPR_TIM3_REMAP_FULL_REMAP
			| AFIO_MAPR_PD01_REMAP);

	/* LEDs and User Button. */
	gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_2_MHZ,
		      GPIO_CNF_OUTPUT_PUSHPULL, LED_BLUE_PIN);
	gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_10_MHZ,
		      GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, LED_GREEN_PIN);
	gpio_set_mode(GPIOA, GPIO_MODE_INPUT,
		      GPIO_CNF_INPUT_FLOAT, GPIO0);
}


/*--------------------------------------------------------------------------*/

void delay_systicks(int ticks)
{
	int start, stop, now;

	start = STK_CVR;
	stop = start - ticks;
	if (stop < 0) {
		stop += STK_RVR;
		do {
			now = STK_CVR;
		} while ((now > stop) || (now <= start));
	} else {
		do {
			now = STK_CVR;
		} while ((now > stop) && (now <= start));
	}
}


/*--------------------------------------------------------------------------*/

static void led_toggle(uint8_t lednr) {
	if (lednr == 0)
		LED_BLUE_TOGGLE();
	else if (lednr == 1)
		LED_GREEN_TOGGLE();
}

static void led_on(uint8_t lednr) {
	if (lednr == 0)
		LED_BLUE_ON();
	else if (lednr == 1)
		LED_GREEN_ON();
}

static void led_off(uint8_t lednr) {
	if (lednr == 0)
		LED_BLUE_OFF();
	else if (lednr == 1)
		LED_GREEN_OFF();
}

static uint8_t led_is_on(uint8_t lednr) {
	if (lednr == 0)
		return BBIO_PERIPH(LED_PORT+ODR, BLUE);
	else if (lednr == 1)
		return BBIO_PERIPH(LED_PORT+ODR, GREEN);
	else
		return 0;
}

static void ledset(uint8_t lednr, uint8_t what, uint8_t len) {

	led_stat[lednr].mode = what;
	switch (what) {
	case PULSE:
		led_stat[lednr].ontime = len;
		led_stat[lednr].offtime = 0;
		led_timer[lednr] = len;
		led_on(lednr);
		break;
	case BLINK1:
	case BLINK2:
		if (what == BLINK1)
			led_stat[lednr].offtime = 100 - len;
		else
			led_stat[lednr].offtime = 200 - len;
		led_stat[lednr].ontime = len;
		led_timer[lednr] = len;
		led_on(lednr);
		break;
	default:
		break;
	}
}

/*--------------------------------------------------------------------------*/

static volatile uint16_t key_state,
		key_press, // key press detect
		key_rpt; // key long press and repeat


static uint16_t get_key_press(uint16_t key_mask) {
	__disable_irq();
	// read and clear atomic !
	key_mask &= key_press; // read key(s)
	key_press ^= key_mask; // clear key(s)
	__enable_irq();
	return key_mask;
}

/*
static uint16_t get_key_rpt(uint16_t key_mask) {
	__disable_irq();
	// read and clear atomic !
	key_mask &= key_rpt; // read key(s)
	key_rpt ^= key_mask; // clear key(s)
	__enable_irq();
	return key_mask;
}
*/

static uint16_t get_key_short(uint16_t key_mask) {
	__disable_irq();
	// read key state and key press atomic !
	return get_key_press(key_state & key_mask);
}

/*
static uint16_t get_key_long(uint16_t key_mask) {
	return get_key_press(get_key_rpt(key_mask));
}
*/

static void key_timerproc() {
	static uint16_t key_in_last, rpt;
	uint16_t key_in, c;

	key_in = KEY_PORT;

	c = key_in_last & key_in & ~key_state;

//	key_state = key_state  & key_in_last | (key_state  | key_in_last) & key_in;
//	key_state = key_state  & key_in      | (key_state  | key_in)      & key_in_last;

	key_state = c | ((key_in_last | key_in) & key_state);

//	key_state = (key_state&key_in_last) | (key_state&key_in) | (key_in_last&key_in);

	key_press |= c;

	key_in_last = key_in;


	if ((key_state & REPEAT_MASK) == 0) // check repeat function
		rpt = REPEAT_START;
	if (--rpt == 0) {
		rpt = REPEAT_NEXT; // repeat delay
		key_rpt |= key_state & REPEAT_MASK;
	}

}

/*--------------------------------------------------------------------------*/

void sys_tick_handler(void)
{
	static int_fast8_t tick_10ms = 0;
	static int_fast16_t count_ms = 0;

	int_fast8_t i;

	++tick_10ms;
	if (tick_10ms == 10)
	{
		Stat |= S_10MS_TO;

		tick_10ms = 0;

		i = led_timer[0];
		if (i)
			led_timer[0] = i - 1;
		i = led_timer[1];
		if (i)
			led_timer[1] = i - 1;

		key_timerproc();

		/* Drive timer procedure of low level disk I/O module */
		//disk_timerproc();
	}

	count_ms++;
	if (count_ms == 1000) {
		count_ms = 0;

		i = timeout_1s;
		if (i)
			timeout_1s = i - 1;
	}
}

void rtc_isr(void)
{
	/* The interrupt flag isn't cleared by hardware, we have to do it. */
	rtc_clear_flag(RTC_SEC);

}

/*--------------------------------------------------------------------------*/

void tim3_set(int mode)
{
	uint16_t cc_mode;

	cc_mode = TIM_CCMR2_CC4S_OUT;

	TIM3_CR1 = TIM_CR1_CMS_EDGE | TIM_CR1_DIR_UP /*| TIM_CR1_OPM */ ;

	if (mode < 0)
		cc_mode |= TIM_CCMR2_OC4M_FORCE_LOW;
	else if (mode == 0)
		cc_mode |= TIM_CCMR2_OC4M_FORCE_HIGH;
	else {
		TIM3_ARR = mode;
		TIM3_CCR4 = mode/2;
		cc_mode |= TIM_CCMR2_OC4M_PWM2;
	}

	TIM3_CCMR2 = cc_mode;

	if (mode > 0)
		TIM3_CR1 |= TIM_CR1_CEN;
}

/*--------------------------------------------------------------------------*/

static uint32_t z80_sram_cmp(uint32_t addr, uint32_t length, uint8_t wval, int inc)
{
	uint8_t rval;
	int_fast8_t errors = 0;

	DBG_P(1, "SRAM: Check %#.5x byte... ", length);
	while (length--) {
		if ((rval = z80_read(addr)) != wval) {
			if (errors == 0) {
				printf("\nSRAM: Address  W  R\n" \
				       "      -------------\n");
//					       12345  00 11
			}
			printf("       %.5lx  %.2x %.2x\n", addr, wval, rval);

			if (++errors > 16 )
				break;
		}
		addr++;
		wval += inc;
	}
	DBG_P(1, "Done.\n");

	return addr;
}

#if 0
static void z80_sram_fill(uint32_t addr, int length, uint8_t startval, int inc)
{
	printf("SRAM: Write %#.5x byte... ", length); //fflush(stdout);
	while (length--) {
		z80_write(addr, startval);
		++addr;
		startval += inc;
	}
	printf("Done.\n");
}


void z80_sram_fill_string(uint32_t addr, int length, const char *text)
{
	char c;
	const char *p = text;

	while (length--) {
		z80_write(addr++, c = *p++);
		if (c == 0)
			p = text;
	}
}


uint32_t z80_sram_cmp_string(uint32_t addr, int length, const char *text)
{
	char c;
	const char *p = text;

	while (length--) {
		c = *p++;
		if (z80_read(addr) != c)
			break;
		++addr;
		if (c == 0)
			p = text;
	}
	return addr;
}

const char * const qbfox = "Zhe quick brown fox jumps over the lazy dog!";
const char * const qbcat = "Zhe quick brown fox jumps over the lazy cat!";

#endif

uint8_t z80_get_byte(uint32_t adr)
{
	uint8_t data;

	z80_request_bus();
	data = z80_read(adr),
	z80_release_bus();

	return data;
}


/*--------------------------------------------------------------------------*/

static void do_10ms(void)
{
	for (uint_fast8_t i = 0; i < 2; i++) {
		switch (led_stat[i].mode) {
		case PULSE:
			if (led_timer[i] == 0) {
				led_off(i);
				led_stat[i].mode = NOTHING;
			}
			break;
		case BLINK1:
		case BLINK2:
			if (led_timer[i] == 0) {
				if (led_is_on(i))
					led_timer[i] = led_stat[i].offtime;
				else
					led_timer[i] = led_stat[i].ontime;
				led_toggle(i);
			}
			break;
		default:
			break;
		}
	}
}

struct msg_item {
	uint8_t fct;
	uint8_t sub_min, sub_max;
	void (*func)(uint8_t, int, uint8_t *);
};

uint32_t msg_to_addr(uint8_t *msg)
{
	uint32_t addr = msg[0] | (msg[1] << 8) | ((uint32_t)msg[2] << 16);

	return addr;

}

void do_msg_ini_msgfifo(uint8_t subf, int len, uint8_t * msg)
{
	(void)subf; (void)len;

	z80_init_msg_fifo(msg_to_addr(msg));
}


void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
{
	(void)len;

	z80_memfifo_init(subf - 1, msg_to_addr(msg));
}


void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
{
	(void)subf;

	while (len--)
		putchar(*msg++);
}


const struct msg_item z80_messages[] =
{
	{ 0,			/* fct nr. */
	  0, 0,			/* sub fct nr. from, to */
	  &do_msg_ini_msgfifo},
	{ 0,
	  1, 2,
	  &do_msg_ini_memfifo},
	{ 1,
	  1, 1,
	  &do_msg_char_out},
	{ 0xff,				/* end mark */
	  0, 0,
	  0},

};


void do_message(int len, uint8_t *msg)
{
	uint8_t fct, sub_fct;
	int_fast8_t i = 0;

	if (len >= 2) {
		fct = *msg++;
		sub_fct = *msg++;
		len -= 2;

		while (fct != z80_messages[i].fct)
			++i;

		if (z80_messages[i].fct == 0xff) {
			DBG_P(1, "do_message: Unknown function: %i, %i\n",
					fct, sub_fct);
			return; /* TODO: unknown message # */
		}

		while (fct == z80_messages[i].fct) {
			if (sub_fct >= z80_messages[i].sub_min && sub_fct <= z80_messages[i].sub_max )
				break;
			++i;
		}

		if (z80_messages[i].fct != fct) {
			DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
					fct, sub_fct);
			return; /* TODO: unknown message sub# */
		}

		(z80_messages[i].func)(sub_fct, len, msg);


	} else {
		/* TODO: error */
		DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
	}
}


#define CTRBUF_LEN 256

void check_msg_fifo(void)
{
	int ch;
	static int_fast8_t state;
	static int msglen,idx;
	static uint8_t buffer[CTRBUF_LEN];

	while (state != 3 && (ch = z80_msg_fifo_getc()) >= 0) {
		switch (state) {
		case 0:		/* wait for start of message */
			if (ch == 0x81)	{
				msglen = 0;
				idx = 0;
				state = 1;
			}
			break;
		case 1:		/* get msg len */
			if (ch > 0 && ch <= CTRBUF_LEN) {
				msglen = ch;
				state = 2;
			} else
				state = 0;
			break;
		case 2: 	/* get message */
			buffer[idx++] = ch;
			if (idx == msglen)
				state = 3;
			break;
		}
	}

	if (state == 3) {
		do_message(msglen, buffer);
		state = 0;
	}
}


void z80_load_mem(void)
{
	unsigned sec = 0;
	uint32_t sec_base = hdrom_start;

	DBG_P(1, "Loading z80 memory... \n");

	while (sec < hdrom_sections) {
		DBG_P(2, "  From: 0x%.5lX to: 0x%.5lX    (%5li bytes)\n",
				hdrom_address[sec],
				hdrom_address[sec]+hdrom_length_of_sections[sec] - 1,
				hdrom_length_of_sections[sec]);

		z80_write_block((unsigned char *) &hdrom[sec_base],  /* src */
		                hdrom_address[sec],                  /* dest */
				hdrom_length_of_sections[sec]);      /* len */
		sec_base+=hdrom_length_of_sections[sec];
		sec++;
	}
}
/*--------------------------------------------------------------------------*/

int main(void)
{
	int_fast8_t state = 0;
	int ch;

	clock_setup();
	gpio_setup();
	tim3_setup();
	setvbuf(stdout, NULL, _IONBF, 0);
	serial_setup();
	printf("\n(STM32F100+HD64180)_stamp Tester\n");

	DBG_P(1, "z80_setup_bus... ");
	z80_setup_msg_fifo();
	z80_setup_bus();
	DBG_P(1, "done.\n");

	/*
	 * If the RTC is pre-configured just allow access, don't reconfigure.
	 * Otherwise enable it with the LSE as clock source and 0x7fff as
	 * prescale value.
	 */
	rtc_auto_awake(RCC_LSE, 0x7fff);

	systick_setup();

	DBG_P(1, "Get bus... ");
	z80_busreq(LOW);
	z80_reset(HIGH);
	z80_request_bus();
	DBG_P(1, "got it!\n");

	z80_memset(0, 0x76, 0x80000);
	//z80_sram_fill(0, 512 * 1024, 0x76, 0);
	z80_sram_cmp(0, (uint32_t)512 * 1024, 0x76, 0);

	z80_load_mem();
	z80_reset(LOW);
	DBG_P(1, "Bus released!\n");
	z80_release_bus();
	z80_reset(HIGH);
	DBG_P(1, "Reset released!\n");


	ledset(0, BLINK1, 50);

	while (1) {

		if (Stat & S_10MS_TO) {
			Stat &= ~S_10MS_TO;
			do_10ms();
		}

		if (get_key_short(KEY0)) {
			z80_reset_pulse();
		}

		if ((ch = serial_getc()) >= 0) {
			switch (state) {
			case 0:
				if (ch == ESCCHAR) {
					state = 1;
					/* TODO: Timer starten */
				} else
					z80_memfifo_putc(fifo_out, ch);
				break;
			case 1:
				switch (ch) {

				case 'h': /* test: green led on */
					tim3_set(-1);
					break;
				case 'l': /* test: green led off */
					tim3_set(0);
					break;
				case 'p': /* test: pulse on led pin */
					tim3_set(24000000 / 1000000 * 5); /* 5 us */
					break;
				case 'r':
					z80_reset_pulse();
					break;

				case ESCCHAR:
				default:
					z80_memfifo_putc(fifo_out, ch);
				}
				state = 0;
				break;
			}
		}

		check_msg_fifo();
	}

	return 0;
}
Commit	Line	Data
e64eba00	1	/*
35edb766 L	2	* (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
e64eba00 L	5	*/
e64eba00 L	6
eded7ec4	7	#include <stdio.h>
e64eba00 L	8
	9	#include <libopencmsis/core_cm3.h>
	10	#include <libopencm3/cm3/nvic.h>
	11	#include <libopencm3/cm3/systick.h>
	12	#include <libopencm3/stm32/rtc.h>
e64eba00 L	13	#include <libopencm3/stm32/rcc.h>
	14	#include <libopencm3/stm32/gpio.h>
	15	#include <libopencm3/stm32/timer.h>
	16
	17	#define ODR 0x0c
	18	#define IDR 0x08
	19
	20
6b81b39f L	21	#include "debug.h"
6b81b39f L	22	#include "serial.h"
e64eba00	23	#include "z80-if.h"
f4d5b4fe	24	#include "../z180/hdrom.h"
e64eba00	25
6b81b39f	26	#define ESCCHAR ('^'-0x40)
e64eba00 L	27
	28	#define S_10MS_TO (1<<0)
	29
	30	/*
	31	* LED Connections
	32	*/
	33
	34	#define LED_PORT GPIOC
	35	#define LED_BLUE_PIN GPIO8
	36	#define BLUE 8
	37	#define LED_GREEN_PIN GPIO9
	38	#define GREEN 9
	39
	40
	41	#define LED_BLUE_ON() BBIO_PERIPH(LED_PORT+ODR, BLUE) = 1
	42	#define LED_BLUE_OFF() BBIO_PERIPH(LED_PORT+ODR, BLUE) = 0
	43	#define LED_BLUE_TOGGLE() BBIO_PERIPH(LED_PORT+ODR, BLUE) = !BBIO_PERIPH(LED_PORT+ODR, BLUE)
	44
	45	#define LED_GREEN_ON() BBIO_PERIPH(LED_PORT+ODR, GREEN) = 1
	46	#define LED_GREEN_OFF() BBIO_PERIPH(LED_PORT+ODR, GREEN) = 0
	47	#define LED_GREEN_TOGGLE() BBIO_PERIPH(LED_PORT+ODR, GREEN) = !BBIO_PERIPH(LED_PORT+ODR, GREEN)
	48
	49
	50	/*
	51	* Button connections
	52	*/
	53
	54	//BBIO_PERIPH(GPIOA+IDR, 0);
	55
	56	#define KEY_PORT GPIOA_IDR
	57	#define KEY0 GPIO0
	58	//#define KEY1 GPIO1
	59	//#define KEY2 GPIO2
	60
	61	#define REPEAT_MASK KEY0 // repeat: key0
	62	#define REPEAT_START 100 // after 1s
	63	#define REPEAT_NEXT 20 // every 200ms
	64
	65
	66	typedef enum {
	67	NOTHING, PULSE, BLINK1, BLINK2
	68	} LED_MODE;
	69
	70	typedef struct {
	71	uint8_t mode;
	72	uint8_t ontime, offtime;
	73	} led_stat_t;
	74
	75	volatile uint8_t led_timer[2];
	76	led_stat_t led_stat[2];
	77
	78	volatile int timeout_1s;
	79	volatile uint32_t Stat;
	80
	81
	82	/--------------------------------------------------------------------------/
	83
	84
	85	static void clock_setup(void)
	86	{
0d318092 L	87	//rcc_clock_setup_in_hse_8mhz_out_24mhz();
0d318092 L	88	rcc_clock_setup_in_hsi_out_24mhz();
e64eba00 L	89
	90	/* Enable clocks for:
	91	GPIO port A (for GPIO_USART1_TX and Button)
35edb766	92	GPIO port C (LEDs)
e64eba00	93	USART1
35edb766	94	TIM16 (RST-Pin)
0d318092	95	TIM1 (IOCS1)
e64eba00	96	*/
35edb766 L	97	rcc_peripheral_enable_clock(&RCC_APB2ENR,
	98	RCC_APB2ENR_IOPAEN \| RCC_APB2ENR_IOPBEN
	99	\| RCC_APB2ENR_IOPCEN \| RCC_APB2ENR_IOPDEN
e64eba00 L	100	\| RCC_APB2ENR_USART1EN \| RCC_APB2ENR_AFIOEN
	101	\| RCC_APB2ENR_TIM1EN \| RCC_APB2ENR_TIM16EN);
	102	/* Enable clocks for:
	103	TIM3
	104	*/
35edb766	105	rcc_peripheral_enable_clock(&RCC_APB1ENR,
e64eba00 L	106	RCC_APB1ENR_TIM3EN);
	107
	108	/* Enable clocks for:
0d318092	109	DMA1
e64eba00	110	*/
35edb766	111	rcc_peripheral_enable_clock(&RCC_AHBENR,
e64eba00 L	112	RCC_AHBENR_DMA1EN);
	113	}
	114
	115	static void systick_setup(void)
	116	{
	117	/* SysTick interrupt every N clock pulses: set reload to N-1 */
	118	STK_RVR = 24000000/1000 - 1;
	119
	120	/* Set source to core clock, enable int and start counting. */
	121	STK_CSR = STK_CSR_CLKSOURCE_AHB \| STK_CSR_TICKINT \| STK_CSR_ENABLE;
	122	}
	123
	124	#if 0
	125	static void nvic_setup(void)
	126	{
	127	// nvic_enable_irq(NVIC_RTC_IRQ);
	128	// nvic_set_priority(NVIC_RTC_IRQ, 1);
	129	}
	130	#endif
	131
	132	static void tim3_setup(void)
	133	{
	134	TIM3_CR1 = TIM_CR1_CMS_EDGE \| TIM_CR1_DIR_UP;
35edb766	135
e64eba00	136	TIM3_CCMR2 = 0
35edb766	137	\| TIM_CCMR2_OC4M_FORCE_LOW
e64eba00 L	138	/* \| TIM_CCMR2_OC4M_FORCE_HIGH */
e64eba00 L	139	/* \| TIM_CCMR2_OC4M_PWM2 */
35edb766	140
e64eba00 L	141	/* \| TIM_CCMR2_OC4PE */
	142	/* \| TIM_CCMR2_OC4FE */
	143	\| TIM_CCMR2_CC4S_OUT;
35edb766	144
e64eba00 L	145	TIM3_CCER = TIM_CCER_CC4E
e64eba00 L	146	\| TIM_CCER_CC4P;
35edb766	147
e64eba00 L	148	TIM3_ARR = 48; /* default */
	149	TIM3_CCR4 = 1; /* */
	150	}
	151
	152	static void gpio_setup(void)
	153	{
	154
	155	/* Disable JTAG-DP, but leave SW-DP Enabled. (free PA15, PB3, PB4)
	156	Remap SPI1 to PB3, PB4, PB5 and PA15.
	157	Remap TIM3 (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9)
0d318092	158	Port D0/Port D1 mapping on OSC_IN/OSC_OUT
e64eba00	159	*/
35edb766	160	gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON,
0d318092 L	161	AFIO_MAPR_SPI1_REMAP
	162	\| AFIO_MAPR_TIM3_REMAP_FULL_REMAP
	163	\| AFIO_MAPR_PD01_REMAP);
e64eba00 L	164
	165	/* LEDs and User Button. */
	166	gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_2_MHZ,
	167	GPIO_CNF_OUTPUT_PUSHPULL, LED_BLUE_PIN);
	168	gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_10_MHZ,
	169	GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, LED_GREEN_PIN);
	170	gpio_set_mode(GPIOA, GPIO_MODE_INPUT,
	171	GPIO_CNF_INPUT_FLOAT, GPIO0);
	172	}
	173
	174
e64eba00 L	175	/--------------------------------------------------------------------------/
	176
	177	void delay_systicks(int ticks)
	178	{
	179	int start, stop, now;
35edb766	180
e64eba00 L	181	start = STK_CVR;
	182	stop = start - ticks;
	183	if (stop < 0) {
	184	stop += STK_RVR;
	185	do {
	186	now = STK_CVR;
	187	} while ((now > stop) \|\| (now <= start));
	188	} else {
	189	do {
	190	now = STK_CVR;
	191	} while ((now > stop) && (now <= start));
	192	}
	193	}
	194
	195
	196	/--------------------------------------------------------------------------/
	197
	198	static void led_toggle(uint8_t lednr) {
	199	if (lednr == 0)
	200	LED_BLUE_TOGGLE();
	201	else if (lednr == 1)
	202	LED_GREEN_TOGGLE();
	203	}
	204
	205	static void led_on(uint8_t lednr) {
	206	if (lednr == 0)
	207	LED_BLUE_ON();
	208	else if (lednr == 1)
	209	LED_GREEN_ON();
	210	}
	211
	212	static void led_off(uint8_t lednr) {
	213	if (lednr == 0)
	214	LED_BLUE_OFF();
	215	else if (lednr == 1)
	216	LED_GREEN_OFF();
	217	}
	218
	219	static uint8_t led_is_on(uint8_t lednr) {
	220	if (lednr == 0)
	221	return BBIO_PERIPH(LED_PORT+ODR, BLUE);
	222	else if (lednr == 1)
	223	return BBIO_PERIPH(LED_PORT+ODR, GREEN);
	224	else
	225	return 0;
	226	}
	227
	228	static void ledset(uint8_t lednr, uint8_t what, uint8_t len) {
	229
	230	led_stat[lednr].mode = what;
	231	switch (what) {
	232	case PULSE:
	233	led_stat[lednr].ontime = len;
	234	led_stat[lednr].offtime = 0;
	235	led_timer[lednr] = len;
	236	led_on(lednr);
	237	break;
	238	case BLINK1:
	239	case BLINK2:
	240	if (what == BLINK1)
	241	led_stat[lednr].offtime = 100 - len;
	242	else
	243	led_stat[lednr].offtime = 200 - len;
	244	led_stat[lednr].ontime = len;
245	led_timer[lednr] = len;
246	led_on(lednr);
247	break;
248	default:
249	break;
250	}
251	}
252
253	/--------------------------------------------------------------------------/
254
255	static volatile uint16_t key_state,
256	key_press, // key press detect
257	key_rpt; // key long press and repeat
258
259
260	static uint16_t get_key_press(uint16_t key_mask) {
261	__disable_irq();
262	// read and clear atomic !
263	key_mask &= key_press; // read key(s)
264	key_press ^= key_mask; // clear key(s)
265	__enable_irq();
266	return key_mask;
267	}
268
6b81b39f	269	/*
e64eba00 L	270	static uint16_t get_key_rpt(uint16_t key_mask) {
	271	__disable_irq();
	272	// read and clear atomic !
	273	key_mask &= key_rpt; // read key(s)
	274	key_rpt ^= key_mask; // clear key(s)
	275	__enable_irq();
	276	return key_mask;
	277	}
6b81b39f	278	*/
e64eba00 L	279
	280	static uint16_t get_key_short(uint16_t key_mask) {
	281	__disable_irq();
	282	// read key state and key press atomic !
	283	return get_key_press(key_state & key_mask);
	284	}
	285
	286	/*
	287	static uint16_t get_key_long(uint16_t key_mask) {
	288	return get_key_press(get_key_rpt(key_mask));
	289	}
	290	*/
	291
	292	static void key_timerproc() {
	293	static uint16_t key_in_last, rpt;
	294	uint16_t key_in, c;
	295
	296	key_in = KEY_PORT;
	297
	298	c = key_in_last & key_in & ~key_state;
	299
	300	// key_state = key_state & key_in_last \| (key_state \| key_in_last) & key_in;
	301	// key_state = key_state & key_in \| (key_state \| key_in) & key_in_last;
	302
	303	key_state = c \| ((key_in_last \| key_in) & key_state);
35edb766	304
e64eba00 L	305	// key_state = (key_state&key_in_last) \| (key_state&key_in) \| (key_in_last&key_in);
	306
	307	key_press \|= c;
35edb766	308
e64eba00	309	key_in_last = key_in;
35edb766	310
e64eba00 L	311
	312	if ((key_state & REPEAT_MASK) == 0) // check repeat function
	313	rpt = REPEAT_START;
	314	if (--rpt == 0) {
	315	rpt = REPEAT_NEXT; // repeat delay
	316	key_rpt \|= key_state & REPEAT_MASK;
	317	}
	318
e64eba00 L	319	}
	320
	321	/--------------------------------------------------------------------------/
	322
	323	void sys_tick_handler(void)
	324	{
0c5890bb L	325	static int_fast8_t tick_10ms = 0;
0c5890bb L	326	static int_fast16_t count_ms = 0;
e64eba00	327
0c5890bb	328	int_fast8_t i;
e64eba00 L	329
	330	++tick_10ms;
	331	if (tick_10ms == 10)
	332	{
	333	Stat \|= S_10MS_TO;
	334
	335	tick_10ms = 0;
35edb766	336
e64eba00 L	337	i = led_timer[0];
	338	if (i)
	339	led_timer[0] = i - 1;
	340	i = led_timer[1];
	341	if (i)
	342	led_timer[1] = i - 1;
	343
	344	key_timerproc();
35edb766	345
e64eba00 L	346	/* Drive timer procedure of low level disk I/O module */
	347	//disk_timerproc();
	348	}
35edb766	349
e64eba00 L	350	count_ms++;
	351	if (count_ms == 1000) {
	352	count_ms = 0;
	353
0d318092 L	354	i = timeout_1s;
	355	if (i)
	356	timeout_1s = i - 1;
e64eba00 L	357	}
	358	}
	359
	360	void rtc_isr(void)
	361	{
	362	/* The interrupt flag isn't cleared by hardware, we have to do it. */
	363	rtc_clear_flag(RTC_SEC);
	364
	365	}
	366
	367	/--------------------------------------------------------------------------/
	368
	369	void tim3_set(int mode)
	370	{
	371	uint16_t cc_mode;
35edb766	372
e64eba00 L	373	cc_mode = TIM_CCMR2_CC4S_OUT;
e64eba00 L	374
0d318092	375	TIM3_CR1 = TIM_CR1_CMS_EDGE \| TIM_CR1_DIR_UP /\| TIM_CR1_OPM / ;
e64eba00 L	376
	377	if (mode < 0)
	378	cc_mode \|= TIM_CCMR2_OC4M_FORCE_LOW;
	379	else if (mode == 0)
	380	cc_mode \|= TIM_CCMR2_OC4M_FORCE_HIGH;
	381	else {
	382	TIM3_ARR = mode;
0d318092	383	TIM3_CCR4 = mode/2;
e64eba00 L	384	cc_mode \|= TIM_CCMR2_OC4M_PWM2;
e64eba00 L	385	}
35edb766	386
e64eba00	387	TIM3_CCMR2 = cc_mode;
35edb766	388
e64eba00 L	389	if (mode > 0)
	390	TIM3_CR1 \|= TIM_CR1_CEN;
	391	}
	392
	393	/--------------------------------------------------------------------------/
	394
0c5890bb	395	static uint32_t z80_sram_cmp(uint32_t addr, uint32_t length, uint8_t wval, int inc)
e64eba00 L	396	{
e64eba00 L	397	uint8_t rval;
0c5890bb	398	int_fast8_t errors = 0;
35edb766	399
eded7ec4	400	DBG_P(1, "SRAM: Check %#.5x byte... ", length);
e64eba00 L	401	while (length--) {
e64eba00 L	402	if ((rval = z80_read(addr)) != wval) {
35edb766	403	if (errors == 0) {
e64eba00 L	404	printf("\nSRAM: Address W R\n" \
	405	" -------------\n");
	406	// 12345 00 11
	407	}
	408	printf(" %.5lx %.2x %.2x\n", addr, wval, rval);
35edb766	409
e64eba00 L	410	if (++errors > 16 )
	411	break;
	412	}
	413	addr++;
	414	wval += inc;
	415	}
6b81b39f	416	DBG_P(1, "Done.\n");
e64eba00 L	417
	418	return addr;
	419	}
	420
	421	#if 0
	422	static void z80_sram_fill(uint32_t addr, int length, uint8_t startval, int inc)
	423	{
	424	printf("SRAM: Write %#.5x byte... ", length); //fflush(stdout);
	425	while (length--) {
	426	z80_write(addr, startval);
35edb766	427	++addr;
e64eba00 L	428	startval += inc;
	429	}
	430	printf("Done.\n");
	431	}
	432
	433
	434	void z80_sram_fill_string(uint32_t addr, int length, const char *text)
	435	{
	436	char c;
	437	const char *p = text;
	438
	439	while (length--) {
	440	z80_write(addr++, c = *p++);
	441	if (c == 0)
	442	p = text;
	443	}
	444	}
	445
	446
	447	uint32_t z80_sram_cmp_string(uint32_t addr, int length, const char *text)
	448	{
	449	char c;
	450	const char *p = text;
	451
	452	while (length--) {
	453	c = *p++;
	454	if (z80_read(addr) != c)
	455	break;
	456	++addr;
	457	if (c == 0)
	458	p = text;
	459	}
	460	return addr;
	461	}
	462
	463	const char * const qbfox = "Zhe quick brown fox jumps over the lazy dog!";
	464	const char * const qbcat = "Zhe quick brown fox jumps over the lazy cat!";
	465
	466	#endif
	467
	468	uint8_t z80_get_byte(uint32_t adr)
	469	{
	470	uint8_t data;
35edb766	471
0d318092	472	z80_request_bus();
e64eba00 L	473	data = z80_read(adr),
e64eba00 L	474	z80_release_bus();
35edb766	475
e64eba00 L	476	return data;
	477	}
	478
	479
	480	/--------------------------------------------------------------------------/
	481
35edb766	482	static void do_10ms(void)
e64eba00	483	{
0d318092	484	for (uint_fast8_t i = 0; i < 2; i++) {
e64eba00 L	485	switch (led_stat[i].mode) {
	486	case PULSE:
	487	if (led_timer[i] == 0) {
	488	led_off(i);
	489	led_stat[i].mode = NOTHING;
	490	}
	491	break;
	492	case BLINK1:
	493	case BLINK2:
	494	if (led_timer[i] == 0) {
	495	if (led_is_on(i))
	496	led_timer[i] = led_stat[i].offtime;
	497	else
	498	led_timer[i] = led_stat[i].ontime;
	499	led_toggle(i);
	500	}
	501	break;
	502	default:
	503	break;
	504	}
	505	}
	506	}
	507
d9c2b1b6 L	508	struct msg_item {
	509	uint8_t fct;
	510	uint8_t sub_min, sub_max;
	511	void (func)(uint8_t, int, uint8_t );
	512	};
	513
	514	uint32_t msg_to_addr(uint8_t *msg)
6b81b39f	515	{
0c5890bb	516	uint32_t addr = msg[0] \| (msg[1] << 8) \| ((uint32_t)msg[2] << 16);
d9c2b1b6 L	517
	518	return addr;
	519
6b81b39f L	520	}
6b81b39f L	521
d9c2b1b6	522	void do_msg_ini_msgfifo(uint8_t subf, int len, uint8_t * msg)
6b81b39f	523	{
d9c2b1b6 L	524	(void)subf; (void)len;
	525
	526	z80_init_msg_fifo(msg_to_addr(msg));
	527	}
	528
	529
	530	void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
	531	{
	532	(void)len;
	533
	534	z80_memfifo_init(subf - 1, msg_to_addr(msg));
6b81b39f L	535	}
6b81b39f L	536
d9c2b1b6 L	537
	538	void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
	539	{
	540	(void)subf;
	541
	542	while (len--)
	543	putchar(*msg++);
	544	}
	545
	546
	547	const struct msg_item z80_messages[] =
	548	{
0c5890bb L	549	{ 0, /* fct nr. */
0c5890bb L	550	0, 0, /* sub fct nr. from, to */
d9c2b1b6 L	551	&do_msg_ini_msgfifo},
	552	{ 0,
	553	1, 2,
	554	&do_msg_ini_memfifo},
	555	{ 1,
	556	1, 1,
	557	&do_msg_char_out},
	558	{ 0xff, /* end mark */
	559	0, 0,
	560	0},
	561
	562	};
	563
	564
	565
	566
6b81b39f L	567	void do_message(int len, uint8_t *msg)
6b81b39f L	568	{
d9c2b1b6	569	uint8_t fct, sub_fct;
0c5890bb	570	int_fast8_t i = 0;
6b81b39f	571
d9c2b1b6 L	572	if (len >= 2) {
	573	fct = *msg++;
	574	sub_fct = *msg++;
	575	len -= 2;
	576
	577	while (fct != z80_messages[i].fct)
	578	++i;
	579
	580	if (z80_messages[i].fct == 0xff) {
	581	DBG_P(1, "do_message: Unknown function: %i, %i\n",
	582	fct, sub_fct);
	583	return; /* TODO: unknown message # */
	584	}
	585
	586	while (fct == z80_messages[i].fct) {
	587	if (sub_fct >= z80_messages[i].sub_min && sub_fct <= z80_messages[i].sub_max )
	588	break;
	589	++i;
6b81b39f	590	}
d9c2b1b6 L	591
	592	if (z80_messages[i].fct != fct) {
	593	DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
	594	fct, sub_fct);
	595	return; /* TODO: unknown message sub# */
	596	}
	597
	598	(z80_messages[i].func)(sub_fct, len, msg);
	599
	600
6b81b39f	601	} else {
d9c2b1b6 L	602	/* TODO: error */
d9c2b1b6 L	603	DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
6b81b39f L	604	}
	605	}
	606
	607
6b81b39f	608
d9c2b1b6 L	609	#define CTRBUF_LEN 256
	610
	611	void check_msg_fifo(void)
0d318092	612	{
6b81b39f	613	int ch;
0c5890bb	614	static int_fast8_t state;
6b81b39f L	615	static int msglen,idx;
	616	static uint8_t buffer[CTRBUF_LEN];
	617
	618	while (state != 3 && (ch = z80_msg_fifo_getc()) >= 0) {
	619	switch (state) {
	620	case 0: /* wait for start of message */
	621	if (ch == 0x81) {
	622	msglen = 0;
	623	idx = 0;
	624	state = 1;
	625	}
	626	break;
	627	case 1: /* get msg len */
	628	if (ch > 0 && ch <= CTRBUF_LEN) {
	629	msglen = ch;
	630	state = 2;
	631	} else
	632	state = 0;
	633	break;
	634	case 2: /* get message */
	635	buffer[idx++] = ch;
	636	if (idx == msglen)
	637	state = 3;
	638	break;
0d318092 L	639	}
0d318092 L	640	}
6b81b39f L	641
	642	if (state == 3) {
	643	do_message(msglen, buffer);
	644	state = 0;
	645	}
0d318092 L	646	}
0d318092 L	647
6b81b39f L	648
	649	void z80_load_mem(void)
	650	{
6b81b39f L	651	unsigned sec = 0;
	652	uint32_t sec_base = hdrom_start;
	653
0c5890bb L	654	DBG_P(1, "Loading z80 memory... \n");
0c5890bb L	655
6b81b39f L	656	while (sec < hdrom_sections) {
	657	DBG_P(2, " From: 0x%.5lX to: 0x%.5lX (%5li bytes)\n",
	658	hdrom_address[sec],
	659	hdrom_address[sec]+hdrom_length_of_sections[sec] - 1,
	660	hdrom_length_of_sections[sec]);
	661
	662	z80_write_block((unsigned char ) &hdrom[sec_base], / src */
	663	hdrom_address[sec], /* dest */
	664	hdrom_length_of_sections[sec]); /* len */
	665	sec_base+=hdrom_length_of_sections[sec];
	666	sec++;
	667	}
	668	}
e64eba00 L	669	/--------------------------------------------------------------------------/
	670
	671	int main(void)
	672	{
0c5890bb	673	int_fast8_t state = 0;
6b81b39f	674	int ch;
e64eba00 L	675
	676	clock_setup();
	677	gpio_setup();
	678	tim3_setup();
	679	setvbuf(stdout, NULL, _IONBF, 0);
6b81b39f	680	serial_setup();
0d318092	681	printf("\n(STM32F100+HD64180)_stamp Tester\n");
e64eba00	682
6b81b39f L	683	DBG_P(1, "z80_setup_bus... ");
6b81b39f L	684	z80_setup_msg_fifo();
e64eba00	685	z80_setup_bus();
6b81b39f	686	DBG_P(1, "done.\n");
e64eba00 L	687
	688	/*
	689	* If the RTC is pre-configured just allow access, don't reconfigure.
	690	* Otherwise enable it with the LSE as clock source and 0x7fff as
	691	* prescale value.
	692	*/
333f40fa	693	rtc_auto_awake(RCC_LSE, 0x7fff);
e64eba00 L	694
e64eba00 L	695	systick_setup();
e64eba00	696
6b81b39f	697	DBG_P(1, "Get bus... ");
e64eba00 L	698	z80_busreq(LOW);
e64eba00 L	699	z80_reset(HIGH);
0d318092	700	z80_request_bus();
6b81b39f	701	DBG_P(1, "got it!\n");
35edb766	702
e64eba00 L	703	z80_memset(0, 0x76, 0x80000);
e64eba00 L	704	//z80_sram_fill(0, 512 * 1024, 0x76, 0);
0c5890bb	705	z80_sram_cmp(0, (uint32_t)512 * 1024, 0x76, 0);
35edb766	706
6b81b39f	707	z80_load_mem();
e64eba00	708	z80_reset(LOW);
6b81b39f	709	DBG_P(1, "Bus released!\n");
e64eba00 L	710	z80_release_bus();
e64eba00 L	711	z80_reset(HIGH);
6b81b39f	712	DBG_P(1, "Reset released!\n");
35edb766 L	713
35edb766 L	714
e64eba00 L	715	ledset(0, BLINK1, 50);
	716
	717	while (1) {
6b81b39f	718
e64eba00 L	719	if (Stat & S_10MS_TO) {
	720	Stat &= ~S_10MS_TO;
	721	do_10ms();
	722	}
	723
0d318092	724	if (get_key_short(KEY0)) {
e64eba00	725	z80_reset_pulse();
0d318092	726	}
e64eba00	727
6b81b39f L	728	if ((ch = serial_getc()) >= 0) {
6b81b39f L	729	switch (state) {
e64eba00	730	case 0:
6b81b39f L	731	if (ch == ESCCHAR) {
	732	state = 1;
	733	/* TODO: Timer starten */
	734	} else
	735	z80_memfifo_putc(fifo_out, ch);
e64eba00	736	break;
6b81b39f L	737	case 1:
6b81b39f L	738	switch (ch) {
e64eba00	739
6b81b39f	740	case 'h': /* test: green led on */
e64eba00 L	741	tim3_set(-1);
e64eba00 L	742	break;
6b81b39f	743	case 'l': /* test: green led off */
e64eba00 L	744	tim3_set(0);
e64eba00 L	745	break;
6b81b39f L	746	case 'p': /* test: pulse on led pin */
	747	tim3_set(24000000 / 1000000 * 5); /* 5 us */
	748	break;
	749	case 'r':
	750	z80_reset_pulse();
e64eba00	751	break;
e64eba00	752
6b81b39f L	753	case ESCCHAR:
	754	default:
	755	z80_memfifo_putc(fifo_out, ch);
	756	}
	757	state = 0;
	758	break;
e64eba00	759	}
e64eba00	760	}
0d318092	761
6b81b39f	762	check_msg_fifo();
e64eba00 L	763	}
	764
	765	return 0;
	766	}