2 * (C) Copyright 2018 Leo C. <erbl259-lmu@yahoo.de>
4 * SPDX-License-Identifier: GPL-2.0
9 #include <util/atomic.h>
12 #include "con-utils.h"
16 #include "getopt-min.h"
19 /* hack to get Z180 loadfile into flash memory */
20 #define const const FLASH
21 #include "../z180/cpuinfo.h"
24 #define DEBUG_CPU 1 /* set to 1 to debug */
26 #define debug_cpu(fmt, args...) \
27 debug_cond(DEBUG_CPU, fmt, ##args)
30 char * ulltoa (uint64_t val
, char *s
)
35 *p
++ = (val
% 10) + '0';
45 * delay for <count> ms...
47 static void test_delay(uint32_t count
)
49 uint32_t ts
= get_timer(0);
51 while (get_timer(ts
) <= count
);
54 static uint32_t z80_measure_phi(uint_fast8_t cycles
)
64 TCCR3B
= 0b000<<CS30
; /* stop counter */
70 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
71 /* Reset pending int */
73 /* Wait for falling edge */
74 while ((EIFR
& _BV(INTF6
)) == 0)
77 TCCR3B
= 0b110<<CS30
; /* Count falling edges on T3 (==INT6) */
78 TIFR4
= _BV(OCF4B
); /* clear compare match flag */
80 while (ref_ovfl
< 60) {
81 if ((TIFR4
& _BV(OCF4B
)) != 0) {
85 if ((TIFR3
& _BV(TOV3
)) != 0) {
93 if (EIFR
& _BV(INTF6
)) {
94 TCCR3B
= 0b000<<CS30
; /* stop counter */
98 if ((TIFR4
& _BV(OCF4B
)) != 0) {
105 if ((TIFR3
& _BV(TOV3
)) != 0) {
110 uint32_t ref_cnt
= (ref_stop
- OCR4B
) + ((uint32_t)ref_ovfl
<< 16);
111 uint32_t x_cnt
= TCNT3
+ ((uint32_t) x_ovfl
<< 16);
112 uint64_t x_tmp
= (uint64_t) 100000 * (x_cnt
* cycles
);
114 // char x_tmp_str[21];
116 // debug_cpu("TCNT3: %6u, ref_cnt: %9lu\n", TCNT3, ref_cnt);
117 // ulltoa(x_tmp, x_tmp_str);
118 // debug_cpu("x_tmp: %s\n", x_tmp_str);
120 x_tmp
= (x_tmp
* getenv_ulong(PSTR(ENV_FMON
), 10, F_CPU
) + (ref_cnt
/ 2)) / ref_cnt
;
122 // ulltoa(x_tmp, x_tmp_str);
123 // debug_cpu("x_tmp: %s\n", x_tmp_str);
125 /* round to 5 decimal digits */
127 while (sc
> 0 || x_tmp
>= 100000) {
128 x_tmp
= (x_tmp
+ 5)/10;
144 static const FLASH
char * const FLASH cpu_strings
[] = {
155 #define O_SILENT (1<<0)
156 #define O_WENV (1<<1)
157 #define O_LOAD_LOOP (1<<2)
158 #define O_UNLOAD_LOOP (1<<3)
160 static const FLASH
char * const FLASH opt_strings
[] = {
161 FSTR("swnu"), /* Options for chkcpu */
162 FSTR("swnuc:t:"), /* Oprions for cpufreq */
165 command_ret_t
do_cpu_freq_chk(cmd_tbl_t
*cmdtp UNUSED
, uint_fast8_t flag UNUSED
, int argc
, char * const argv
[])
167 uint_fast8_t options
= O_LOAD_LOOP
| O_UNLOAD_LOOP
;
168 uint_fast8_t cputype
= 0;
169 uint32_t cpu_freq
= 0;
170 uint_fast8_t lcycles
= 0;
171 uint_fast8_t freq_cmd
= 0;
172 uint16_t timeout
= 1000;
174 ERRNUM err
= ESUCCESS
;
176 if (argv
[0][0] == 'f')
180 while ((opt
= getopt(argc
, argv
, opt_strings
[freq_cmd
])) != -1) {
189 options
&= ~O_LOAD_LOOP
;
192 options
&= ~O_UNLOAD_LOOP
;
195 lcycles
= eval_arg(optarg
, NULL
);
198 timeout
= eval_arg(optarg
, NULL
);
201 return CMD_RET_USAGE
;
204 if (argc
- optind
!= 0)
205 return CMD_RET_USAGE
;
207 if (z80_bus_state() & ZST_RUNNING
)
208 cmd_error(CMD_RET_FAILURE
, ERUNNING
, NULL
);
210 uint8_t *mem_save
= NULL
;
211 if (options
& O_LOAD_LOOP
) {
212 mem_save
= (uint8_t *) malloc(cpuinfo_length
);
213 if (mem_save
== NULL
)
214 cmd_error(CMD_RET_FAILURE
, ENOMEM
, NULL
);
215 z80_bus_cmd(Request
);
216 z80_read_block(mem_save
, 0, cpuinfo_length
);
217 z80_load_mem(0, cpuinfo
, &cpuinfo_sections
, cpuinfo_address
,
218 cpuinfo_length_of_sections
);
219 z80_bus_cmd(Release
);
222 /* Save state and disable INT5/INT6 */
223 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
228 EIFR
= _BV(INTF5
); /* Reset pending int */
232 clear_ctrlc(); /* forget any previous Control C */
233 /* Wait for falling edge */
235 /* check for ctrl-c to abort... */
236 if (had_ctrlc() || ctrlc()) {
240 } while ((EIFR
& _BV(INTF5
)) == 0);
244 z80_bus_cmd(Request
);
245 if (z80_read(3) == 0xFF)
246 lcycles
= z80_read(5);
247 z80_bus_cmd(Release
);
250 cpu_freq
= z80_measure_phi(lcycles
);
254 /* Restore INT5/INT6 */
255 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
256 if ((eimsk_save
& _BV(INT5
)) != 0)
258 if ((eimsk_save
& _BV(INT6
)) != 0)
260 /* Reset pending int */
264 Stat
&= ~S_MSG_PENDING
;
265 Stat
&= ~S_CON_PENDING
;
268 z80_bus_cmd(Request
);
269 if (z80_read(3) == 0xFF)
270 cputype
= z80_read(4);
271 z80_bus_cmd(Release
);
274 if ((mem_save
!= NULL
) && options
& O_UNLOAD_LOOP
) {
275 z80_bus_cmd(Request
);
276 z80_write_block(mem_save
, 0, cpuinfo_length
);
277 z80_bus_cmd(Release
);
282 cmd_error(CMD_RET_FAILURE
, err
, NULL
);
286 if (!(options
& O_SILENT
))
287 printf_P(PSTR("%lu\n"), cpu_freq
);
290 if (options
& O_WENV
) {
291 if (setenv_ulong(PSTR(ENV_CPU_FREQ
), cpu_freq
)) {
292 if (!(options
& O_SILENT
))
293 printf_P(PSTR("'SETENV (%S, %lu)' failed!\n"), PSTR(ENV_CPU_FREQ
), cpu_freq
);
294 return CMD_RET_FAILURE
;
299 if (cputype
>= ARRAY_SIZE(cpu_strings
))
301 printf_P(PSTR("Detected CPU: %S\n"), cpu_strings
[cputype
]);
304 return CMD_RET_SUCCESS
;
307 command_ret_t
do_cpu_test(cmd_tbl_t
*cmdtp UNUSED
, uint_fast8_t flag UNUSED
, int argc
, char * const argv
[])
310 uint32_t pulsewidth
= 10; /* ms */
313 while ((opt
= getopt(argc
, argv
, PSTR("t:"))) != -1) {
316 pulsewidth
= eval_arg(optarg
, NULL
);
319 return CMD_RET_USAGE
;
323 if ((z80_bus_state() & ZST_ACQUIRED
) != RESET
)
324 cmd_error(CMD_RET_FAILURE
, ERUNNING
, NULL
);
326 clear_ctrlc(); /* forget any previous Control C */
328 z80_bus_cmd(Request
);
329 test_delay(pulsewidth
);
330 z80_bus_cmd(Release
);
331 test_delay(pulsewidth
);
332 } while (!(had_ctrlc() || ctrlc()));
334 return CMD_RET_SUCCESS
;
337 command_ret_t
do_bus_test(cmd_tbl_t
*cmdtp UNUSED
, uint_fast8_t flag UNUSED
, int argc UNUSED
, char * const argv
[] UNUSED
)
343 while ((opt
= getopt(argc
, argv
, PSTR("t:"))) != -1) {
346 pulsewidth
= eval_arg(optarg
, NULL
);
349 return CMD_RET_USAGE
;
355 " 1: RESET 4: RUN r: Toggle /RESET\n"
356 " 2: REQUEST 5: RESTART b: Toggle /BUSREQ\n"
357 " 3: RELEASE 6: M_CYCLE\n"
366 case '1': /* bus_cmd RESET */
367 case '2': /* bus_cmd REQUEST */
368 case '3': /* bus_cmd RELEASE */
369 case '4': /* bus_cmd RUN */
370 case '5': /* bus_cmd RESTART */
371 case '6': /* bus_cmd M_CYCLE */
372 z80_bus_cmd(ch
- '1' + Reset
);
374 case 'r': /* Toggle RESET */
377 case 'b': /* Toggle BUSREQ */
382 uint32_t cycles
= z80_get_busreq_cycles();
383 printf_P(PSTR("\rState: %.2x, cycles: %lu, time: %luus "),
384 z80_bus_state(), cycles
, (uint32_t) (cycles
* 1000000LL / F_CPU
));
386 } while (ch
!= 0x03);
389 return CMD_RET_SUCCESS
;
392 command_ret_t
do_busack_test(cmd_tbl_t
*cmdtp UNUSED
, uint_fast8_t flag UNUSED
, int argc UNUSED
, char * const argv
[] UNUSED
)
395 if ((z80_bus_state() & ZST_ACQUIRED
) != RESET
)
396 cmd_error(CMD_RET_FAILURE
, ERUNNING
, NULL
);
398 z80_bus_cmd(Request
);
399 uint32_t result
= z80_get_busreq_cycles();
401 z80_bus_cmd(Release
);
406 pinconf
= gpio_config_get(pin
);
407 if (pinconf
== OUTPUT_TIMER
) {
408 div
= gpio_clockdiv_get(pin
);
413 printf_P(PSTR("cycles: %lu, time: %luus\n"), result
, (uint32_t) (result
* 1000000LL / F_CPU
));
415 return CMD_RET_SUCCESS
;
420 * command table for subcommands
423 cmd_tbl_t cmd_tbl_cpu
[] = {
425 freq
, CONFIG_SYS_MAXARGS
, CTBL_RPT
, do_cpu_freq_chk
,
426 "Measure cpu frequency",
427 "[-qwn] [-c loopcycles] [-t timeout]\n"
429 // " -w Write result to environment variable '"ENV_CPU_FREQ"'"
432 chkcpu
, CONFIG_SYS_MAXARGS
, CTBL_RPT
|CTBL_SUBCMDAUTO
, do_cpu_freq_chk
,
433 "Check/Identify CPU",
437 buscmd
, CONFIG_SYS_MAXARGS
, CTBL_RPT
, do_bus_test
,
442 test
, CONFIG_SYS_MAXARGS
, CTBL_RPT
, do_cpu_test
,
443 "Do bus request/release cycles",
447 busack
, 2, CTBL_RPT
, do_busack_test
,
448 "Get time from /Reset high to /BUSACK low",
453 help
, CONFIG_SYS_MAXARGS
, CTBL_RPT
, do_help
,
454 "Print sub command description/usage",
456 " - print brief description of all sub commands\n"
457 "fat help command ...\n"
458 " - print detailed usage of sub cmd 'command'"
461 /* This does not use the CMD_TBL_ITEM macro as ? can't be used in symbol names */
462 {FSTR("?"), CONFIG_SYS_MAXARGS
, CTBL_RPT
, do_help
,
464 #ifdef CONFIG_SYS_LONGHELP
466 #endif /* CONFIG_SYS_LONGHELP */
468 #ifdef CONFIG_AUTO_COMPLETE
472 /* Mark end of table */
473 CMD_TBL_END(cmd_tbl_cpu
)
477 command_ret_t
do_cpu(cmd_tbl_t
*cmdtp UNUSED
, uint_fast8_t flag UNUSED
, int argc UNUSED
, char * const argv
[] UNUSED
)
479 //puts_P(PSTR("Huch?"));
481 return CMD_RET_USAGE
;
485 #if 0 /* Z180 Single Step Functions */
487 * Z180 Single Step Functions
497 #define DDR_STEP DDRG
500 #define DDR_WAIT DDRG
501 /* All three signals are on the same Port (PortG) */
502 #define PORT_SS PORTG
506 static bool ss_available
;
508 int single_step_setup(void)
510 ss_available
= false;
513 if (z80_bus_state() & ZST_RUNNING
||
514 !(z80_bus_cmd(Request
) & ZST_ACQUIRED
))
518 /* STEP, RUN output, WAIT input */
520 PORT_SS
|= _BV(RUN
) | _BV(STEP
);
521 DDR_SS
|= _BV(RUN
) | _BV(STEP
);
522 DDR_SS
&= ~_BV(WAIT
);
524 /* RUN high, MREQ pulse --> WAIT should be low */
527 if ((PIN_SS
& _BV(WAIT
)) == 0) {
529 /* RUN high, STEP pulse --> WAIT should be high */
532 if ((PIN_SS
& _BV(WAIT
)) != 0) {
534 /* RUN high, MREQ pulse --> WAIT should be low */
536 if ((PIN_SS
& _BV(WAIT
)) == 0) {
538 /* RUN low --> WAIT should be high */
540 if ((PIN_SS
& _BV(WAIT
)) != 0) {
542 /* RUN low, STEP pulse --> WAIT should be high */
545 if ((PIN_SS
& _BV(WAIT
)) != 0) {
547 /* all tests passed */
556 DDR_SS
&= ~(_BV(STEP
) | _BV(RUN
));
557 PORT_SS
|= _BV(RUN
) | _BV(STEP
);
560 return ss_available
? 0 : -1;