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1 /*
2 * (C) Copyright 2014-2016 Leo C. <erbl259-lmu@yahoo.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0
5 */
6
7 #include "z180-serv.h"
8 #include "common.h"
9 #include <stdlib.h>
10 #include <string.h>
11 #include <stdbool.h>
12 #include <util/atomic.h>
13
14 #include "config.h"
15 #include "background.h"
16 #include "env.h"
17 #include "ff.h"
18 #include "serial.h"
19 #include "z80-if.h"
20 #include "debug.h"
21 #include "print-utils.h"
22 #include "timer.h"
23 #include "time.h"
24 #include "bcd.h"
25 #include "rtc.h"
26
27 #define DEBUG_CPM_SDIO 0 /* set to 1 to debug */
28
29 #define debug_cpmsd(fmt, args...) \
30 debug_cond(DEBUG_CPM_SDIO, fmt, ##args)
31
32
33 /*--------------------------------------------------------------------------*/
34
35 struct msg_item {
36 uint8_t fct;
37 uint8_t sub_min, sub_max;
38 void (*func)(uint8_t, int, uint8_t *);
39 };
40
41 uint32_t msg_to_addr(uint8_t *msg)
42 {
43 union {
44 uint32_t as32;
45 uint8_t as8[4];
46 } addr;
47
48 addr.as8[0] = msg[0];
49 addr.as8[1] = msg[1];
50 addr.as8[2] = msg[2];
51 addr.as8[3] = 0;
52
53 return addr.as32;
54 }
55
56
57 static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
58 {
59 z80_memfifo_putc(fifo_msgout, 0xAE);
60 z80_memfifo_putc(fifo_msgout, len+2);
61 z80_memfifo_putc(fifo_msgout, func);
62 z80_memfifo_putc(fifo_msgout, subf);
63
64 return 0;
65 }
66
67 int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
68 {
69 msg_xmit_header(func, subf, len);
70 while (len--)
71 z80_memfifo_putc(fifo_msgout, *msg++);
72
73 return 0;
74 }
75
76 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
77 {
78 (void)len;
79
80 z80_memfifo_init(subf, msg_to_addr(msg));
81 }
82
83
84 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
85 {
86 (void)subf;
87
88 while (len--)
89 putchar(*msg++);
90 }
91
92 /* echo message */
93 void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
94 {
95 (void)subf;
96
97 /* send re-echo */
98 msg_xmit(1, 3, len, msg);
99 }
100
101 /* get timer */
102 void do_msg_get_timer(uint8_t subf, int len, uint8_t * msg)
103 {
104 uint32_t time_ms = (len >= 4) ? *(uint32_t *) msg : 0;
105
106 time_ms = get_timer(time_ms);
107 msg_xmit(3, subf, sizeof(time_ms), (uint8_t *) &time_ms);
108 }
109
110 /* ---------------------------------------------------------------------------*/
111
112 #define CPM_DAY_OFFSET ((1978-1900) * 365 + 19) /* 19 leap years */
113
114 /*
115 * Convert CP/M time stamp to a broken-down time structure
116 *
117 */
118 int mk_date_time (int len, uint8_t *msg, struct tm *tmp)
119 {
120 time_t stamp;
121
122 if (len != 5)
123 return -1;
124
125 /* days since 2000-01-01 */
126 long days = msg[3] + (msg[4] << 8) - 8036;
127
128 if (days < 0)
129 return -1;
130
131 stamp = days * ONE_DAY;
132 stamp += bcd2bin(msg[0]);
133 stamp += bcd2bin(msg[1]) * 60 ;
134 stamp += bcd2bin(msg[2]) * 3600L;
135 gmtime_r(&stamp, tmp);
136 return 0;
137 }
138
139 void mk_cpm_time(struct tm *tmp, uint8_t cpm_time[5])
140 {
141 uint16_t days = 1;
142 uint_fast8_t leap=2;
143
144 for (int year=78; year < tmp->tm_year; year++) {
145 days = days + 365 + (leap == 0);
146 leap = (leap+1)%4;
147 }
148 days += tmp->tm_yday;
149
150 cpm_time[0] = bin2bcd(tmp->tm_sec);
151 cpm_time[1] = bin2bcd(tmp->tm_min);
152 cpm_time[2] = bin2bcd(tmp->tm_hour);
153 cpm_time[3] = days;
154 cpm_time[4] = days >> 8;
155 }
156
157 /* get/set cp/m time */
158 void do_msg_get_set_time(uint8_t subf, int len, uint8_t * msg)
159 {
160 struct tm t;
161 uint8_t cpm_time[5];
162 int rc;
163
164 memset(cpm_time, 0, ARRAY_SIZE(cpm_time));
165
166 switch (subf) {
167 case 3: /* set date & time */
168 /* initialize t with current time */
169 rc = rtc_get (&t);
170
171 if (rc >= 0) {
172 /* insert new date & time */
173 if (mk_date_time (len, msg, &t) != 0) {
174 my_puts_P(PSTR("## set_time: Bad date format\n"));
175 break;
176 }
177
178 time_t time;
179 time = mk_gmtime(&t);
180 gmtime_r(&time, &t);
181
182 /* and write to RTC */
183 rc = rtc_set (&t);
184 if(rc)
185 my_puts_P(PSTR("## set_time: Set date failed\n"));
186 } else {
187 my_puts_P(PSTR("## set_time: Get date failed\n"));
188 }
189 /* FALL TROUGH */
190 case 2: /* get date & time */
191 rc = rtc_get (&t);
192 if (rc >= 0) {
193 time_t time;
194 time = mk_gmtime(&t);
195 //mktime(&t);
196 gmtime_r(&time, &t);
197
198 mk_cpm_time(&t, cpm_time);
199 } else {
200 my_puts_P(PSTR("## get_time: Get date failed\n"));
201 }
202 break;
203 }
204
205 msg_xmit(3, subf, sizeof(cpm_time), cpm_time);
206 }
207
208 /* ---------------------------------------------------------------------------*/
209
210 static uint8_t drv;
211 static uint8_t disk_buffer[CONFIG_CPM_BLOCK_SIZE];
212 static struct cpm_drive_s drv_table[CONFIG_CPM_MAX_DRIVE];
213 static int handle_cpm_drv_to;
214
215 typedef enum {SINGLE, START, MIDDLE, END} dbgmsg_t;
216
217 void drv_debug(dbgmsg_t phase, const FLASH char *const fmt, ...) \
218 {
219 struct cpm_drive_s *dp = &drv_table[drv];
220
221 if (dp->opt & DRV_OPT_DEBUG) {
222
223 va_list ap;
224 va_start (ap, fmt);
225
226 if (phase == SINGLE || phase == START)
227 printf_P(PSTR("# %7lu dsk%d: "), get_timer(0), drv);
228
229 vfprintf_P (stdout, fmt, ap);
230
231 if (phase == SINGLE || phase == END)
232 putc('\n', stdout);
233
234 va_end (ap);
235 }
236 }
237
238 int drv_list(void)
239 {
240 for (uint8_t i = 0; i < CONFIG_CPM_MAX_DRIVE; i++) {
241 struct cpm_drive_s * p = &drv_table[i];
242 if (p->img_name) {
243 printf_P(PSTR(" dsk%d: %2S %3S attached to %s\n"), i,
244 p->opt&DRV_OPT_RO ? PSTR("RO") : PSTR("RW"),
245 p->opt&DRV_OPT_DEBUG ? PSTR("DBG") : PSTR(""),
246 p->img_name);
247 }
248 }
249 return 0;
250 }
251
252 int drv_detach(uint8_t unit)
253 {
254 drv = unit;
255 if (drv < CONFIG_CPM_MAX_DRIVE) {
256 struct cpm_drive_s *p = &drv_table[drv];
257
258 drv_debug(SINGLE, PSTR("detach from '%s'"), p->img_name ? p->img_name : "-");
259
260 if (p->img_name) {
261 f_close(&p->fd);
262 free(p->img_name);
263 p->opt = 0;
264 p->flags &= ~DRV_FLG_DIRTY;
265 p->img_name = NULL;
266
267 uint32_t scb = getenv_ulong(PSTR(ENV_CPM3_SCB), 16, 0);
268 if (scb && (z80_bus_cmd(Request) & ZST_ACQUIRED)) {
269 z80_write(scb + 0xf0, 0xff);
270 z80_write(p->dph + 11, 0xff);
271 z80_bus_cmd(Release);
272 }
273 }
274 }
275 return 0;
276 }
277
278 static int drv_find_file_attached(const char *fn)
279 {
280 for (uint8_t i = 0; i < CONFIG_CPM_MAX_DRIVE; i++) {
281 struct cpm_drive_s *p = &drv_table[i];
282 if (p->img_name && !strcmp(fn, p->img_name)) {
283 return i;
284 }
285 }
286 return -1;
287 }
288
289 int drv_attach(uint8_t unit, const char *filename, drv_opt_t options)
290 {
291 int res;
292
293 drv = unit;
294 if (drv >= CONFIG_CPM_MAX_DRIVE)
295 return EATRANGE;
296
297 struct cpm_drive_s *p = &drv_table[drv];
298
299 if (options & DRV_OPT_REATTATCH) {
300 if (filename) {
301 return EUNEXPARG;
302 }
303
304 if (!p->img_name) {
305 return EATNOT;
306 }
307
308 /* change options */
309 if ((p->opt ^ options) & DRV_OPT_RO) {
310 f_close(&p->fd);
311 res = f_open(&p->fd, p->img_name,
312 FA_READ | (options&DRV_OPT_RO ? 0 : FA_WRITE));
313 }
314
315 p->opt = options & ~DRV_OPT_REATTATCH;
316
317 } else {
318
319 if (p->img_name)
320 return EATALRDY;
321 if (drv_find_file_attached(filename) >= 0)
322 return EATOTHER;
323
324 p->opt = options;
325
326 /* new attachment */
327
328 if ((p->img_name = strdup(filename)) == NULL)
329 return ENOMEM;
330
331 res = f_open(&p->fd, p->img_name,
332 FA_READ | (options&DRV_OPT_RO ? 0 : FA_WRITE));
333
334 if (!res && f_size(&p->fd) < CONFIG_CPM_DISKSIZE) {
335 #if 0
336 unsigned int bw;
337 debug_cpmsd(" expanding image file from %ld to %ld\n",
338 f_size(&p->fd), CONFIG_CPM_DISKSIZE);
339
340 res = f_lseek(&p->fd, CONFIG_CPM_DISKSIZE-CONFIG_CPM_BLOCK_SIZE);
341 if (!res) {
342 memset(disk_buffer, 0xe5, CONFIG_CPM_BLOCK_SIZE);
343 res = f_write(&p->fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &bw);
344 if (res || bw < CONFIG_CPM_BLOCK_SIZE) {
345 debug_cpmsd(" failed! res: %d, bytes written: %u\n", res, bw);
346 }
347 p->flags |= DRV_FLG_DIRTY;
348 bg_setstat(handle_cpm_drv_to, 1);
349 }
350 #else
351 drv_debug(SINGLE, PSTR("wrong image file size: %ld, should be %ld"),
352 f_size(&p->fd), CONFIG_CPM_DISKSIZE);
353 res = 64;
354 #endif
355 }
356 if (res) {
357 drv_detach(drv);
358 return EATOPEN;
359 }
360 }
361
362 return ESUCCESS;
363 }
364
365
366 int cpm_drv_to(int state)
367 {
368 static uint32_t ts;
369
370 switch(state) {
371 case 0:
372 break;
373
374 case 1:
375 ts = get_timer(0);
376 state = 2;
377 break;
378
379 case 2:
380 if (get_timer(ts) > 1000) {
381 for (uint_fast8_t i=0; i < CONFIG_CPM_MAX_DRIVE; i++) {
382 if (drv_table[i].flags & DRV_FLG_DIRTY) {
383 drv_table[i].flags &= ~DRV_FLG_DIRTY;
384 f_sync(&drv_table[i].fd);
385 drv = i;
386 drv_debug(SINGLE, PSTR("f_sync"));
387 }
388 }
389 state = 0;
390 }
391 }
392 return state;
393 }
394
395 static const FLASH char * const FLASH rc_messages[] = {
396 FSTR("OK"),
397 FSTR("Internal error: wrong message len"), /* 01 */
398 FSTR("Invalid relative drive #"), /* 02 */
399 FSTR("Bus timeout"), /* 03 */
400 FSTR("Access byond disk size"), /* 04 */
401 FSTR("Write protect"), /* 05 */
402 FSTR("No media"), /* 06 */
403 FSTR("R/W address == 0 !!!!"), /* 07 */
404 };
405
406 void msg_cpm_result(uint8_t subf, uint8_t rc, int res)
407 {
408 uint8_t result_msg[3];
409
410 if (res)
411 rc |= 0x80;
412
413 result_msg[0] = rc;
414 result_msg[1] = res;
415 result_msg[2] = res >> 8;
416
417 msg_xmit(2, subf, sizeof(result_msg), result_msg);
418
419 if (rc) {
420 #if GCC_BUG_61443
421 char msg[40];
422 strncpy_P(msg, rc_messages[rc & 0x7f], sizeof msg -1);
423 drv_debug(END, PSTR(" rc: %.02x/%d, '%s'"),
424 rc, res, msg);
425 #else
426 drv_debug(END, PSTR(" rc: %.02x/%d, '%S'"),
427 rc, res, rc_messages[rc & 0x7f]);
428 #endif
429 } else
430 drv_debug(END, PSTR(""));
431
432 }
433
434 /*
435 db 2 ; disk command
436 ds 1 ; subcommand (login/read/write)
437 ds 1 ; @adrv (8 bits) +0
438 ds 1 ; @rdrv (8 bits) +1
439 ds 3 ; @xdph (24 bits) +2
440 */
441
442 void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg)
443 {
444 struct cpm_drive_s *dp;
445 FRESULT res = 0;
446
447 (void)subf;
448
449 /* Get relative drive number */
450 drv = msg[1];
451 drv_debug(START, PSTR("login"));
452
453 if (len != 5) {
454 return msg_cpm_result(subf, 0x01, res);
455 }
456
457 if ( drv >= CONFIG_CPM_MAX_DRIVE) {
458 /* invalid relative drive number */
459 return msg_cpm_result(subf, 0x02, res);
460 }
461
462 dp = &drv_table[drv];
463 dp->flags &= ~DRV_FLG_OPEN;
464 dp->dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
465
466 if (dp->img_name == NULL) {
467 /* no file attached */
468 return msg_cpm_result(subf, 0x06, res);
469 }
470
471 f_close(&dp->fd);
472 res = f_open(&dp->fd, dp->img_name,
473 FA_READ | (dp->opt&DRV_OPT_RO ? 0 : FA_WRITE));
474
475 dp->flags |= DRV_FLG_OPEN;
476
477 /* send result*/
478 msg_cpm_result(subf, 0x00, res);
479 }
480
481
482 /*
483 db 2 ; disk command
484 ds 1 ; subcommand (login/read/write)
485 ds 1 ; @adrv (8 bits) +0
486 ds 1 ; @rdrv (8 bits) +1
487 ds 2 ; @trk (16 bits) +2
488 ds 2 ; @sect(16 bits) +4
489 ds 1 ; @cnt (8 bits) +6
490 ds 3 ; phys. transfer addr +7
491 */
492
493 #define ADRV 0
494 #define RDRV 1
495 #define TRK 2
496 #define SEC 4
497 #define CNT 6
498 #define ADDR 7
499
500 void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg)
501 {
502 struct cpm_drive_s *dp;
503 uint32_t addr;
504 uint32_t pos;
505 uint16_t track;
506 uint16_t sec;
507 uint8_t secs;
508 bool dowrite;
509 FRESULT res = 0;
510 uint8_t rc = 0;
511 bool buserr = 0;
512
513 drv = msg[RDRV];
514 dowrite = (subf == 2);
515
516 drv_debug(START, PSTR("%2S"), dowrite ? PSTR("W ") : PSTR(" R"));
517
518 if (len != 10) {
519 return msg_cpm_result(subf, 0x01, res);
520 }
521 if ( drv>= CONFIG_CPM_MAX_DRIVE) {
522 return msg_cpm_result(subf, 0x02, res);
523 }
524
525 dp = &drv_table[drv];
526 track = (uint16_t)(msg[TRK+1] << 8) + msg[TRK];
527 sec = (uint16_t)(msg[SEC+1] << 8) + msg[SEC];
528 secs = msg[CNT];
529 addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR];
530
531 if (dp->img_name == NULL) {
532 /* no media */
533 return msg_cpm_result(subf, 0x06, res);
534 }
535
536 /* TODO: tracks per sector from dpb */
537 pos = (track * 8UL + sec) * CONFIG_CPM_BLOCK_SIZE;
538
539 drv_debug(MIDDLE, PSTR(" T:%4d, S:%2d, cnt:%2d, lba: %.8lx, addr: %.5lx"),
540 track, sec, secs, pos, addr);
541
542 if (addr == 0) {
543 return msg_cpm_result(subf, 0x07, res);
544 }
545
546 if (dowrite && dp->opt & DRV_OPT_RO) {
547 return msg_cpm_result(subf, 0x05, res);
548 }
549
550
551 if (pos + secs * CONFIG_CPM_BLOCK_SIZE > CONFIG_CPM_DISKSIZE) {
552 drv_debug(MIDDLE, PSTR(" access > DISKSIZE:%.8lx!"),
553 CONFIG_CPM_DISKSIZE);
554 return msg_cpm_result(subf, 0x04, res);
555 }
556
557 res = f_lseek(&dp->fd, pos);
558
559 while (!res && secs--) {
560 unsigned int brw;
561 if (dowrite) {
562 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
563 buserr = 1;
564 break;
565 } else {
566 z80_read_block(disk_buffer, addr, CONFIG_CPM_BLOCK_SIZE);
567 z80_bus_cmd(Release);
568 }
569 res = f_write(&dp->fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &brw);
570 } else {
571 res = f_read(&dp->fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &brw);
572 if (res == FR_OK) {
573 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
574 buserr = 1;
575 break;
576 } else {
577 z80_write_block(disk_buffer, addr, CONFIG_CPM_BLOCK_SIZE);
578 z80_bus_cmd(Release);
579 }
580 }
581 }
582 if (brw != CONFIG_CPM_BLOCK_SIZE) {
583 drv_debug(MIDDLE, PSTR(" short rd/wr: res: %d, brw: %u"),
584 res, brw);
585 res = 64;
586 }
587 addr += CONFIG_CPM_BLOCK_SIZE;
588 }
589
590 if (dowrite && !res) {
591 dp->flags |= DRV_FLG_DIRTY;
592 bg_setstat(handle_cpm_drv_to, 1);
593 }
594
595 if (buserr) {
596 /* Bus timeout. how can this happen? */
597 rc = 0x03;
598 }
599
600 /* send result*/
601 msg_cpm_result(subf, rc, res);
602 }
603
604
605 const FLASH struct msg_item z80_messages[] =
606 {
607 { 0, /* fct nr. */
608 1, 3, /* sub fct nr. from, to */
609 do_msg_ini_memfifo},
610 { 1,
611 1, 1,
612 do_msg_char_out},
613 { 1,
614 2, 2,
615 do_msg_echo},
616 { 2,
617 0, 0,
618 do_msg_cpm_login},
619 { 2,
620 1, 2,
621 do_msg_cpm_rw},
622 { 3,
623 1, 1,
624 do_msg_get_timer},
625 { 3,
626 2, 3, /* 2: get, 3: set time and date */
627 do_msg_get_set_time},
628 { 0xff, /* end mark */
629 0, 0,
630 0},
631
632 };
633
634
635
636
637 void do_message(int len, uint8_t *msg)
638 {
639 uint8_t fct, sub_fct;
640 int_fast8_t i = 0;
641
642 if (len >= 2) {
643 fct = *msg++;
644 sub_fct = *msg++;
645 len -= 2;
646
647 while (fct != z80_messages[i].fct) {
648 if (z80_messages[i].fct == 0xff) {
649 DBG_P(1, "do_message: Unknown function: %i, %i\n",
650 fct, sub_fct);
651 return; /* TODO: unknown message # */
652 }
653
654 ++i;
655 }
656
657 while (fct == z80_messages[i].fct) {
658 if (sub_fct >= z80_messages[i].sub_min &&
659 sub_fct <= z80_messages[i].sub_max )
660 break;
661 ++i;
662 }
663
664 if (z80_messages[i].fct != fct) {
665 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
666 fct, sub_fct);
667 return; /* TODO: unknown message sub# */
668 }
669
670 (z80_messages[i].func)(sub_fct, len, msg);
671
672
673 } else {
674 /* TODO: error */
675 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
676 }
677 }
678
679
680
681 #define CTRBUF_LEN 256
682
683 void check_msg_fifo(void)
684 {
685 int ch;
686 static int_fast8_t state;
687 static int msglen,idx;
688 static uint8_t buffer[CTRBUF_LEN];
689
690 while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
691 switch (state) {
692 case 0: /* wait for start of message */
693 if (ch == 0xAE) { /* TODO: magic number */
694 msglen = 0;
695 idx = 0;
696 state = 1;
697 }
698 break;
699 case 1: /* get msg len */
700 if (ch > 0 && ch <= CTRBUF_LEN) {
701 msglen = ch;
702 state = 2;
703 } else
704 state = 0;
705 break;
706 case 2: /* get message */
707 buffer[idx++] = ch;
708 if (idx == msglen) {
709 do_message(msglen, buffer);
710 state = 0;
711 }
712 break;
713 }
714 }
715 }
716
717
718 int msg_handling(int state)
719 {
720 bool pending;
721
722 ATOMIC_BLOCK(ATOMIC_FORCEON) {
723 pending = (Stat & S_MSG_PENDING) != 0;
724 Stat &= ~S_MSG_PENDING;
725 }
726
727 if (pending) {
728 uint8_t init_request;
729 z80_bus_cmd(Request);
730 init_request = z80_read(0x43);
731 z80_bus_cmd(Release);
732 if ( init_request != 0) {
733 /* Get address of fifo 0 */
734 z80_bus_cmd(Request);
735 uint32_t fifo_addr = z80_read(0x40) +
736 ((uint16_t) z80_read(0x40+1) << 8) +
737 ((uint32_t) z80_read(0x40+2) << 16);
738 z80_write(0x43, 0);
739 z80_bus_cmd(Release);
740
741 if (fifo_addr != 0) {
742 z80_memfifo_init(fifo_msgin, fifo_addr);
743 state = 1;
744 } else
745 state = 0;
746
747 } else {
748 check_msg_fifo();
749 }
750 }
751
752 return state;
753 }
754
755
756 static int handle_msg_handling;
757
758 void setup_z180_serv(void)
759 {
760
761 handle_msg_handling = bg_register(msg_handling, 0);
762 handle_cpm_drv_to = bg_register(cpm_drv_to, 0);
763 }
764
765 void restart_z180_serv(void)
766 {
767 z80_bus_cmd(Request);
768 z80_memset(0x40, 0, 4);
769 z80_bus_cmd(Release);
770
771 for (int i = 0; i < NUM_FIFOS; i++)
772 z80_memfifo_init(i, 0);
773 bg_setstat(handle_msg_handling, 0);
774
775 }
776
777 #if 0
778 /*--------------------------------------------------------------------------*/
779
780 const FLASH uint8_t iniprog[] = {
781 0xAF, // xor a
782 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
783 0x3E, 0x30, // ld a,030h
784 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
785 };
786
787 const FLASH uint8_t sertest[] = {
788 0xAF, // xor a
789 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
790 0x3E, 0x30, // ld a,030h
791 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
792 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
793 0xED, 0x39, 0x03, // out0 (cntlb1),a
794 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
795 0xED, 0x39, 0x01, // out0 (cntla1),a
796 0x3E, 0x00, // ld a,0
797 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
798 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
799 0xE6, 0x80, // and 80h
800 0x28, 0xF9, // jr z,l0
801 0xED, 0x00, 0x09, // in0 b,(rdr1)
802 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
803 0xE6, 0x02, // and 02h
804 0x28, 0xF9, // jr z,l1
805 0xED, 0x01, 0x07, // out0 (tdr1),b
806 0x18, 0xEA, // jr l0
807 };
808
809 const FLASH uint8_t test1[] = {
810 0xAF, // xor a
811 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
812 0x3E, 0x30, // ld a,030h
813 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
814 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
815 0x06, 0x08, // ld b,dmct_e-dmclrt
816 0x0E, 0x20, // ld c,sar0l
817 0xED, 0x93, // otimr
818 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
819 0xED, 0x39, 0x31, // out0 (dmode),a ;
820 0x3E, 0x62, // ld a,062h ;enable dma0,
821 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
822 0x18, 0xFB, // jr cl_1 ;
823 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
824 0x00, // db 0 ;src
825 0x00, 0x00, // dw 0 ;dst (inc),
826 0x00, // db 0 ;dst
827 0x00, 0x00, // dw 0 ;count (64k)
828 };
829 #endif