avr/z180-serv.c

   1 /*
   2  * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include "common.h"
   8 #include <stdlib.h>
   9 #include <string.h>
  10 #include <stdbool.h>
  11 #include <util/atomic.h>
  12
  13 #include "background.h"
  14 #include "env.h"
  15 #include "ff.h"
  16 #include "serial.h"
  17 #include "z80-if.h"
  18 #include "debug.h"
  19 #include "print-utils.h"
  20 #include "z180-serv.h"
  21
  22 /*--------------------------------------------------------------------------*/
  23
  24
  25 uint8_t z80_get_byte(uint32_t adr)
  26 {
  27         uint8_t data;
  28
  29         z80_bus_cmd(Request);
  30         data = z80_read(adr);
  31         z80_bus_cmd(Release);
  32
  33         return data;
  34 }
  35
  36
  37 /*--------------------------------------------------------------------------*/
  38
  39 struct msg_item {
  40         uint8_t fct;
  41         uint8_t sub_min, sub_max;
  42         void (*func)(uint8_t, int, uint8_t *);
  43 };
  44
  45 uint32_t msg_to_addr(uint8_t *msg)
  46 {
  47         union {
  48                 uint32_t as32;
  49                 uint8_t as8[4];
  50         } addr;
  51
  52         addr.as8[0] = msg[0];
  53         addr.as8[1] = msg[1];
  54         addr.as8[2] = msg[2];
  55         addr.as8[3] = 0;
  56
  57         return addr.as32;
  58 }
  59
  60
  61 static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
  62 {
  63         z80_memfifo_putc(fifo_msgout, 0xAE);
  64         z80_memfifo_putc(fifo_msgout, len+2);
  65         z80_memfifo_putc(fifo_msgout, func);
  66         z80_memfifo_putc(fifo_msgout, subf);
  67
  68         return 0;
  69 }
  70
  71 int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
  72 {
  73         msg_xmit_header(func, subf, len);
  74         while (len--)
  75                 z80_memfifo_putc(fifo_msgout, *msg++);
  76
  77         return 0;
  78 }
  79
  80 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
  81 {
  82         (void)len;
  83
  84         z80_memfifo_init(subf, msg_to_addr(msg));
  85 }
  86
  87
  88 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
  89 {
  90         (void)subf;
  91
  92         while (len--)
  93                 putchar(*msg++);
  94 }
  95
  96 /* echo message */
  97 void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
  98 {
  99         (void)subf;
 100
 101         /* send re-echo */
 102         msg_xmit(1, 3, len, msg);
 103 }
 104
 105 /* ---------------------------------------------------------------------------*/
 106
 107 #define MAX_DEVICE      2
 108 #define MAX_DRIVE       2
 109 #define BLOCK_SIZE      512
 110
 111 struct fat_device_s {
 112         FATFS dd;
 113         bool active;
 114 };
 115
 116
 117 struct cpm_drive_s {
 118         uint8_t drv;
 119         uint8_t device;
 120         char *img_name;
 121         FIL fd;
 122 };
 123
 124 static uint8_t disk_buffer[BLOCK_SIZE];
 125 static struct fat_device_s device_table[MAX_DEVICE];
 126 static struct cpm_drive_s drv_table[MAX_DRIVE];
 127
 128 /*
 129         db      2       ; disk command
 130         ds      1       ; subcommand (login/read/write)
 131         ds      1       ; @adrv (8 bits)        +0
 132         ds      1       ; @rdrv (8 bits)        +1
 133         ds      3       ; @xdph (24 bits)       +2
 134 */
 135
 136 void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg)
 137 {
 138
 139         FRESULT res = 0;
 140         uint8_t rc = 0;
 141         uint8_t drv;
 142         char *np;
 143         uint8_t result_msg[3];
 144
 145         (void)subf;
 146
 147         if (len != 5) {     /* TODO: check adrv, rdrv */
 148                 rc = 0x01;
 149                 goto out;
 150         }
 151
 152         debug("\n##  login: %c:\n", msg[0]+'A');
 153
 154
 155         drv = msg[0];
 156         if ( drv>= MAX_DRIVE) {
 157                 rc = 0x02;
 158                 goto out;
 159         }
 160
 161         /* TODO: this has to be done somewhere globaly */
 162
 163         if (!device_table[0].active) {
 164                 f_mount(&device_table[0].dd, "0:", 0);
 165                 device_table[0].active = true;
 166         }
 167         if (!device_table[1].active) {
 168                 f_mount(&device_table[1].dd, "1:", 0);
 169                 device_table[1].active = true;
 170         }
 171
 172 /*
 173         uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
 174 */
 175
 176         if (drv_table[drv].img_name != NULL) {
 177                 debug("##  close: '%s'\n", drv_table[drv].img_name);
 178                 f_close(&drv_table[drv].fd);
 179                 free(drv_table[drv].img_name);
 180                 drv_table[drv].img_name = NULL;
 181         }
 182
 183         strcpy_P((char *)disk_buffer, PSTR("dsk0"));
 184         disk_buffer[3] = msg[0] + '0';
 185         if (((np = getenv((char*)disk_buffer)) == NULL) ||
 186                         ((drv_table[drv].img_name = strdup(np)) == NULL)) {
 187                 rc = 0x03;
 188                 goto out;
 189         }
 190
 191
 192         res = f_open(&drv_table[drv].fd, drv_table[drv].img_name,
 193                         FA_WRITE | FA_READ);
 194
 195     debug("##   open: '%s', (env: '%s'), res: %d\n",
 196                         drv_table[drv].img_name, disk_buffer, res);
 197
 198 out:
 199
 200         if (res)
 201                 rc |= 0x80;
 202
 203         result_msg[0] = rc;
 204         result_msg[1] = res;
 205         result_msg[2] = res >> 8;
 206
 207         if (rc) {
 208                 debug("##   error    rc: %.02x, res: %d\n", rc, res);
 209         };
 210
 211         /* send  result*/
 212         msg_xmit(2, subf, sizeof(result_msg), result_msg);
 213 }
 214
 215
 216 /*
 217         db      2       ; disk command
 218         ds      1       ; subcommand (login/read/write)
 219         ds      1       ; @adrv (8 bits)        +0
 220         ds      1       ; @rdrv (8 bits)        +1
 221         ds      1       ; @cnt  (8 bits)        +2
 222         ds      2       ; @trk (16 bits)        +3
 223         ds      2       ; @sect(16 bits)        +5
 224         ds      3       ; phys. transfer addr   +7
 225 */
 226
 227 void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg)
 228 {
 229         uint8_t drv;
 230         uint32_t addr;
 231         uint32_t pos;
 232
 233         bool dowrite = (subf == 2);
 234         FRESULT res = 0;
 235         uint8_t rc = 0;
 236         bool buserr = 0;
 237         uint8_t result_msg[3];
 238
 239         if (len != 10) {     /* TODO: check adrv, rdrv */
 240                 rc = 0x01;
 241                 goto out;
 242         }
 243
 244         drv = msg[0];
 245         if ( drv>= MAX_DRIVE) {
 246                 rc = 0x02;
 247                 goto out;
 248         }
 249
 250         addr = ((uint32_t)msg[9] << 16) + ((uint16_t)msg[8] << 8) + msg[7];
 251
 252         /* bytes = BLOCK_SIZE; */                       /* TODO: multi sector count */
 253         pos = (((uint16_t)(msg[4] << 8) + msg[3]) * 8
 254                         + ((uint32_t)(msg[6] << 8) + msg[5])) * BLOCK_SIZE;
 255
 256
 257         debug("## cpm_rw: %s %c: trk: %4d, sec: %d, pos: 0x%.5lx, addr: 0x%.5lx\n",
 258                         dowrite ? "write" : " read", msg[0]+'A',
 259                         ((uint16_t)(msg[4] << 8) + msg[3]), msg[5], pos, addr);
 260
 261
 262
 263         /* TODO: check bank boundary crossing */
 264         /*
 265            if (addr + BLOCK_SIZE > MAX_MEMORY)
 266                 ... = MAX_MEMORY - addr;
 267         */
 268
 269
 270         res = f_lseek(&drv_table[drv].fd, pos);
 271         if (!res) {
 272                 unsigned int br;
 273
 274                 if (dowrite) {
 275                         if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
 276                                 buserr = 1;
 277                         } else {
 278                                 z80_read_block(disk_buffer, addr, BLOCK_SIZE);
 279                                 z80_bus_cmd(Release);
 280                                 res = f_write(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br);
 281                                 if (!res)
 282                                         res = f_sync(&drv_table[drv].fd);
 283                         }
 284                 } else {
 285                         res = f_read(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br);
 286                         if (res == FR_OK) {
 287                                 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
 288                                         buserr = 1;
 289                                 } else {
 290                                         z80_write_block(disk_buffer, addr, br);
 291                                         z80_bus_cmd(Release);
 292                                 }
 293                         }
 294                 }
 295
 296                 if (br != BLOCK_SIZE) {
 297                         debug("##  f_read res: %d, bytes rd/wr: %u\n", res, br);
 298                         dump_ram(disk_buffer, 0, 64, "Read Data");
 299                         res = -1;
 300                 }
 301         }
 302
 303 out:
 304         if (buserr) {
 305                 debug("Bus timeout\n");
 306                 rc = 0x03;
 307         }
 308         if (res)
 309                 rc |= 0x80;
 310
 311         result_msg[0] = rc;
 312         result_msg[1] = res;
 313         result_msg[2] = res >> 8;
 314
 315         if (rc) {
 316                 debug("#### error rc: %.02x, res: %d\n", rc, res);
 317         }
 318
 319         /* send  result*/
 320         msg_xmit(2, subf, sizeof(result_msg), result_msg);
 321 }
 322
 323
 324 const FLASH struct msg_item z80_messages[] =
 325 {
 326         { 0,                    /* fct nr. */
 327           1, 3,                 /* sub fct nr. from, to */
 328           do_msg_ini_memfifo},
 329         { 1,
 330           1, 1,
 331           do_msg_char_out},
 332         { 1,
 333           2, 2,
 334           do_msg_echo},
 335         { 2,
 336           0, 0,
 337           do_msg_cpm_login},
 338         { 2,
 339           1, 2,
 340           do_msg_cpm_rw},
 341         { 0xff,                         /* end mark */
 342           0, 0,
 343           0},
 344
 345 };
 346
 347
 348
 349
 350 void do_message(int len, uint8_t *msg)
 351 {
 352         uint8_t fct, sub_fct;
 353         int_fast8_t i = 0;
 354
 355         if (len >= 2) {
 356                 fct = *msg++;
 357                 sub_fct = *msg++;
 358                 len -= 2;
 359
 360                 while (fct != z80_messages[i].fct) {
 361                         if (z80_messages[i].fct == 0xff) {
 362                                 DBG_P(1, "do_message: Unknown function: %i, %i\n",
 363                                                 fct, sub_fct);
 364                                 return; /* TODO: unknown message # */
 365                         }
 366
 367                         ++i;
 368                 }
 369
 370                 while (fct == z80_messages[i].fct) {
 371                         if (sub_fct >= z80_messages[i].sub_min &&
 372                                         sub_fct <= z80_messages[i].sub_max )
 373                                 break;
 374                         ++i;
 375                 }
 376
 377                 if (z80_messages[i].fct != fct) {
 378                         DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
 379                                         fct, sub_fct);
 380                         return; /* TODO: unknown message sub# */
 381                 }
 382
 383                 (z80_messages[i].func)(sub_fct, len, msg);
 384
 385
 386         } else {
 387                 /* TODO: error */
 388                 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
 389         }
 390 }
 391
 392
 393
 394 #define CTRBUF_LEN 256
 395
 396 void check_msg_fifo(void)
 397 {
 398         int ch;
 399         static int_fast8_t state;
 400         static int msglen,idx;
 401         static uint8_t buffer[CTRBUF_LEN];
 402
 403         while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
 404                 switch (state) {
 405                 case 0:         /* wait for start of message */
 406                         if (ch == 0xAE) { /* TODO: magic number */
 407                                 msglen = 0;
 408                                 idx = 0;
 409                                 state = 1;
 410                         }
 411                         break;
 412                 case 1:         /* get msg len */
 413                         if (ch > 0 && ch <= CTRBUF_LEN) {
 414                                 msglen = ch;
 415                                 state = 2;
 416                         } else
 417                                 state = 0;
 418                         break;
 419                 case 2:         /* get message */
 420                         buffer[idx++] = ch;
 421                         if (idx == msglen) {
 422                                 do_message(msglen, buffer);
 423                                 state = 0;
 424                         }
 425                         break;
 426                 }
 427         }
 428 }
 429
 430
 431 int msg_handling(int state)
 432 {
 433         uint8_t pending;
 434
 435         ATOMIC_BLOCK(ATOMIC_FORCEON) {
 436                 pending = (Stat & S_MSG_PENDING) != 0;
 437                 Stat &= ~S_MSG_PENDING;
 438         }
 439
 440         if (pending) {
 441                 switch (state) {
 442                 case 0:                 /* need init */
 443                         /* Get address of fifo_list */
 444                         z80_bus_cmd(Request);
 445                         uint32_t fifo_list = z80_read(0x40) +
 446                                 ((uint16_t) z80_read(0x41) << 8) +
 447                                 ((uint32_t) z80_read(0x42) << 16);
 448                         z80_bus_cmd(Release);
 449                         if (fifo_list != 0) {
 450                                 /* Get address of fifo 0 */
 451                                 z80_bus_cmd(Request);
 452                                 uint32_t fifo_addr = z80_read(fifo_list) +
 453                                         ((uint16_t) z80_read(fifo_list+1) << 8) +
 454                                         ((uint32_t) z80_read(fifo_list+2) << 16);
 455                                 z80_bus_cmd(Release);
 456                                 if (fifo_addr != 0) {
 457                                         z80_memfifo_init(fifo_msgin, fifo_addr);
 458                                         state = 1;
 459                                 }
 460                         }
 461                         break;
 462                 case 1:                 /* awaiting messages */
 463                         check_msg_fifo();
 464                         break;
 465                 }
 466         }
 467
 468         return state;
 469 }
 470
 471
 472 static int handle_msg_handling;
 473
 474 void setup_z180_serv(void)
 475 {
 476
 477         handle_msg_handling = bg_register(msg_handling, 0);
 478 }
 479
 480 void restart_z180_serv(void)
 481 {
 482         z80_bus_cmd(Request);
 483         z80_write(0x40, 0);
 484         z80_write(0x41, 0);
 485         z80_write(0x42, 0);
 486         z80_bus_cmd(Release);
 487
 488         for (int i = 0; i < NUM_FIFOS; i++)
 489                 z80_memfifo_init(i, 0);
 490         bg_setstat(handle_msg_handling, 0);
 491
 492         f_mount(NULL, "0:", 0);
 493         device_table[0].active = false;
 494         f_mount(NULL, "1:", 0);
 495         device_table[1].active = false;
 496
 497 }
 498
 499 /*--------------------------------------------------------------------------*/
 500
 501 const FLASH uint8_t iniprog[] = {
 502         0xAF,                   // xor     a
 503         0xED, 0x39, 0x36,       // out0    (rcr),a         ;disable  DRAM refresh
 504         0x3E, 0x30,             // ld      a,030h
 505         0xED, 0x39, 0x32        //out0    (dcntl),a       ;0 mem, max i/0 wait states
 506 };
 507
 508 const FLASH uint8_t sertest[] = {
 509         0xAF,              //   xor     a
 510         0xED, 0x39, 0x36,  //   out0    (rcr),a         ;disable  DRAM refresh
 511         0x3E, 0x30,        //   ld      a,030h
 512         0xED, 0x39, 0x32,  //   out0    (dcntl),a       ;0 mem, max i/0 wait states
 513         0x3E, 0x80,        //   ld      a,M_MPBT                ;no MP, PS=10, DR=16, SS=0
 514         0xED, 0x39, 0x03,  //   out0    (cntlb1),a
 515         0x3E, 0x64,        //   ld      a,M_RE + M_TE + M_MOD2  ;
 516         0xED, 0x39, 0x01,  //   out0    (cntla1),a
 517         0x3E, 0x00,        //   ld      a,0
 518         0xED, 0x39, 0x05,  //   out0    (stat1),a       ;Enable rx interrupts
 519         0xED, 0x38, 0x05,  //l0:in0     a,(stat1)
 520         0xE6, 0x80,        //   and     80h
 521         0x28, 0xF9,        //   jr      z,l0
 522         0xED, 0x00, 0x09,  //   in0     b,(rdr1)
 523         0xED, 0x38, 0x05,  //l1:in0     a,(stat1)
 524         0xE6, 0x02,        //   and     02h
 525         0x28, 0xF9,        //   jr      z,l1
 526         0xED, 0x01, 0x07,  //   out0    (tdr1),b
 527         0x18, 0xEA,        //   jr      l0
 528 };
 529
 530 const FLASH uint8_t test1[] = {
 531         0xAF,              //   xor     a
 532         0xED, 0x39, 0x36,  //   out0    (rcr),a         ;disable  DRAM refresh
 533         0x3E, 0x30,        //   ld      a,030h
 534         0xED, 0x39, 0x32,  //   out0    (dcntl),a       ;0 mem, max i/0 wait states
 535         0x21, 0x1E, 0x00,  //   ld      hl,dmclrt       ;load DMA registers
 536         0x06, 0x08,        //   ld      b,dmct_e-dmclrt
 537         0x0E, 0x20,        //   ld      c,sar0l
 538         0xED, 0x93,        //   otimr
 539         0x3E, 0xC3,        //   ld      a,0c3h          ;dst +1, src +1, burst
 540         0xED, 0x39, 0x31,  //   out0    (dmode),a       ;
 541         0x3E, 0x62,        //   ld      a,062h          ;enable dma0,
 542         0xED, 0x39, 0x30,  //cl_1:      out0    (dstat),a       ;copy 64k
 543         0x18, 0xFB,        //   jr      cl_1            ;
 544         0x00, 0x00,        //dmclrt:    dw      0               ;src (inc)
 545         0x00,              //   db      0               ;src
 546         0x00, 0x00,        //   dw      0               ;dst (inc),
 547         0x00,              //   db      0               ;dst
 548         0x00, 0x00,        //   dw      0               ;count (64k)
 549 };