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cloudbase.mooo.com Git - z180-stamp.git/blob - avr/z180-serv.c
2 * (C) Copyright 2014-2016 Leo C. <erbl259-lmu@yahoo.de>
4 * SPDX-License-Identifier: GPL-2.0
9 #include <util/atomic.h>
12 #include "background.h"
18 #include "print-utils.h"
24 #define DEBUG_CPM_SDIO 0 /* set to 1 to debug */
26 #define debug_cpmsd(fmt, args...) \
27 debug_cond(DEBUG_CPM_SDIO, fmt, ##args)
30 /*--------------------------------------------------------------------------*/
34 uint8_t sub_min
, sub_max
;
35 void (*func
)(uint8_t, int, uint8_t *);
38 uint32_t msg_to_addr(uint8_t *msg
)
54 static int msg_xmit_header(uint8_t func
, uint8_t subf
, int len
)
56 z80_memfifo_putc(fifo_msgout
, 0xAE);
57 z80_memfifo_putc(fifo_msgout
, len
+2);
58 z80_memfifo_putc(fifo_msgout
, func
);
59 z80_memfifo_putc(fifo_msgout
, subf
);
64 int msg_xmit(uint8_t func
, uint8_t subf
, int len
, uint8_t *msg
)
66 msg_xmit_header(func
, subf
, len
);
68 z80_memfifo_putc(fifo_msgout
, *msg
++);
73 void do_msg_ini_memfifo(uint8_t subf
, int len
, uint8_t * msg
)
77 z80_memfifo_init(subf
, msg_to_addr(msg
));
81 void do_msg_char_out(uint8_t subf
, int len
, uint8_t * msg
)
90 void do_msg_echo(uint8_t subf
, int len
, uint8_t * msg
)
95 msg_xmit(1, 3, len
, msg
);
99 void do_msg_get_timer(uint8_t subf
, int len
, uint8_t * msg
)
101 uint32_t time_ms
= (len
>= 4) ? *(uint32_t *) msg
: 0;
103 time_ms
= get_timer(time_ms
);
104 msg_xmit(3, subf
, sizeof(time_ms
), (uint8_t *) &time_ms
);
107 /* ---------------------------------------------------------------------------*/
110 void do_msg_m_fcpu(uint8_t subf
, int len UNUSED
, uint8_t * msg
)
115 /* Save state and disable INT5/INT6 */
116 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
121 EIFR
= _BV(INTF5
); /* Reset pending int */
122 z80_bus_cmd(Request
);
123 z80_write(0x3f, 0xff);
124 z80_bus_cmd(Release
);
126 freq
= z80_measure_phi(*msg
);
128 z80_bus_cmd(Request
);
129 z80_write(0x3f, 0xff);
130 z80_bus_cmd(Release
);
132 /* Restore INT5/INT6 */
133 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
134 if ((eimsk_save
& _BV(INT5
)) != 0)
136 if ((eimsk_save
& _BV(INT6
)) != 0)
138 /* Reset pending int */
143 msg_xmit(4, subf
, sizeof(freq
), (uint8_t *) &freq
);
146 /* ---------------------------------------------------------------------------*/
148 #define CPM_DAY_OFFSET ((1978-1900) * 365 + 19) /* 19 leap years */
151 * Convert CP/M time stamp to a broken-down time structure
154 int mk_date_time (int len
, uint8_t *msg
, struct tm
*tmp
)
161 /* days since 2000-01-01 */
162 long days
= msg
[3] + (msg
[4] << 8) - 8036;
167 stamp
= days
* ONE_DAY
;
168 stamp
+= bcd2bin(msg
[0]);
169 stamp
+= bcd2bin(msg
[1]) * 60 ;
170 stamp
+= bcd2bin(msg
[2]) * 3600L;
171 gmtime_r(&stamp
, tmp
);
175 void mk_cpm_time(struct tm
*tmp
, uint8_t cpm_time
[5])
180 for (int year
=78; year
< tmp
->tm_year
; year
++) {
181 days
= days
+ 365 + (leap
== 0);
184 days
+= tmp
->tm_yday
;
186 cpm_time
[0] = bin2bcd(tmp
->tm_sec
);
187 cpm_time
[1] = bin2bcd(tmp
->tm_min
);
188 cpm_time
[2] = bin2bcd(tmp
->tm_hour
);
190 cpm_time
[4] = days
>> 8;
193 /* get/set cp/m time */
194 void do_msg_get_set_time(uint8_t subf
, int len
, uint8_t * msg
)
200 memset(cpm_time
, 0, ARRAY_SIZE(cpm_time
));
203 case 3: /* set date & time */
204 /* initialize t with current time */
208 /* insert new date & time */
209 if (mk_date_time (len
, msg
, &t
) != 0) {
210 my_puts_P(PSTR("## set_time: Bad date format\n"));
215 time
= mk_gmtime(&t
);
218 /* and write to RTC */
221 my_puts_P(PSTR("## set_time: Set date failed\n"));
223 my_puts_P(PSTR("## set_time: Get date failed\n"));
226 case 2: /* get date & time */
230 time
= mk_gmtime(&t
);
234 mk_cpm_time(&t
, cpm_time
);
236 my_puts_P(PSTR("## get_time: Get date failed\n"));
241 msg_xmit(3, subf
, sizeof(cpm_time
), cpm_time
);
244 /* ---------------------------------------------------------------------------*/
247 static uint8_t disk_buffer
[CONFIG_CPM_BLOCK_SIZE
];
248 static struct cpm_drive_s drv_table
[CONFIG_CPM_MAX_DRIVE
];
249 static int handle_cpm_drv_to
;
251 typedef enum {SINGLE
, START
, MIDDLE
, END
} dbgmsg_t
;
253 void drv_debug(dbgmsg_t phase
, const FLASH
char *const fmt
, ...) \
255 struct cpm_drive_s
*dp
= &drv_table
[drv
];
257 if (dp
->opt
& DRV_OPT_DEBUG
) {
262 if (phase
== SINGLE
|| phase
== START
)
263 printf_P(PSTR("# %7lu dsk%d: "), get_timer(0), drv
);
265 vfprintf_P (stdout
, fmt
, ap
);
267 if (phase
== SINGLE
|| phase
== END
)
276 for (uint8_t i
= 0; i
< CONFIG_CPM_MAX_DRIVE
; i
++) {
277 struct cpm_drive_s
* p
= &drv_table
[i
];
279 printf_P(PSTR(" dsk%d: %2S %3S attached to %s\n"), i
,
280 p
->opt
&DRV_OPT_RO
? PSTR("RO") : PSTR("RW"),
281 p
->opt
&DRV_OPT_DEBUG
? PSTR("DBG") : PSTR(""),
288 int drv_detach(uint8_t unit
)
291 if (drv
< CONFIG_CPM_MAX_DRIVE
) {
292 struct cpm_drive_s
*p
= &drv_table
[drv
];
294 drv_debug(SINGLE
, PSTR("detach from '%s'"), p
->img_name
? p
->img_name
: "-");
300 p
->flags
&= ~DRV_FLG_DIRTY
;
303 uint32_t scb
= getenv_ulong(PSTR(ENV_CPM3_SCB
), 16, 0);
304 if (scb
&& (z80_bus_cmd(Request
) & ZST_ACQUIRED
)) {
305 z80_write(scb
+ 0xf0, 0xff);
306 z80_write(p
->dph
+ 11, 0xff);
307 z80_bus_cmd(Release
);
314 static int drv_find_file_attached(const char *fn
)
316 for (uint8_t i
= 0; i
< CONFIG_CPM_MAX_DRIVE
; i
++) {
317 struct cpm_drive_s
*p
= &drv_table
[i
];
318 if (p
->img_name
&& !strcmp(fn
, p
->img_name
)) {
325 int drv_attach(uint8_t unit
, const char *filename
, drv_opt_t options
)
330 if (drv
>= CONFIG_CPM_MAX_DRIVE
)
333 struct cpm_drive_s
*p
= &drv_table
[drv
];
335 if (options
& DRV_OPT_REATTATCH
) {
345 if ((p
->opt
^ options
) & DRV_OPT_RO
) {
347 res
= f_open(&p
->fd
, p
->img_name
,
348 FA_READ
| (options
&DRV_OPT_RO
? 0 : FA_WRITE
));
351 p
->opt
= options
& ~DRV_OPT_REATTATCH
;
357 if (drv_find_file_attached(filename
) >= 0)
364 if ((p
->img_name
= strdup(filename
)) == NULL
)
367 res
= f_open(&p
->fd
, p
->img_name
,
368 FA_READ
| (options
&DRV_OPT_RO
? 0 : FA_WRITE
));
370 if (!res
&& f_size(&p
->fd
) < CONFIG_CPM_DISKSIZE
) {
373 debug_cpmsd(" expanding image file from %ld to %ld\n",
374 f_size(&p
->fd
), CONFIG_CPM_DISKSIZE
);
376 res
= f_lseek(&p
->fd
, CONFIG_CPM_DISKSIZE
-CONFIG_CPM_BLOCK_SIZE
);
378 memset(disk_buffer
, 0xe5, CONFIG_CPM_BLOCK_SIZE
);
379 res
= f_write(&p
->fd
, disk_buffer
, CONFIG_CPM_BLOCK_SIZE
, &bw
);
380 if (res
|| bw
< CONFIG_CPM_BLOCK_SIZE
) {
381 debug_cpmsd(" failed! res: %d, bytes written: %u\n", res
, bw
);
383 p
->flags
|= DRV_FLG_DIRTY
;
384 bg_setstat(handle_cpm_drv_to
, 1);
387 drv_debug(SINGLE
, PSTR("wrong image file size: %ld, should be %ld"),
388 f_size(&p
->fd
), CONFIG_CPM_DISKSIZE
);
402 int cpm_drv_to(int state
)
416 if (get_timer(ts
) > 1000) {
417 for (uint_fast8_t i
=0; i
< CONFIG_CPM_MAX_DRIVE
; i
++) {
418 if (drv_table
[i
].flags
& DRV_FLG_DIRTY
) {
419 drv_table
[i
].flags
&= ~DRV_FLG_DIRTY
;
420 f_sync(&drv_table
[i
].fd
);
422 drv_debug(SINGLE
, PSTR("f_sync"));
431 static const FLASH
char * const FLASH rc_messages
[] = {
433 FSTR("Internal error: wrong message len"), /* 01 */
434 FSTR("Invalid relative drive #"), /* 02 */
435 FSTR("Bus timeout"), /* 03 */
436 FSTR("Access byond disk size"), /* 04 */
437 FSTR("Write protect"), /* 05 */
438 FSTR("No media"), /* 06 */
439 FSTR("R/W address == 0 !!!!"), /* 07 */
442 void msg_cpm_result(uint8_t subf
, uint8_t rc
, int res
)
444 uint8_t result_msg
[3];
451 result_msg
[2] = res
>> 8;
453 msg_xmit(2, subf
, sizeof(result_msg
), result_msg
);
456 #if defined(GCC_BUG_61443)
458 strncpy_P(msg
, rc_messages
[rc
& 0x7f], sizeof msg
-1);
459 drv_debug(END
, PSTR(" rc: %.02x/%d, '%s'"),
462 drv_debug(END
, PSTR(" rc: %.02x/%d, '%S'"),
463 rc
, res
, rc_messages
[rc
& 0x7f]);
466 drv_debug(END
, PSTR(""));
472 ds 1 ; subcommand (login/read/write)
473 ds 1 ; @adrv (8 bits) +0
474 ds 1 ; @rdrv (8 bits) +1
475 ds 3 ; @xdph (24 bits) +2
478 void do_msg_cpm_login(uint8_t subf
, int len
, uint8_t * msg
)
480 struct cpm_drive_s
*dp
;
485 /* Get relative drive number */
487 drv_debug(START
, PSTR("login"));
490 return msg_cpm_result(subf
, 0x01, res
);
493 if ( drv
>= CONFIG_CPM_MAX_DRIVE
) {
494 /* invalid relative drive number */
495 return msg_cpm_result(subf
, 0x02, res
);
498 dp
= &drv_table
[drv
];
499 dp
->flags
&= ~DRV_FLG_OPEN
;
500 dp
->dph
= ((uint32_t)msg
[4] << 16) + ((uint16_t)msg
[3] << 8) + msg
[2];
502 if (dp
->img_name
== NULL
) {
503 /* no file attached */
504 return msg_cpm_result(subf
, 0x06, res
);
508 res
= f_open(&dp
->fd
, dp
->img_name
,
509 FA_READ
| (dp
->opt
&DRV_OPT_RO
? 0 : FA_WRITE
));
511 dp
->flags
|= DRV_FLG_OPEN
;
514 msg_cpm_result(subf
, 0x00, res
);
520 ds 1 ; subcommand (login/read/write)
521 ds 1 ; @adrv (8 bits) +0
522 ds 1 ; @rdrv (8 bits) +1
523 ds 2 ; @trk (16 bits) +2
524 ds 2 ; @sect(16 bits) +4
525 ds 1 ; @cnt (8 bits) +6
526 ds 3 ; phys. transfer addr +7
536 void do_msg_cpm_rw(uint8_t subf
, int len
, uint8_t * msg
)
538 struct cpm_drive_s
*dp
;
550 dowrite
= (subf
== 2);
552 drv_debug(START
, PSTR("%2S"), dowrite
? PSTR("W ") : PSTR(" R"));
555 return msg_cpm_result(subf
, 0x01, res
);
557 if ( drv
>= CONFIG_CPM_MAX_DRIVE
) {
558 return msg_cpm_result(subf
, 0x02, res
);
561 dp
= &drv_table
[drv
];
562 track
= (uint16_t)(msg
[TRK
+1] << 8) + msg
[TRK
];
563 sec
= (uint16_t)(msg
[SEC
+1] << 8) + msg
[SEC
];
565 addr
= ((uint32_t)msg
[ADDR
+2] << 16) + ((uint16_t)msg
[ADDR
+1] << 8) + msg
[ADDR
];
567 if (dp
->img_name
== NULL
) {
569 return msg_cpm_result(subf
, 0x06, res
);
572 /* TODO: tracks per sector from dpb */
573 pos
= (track
* 8UL + sec
) * CONFIG_CPM_BLOCK_SIZE
;
575 drv_debug(MIDDLE
, PSTR(" T:%4d, S:%2d, cnt:%2d, lba: %.8lx, addr: %.5lx"),
576 track
, sec
, secs
, pos
, addr
);
579 return msg_cpm_result(subf
, 0x07, res
);
582 if (dowrite
&& dp
->opt
& DRV_OPT_RO
) {
583 return msg_cpm_result(subf
, 0x05, res
);
587 if (pos
+ secs
* CONFIG_CPM_BLOCK_SIZE
> CONFIG_CPM_DISKSIZE
) {
588 drv_debug(MIDDLE
, PSTR(" access > DISKSIZE:%.8lx!"),
589 CONFIG_CPM_DISKSIZE
);
590 return msg_cpm_result(subf
, 0x04, res
);
593 res
= f_lseek(&dp
->fd
, pos
);
595 while (!res
&& secs
--) {
598 if (!(z80_bus_cmd(Request
) & ZST_ACQUIRED
)) {
602 z80_read_block(disk_buffer
, addr
, CONFIG_CPM_BLOCK_SIZE
);
603 z80_bus_cmd(Release
);
605 res
= f_write(&dp
->fd
, disk_buffer
, CONFIG_CPM_BLOCK_SIZE
, &brw
);
607 res
= f_read(&dp
->fd
, disk_buffer
, CONFIG_CPM_BLOCK_SIZE
, &brw
);
609 if (!(z80_bus_cmd(Request
) & ZST_ACQUIRED
)) {
613 z80_write_block(disk_buffer
, addr
, CONFIG_CPM_BLOCK_SIZE
);
614 z80_bus_cmd(Release
);
618 if (brw
!= CONFIG_CPM_BLOCK_SIZE
) {
619 drv_debug(MIDDLE
, PSTR(" short rd/wr: res: %d, brw: %u"),
623 addr
+= CONFIG_CPM_BLOCK_SIZE
;
626 if (dowrite
&& !res
) {
627 dp
->flags
|= DRV_FLG_DIRTY
;
628 bg_setstat(handle_cpm_drv_to
, 1);
632 /* Bus timeout. how can this happen? */
637 msg_cpm_result(subf
, rc
, res
);
641 const FLASH
struct msg_item z80_messages
[] =
644 1, 3, /* sub fct nr. from, to */
662 2, 3, /* 2: get, 3: set time and date */
663 do_msg_get_set_time
},
667 { 0xff, /* end mark */
674 void do_message(int len
, uint8_t *msg
)
676 uint8_t fct
, sub_fct
;
684 while (fct
!= z80_messages
[i
].fct
) {
685 if (z80_messages
[i
].fct
== 0xff) {
686 DBG_P(1, "do_message: Unknown function: %i, %i\n",
688 return; /* TODO: unknown message # */
694 while (fct
== z80_messages
[i
].fct
) {
695 if (sub_fct
>= z80_messages
[i
].sub_min
&&
696 sub_fct
<= z80_messages
[i
].sub_max
)
701 if (z80_messages
[i
].fct
!= fct
) {
702 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
704 return; /* TODO: unknown message sub# */
707 (z80_messages
[i
].func
)(sub_fct
, len
, msg
);
712 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len
);
718 #define CTRBUF_LEN 256
720 void check_msg_fifo(void)
723 static int_fast8_t state
;
724 static int msglen
,idx
;
725 static uint8_t buffer
[CTRBUF_LEN
];
727 while ((ch
= z80_memfifo_getc(fifo_msgin
)) >= 0) {
729 case 0: /* wait for start of message */
730 if (ch
== 0xAE) { /* TODO: magic number */
736 case 1: /* get msg len */
737 if (ch
> 0 && ch
<= CTRBUF_LEN
) {
743 case 2: /* get message */
746 do_message(msglen
, buffer
);
755 int msg_handling(int state
)
759 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
760 pending
= (Stat
& S_MSG_PENDING
) != 0;
761 Stat
&= ~S_MSG_PENDING
;
765 uint8_t init_request
;
766 z80_bus_cmd(Request
);
767 init_request
= z80_read(0x43);
768 z80_bus_cmd(Release
);
769 if ( init_request
!= 0) {
770 /* Get address of fifo 0 */
771 z80_bus_cmd(Request
);
772 uint32_t fifo_addr
= z80_read(0x40) +
773 ((uint16_t) z80_read(0x40+1) << 8) +
774 ((uint32_t) z80_read(0x40+2) << 16);
776 z80_bus_cmd(Release
);
778 if (fifo_addr
!= 0) {
779 z80_memfifo_init(fifo_msgin
, fifo_addr
);
793 static int handle_msg_handling
;
795 void setup_z180_serv(void)
798 handle_msg_handling
= bg_register(msg_handling
, 0);
799 handle_cpm_drv_to
= bg_register(cpm_drv_to
, 0);
802 void restart_z180_serv(void)
804 z80_bus_cmd(Request
);
805 z80_memset(0x40, 0, 4);
806 z80_bus_cmd(Release
);
808 for (int i
= 0; i
< NUM_FIFOS
; i
++)
809 z80_memfifo_init(i
, 0);
810 bg_setstat(handle_msg_handling
, 0);
815 /*--------------------------------------------------------------------------*/
817 const FLASH
uint8_t iniprog
[] = {
819 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
820 0x3E, 0x30, // ld a,030h
821 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
824 const FLASH
uint8_t sertest
[] = {
826 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
827 0x3E, 0x30, // ld a,030h
828 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
829 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
830 0xED, 0x39, 0x03, // out0 (cntlb1),a
831 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
832 0xED, 0x39, 0x01, // out0 (cntla1),a
833 0x3E, 0x00, // ld a,0
834 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
835 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
836 0xE6, 0x80, // and 80h
837 0x28, 0xF9, // jr z,l0
838 0xED, 0x00, 0x09, // in0 b,(rdr1)
839 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
840 0xE6, 0x02, // and 02h
841 0x28, 0xF9, // jr z,l1
842 0xED, 0x01, 0x07, // out0 (tdr1),b
846 const FLASH
uint8_t test1
[] = {
848 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
849 0x3E, 0x30, // ld a,030h
850 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
851 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
852 0x06, 0x08, // ld b,dmct_e-dmclrt
853 0x0E, 0x20, // ld c,sar0l
855 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
856 0xED, 0x39, 0x31, // out0 (dmode),a ;
857 0x3E, 0x62, // ld a,062h ;enable dma0,
858 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
859 0x18, 0xFB, // jr cl_1 ;
860 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
862 0x00, 0x00, // dw 0 ;dst (inc),
864 0x00, 0x00, // dw 0 ;count (64k)