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1 /*
2 * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include "common.h"
8 #include <stdlib.h>
9 #include <string.h>
10 #include <stdbool.h>
11 #include <util/atomic.h>
12
13 #include "background.h"
14 #include "env.h"
15 #include "ff.h"
16 #include "serial.h"
17 #include "z80-if.h"
18 #include "debug.h"
19 #include "print-utils.h"
20 #include "z180-serv.h"
21 #include "timer.h"
22 #include "time.h"
23 #include "bcd.h"
24 #include "rtc.h"
25
26 #define DEBUG_CPM_SDIO 0 /* set to 1 to debug */
27
28 #define debug_cpmsd(fmt, args...) \
29 debug_cond(DEBUG_CPM_SDIO, fmt, ##args)
30
31
32
33 /*--------------------------------------------------------------------------*/
34
35
36 uint8_t z80_get_byte(uint32_t adr)
37 {
38 uint8_t data;
39
40 z80_bus_cmd(Request);
41 data = z80_read(adr);
42 z80_bus_cmd(Release);
43
44 return data;
45 }
46
47
48 /*--------------------------------------------------------------------------*/
49
50 struct msg_item {
51 uint8_t fct;
52 uint8_t sub_min, sub_max;
53 void (*func)(uint8_t, int, uint8_t *);
54 };
55
56 uint32_t msg_to_addr(uint8_t *msg)
57 {
58 union {
59 uint32_t as32;
60 uint8_t as8[4];
61 } addr;
62
63 addr.as8[0] = msg[0];
64 addr.as8[1] = msg[1];
65 addr.as8[2] = msg[2];
66 addr.as8[3] = 0;
67
68 return addr.as32;
69 }
70
71
72 static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
73 {
74 z80_memfifo_putc(fifo_msgout, 0xAE);
75 z80_memfifo_putc(fifo_msgout, len+2);
76 z80_memfifo_putc(fifo_msgout, func);
77 z80_memfifo_putc(fifo_msgout, subf);
78
79 return 0;
80 }
81
82 int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
83 {
84 msg_xmit_header(func, subf, len);
85 while (len--)
86 z80_memfifo_putc(fifo_msgout, *msg++);
87
88 return 0;
89 }
90
91 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
92 {
93 (void)len;
94
95 z80_memfifo_init(subf, msg_to_addr(msg));
96 }
97
98
99 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
100 {
101 (void)subf;
102
103 while (len--)
104 putchar(*msg++);
105 }
106
107 /* echo message */
108 void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
109 {
110 (void)subf;
111
112 /* send re-echo */
113 msg_xmit(1, 3, len, msg);
114 }
115
116 /* get timer */
117 void do_msg_get_timer(uint8_t subf, int len, uint8_t * msg)
118 {
119 uint32_t time_ms = (len >= 4) ? *(uint32_t *) msg : 0;
120
121 time_ms = get_timer(time_ms);
122 msg_xmit(3, subf, sizeof(time_ms), (uint8_t *) &time_ms);
123 }
124
125 /* ---------------------------------------------------------------------------*/
126
127 #define CPM_DAY_OFFSET ((1978-1900) * 365 + 19) /* 19 leap years */
128
129 /*
130 * Convert CP/M time stamp to a broken-down time structure
131 *
132 */
133 int mk_date_time (int len, uint8_t *msg, struct tm *tmp)
134 {
135 time_t stamp;
136
137 if (len != 5)
138 return -1;
139
140 /* days since 2000-01-01 */
141 long days = msg[3] + (msg[4] << 8) - 8036;
142
143 if (days < 0)
144 return -1;
145
146 stamp = days * ONE_DAY;
147 stamp += bcd2bin(msg[0]);
148 stamp += bcd2bin(msg[1]) * 60 ;
149 stamp += bcd2bin(msg[2]) * 3600;
150 gmtime_r(&stamp, tmp);
151 return 0;
152 }
153
154 void mk_cpm_time(struct tm *tmp, uint8_t cpm_time[5])
155 {
156 uint16_t days = 1;
157 uint_fast8_t leap=2;
158
159 for (int year=78; year < tmp->tm_year; year++) {
160 days = days + 365 + (leap == 0);
161 leap = (leap+1)%4;
162 }
163 days += tmp->tm_yday;
164
165 cpm_time[0] = bin2bcd(tmp->tm_sec);
166 cpm_time[1] = bin2bcd(tmp->tm_min);
167 cpm_time[2] = bin2bcd(tmp->tm_hour);
168 cpm_time[3] = days;
169 cpm_time[4] = days >> 8;
170
171 debug("## mk_cpmtime: tm_year: %d, tm_yday: %d, days: %d\n",
172 tmp->tm_year, tmp->tm_yday, days);
173 }
174
175 /* get/set cp/m time */
176 void do_msg_get_set_time(uint8_t subf, int len, uint8_t * msg)
177 {
178 struct tm t;
179 uint8_t cpm_time[5];
180 int rc;
181
182 memset(cpm_time, 0, ARRAY_SIZE(cpm_time));
183
184 switch (subf) {
185 case 3: /* set date & time */
186 /* initialize t with current time */
187 rc = rtc_get (&t);
188
189 if (rc == 0) {
190 /* insert new date & time */
191 if (mk_date_time (len, msg, &t) != 0) {
192 my_puts_P(PSTR("## set_time: Bad date format\n"));
193 break;
194 }
195
196 time_t time;
197 time = mk_gmtime(&t);
198 gmtime_r(&time, &t);
199
200 /* and write to RTC */
201 rc = rtc_set (&t);
202 if(rc)
203 my_puts_P(PSTR("## set_time: Set date failed\n"));
204 } else {
205 my_puts_P(PSTR("## set_time: Get date failed\n"));
206 }
207 /* FALL TROUGH */
208 case 2: /* get date & time */
209 rc = rtc_get (&t);
210
211 if (rc) {
212 my_puts_P(PSTR("## get_time: Get date failed\n"));
213 break;
214 }
215
216 time_t time;
217 time = mk_gmtime(&t);
218 //mktime(&t);
219 gmtime_r(&time, &t);
220
221
222 mk_cpm_time(&t, cpm_time);
223 break;
224 }
225
226 msg_xmit(3, subf, sizeof(cpm_time), cpm_time);
227 }
228
229 /* ---------------------------------------------------------------------------*/
230
231 #define MAX_DRIVE 4
232 #define BLOCK_SIZE 512
233 #define TPA_BASE 0x10000
234 #define COMMON_BASE 0xC000
235
236 struct cpm_drive_s {
237 uint8_t drv;
238 uint8_t device;
239 char *img_name;
240 bool dirty;
241 FIL fd;
242 };
243
244 static uint8_t disk_buffer[BLOCK_SIZE];
245 static struct cpm_drive_s drv_table[MAX_DRIVE];
246 static int handle_cpm_drv_to;
247
248 #define f_dirty(fp) ((fp)->fs->wflag != 0)
249
250
251 int cpm_drv_to(int state)
252 {
253 static uint32_t ts;
254
255 switch(state) {
256 case 0:
257 break;
258
259 case 1:
260 ts = get_timer(0);
261 state = 2;
262 break;
263
264 case 2:
265 if (get_timer(ts) > 1000) {
266 for (uint_fast8_t i=0; i < MAX_DRIVE; i++) {
267 // if (&drv_table[i].fd && f_dirty(&drv_table[i].fd)) {
268 if (drv_table[i].dirty) {
269 f_sync(&drv_table[i].fd);
270 drv_table[i].dirty = false;
271 debug_cpmsd("## %7lu f_sync: %c:\n", get_timer(0), i+'A');
272 }
273 }
274 state = 0;
275 }
276 }
277 return state;
278 }
279
280
281 void msg_cpm_result(uint8_t subf, uint8_t rc, int res)
282 {
283 uint8_t result_msg[3];
284
285 if (res)
286 rc |= 0x80;
287
288 result_msg[0] = rc;
289 result_msg[1] = res;
290 result_msg[2] = res >> 8;
291
292 if (rc) {
293 debug_cpmsd("###%7lu error rc: %.02x, res: %d\n", get_timer(0), rc, res);
294 }
295
296 msg_xmit(2, subf, sizeof(result_msg), result_msg);
297 }
298
299 /*
300 db 2 ; disk command
301 ds 1 ; subcommand (login/read/write)
302 ds 1 ; @adrv (8 bits) +0
303 ds 1 ; @rdrv (8 bits) +1
304 ds 3 ; @xdph (24 bits) +2
305 */
306
307 void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg)
308 {
309
310 FRESULT res = 0;
311 uint8_t drv;
312 char *np;
313
314 (void)subf;
315
316 if (len != 5) { /* TODO: check adrv, rdrv */
317 return msg_cpm_result(subf, 0x01, res);
318 }
319
320 debug_cpmsd("\n## %7lu login: %c:\n", get_timer(0), msg[0]+'A');
321
322
323 drv = msg[0];
324 if ( drv>= MAX_DRIVE) {
325 return msg_cpm_result(subf, 0x02, res);
326 }
327
328 /*
329 uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
330 */
331
332 if (drv_table[drv].img_name != NULL) {
333 debug_cpmsd("## %7lu close: '%s'\n", get_timer(0), drv_table[drv].img_name);
334 f_close(&drv_table[drv].fd);
335 drv_table[drv].dirty = false;
336 free(drv_table[drv].img_name);
337 drv_table[drv].img_name = NULL;
338 }
339
340 strcpy_P((char *)disk_buffer, PSTR("dsk0"));
341 disk_buffer[3] = msg[0] + '0';
342 if (((np = getenv((char*)disk_buffer)) == NULL) ||
343 ((drv_table[drv].img_name = strdup(np)) == NULL)) {
344 return msg_cpm_result(subf, 0x03, res);
345 }
346
347
348 res = f_open(&drv_table[drv].fd, drv_table[drv].img_name,
349 FA_WRITE | FA_READ);
350
351 debug_cpmsd("## %7lu open: '%s', (env: '%s'), res: %d\n", get_timer(0),
352 drv_table[drv].img_name, disk_buffer, res);
353
354 /* send result*/
355 msg_cpm_result(subf, 0x00, res);
356 }
357
358
359 /*
360 db 2 ; disk command
361 ds 1 ; subcommand (login/read/write)
362 ds 1 ; @adrv (8 bits) +0
363 ds 1 ; @rdrv (8 bits) +1
364 ds 2 ; @trk (16 bits) +2
365 ds 2 ; @sect(16 bits) +4
366 ds 1 ; @cnt (8 bits) +6
367 ds 3 ; phys. transfer addr +7
368 */
369
370 #define ADRV 0
371 #define RDRV 1
372 #define TRK 2
373 #define SEC 4
374 #define CNT 6
375 #define ADDR 7
376
377 void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg)
378 {
379 uint8_t drv;
380 uint32_t addr;
381 uint32_t pos;
382 uint8_t secs;
383 bool dowrite = (subf == 2);
384 FRESULT res = 0;
385 uint8_t rc = 0;
386 bool buserr = 0;
387
388 if (len != 10) { /* TODO: check adrv, rdrv */
389 return msg_cpm_result(subf, 0x01, res);
390 }
391
392 drv = msg[ADRV];
393 if ( drv>= MAX_DRIVE) {
394 return msg_cpm_result(subf, 0x02, res);
395 }
396
397 secs = msg[CNT];
398 addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR];
399
400
401 /* TODO: tracks per sector from dpb */
402 pos = (((uint16_t)(msg[TRK+1] << 8) + msg[TRK]) * 8
403 + ((uint32_t)(msg[SEC+1] << 8) + msg[SEC])) * BLOCK_SIZE;
404
405 debug_cpmsd("## %7lu cpm_rw: %s %c: trk:%4d, sec: %d, pos: %.8lx, secs: %2d, "
406 "addr: %.5lx\n", get_timer(0), dowrite ? "write" : " read",
407 msg[ADRV]+'A', ((uint16_t)(msg[TRK+1] << 8) + msg[TRK]), msg[SEC],
408 pos, msg[CNT], addr);
409
410 res = f_lseek(&drv_table[drv].fd, pos);
411 while (!res && secs--) {
412 unsigned int cnt, br;
413
414 /* check bank boundary crossing */
415 cnt = 0;
416 if (addr < (TPA_BASE + COMMON_BASE) &&
417 (addr + BLOCK_SIZE) > (TPA_BASE + COMMON_BASE)) {
418 cnt = (TPA_BASE + COMMON_BASE) - addr;
419 }
420
421 if (cnt) {
422 debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr, cnt);
423 debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr+cnt-TPA_BASE, BLOCK_SIZE-cnt);
424 }
425
426 if (dowrite) {
427 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
428 buserr = 1;
429 break;
430 } else {
431 if (cnt) {
432 z80_read_block(disk_buffer, addr, cnt);
433 addr = addr + cnt - TPA_BASE;
434 }
435 z80_read_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt);
436 z80_bus_cmd(Release);
437 }
438 res = f_write(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br);
439 } else {
440 res = f_read(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br);
441 if (res == FR_OK && br == BLOCK_SIZE) {
442 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
443 buserr = 1;
444 break;
445 } else {
446 if (cnt) {
447 z80_write_block(disk_buffer, addr, cnt);
448 addr = addr + cnt - TPA_BASE;
449 }
450 z80_write_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt);
451 z80_bus_cmd(Release);
452 }
453 }
454 }
455
456 if (br != BLOCK_SIZE) {
457 debug_cpmsd("## %7lu f_read res: %d, bytes rd/wr: %u\n", get_timer(0), res, br);
458 dump_ram(disk_buffer, 0, 64, "Read Data");
459 res = -1;
460 }
461
462 addr += BLOCK_SIZE;
463 }
464
465 if (dowrite && !res) {
466 // res = f_sync(&drv_table[drv].fd);
467 drv_table[drv].dirty = true;
468 bg_setstat(handle_cpm_drv_to, 1);
469 }
470
471
472 if (buserr) {
473 debug_cpmsd("Bus timeout\n");
474 rc = 0x03;
475 }
476
477 /* send result*/
478 msg_cpm_result(subf, rc, res);
479 }
480
481
482 const FLASH struct msg_item z80_messages[] =
483 {
484 { 0, /* fct nr. */
485 1, 3, /* sub fct nr. from, to */
486 do_msg_ini_memfifo},
487 { 1,
488 1, 1,
489 do_msg_char_out},
490 { 1,
491 2, 2,
492 do_msg_echo},
493 { 2,
494 0, 0,
495 do_msg_cpm_login},
496 { 2,
497 1, 2,
498 do_msg_cpm_rw},
499 { 3,
500 1, 1,
501 do_msg_get_timer},
502 { 3,
503 2, 3, /* 2: get, 3: set time and date */
504 do_msg_get_set_time},
505 { 0xff, /* end mark */
506 0, 0,
507 0},
508
509 };
510
511
512
513
514 void do_message(int len, uint8_t *msg)
515 {
516 uint8_t fct, sub_fct;
517 int_fast8_t i = 0;
518
519 if (len >= 2) {
520 fct = *msg++;
521 sub_fct = *msg++;
522 len -= 2;
523
524 while (fct != z80_messages[i].fct) {
525 if (z80_messages[i].fct == 0xff) {
526 DBG_P(1, "do_message: Unknown function: %i, %i\n",
527 fct, sub_fct);
528 return; /* TODO: unknown message # */
529 }
530
531 ++i;
532 }
533
534 while (fct == z80_messages[i].fct) {
535 if (sub_fct >= z80_messages[i].sub_min &&
536 sub_fct <= z80_messages[i].sub_max )
537 break;
538 ++i;
539 }
540
541 if (z80_messages[i].fct != fct) {
542 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
543 fct, sub_fct);
544 return; /* TODO: unknown message sub# */
545 }
546
547 (z80_messages[i].func)(sub_fct, len, msg);
548
549
550 } else {
551 /* TODO: error */
552 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
553 }
554 }
555
556
557
558 #define CTRBUF_LEN 256
559
560 void check_msg_fifo(void)
561 {
562 int ch;
563 static int_fast8_t state;
564 static int msglen,idx;
565 static uint8_t buffer[CTRBUF_LEN];
566
567 while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
568 switch (state) {
569 case 0: /* wait for start of message */
570 if (ch == 0xAE) { /* TODO: magic number */
571 msglen = 0;
572 idx = 0;
573 state = 1;
574 }
575 break;
576 case 1: /* get msg len */
577 if (ch > 0 && ch <= CTRBUF_LEN) {
578 msglen = ch;
579 state = 2;
580 } else
581 state = 0;
582 break;
583 case 2: /* get message */
584 buffer[idx++] = ch;
585 if (idx == msglen) {
586 do_message(msglen, buffer);
587 state = 0;
588 }
589 break;
590 }
591 }
592 }
593
594
595 int msg_handling(int state)
596 {
597 uint8_t pending;
598
599 ATOMIC_BLOCK(ATOMIC_FORCEON) {
600 pending = (Stat & S_MSG_PENDING) != 0;
601 Stat &= ~S_MSG_PENDING;
602 }
603 /*
604 * TODO: if pending but no message chr --> special condition. ie init,...
605 */
606
607 if (pending) {
608 switch (state) {
609 case 0: /* need init */
610 /* Get address of fifo_list */
611 z80_bus_cmd(Request);
612 uint32_t fifo_list = z80_read(0x40) +
613 ((uint16_t) z80_read(0x41) << 8) +
614 ((uint32_t) z80_read(0x42) << 16);
615 z80_bus_cmd(Release);
616 if (fifo_list != 0) {
617 /* Get address of fifo 0 */
618 z80_bus_cmd(Request);
619 uint32_t fifo_addr = z80_read(fifo_list) +
620 ((uint16_t) z80_read(fifo_list+1) << 8) +
621 ((uint32_t) z80_read(fifo_list+2) << 16);
622 z80_bus_cmd(Release);
623 if (fifo_addr != 0) {
624 z80_memfifo_init(fifo_msgin, fifo_addr);
625 state = 1;
626 }
627 }
628 break;
629 case 1: /* awaiting messages */
630 check_msg_fifo();
631 break;
632 }
633 }
634
635 return state;
636 }
637
638
639 static int handle_msg_handling;
640
641 void setup_z180_serv(void)
642 {
643
644 handle_msg_handling = bg_register(msg_handling, 0);
645 handle_cpm_drv_to = bg_register(cpm_drv_to, 0);
646 }
647
648 void restart_z180_serv(void)
649 {
650 z80_bus_cmd(Request);
651 z80_write(0x40, 0);
652 z80_write(0x41, 0);
653 z80_write(0x42, 0);
654 z80_bus_cmd(Release);
655
656 for (int i = 0; i < NUM_FIFOS; i++)
657 z80_memfifo_init(i, 0);
658 bg_setstat(handle_msg_handling, 0);
659
660 }
661
662 #if 0
663 /*--------------------------------------------------------------------------*/
664
665 const FLASH uint8_t iniprog[] = {
666 0xAF, // xor a
667 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
668 0x3E, 0x30, // ld a,030h
669 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
670 };
671
672 const FLASH uint8_t sertest[] = {
673 0xAF, // xor a
674 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
675 0x3E, 0x30, // ld a,030h
676 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
677 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
678 0xED, 0x39, 0x03, // out0 (cntlb1),a
679 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
680 0xED, 0x39, 0x01, // out0 (cntla1),a
681 0x3E, 0x00, // ld a,0
682 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
683 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
684 0xE6, 0x80, // and 80h
685 0x28, 0xF9, // jr z,l0
686 0xED, 0x00, 0x09, // in0 b,(rdr1)
687 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
688 0xE6, 0x02, // and 02h
689 0x28, 0xF9, // jr z,l1
690 0xED, 0x01, 0x07, // out0 (tdr1),b
691 0x18, 0xEA, // jr l0
692 };
693
694 const FLASH uint8_t test1[] = {
695 0xAF, // xor a
696 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
697 0x3E, 0x30, // ld a,030h
698 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
699 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
700 0x06, 0x08, // ld b,dmct_e-dmclrt
701 0x0E, 0x20, // ld c,sar0l
702 0xED, 0x93, // otimr
703 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
704 0xED, 0x39, 0x31, // out0 (dmode),a ;
705 0x3E, 0x62, // ld a,062h ;enable dma0,
706 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
707 0x18, 0xFB, // jr cl_1 ;
708 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
709 0x00, // db 0 ;src
710 0x00, 0x00, // dw 0 ;dst (inc),
711 0x00, // db 0 ;dst
712 0x00, 0x00, // dw 0 ;count (64k)
713 };
714 #endif
Z180 Stamp Monitor