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1 /*
2 * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0
5 */
6
7 #include "common.h"
8 #include <stdlib.h>
9 #include <string.h>
10 #include <stdbool.h>
11 #include <util/atomic.h>
12
13 #include "background.h"
14 #include "env.h"
15 #include "ff.h"
16 #include "serial.h"
17 #include "z80-if.h"
18 #include "debug.h"
19 #include "print-utils.h"
20 #include "z180-serv.h"
21 #include "timer.h"
22 #include "time.h"
23 #include "bcd.h"
24 #include "rtc.h"
25
26 #define DEBUG_CPM_SDIO 0 /* set to 1 to debug */
27
28 #define debug_cpmsd(fmt, args...) \
29 debug_cond(DEBUG_CPM_SDIO, fmt, ##args)
30
31
32 /*--------------------------------------------------------------------------*/
33
34 struct msg_item {
35 uint8_t fct;
36 uint8_t sub_min, sub_max;
37 void (*func)(uint8_t, int, uint8_t *);
38 };
39
40 uint32_t msg_to_addr(uint8_t *msg)
41 {
42 union {
43 uint32_t as32;
44 uint8_t as8[4];
45 } addr;
46
47 addr.as8[0] = msg[0];
48 addr.as8[1] = msg[1];
49 addr.as8[2] = msg[2];
50 addr.as8[3] = 0;
51
52 return addr.as32;
53 }
54
55
56 static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
57 {
58 z80_memfifo_putc(fifo_msgout, 0xAE);
59 z80_memfifo_putc(fifo_msgout, len+2);
60 z80_memfifo_putc(fifo_msgout, func);
61 z80_memfifo_putc(fifo_msgout, subf);
62
63 return 0;
64 }
65
66 int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
67 {
68 msg_xmit_header(func, subf, len);
69 while (len--)
70 z80_memfifo_putc(fifo_msgout, *msg++);
71
72 return 0;
73 }
74
75 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
76 {
77 (void)len;
78
79 z80_memfifo_init(subf, msg_to_addr(msg));
80 }
81
82
83 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
84 {
85 (void)subf;
86
87 while (len--)
88 putchar(*msg++);
89 }
90
91 /* echo message */
92 void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
93 {
94 (void)subf;
95
96 /* send re-echo */
97 msg_xmit(1, 3, len, msg);
98 }
99
100 /* get timer */
101 void do_msg_get_timer(uint8_t subf, int len, uint8_t * msg)
102 {
103 uint32_t time_ms = (len >= 4) ? *(uint32_t *) msg : 0;
104
105 time_ms = get_timer(time_ms);
106 msg_xmit(3, subf, sizeof(time_ms), (uint8_t *) &time_ms);
107 }
108
109 /* ---------------------------------------------------------------------------*/
110
111 #define CPM_DAY_OFFSET ((1978-1900) * 365 + 19) /* 19 leap years */
112
113 /*
114 * Convert CP/M time stamp to a broken-down time structure
115 *
116 */
117 int mk_date_time (int len, uint8_t *msg, struct tm *tmp)
118 {
119 time_t stamp;
120
121 if (len != 5)
122 return -1;
123
124 /* days since 2000-01-01 */
125 long days = msg[3] + (msg[4] << 8) - 8036;
126
127 if (days < 0)
128 return -1;
129
130 stamp = days * ONE_DAY;
131 stamp += bcd2bin(msg[0]);
132 stamp += bcd2bin(msg[1]) * 60 ;
133 stamp += bcd2bin(msg[2]) * 3600L;
134 gmtime_r(&stamp, tmp);
135 return 0;
136 }
137
138 void mk_cpm_time(struct tm *tmp, uint8_t cpm_time[5])
139 {
140 uint16_t days = 1;
141 uint_fast8_t leap=2;
142
143 for (int year=78; year < tmp->tm_year; year++) {
144 days = days + 365 + (leap == 0);
145 leap = (leap+1)%4;
146 }
147 days += tmp->tm_yday;
148
149 cpm_time[0] = bin2bcd(tmp->tm_sec);
150 cpm_time[1] = bin2bcd(tmp->tm_min);
151 cpm_time[2] = bin2bcd(tmp->tm_hour);
152 cpm_time[3] = days;
153 cpm_time[4] = days >> 8;
154 }
155
156 /* get/set cp/m time */
157 void do_msg_get_set_time(uint8_t subf, int len, uint8_t * msg)
158 {
159 struct tm t;
160 uint8_t cpm_time[5];
161 int rc;
162
163 memset(cpm_time, 0, ARRAY_SIZE(cpm_time));
164
165 switch (subf) {
166 case 3: /* set date & time */
167 /* initialize t with current time */
168 rc = rtc_get (&t);
169
170 if (rc >= 0) {
171 /* insert new date & time */
172 if (mk_date_time (len, msg, &t) != 0) {
173 my_puts_P(PSTR("## set_time: Bad date format\n"));
174 break;
175 }
176
177 time_t time;
178 time = mk_gmtime(&t);
179 gmtime_r(&time, &t);
180
181 /* and write to RTC */
182 rc = rtc_set (&t);
183 if(rc)
184 my_puts_P(PSTR("## set_time: Set date failed\n"));
185 } else {
186 my_puts_P(PSTR("## set_time: Get date failed\n"));
187 }
188 /* FALL TROUGH */
189 case 2: /* get date & time */
190 rc = rtc_get (&t);
191 if (rc >= 0) {
192 time_t time;
193 time = mk_gmtime(&t);
194 //mktime(&t);
195 gmtime_r(&time, &t);
196
197 mk_cpm_time(&t, cpm_time);
198 } else {
199 my_puts_P(PSTR("## get_time: Get date failed\n"));
200 }
201 break;
202 }
203
204 msg_xmit(3, subf, sizeof(cpm_time), cpm_time);
205 }
206
207 /* ---------------------------------------------------------------------------*/
208
209 #define MAX_DRIVE 8
210 #define BLOCK_SIZE 512
211 //#define TPA_BASE 0x10000
212 //#define COMMON_BASE 0xC000
213
214 struct cpm_drive_s {
215 uint8_t drv;
216 uint8_t device;
217 char *img_name;
218 bool dirty;
219 FIL fd;
220 };
221
222 static uint8_t disk_buffer[BLOCK_SIZE];
223 static struct cpm_drive_s drv_table[MAX_DRIVE];
224 static int handle_cpm_drv_to;
225
226 #define f_dirty(fp) ((fp)->fs->wflag != 0)
227
228
229 int cpm_drv_to(int state)
230 {
231 static uint32_t ts;
232
233 switch(state) {
234 case 0:
235 break;
236
237 case 1:
238 ts = get_timer(0);
239 state = 2;
240 break;
241
242 case 2:
243 if (get_timer(ts) > 1000) {
244 for (uint_fast8_t i=0; i < MAX_DRIVE; i++) {
245 // if (&drv_table[i].fd && f_dirty(&drv_table[i].fd)) {
246 if (drv_table[i].dirty) {
247 f_sync(&drv_table[i].fd);
248 drv_table[i].dirty = false;
249 debug_cpmsd("## %7lu f_sync: %c:\n", get_timer(0), i+'A');
250 }
251 }
252 state = 0;
253 }
254 }
255 return state;
256 }
257
258
259 void msg_cpm_result(uint8_t subf, uint8_t rc, int res)
260 {
261 uint8_t result_msg[3];
262
263 if (res)
264 rc |= 0x80;
265
266 result_msg[0] = rc;
267 result_msg[1] = res;
268 result_msg[2] = res >> 8;
269
270 if (rc) {
271 debug_cpmsd("###%7lu error rc: %.02x, res: %d\n", get_timer(0), rc, res);
272 }
273
274 msg_xmit(2, subf, sizeof(result_msg), result_msg);
275 }
276
277 /*
278 db 2 ; disk command
279 ds 1 ; subcommand (login/read/write)
280 ds 1 ; @adrv (8 bits) +0
281 ds 1 ; @rdrv (8 bits) +1
282 ds 3 ; @xdph (24 bits) +2
283 */
284
285 void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg)
286 {
287
288 FRESULT res = 0;
289 uint8_t drv;
290 char *np;
291
292 (void)subf;
293
294 if (len != 5) { /* TODO: check adrv, rdrv */
295 return msg_cpm_result(subf, 0x01, res);
296 }
297
298 debug_cpmsd("\n## %7lu login: %c:\n", get_timer(0), msg[0]+'A');
299
300
301 drv = msg[0];
302 if ( drv>= MAX_DRIVE) {
303 return msg_cpm_result(subf, 0x02, res);
304 }
305
306 /*
307 uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
308 */
309
310 if (drv_table[drv].img_name != NULL) {
311 debug_cpmsd("## %7lu close: '%s'\n", get_timer(0), drv_table[drv].img_name);
312 f_close(&drv_table[drv].fd);
313 drv_table[drv].dirty = false;
314 free(drv_table[drv].img_name);
315 drv_table[drv].img_name = NULL;
316 }
317
318 strcpy_P((char *)disk_buffer, PSTR("dsk0"));
319 disk_buffer[3] = msg[0] + '0';
320 if (((np = getenv_char((char*)disk_buffer)) == NULL) ||
321 ((drv_table[drv].img_name = strdup(np)) == NULL)) {
322 return msg_cpm_result(subf, 0x03, res);
323 }
324
325
326 res = f_open(&drv_table[drv].fd, drv_table[drv].img_name,
327 FA_WRITE | FA_READ);
328
329 debug_cpmsd("## %7lu open: '%s', (env: '%s'), res: %d\n", get_timer(0),
330 drv_table[drv].img_name, disk_buffer, res);
331
332 /* send result*/
333 msg_cpm_result(subf, 0x00, res);
334 }
335
336
337 /*
338 db 2 ; disk command
339 ds 1 ; subcommand (login/read/write)
340 ds 1 ; @adrv (8 bits) +0
341 ds 1 ; @rdrv (8 bits) +1
342 ds 2 ; @trk (16 bits) +2
343 ds 2 ; @sect(16 bits) +4
344 ds 1 ; @cnt (8 bits) +6
345 ds 3 ; phys. transfer addr +7
346 */
347
348 #define ADRV 0
349 #define RDRV 1
350 #define TRK 2
351 #define SEC 4
352 #define CNT 6
353 #define ADDR 7
354
355 void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg)
356 {
357 uint8_t drv;
358 uint32_t addr;
359 uint32_t pos;
360 uint8_t secs;
361 bool dowrite = (subf == 2);
362 FRESULT res = 0;
363 uint8_t rc = 0;
364 bool buserr = 0;
365
366 if (len != 10) { /* TODO: check adrv, rdrv */
367 return msg_cpm_result(subf, 0x01, res);
368 }
369
370 drv = msg[ADRV];
371 if ( drv>= MAX_DRIVE) {
372 return msg_cpm_result(subf, 0x02, res);
373 }
374
375 secs = msg[CNT];
376 addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR];
377
378
379 /* TODO: tracks per sector from dpb */
380 pos = (((uint16_t)(msg[TRK+1] << 8) + msg[TRK]) * 8
381 + ((uint32_t)(msg[SEC+1] << 8) + msg[SEC])) * BLOCK_SIZE;
382
383 debug_cpmsd("## %7lu cpm_rw: %s %c: trk:%4d, sec: %d, pos: %.8lx, secs: %2d, "
384 "addr: %.5lx\n", get_timer(0), dowrite ? "write" : " read",
385 msg[ADRV]+'A', ((uint16_t)(msg[TRK+1] << 8) + msg[TRK]), msg[SEC],
386 pos, msg[CNT], addr);
387
388 res = f_lseek(&drv_table[drv].fd, pos);
389 while (!res && secs--) {
390 unsigned int brw;
391 if (dowrite) {
392 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
393 buserr = 1;
394 break;
395 } else {
396 z80_read_block(disk_buffer, addr, BLOCK_SIZE);
397 z80_bus_cmd(Release);
398 }
399 res = f_write(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &brw);
400 } else {
401 res = f_read(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &brw);
402 if (res == FR_OK && brw == BLOCK_SIZE) {
403 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
404 buserr = 1;
405 break;
406 } else {
407 z80_write_block(disk_buffer, addr, BLOCK_SIZE);
408 z80_bus_cmd(Release);
409 }
410 }
411 }
412
413 if (brw != BLOCK_SIZE) {
414 debug_cpmsd("## %7lu f_read res: %d, bytes rd/wr: %u\n", get_timer(0), res, brw);
415 dump_ram(disk_buffer, 0, 64, "Read Data");
416 res = -1;
417 }
418
419 addr += BLOCK_SIZE;
420 }
421
422 if (dowrite && !res) {
423 // res = f_sync(&drv_table[drv].fd);
424 drv_table[drv].dirty = true;
425 bg_setstat(handle_cpm_drv_to, 1);
426 }
427
428
429 if (buserr) {
430 debug_cpmsd("Bus timeout\n");
431 rc = 0x03;
432 }
433
434 /* send result*/
435 msg_cpm_result(subf, rc, res);
436 }
437
438
439 const FLASH struct msg_item z80_messages[] =
440 {
441 { 0, /* fct nr. */
442 1, 3, /* sub fct nr. from, to */
443 do_msg_ini_memfifo},
444 { 1,
445 1, 1,
446 do_msg_char_out},
447 { 1,
448 2, 2,
449 do_msg_echo},
450 { 2,
451 0, 0,
452 do_msg_cpm_login},
453 { 2,
454 1, 2,
455 do_msg_cpm_rw},
456 { 3,
457 1, 1,
458 do_msg_get_timer},
459 { 3,
460 2, 3, /* 2: get, 3: set time and date */
461 do_msg_get_set_time},
462 { 0xff, /* end mark */
463 0, 0,
464 0},
465
466 };
467
468
469
470
471 void do_message(int len, uint8_t *msg)
472 {
473 uint8_t fct, sub_fct;
474 int_fast8_t i = 0;
475
476 if (len >= 2) {
477 fct = *msg++;
478 sub_fct = *msg++;
479 len -= 2;
480
481 while (fct != z80_messages[i].fct) {
482 if (z80_messages[i].fct == 0xff) {
483 DBG_P(1, "do_message: Unknown function: %i, %i\n",
484 fct, sub_fct);
485 return; /* TODO: unknown message # */
486 }
487
488 ++i;
489 }
490
491 while (fct == z80_messages[i].fct) {
492 if (sub_fct >= z80_messages[i].sub_min &&
493 sub_fct <= z80_messages[i].sub_max )
494 break;
495 ++i;
496 }
497
498 if (z80_messages[i].fct != fct) {
499 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
500 fct, sub_fct);
501 return; /* TODO: unknown message sub# */
502 }
503
504 (z80_messages[i].func)(sub_fct, len, msg);
505
506
507 } else {
508 /* TODO: error */
509 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
510 }
511 }
512
513
514
515 #define CTRBUF_LEN 256
516
517 void check_msg_fifo(void)
518 {
519 int ch;
520 static int_fast8_t state;
521 static int msglen,idx;
522 static uint8_t buffer[CTRBUF_LEN];
523
524 while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
525 switch (state) {
526 case 0: /* wait for start of message */
527 if (ch == 0xAE) { /* TODO: magic number */
528 msglen = 0;
529 idx = 0;
530 state = 1;
531 }
532 break;
533 case 1: /* get msg len */
534 if (ch > 0 && ch <= CTRBUF_LEN) {
535 msglen = ch;
536 state = 2;
537 } else
538 state = 0;
539 break;
540 case 2: /* get message */
541 buffer[idx++] = ch;
542 if (idx == msglen) {
543 do_message(msglen, buffer);
544 state = 0;
545 }
546 break;
547 }
548 }
549 }
550
551
552 int msg_handling(int state)
553 {
554 bool pending;
555
556 ATOMIC_BLOCK(ATOMIC_FORCEON) {
557 pending = (Stat & S_MSG_PENDING) != 0;
558 Stat &= ~S_MSG_PENDING;
559 }
560
561 if (pending) {
562 uint8_t init_request;
563 z80_bus_cmd(Request);
564 init_request = z80_read(0x43);
565 z80_bus_cmd(Release);
566 if ( init_request != 0) {
567 /* Get address of fifo 0 */
568 z80_bus_cmd(Request);
569 uint32_t fifo_addr = z80_read(0x40) +
570 ((uint16_t) z80_read(0x40+1) << 8) +
571 ((uint32_t) z80_read(0x40+2) << 16);
572 z80_write(0x43, 0);
573 z80_bus_cmd(Release);
574
575 if (fifo_addr != 0) {
576 z80_memfifo_init(fifo_msgin, fifo_addr);
577 state = 1;
578 } else
579 state = 0;
580
581 } else {
582 check_msg_fifo();
583 }
584 }
585
586 return state;
587 }
588
589
590 static int handle_msg_handling;
591
592 void setup_z180_serv(void)
593 {
594
595 handle_msg_handling = bg_register(msg_handling, 0);
596 handle_cpm_drv_to = bg_register(cpm_drv_to, 0);
597 }
598
599 void restart_z180_serv(void)
600 {
601 z80_bus_cmd(Request);
602 z80_memset(0x40, 0, 4);
603 z80_bus_cmd(Release);
604
605 for (int i = 0; i < NUM_FIFOS; i++)
606 z80_memfifo_init(i, 0);
607 bg_setstat(handle_msg_handling, 0);
608
609 }
610
611 #if 0
612 /*--------------------------------------------------------------------------*/
613
614 const FLASH uint8_t iniprog[] = {
615 0xAF, // xor a
616 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
617 0x3E, 0x30, // ld a,030h
618 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
619 };
620
621 const FLASH uint8_t sertest[] = {
622 0xAF, // xor a
623 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
624 0x3E, 0x30, // ld a,030h
625 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
626 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
627 0xED, 0x39, 0x03, // out0 (cntlb1),a
628 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
629 0xED, 0x39, 0x01, // out0 (cntla1),a
630 0x3E, 0x00, // ld a,0
631 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
632 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
633 0xE6, 0x80, // and 80h
634 0x28, 0xF9, // jr z,l0
635 0xED, 0x00, 0x09, // in0 b,(rdr1)
636 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
637 0xE6, 0x02, // and 02h
638 0x28, 0xF9, // jr z,l1
639 0xED, 0x01, 0x07, // out0 (tdr1),b
640 0x18, 0xEA, // jr l0
641 };
642
643 const FLASH uint8_t test1[] = {
644 0xAF, // xor a
645 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
646 0x3E, 0x30, // ld a,030h
647 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
648 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
649 0x06, 0x08, // ld b,dmct_e-dmclrt
650 0x0E, 0x20, // ld c,sar0l
651 0xED, 0x93, // otimr
652 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
653 0xED, 0x39, 0x31, // out0 (dmode),a ;
654 0x3E, 0x62, // ld a,062h ;enable dma0,
655 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
656 0x18, 0xFB, // jr cl_1 ;
657 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
658 0x00, // db 0 ;src
659 0x00, 0x00, // dw 0 ;dst (inc),
660 0x00, // db 0 ;dst
661 0x00, 0x00, // dw 0 ;count (64k)
662 };
663 #endif
Z180 Stamp Monitor