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[z180-stamp.git] / z180 / r3init.180
1 page 255
2 .z80
3
4 extrn ddtz,bpent
5 extrn $stack
6 extrn $coninit,$cists,$ci
7
8 extrn romend
9
10
11 global isv_sw
12
13 include config.inc
14 include z180reg.inc
15 include z180.lib
16
17 ;CR equ 0dh
18
19
20
21 ;----------------------------------------------------------------------
22
23 cseg
24
25 jp start
26
27 ; restart vectors
28
29 rsti defl 1
30 rept 7
31 db 0, 0, 0, 0, 0
32 jp bpent
33 rsti defl rsti+1
34 endm
35
36 ;----------------------------------------------------------------------
37
38 if ROMSYS
39 $crom: defb c$rom ;
40 else
41 db 0 ;
42 endif
43
44 dmclrt: ;clear ram per dma
45 db dmct_e-dmclrt-2 ;
46 db sar0l ;first port
47 dw nullbyte ;src (fixed)
48 nullbyte:
49 db 000h ;src
50 dw romend ;dst (inc), start after "rom" code
51 db 00h ;dst
52 dw 0-romend ;count (64k)
53 dmct_e:
54
55 INIWAITS defl CWAITIO
56 if ROMSYS
57 INIWAITS defl INIWAITS+CWAITROM
58 endif
59
60 hwini0:
61 db 3 ;count
62 db rcr,CREFSH ;configure DRAM refresh
63 db dcntl,INIWAITS ;wait states
64 db cbar,SYS$CBAR
65
66 ;----------------------------------------------------------------------
67
68 start:
69 push af ;003c
70 in0 a,(itc) ;003d Illegal opcode trap?
71 jp p,??st01 ;0040
72 pop af ;0043
73 jp bpent ;0044 yes, handle
74
75 ??st01:
76 ld a,i ;0047 I register == 0 ?
77 jr z,??st02 ;004b yes, harware reset
78 pop af ;004d
79 jp bpent ;004e no, allready set up
80
81 ??st02:
82 di ;0058
83 ld a,CREFSH
84 out0 (rcr),a ; configure DRAM refresh
85 ld a,CWAITIO
86 out0 (dcntl),a ; wait states
87
88 ; search warm start mark
89
90 ld ix,mark_55AA ;00b8 ; top of common area
91 ld a,SYS$CBAR ;
92 out0 (cbar),a ;
93 ld a,071h ;00bc
94 ex af,af' ;00be ;for cbr = 0x70 downto 0x40
95 swsm_l:
96 ex af,af' ;00bf
97 dec a ;00c0
98 cp 03fh ;00c1
99 jr z,kstart ;00c3 ; break (mark not found)
100 out0 (cbr),a ;00c5
101 ex af,af' ;00c8
102 ld a,0aah ;00c9
103 cp (ix+000h) ;00cb
104 jr nz,swsm_l ;00ce
105 cp (ix+002h) ;00d0
106 jr nz,swsm_l ;00d3
107 cpl ;00d5
108 cp (ix+001h) ;00d6
109 jr nz,swsm_l ;00d9
110 cp (ix+003h) ;00db
111 jr nz,swsm_l ;00de
112 ld sp,$stack ;00e0 mark found, check
113 call checkcrc_alv ;00e3
114 jp z,wstart ;00e6 check ok,
115
116 ;
117 ; ram not ok, initialize -- kstart --
118
119 kstart:
120
121 ld a,088h ;00e9 0000-7fff: common 0
122 out0 (cbar),a ;00eb 8000-ffff: common 1
123 ld ix,08000h ;00f3
124 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)
125 ??f_0:
126 out0 (cbr),a ;00f9
127
128 ld (ix+0),a ;0103
129 cpl
130 ld (ix+1),a ;0103
131 cpl
132 add a,8 ;010a next 'bank'
133 cp 078h ;010c stop at 078000
134 jr nz,??f_0 ;010e
135
136 ld de,8000h ;0114 first block not tested, but mark as ok
137 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)
138 ??cp_0:
139 out0 (cbr),a ;011c
140 ld c,a
141 xor (ix+0)
142 ld b,a
143 ld a,c
144 cpl
145 xor (ix+1)
146 or b
147 jr nz,??cp_1
148 scf
149 ??cp_1:
150 rr d
151 rr e
152 ld a,c
153 add a,8
154 cp 078h ; stop at 078000
155 jr nz,??cp_0
156
157 ;
158 ; ram test found 1 or more error free blocks (32k)
159 ;
160
161 ramok:
162 ld a,SYS$CBAR ;01c8
163 out0 (cbar),a ;01ca
164 ld h,d
165 ld l,e
166 ld c,070h ;01ce highest block
167 ld b,15 ;01d0
168 ??sr_1:
169 add hl,hl
170 jr c,alloc ;01d4 highest "error free" block
171 ld a,c ;01d6
172 sub 008h ;01d7
173 ld c,a ;01d9
174 djnz ??sr_1 ;01da
175
176 slp ;01dc should never be reached
177
178 alloc:
179 out0 (cbr),c ;01de
180 ld sp,$stack ;01e1
181
182 ; Clear RAM using DMA0
183
184 ld hl,dmclrt ;load DMA registers
185 call io.ini.m
186 ld a,0cbh ;01ef dst +1, src fixed, burst
187 out0 (dmode),a ;01f1
188
189 ld b,512/64
190 ld a,062h ;01f4 enable dma0,
191 ??cl_1:
192 out0 (dstat),a ;01f9 clear (up to) 64k
193 djnz ??cl_1 ; end of RAM?
194
195 ; Init bank manager
196
197 ld hl,banktabsys ;020f
198 ld (hl),c ; Common area
199 inc hl ;0213
200 ld (hl),c ; System work area
201 inc hl ;0215 Point to bank 0 entry
202 ld b,BANKS ;0216
203 l0218h:
204 ld (hl),0ffh ;0218 Mark all banks as unassigned
205 inc hl ;021a
206 djnz l0218h ;021b
207
208 ld hl,memalv ;
209 ld b,8 ; 8*4k ie. first 32k
210 ??a_0:
211 ld (hl),0e0h ; mark as sys ("rom"/monitor)
212 inc hl
213 djnz ??a_0
214
215 rr d ; shift out bit for block 0
216 rr e ;
217 ld c,15 ;022c 15*32k remaining blocks
218 l022eh:
219 ld a,0feh ; 0xfe == block with error(s)
220 rr d ;
221 rr e
222 adc a,0 ; ==> 0xff : block ok
223 ld b,32/4 ; 32k == 8 * 4k
224 l0236h:
225 ld (hl),a ;
226 inc hl ;
227 djnz l0236h ;
228 dec c ;
229 jr nz,l022eh ;next 32k block
230
231 ld hl,memalv+0ch ;memalv+0ch
232 ld a,(banktabsys) ;
233 call add_hl_a
234 ld b,3 ;
235 l024ah:
236 ld (hl),0ech ;alloc system ram
237 inc hl ;
238 djnz l024ah ;
239 ld (hl),0efh ;alloc common
240 call gencrc_alv
241
242 ld hl,0000h ;bank #
243 ld bc,0f0fh ; size (?) (4k blocks)
244 xor a ;
245 call sub_0420h ;alloc mem for bank 0
246 ld c,l ;
247 or a ;
248 call z,sub_04b5h ;
249
250 ld hl,0101h ;
251 ld bc,0f0fh ;
252 xor a ;
253 call sub_0420h ;
254 ld c,l ;
255 or a ;
256 call z,sub_04b5h ;
257
258 ld hl,055AAh ;set warm start mark
259 ld (mark_55AA),hl ;
260 ld (mark_55AA+2),hl;
261
262 ;
263 ; crc ok -- wstart --
264 ;
265 wstart:
266 call sysram_init ;027f
267 call ivtab_init
268
269 call prt0_init
270
271
272 call bufferinit
273
274
275 call $coninit
276
277
278
279
280 im 2 ;?030e
281 ei ;0282
282
283 call $cists ;0284
284 call $cists ;0287
285 or a ;028a
286 call nz,$ci ;028d
287
288 ld a,(banktab) ;
289 ld e,a ;
290 jp ddtz ;0290
291
292
293 ;
294 ;----------------------------------------------------------------------
295 ;
296
297 extrn msginit,msg.sout,msg_fifo
298 extrn tx.buf,rx.buf
299
300
301 ;TODO: Make a ringbuffer module.
302
303 global buf.init
304
305 buf.init:
306 ld (ix+o.in_idx),0
307 ld (ix+o.out_idx),0
308 ld (ix+o.mask),a
309 ret
310
311 ;----------------------------------------------------------------------
312
313 bufferinit:
314 call msginit
315
316 ld hl,buffers
317 ld bc,0300h
318 bfi_1:
319 ld e,(hl)
320 inc hl
321 ld d,(hl)
322 inc hl
323 push hl
324 in0 a,cbr
325 call log2phys
326 ld (bufdat+1),hl
327 ld (bufdat+3),a
328 ld a,c
329 ld (bufdat+0),a
330 ld hl,inimsg
331 call msg.sout
332 pop hl
333 inc c
334 djnz bfi_1
335 ret
336
337 rept 20
338 db 0
339 endm
340
341 buffers:
342 dw msg_fifo
343 dw tx.buf
344 dw rx.buf
345
346 inimsg:
347 db inimsg_e - $ -2
348 db PMSG
349 db 81h
350 db inimsg_e - $ -1
351 db 0
352 bufdat:
353 db 0
354 dw 0
355 db 0
356 inimsg_e:
357
358 ;
359 ;----------------------------------------------------------------------
360 ;
361
362 sysram_init:
363 ld hl,sysramw
364 ld de,topcodsys
365 ld bc,sysrame-sysramw
366 ldir
367
368 ret
369
370 ;----------------------------------------------------------------------
371
372 ivtab_init:
373 ld hl,ivtab ;
374 ld a,h ;
375 ld i,a ;
376 out0 (il),l ;
377
378 ; Let all vectors point to spurious int routines.
379
380 ld d,high sp.int0
381 ld a,low sp.int0
382 ld b,9
383 ivt_i1:
384 ld (hl),a
385 inc l
386 ld (hl),d
387 inc l
388 add a,sp.int.len
389 djnz ivt_i1
390 ret
391
392
393 prt0_init:
394 ld a,i
395 ld h,a
396 in0 a,(il)
397 and 0E0h
398 or IV$PRT0
399 ld l,a
400 ld (hl),low iprt0
401 inc hl
402 ld (hl),high iprt0
403 ld hl,prt0itab
404 call io.ini.m
405 ret
406
407 prt0itab:
408 db prt0it_e-prt0itab-2
409 db tmdr0l
410 dw PRT_TC10MS
411 dw PRT_TC10MS
412 db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.
413 prt0it_e:
414
415 ;
416 ;----------------------------------------------------------------------
417 ;
418
419 io.ini:
420 push bc
421 ld b,0 ;high byte port adress
422 ld a,(hl) ;count
423 inc hl
424 ioi_1:
425 ld c,(hl) ;port address
426 inc hl
427 outi
428 inc b ;outi decrements b
429 dec a
430 jr nz,ioi_1
431 pop bc
432 ret
433
434 io.ini.m:
435 push bc
436 ld b,(hl)
437 inc hl
438 ld c,(hl)
439 inc hl
440 otimr
441 pop bc
442 ret
443
444 io.ini.l:
445 ;
446
447 ;----------------------------------------------------------------------
448 ;
449
450 ; compute crc
451 ; hl: start adr
452 ; bc: len
453 ; bc returns crc val
454
455 do_crc16:
456 ld de,0FFFFh
457 crc1:
458 ld a,(hl)
459 xor e
460 ld e,a
461 rrca
462 rrca
463 rrca
464 rrca
465 and 0Fh
466 xor e
467 ld e,a
468 rrca
469 rrca
470 rrca
471 push af
472 and 1Fh
473 xor d
474 ld d,a
475 pop af
476 push af
477 rrca
478 and 0F0h
479 xor d
480 ld d,a
481 pop af
482 and 0E0h
483 xor e
484 ld e,d
485 ld d,a
486 cpi
487 jp pe,crc1
488 or e ;z-flag
489 ret
490
491
492 gencrc_alv:
493 push hl ;03f6
494 push de ;03f7
495 push bc
496 push af ;03f8
497 ld hl,banktabsys ;03f9
498 ld bc,crc_len ;03fc
499 call do_crc16 ;03ff
500 ld (hl),e
501 inc hl
502 ld (hl),d
503 pop af ;0406
504 pop bc
505 pop de ;0407
506 pop hl ;0408
507 ret ;0409
508
509 checkcrc_alv:
510 push hl ;040a
511 push de
512 push bc ;040b
513 ld hl,banktabsys ;040d
514 ld bc,crc_len+2 ;0410
515 call do_crc16 ;0413
516 pop bc ;041d
517 pop de
518 pop hl ;041e
519 ret ;041f
520
521 ;
522 ; alloc
523 ;
524 ; h: max bank #
525 ; l: min bank #
526 ; b: max size
527 ; c: min size
528 ;
529 ; ret:
530 ; a: 0 == ok
531 ; 1 ==
532 ; 2 == no bank # in requested range
533 ; ff == crc error
534 ;
535
536 sub_0420h:
537 call checkcrc_alv ;0420
538 jr nz,l049ch ;0424 crc error, tables corrupt
539
540 call sub_049dh ;0427 bank # in req. range available?
541 jr c,l0499h ;042a
542 push ix ;042c
543 push iy ;042e
544 push de ;0430
545 push hl ;0431
546 push bc ;0432
547 ld c,b ;0433
548 ld b,alv_len+1 ;0434
549 ld d,0 ;0436
550 ld hl,memalv-1 ;0438
551 jr l0441h ;043b
552
553 ; find free blocks
554
555 l043dh:
556 ld a,(hl) ;043d
557 inc a ;043e free blocks are marked 0ffh
558 jr z,l0446h ;043f
559 l0441h:
560 inc hl ;0441
561 djnz l043dh ;0442
562 jr l0464h ;0444
563 l0446h:
564 push hl ;0446
565 pop ix ;0447 free blocks start here
566 ld e,000h ;0449
567 jr l0451h ;044b
568 l044dh: ; count free blocks
569 ld a,(hl) ;044d
570 inc a ;044e
571 jr nz,l0457h ;044f
572 l0451h:
573 inc e ;0451
574 inc hl ;0452
575 djnz l044dh ;0453
576 jr l0464h ;0455
577
578 ; end of free blocks run.
579
580 l0457h:
581 ld a,d ;0457
582 cp e ;0458 nr of blocks >= requested ?
583 jr nc,l0441h ;0459
584
585 ld d,e ;045b
586 push ix ;045c
587 pop iy ;045e
588 ld a,d ;0460
589 cp c ;0461
590 jr c,l0441h ;0462
591 l0464h:
592 pop bc ;0464
593 ld a,d ;0465
594 cp b ;0466
595 jr c,l046ch ;0467
596 ld d,b ;0469
597 jr l0471h ;046a
598 l046ch:
599 cp c ;046c
600 jr nc,l0471h ;046d
601 ld d,000h ;046f
602 l0471h:
603 ld a,d ;0471
604 push iy ;0472
605 pop hl ;0474
606 ld de,memalv ;0475
607 or a ;0478
608 sbc hl,de ;0479
609 ld b,l ;047b
610 ld c,a ;047c
611 pop hl ;047d
612 l047eh:
613 or a ;047e
614 jr z,l0489h ;047f
615 ld (iy+0),l ;0481
616 inc iy ;0484
617 dec a ;0486
618 jr l047eh ;0487
619 l0489h:
620 pop de ;0489
621 pop iy ;048a
622 pop ix ;048c
623 call gencrc_alv ;048e
624 ld a,c ;0491
625 or a ;0492
626 ld a,000h ;0493
627 ret nz ;0495
628 or 001h ;0496
629 ret ;0498
630
631 l0499h:
632 ld a,2 ;0499
633 l049ch:
634 or a
635 ret ;049c
636
637
638 ; search a free bank number in range
639 ; h: max #
640 ; l: min #
641 ; ret:
642 ; l: bank number available
643 ; nc, if found, bank nr. in l
644 ; cy, if none found
645
646 sub_049dh:
647 push de ;049d
648 push bc ;049e
649 ex de,hl ;049f
650 dec e ;04a0
651 l04a1h:
652 inc e ;04a1 test next #
653 ld a,d ;04a2
654 cp e ;04a3
655 jr c,l04b1h ;04a4
656 ld a,e ;04a6
657 ld hl,memalv ;04a7
658 ld bc,alv_len ;04aa
659 cpir ;04ad bank# allready allocated?
660 jr z,l04a1h ;04af if yes, search for next
661 l04b1h:
662 ex de,hl ;04b1
663 pop bc ;04b2
664 pop de ;04b3
665 ret ;04b4
666
667
668 sub_04b5h:
669 ld a,l ;04b5
670 cp 012h ;04b6
671 ccf ;04b8
672 ret c ;04b9
673 push hl ;04ba
674 ld hl,banktab ;04bb
675 call add_hl_a
676 ld (hl),b ;04c3
677 call gencrc_alv ;04c4
678 pop hl ;04c7
679 or a ;04c8 clear carry
680 ret ;04c9
681
682
683 ;--------------------------------------------------------------
684 ;
685 ; de: Log. Address
686 ; a: Bank number
687 ;
688 ;out ahl: Phys. (linear) Address
689
690
691 bnk2phys:
692 push hl
693 ld hl,banktab
694 call add_hl_a
695 ld a,(hl)
696 pop hl
697
698 ; fall thru
699 ;--------------------------------------------------------------
700 ;
701 ; de: Log. Address
702 ; a: Bank (bbr)
703 ;
704 ; OP: ahl = (a<<12) + (d<<8) + e
705 ;
706 ;out ehl: Phys. (linear) Address
707
708
709 log2phys:
710 push bc ;
711 ld c,a ;
712 ld b,16 ;
713 mlt bc ;bc = a<<4
714 ld l,d ;
715 ld h,0 ;
716 add hl,bc ;bc + d == a<<4 + d
717 ld a,h ;
718 ld h,l ;
719 ld l,e ;
720 pop bc ;
721 ret ;
722
723
724 ;--------------------------------------------------------------
725 ;
726 ;return:
727 ; hl = hl + a
728 ; Flags undefined
729 ;
730
731 add_hl_a:
732 add a,l
733 ld l,a
734 ret nc
735 inc h
736 ret
737
738 ; ---------------------------------------------------------
739
740 sysramw:
741
742 .phase isvsw_loc
743 topcodsys:
744
745 ; Trampoline for interrupt routines in banked ram.
746 ; Switch stack pointer to "system" stack in top ram
747 ; Save cbar
748
749 isv_sw: ;
750 ex (sp),hl ; save hl, return adr in hl
751 push de ;
752 push af ;
753 ex de,hl ;
754 ld hl,0 ;
755 add hl,sp ;
756 ld a,h ;
757 cp 0f8h ;
758 jr nc,isw_1 ;
759 ld sp,$stack ;
760 isw_1:
761 push hl ;
762 in0 h,(cbar) ;
763 push hl ;
764 ld a,SYS$CBAR ;
765 out0 (cbar),a ;
766 ex de,hl ;
767 ld e,(hl) ;
768 inc hl ;
769 ld d,(hl) ;
770 ex de,hl ;
771 push bc ;
772 call jphl ;
773
774 pop bc ;
775 pop hl ;
776 out0 (cbar),h ;
777 pop hl ;
778 ld sp,hl ;
779 pop af ;
780 pop de ;
781 pop hl ;
782 ei ;
783 ret ;
784 jphl:
785 jp (hl) ;
786
787 ; ---------------------------------------------------------
788
789 iprt0:
790 push af
791 push hl
792 in0 a,(tcr)
793 in0 a,(tmdr0l)
794 in0 a,(tmdr0h)
795 ld a,(tim_ms)
796 inc a
797 cp 100
798 jr nz,iprt_1
799 xor a
800 ld hl,(tim_s)
801 inc hl
802 ld (tim_s),hl
803 iprt_1:
804 ld (tim_ms),a
805 pop hl
806 pop af
807 ei
808 ret
809
810 ; ---------------------------------------------------------
811
812 sp.int0:
813 ld a,0d0h
814 jr sp.i.1
815 sp.int.len equ $-sp.int0
816 ld a,0d1h
817 jr sp.i.1
818 ld a,0d2h
819 jr sp.i.1
820 ld a,0d3h
821 jr sp.i.1
822 ld a,0d4h
823 jr sp.i.1
824 ld a,0d5h
825 jr sp.i.1
826 ld a,0d6h
827 jr sp.i.1
828 ld a,0d7h
829 jr sp.i.1
830 ld a,0d8h
831 sp.i.1:
832 ; out (80h),a
833 halt
834
835 curph defl $
836 .dephase
837 sysrame:
838 .phase curph
839 tim_ms: db 0
840 tim_s: dw 0
841 .dephase
842
843 ;-----------------------------------------------------
844
845 dseg
846
847 ds 1
848 banktabsys:
849 ds 1 ;0c001h
850 ds 1 ;0c002h
851 banktab:
852 ds BANKS ;0c003h
853 memalv:
854 ds 512/4 ;Number of 4k blocks
855 alv_len equ $-memalv
856 crc_len equ $-banktabsys
857
858 crc_memalv:
859 ds 2 ;
860
861 cseg
862
863 ;.phase 0ffc0h
864 ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table
865 ;.dephase
866
867 ;.phase 0fffch
868 mark_55AA equ 0fffch
869 ;ds 4 ; 0fffch
870 ;.dephase
871
872
873 end
874
Z180 Stamp Monitor