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1 /*
2 */
3
4 #include "common.h"
5 //#include <avr/power.h>
6 //#include <avr/pgmspace.h>
7 //#include <util/atomic.h>
8 //#include <avr/sleep.h>
9 //#include <string.h>
10
11
12 #include "debug.h"
13 #include "serial.h"
14 #include "z80-if.h"
15
16
17
18 /*--------------------------------------------------------------------------*/
19
20 uint32_t z80_sram_cmp(uint32_t addr, uint32_t length, uint8_t wval, int inc)
21 {
22 uint8_t rval;
23 int_fast8_t errors = 0;
24
25 DBG_P(1, "SRAM: Check 0x%.5lx byte... ", length);
26 while (length--) {
27 if ((rval = z80_read(addr)) != wval) {
28 if (errors == 0) {
29 DBG_P(1, "\nSRAM: Address W R\n" \
30 " ------------------\n");
31 }
32 errors++;
33 if (errors > 20) {
34 DBG_P(1, " ...\n");
35 break;
36 }
37 DBG_P(1, " 0x%.5lx 0x%.2x 0x%.2x\n", addr, wval, rval);
38 }
39 addr++;
40 wval += inc;
41 }
42 DBG_P(1, "Done.\n");
43
44 return addr;
45 }
46
47 void z80_sram_fill(uint32_t addr, uint32_t length, uint8_t startval, int inc)
48 {
49 printf("SRAM: Write 0x%.5lx byte... ", length);
50 while (length--) {
51 z80_write(addr, startval);
52 ++addr;
53 startval += inc;
54 }
55 printf("Done.\n");
56 }
57
58
59 #if 0
60 void z80_sram_fill_string(uint32_t addr, int length, const char *text)
61 {
62 char c;
63 const char *p = text;
64
65 while (length--) {
66 z80_write(addr++, c = *p++);
67 if (c == 0)
68 p = text;
69 }
70 }
71
72
73 uint32_t z80_sram_cmp_string(uint32_t addr, int length, const char *text)
74 {
75 char c;
76 const char *p = text;
77
78 while (length--) {
79 c = *p++;
80 if (z80_read(addr) != c)
81 break;
82 ++addr;
83 if (c == 0)
84 p = text;
85 }
86 return addr;
87 }
88
89 const char * const qbfox = "Zhe quick brown fox jumps over the lazy dog!";
90 const char * const qbcat = "Zhe quick brown fox jumps over the lazy cat!";
91
92 #endif
93
94 uint8_t z80_get_byte(uint32_t adr)
95 {
96 uint8_t data;
97
98 z80_request_bus();
99 data = z80_read(adr),
100 z80_release_bus();
101
102 return data;
103 }
104
105
106 /*--------------------------------------------------------------------------*/
107
108 struct msg_item {
109 uint8_t fct;
110 uint8_t sub_min, sub_max;
111 void (*func)(uint8_t, int, uint8_t *);
112 };
113
114 uint32_t msg_to_addr(uint8_t *msg)
115 {
116 union {
117 uint32_t as32;
118 uint8_t as8[4];
119 } addr;
120
121 addr.as8[0] = msg[0];
122 addr.as8[1] = msg[1];
123 addr.as8[2] = msg[2];
124 addr.as8[3] = 0;
125
126 return addr.as32;
127 }
128
129 void do_msg_ini_msgfifo(uint8_t subf, int len, uint8_t * msg)
130 {
131 (void)subf; (void)len;
132
133 z80_init_msg_fifo(msg_to_addr(msg));
134 }
135
136
137 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
138 {
139 (void)len;
140
141 z80_memfifo_init(subf - 1, msg_to_addr(msg));
142 }
143
144
145 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
146 {
147 (void)subf;
148
149 while (len--)
150 putchar(*msg++);
151 }
152
153
154 const FLASH struct msg_item z80_messages[] =
155 {
156 { 0, /* fct nr. */
157 0, 0, /* sub fct nr. from, to */
158 do_msg_ini_msgfifo},
159 { 0,
160 1, 2,
161 do_msg_ini_memfifo},
162 { 1,
163 1, 1,
164 do_msg_char_out},
165 { 0xff, /* end mark */
166 0, 0,
167 0},
168
169 };
170
171
172
173
174 void do_message(int len, uint8_t *msg)
175 {
176 uint8_t fct, sub_fct;
177 int_fast8_t i = 0;
178
179 if (len >= 2) {
180 fct = *msg++;
181 sub_fct = *msg++;
182 len -= 2;
183
184 while (fct != z80_messages[i].fct)
185 ++i;
186
187 if (z80_messages[i].fct == 0xff) {
188 DBG_P(1, "do_message: Unknown function: %i, %i\n",
189 fct, sub_fct);
190 return; /* TODO: unknown message # */
191 }
192
193 while (fct == z80_messages[i].fct) {
194 if (sub_fct >= z80_messages[i].sub_min && sub_fct <= z80_messages[i].sub_max )
195 break;
196 ++i;
197 }
198
199 if (z80_messages[i].fct != fct) {
200 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
201 fct, sub_fct);
202 return; /* TODO: unknown message sub# */
203 }
204
205 (z80_messages[i].func)(sub_fct, len, msg);
206
207
208 } else {
209 /* TODO: error */
210 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
211 }
212 }
213
214
215
216 #define CTRBUF_LEN 256
217
218 void check_msg_fifo(void)
219 {
220 int ch;
221 static int_fast8_t state;
222 static int msglen,idx;
223 static uint8_t buffer[CTRBUF_LEN];
224
225 while (state != 3 && (ch = z80_msg_fifo_getc()) >= 0) {
226 switch (state) {
227 case 0: /* wait for start of message */
228 if (ch == 0x81) {
229 msglen = 0;
230 idx = 0;
231 state = 1;
232 }
233 break;
234 case 1: /* get msg len */
235 if (ch > 0 && ch <= CTRBUF_LEN) {
236 msglen = ch;
237 state = 2;
238 } else
239 state = 0;
240 break;
241 case 2: /* get message */
242 buffer[idx++] = ch;
243 if (idx == msglen)
244 state = 3;
245 break;
246 }
247 }
248
249 if (state == 3) {
250 do_message(msglen, buffer);
251 state = 0;
252 }
253 }
254
255
256 /*--------------------------------------------------------------------------*/
257
258 #if 0
259 void dump_mem(const FLASH uint8_t *addr, uint32_t len)
260 {
261 DBG_P(1, "hdrom dump:");
262 while (len) {
263 DBG_P(1, "\n %.5x:", addr);
264 for (unsigned i = 0; i<16; i++)
265 DBG_P(1, " %.2x", *addr++);
266 len -= len > 16 ? 16 : len;
267 }
268 DBG_P(1, "\n");
269 }
270 #endif
271 /*--------------------------------------------------------------------------*/
272
273
274 const FLASH uint8_t iniprog[] = {
275 0xAF, // xor a
276 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
277 0x3E, 0x30, // ld a,030h
278 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
279 };
280
281 const FLASH uint8_t sertest[] = {
282 0xAF, // xor a
283 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
284 0x3E, 0x30, // ld a,030h
285 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
286 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
287 0xED, 0x39, 0x03, // out0 (cntlb1),a
288 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
289 0xED, 0x39, 0x01, // out0 (cntla1),a
290 0x3E, 0x00, // ld a,0
291 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
292 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
293 0xE6, 0x80, // and 80h
294 0x28, 0xF9, // jr z,l0
295 0xED, 0x00, 0x09, // in0 b,(rdr1)
296 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
297 0xE6, 0x02, // and 02h
298 0x28, 0xF9, // jr z,l1
299 0xED, 0x01, 0x07, // out0 (tdr1),b
300 0x18, 0xEA, // jr l0
301 };
302
303 const FLASH uint8_t test1[] = {
304 0xAF, // xor a
305 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
306 0x3E, 0x30, // ld a,030h
307 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
308 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
309 0x06, 0x08, // ld b,dmct_e-dmclrt
310 0x0E, 0x20, // ld c,sar0l
311 0xED, 0x93, // otimr
312 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
313 0xED, 0x39, 0x31, // out0 (dmode),a ;
314 0x3E, 0x62, // ld a,062h ;enable dma0,
315 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
316 0x18, 0xFB, // jr cl_1 ;
317 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
318 0x00, // db 0 ;src
319 0x00, 0x00, // dw 0 ;dst (inc),
320 0x00, // db 0 ;dst
321 0x00, 0x00, // dw 0 ;count (64k)
322 };
323
324
325
326 // check_msg_fifo();
327