loadi cosmetic changes

[z180-stamp.git] / z180 / config.inc

diff --git a/z180/config.inc b/z180/config.inc
index 9cef0511f8f72a144c7c351dec2e91c02cd27a75..ed98656c936f9214df8b2fd109f3b7579167647b 100644 (file)
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -1,7 +1,23 @@
 \r
+FALSE  equ     0\r
+TRUE   equ     NOT FALSE\r
 \r
-FOSC           equ     9216            ;Oscillator frequency [KHz]\r
-PHI            equ     FOSC*2          ;CPU frequency\r
+;-----------------------------------------------------\r
+; CPU and BANKING types\r
+\r
+\r
+CPU_Z180       equ     TRUE\r
+CPU_Z80                equ     FALSE\r
+\r
+ROMSYS         equ     FALSE\r
+\r
+AVRCLK         equ     18432           ;[KHz]\r
+\r
+    if CPU_Z180\r
+\r
+;-----------------------------------------------------\r
+FOSC           equ     AVRCLK/2        ;Oscillator frequency [KHz]\r
+PHI            equ     FOSC*2          ;CPU frequency (clock doubler enabled)\r
 \r
 ;-----------------------------------------------------\r
 ; Programmable Reload Timer (PRT)\r
@@ -16,8 +32,21 @@ PRT_TC10MS   equ     PHI / (PRT_PRE/10)
 ;-----------------------------------------------------\r
 ; MMU\r
 \r
-SYS$CBAR       equ     0C8h\r
-USR$CBAR       equ     0F0h\r
+COMMON_SIZE    equ     4*1024          ;Common Area size in bytes\r
+                                       ;must be multiple of 4K\r
+\r
+if (COMMON_SIZE mod 1000h) \r
+       .printx COMMON_SIZE not multiple of 4K!\r
+       end     ;stop assembly\r
+endif\r
+\r
+CSK    equ     COMMON_SIZE/1000h       ;\r
+CA     equ     10h - CSK               ;common area start\r
+BA     equ     0                       ;banked area start\r
+\r
+SYS$CBR                equ     0\r
+SYS$CBAR       equ     CA<<4 + CA      ;CBAR in system mode\r
+USR$CBAR       equ     CA<<4 + BA      ;CBAR in user mode (CP/M)\r
 \r
 \r
 BANKS          equ     18              ;max nr. of banks\r
@@ -27,15 +56,51 @@ BANKS               equ     18              ;max nr. of banks
 CREFSH         equ     0               ;Refresh rate register (disable refresh)\r
 CWAITIO                equ     3 shl IWI0      ;Max I/O Wait States, 0 Memory Wait States\r
 \r
-\r
-ROMSYS         equ     0\r
-\r
-       if      ROMSYS\r
+    endif              ;CPU_Z180\r
+    if CPU_Z80\r
+\r
+PHI            equ     AVRCLK/5        ;CPU frequency [KHz]\r
+BAUDCLCK       equ     AVRCLK/10       ;Baudrate clock [KHz]\r
+;BDCLK16               equ\r
+\r
+SIOAD  EQU     0bch\r
+SIOAC  EQU     0bdh\r
+SIOBD  EQU     0beh\r
+SIOBC  EQU     0bfh\r
+\r
+CTC0   EQU     0f4h\r
+CTC1   EQU     0f5h\r
+CTC2   EQU     0f6h\r
+CTC3   EQU     0f7h\r
+\r
+;\r
+; Init Serial I/O for console input and output (SIO-A)\r
+;\r
+; Baudrate clock: 1843200 Hz (Bus connector pin A17)\r
+;\r
+; Baudrate   Divider   SIO     CTC\r
+; ---------------------------------\r
+; 115200         16     16       1\r
+;  57600         32     16       2\r
+;  38400         48     16       3\r
+;  19200         96     16       6\r
+;   9600        192     16      12\r
+;   4800        384     16      24\r
+;   2400        768     16      48\r
+;   1200       1536     16      96\r
+;    600       3072     16     192\r
+;    300       6144     64      92\r
+\r
+    endif      ; CPU_Z80\r
+\r
+    if ROMSYS\r
 c$rom          equ     0a5h\r
 ROM_EN         equ     0C0h\r
 ROM_DIS                equ     ROMEN+1\r
+     if CPU_Z180\r
 CWAITROM       equ     2 shl MWI0\r
-       endif\r
+     endif\r
+    endif\r
 \r
 \r
 DRSTNUM        equ     30h             ;DDTZ Restart vector (breakpoints)\r
@@ -50,12 +115,12 @@ co.fifo_len        equ     256
 s1.rx_len      equ     256             ;Serial 1 (ASCI1) buffers\r
 s1.tx_len      equ     256             ;\r
 \r
-AVRINT5                equ     40h\r
-AVRINT6                equ     50h\r
+AVRINT5                equ     4Fh\r
+AVRINT6                equ     5Fh\r
 ;PMSG          equ     80h\r
 \r
 ;-----------------------------------------------------\r
-; Definition of (locical) top 2 memory pages\r
+; Definition of (logical) top 2 memory pages\r
 \r
 sysram_start   equ     0FE00h\r
 stacksize      equ     80\r