+/*
+ * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
#include "common.h"
#include <util/atomic.h>
#include "debug.h"
#include "z180-serv.h"
-
-
/*--------------------------------------------------------------------------*/
}
+static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
+{
+ z80_memfifo_putc(fifo_msgout, 0xAE);
+ z80_memfifo_putc(fifo_msgout, len+2);
+ z80_memfifo_putc(fifo_msgout, func);
+ z80_memfifo_putc(fifo_msgout, subf);
+
+ return 0;
+}
+
+int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
+{
+ msg_xmit_header(func, subf, len);
+ while (len--)
+ z80_memfifo_putc(fifo_msgout, *msg++);
+
+ return 0;
+}
+
void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
{
(void)len;
putchar(*msg++);
}
+/* echo message */
+void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
+{
+ (void)subf;
+
+ /* send re-echo */
+ msg_xmit(1, 3, len, msg);
+}
+
const FLASH struct msg_item z80_messages[] =
{
{ 1,
1, 1,
do_msg_char_out},
+ { 1,
+ 2, 2,
+ do_msg_echo},
{ 0xff, /* end mark */
0, 0,
0},
while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
switch (state) {
case 0: /* wait for start of message */
- if (ch == 0x81) {
+ if (ch == 0xAE) { /* TODO: magic number */
msglen = 0;
idx = 0;
state = 1;
if (pending) {
switch (state) {
- case 0:
+ case 0: /* need init */
z80_bus_cmd(Request);
uint32_t addr = z80_read(0x40) +
((uint16_t) z80_read(0x41) << 8) +
state = 1;
}
break;
- case 1:
+ case 1: /* awaiting messages */
check_msg_fifo();
break;
}
/*--------------------------------------------------------------------------*/
-#if 0
-void dump_mem(const FLASH uint8_t *addr, uint32_t len)
-{
- DBG_P(1, "hdrom dump:");
- while (len) {
- DBG_P(1, "\n %.5x:", addr);
- for (unsigned i = 0; i<16; i++)
- DBG_P(1, " %.2x", *addr++);
- len -= len > 16 ? 16 : len;
- }
- DBG_P(1, "\n");
-}
-#endif
-/*--------------------------------------------------------------------------*/
-
-
const FLASH uint8_t iniprog[] = {
0xAF, // xor a
0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
0x00, // db 0 ;dst
0x00, 0x00, // dw 0 ;count (64k)
};
-
-
-