- PRR1 &= ~_BV(PRTIM3);
- OCR3A = F_CPU / 1000 - 1; /* Timer3: 1000Hz interval (OC3A) */
- TCCR3B = (0b01<<WGM32)|(0b001<<CS30); /* CTC Mode, Prescaler 1 */
- TIMSK3 = _BV(OCIE3A); /* Enable TC2.oca interrupt */
-
- /* SPI as master */
- PRR0 &= ~_BV(PRSPI);
- SPI_DDR = (SPI_DDR & ~_BV(SPI_MISO))
- | _BV(SPI_MOSI) | _BV(SPI_SCK) | _BV(SPI_SS);
- SPI_PORT = (SPI_PORT & ~(_BV(SPI_MOSI) | _BV(SPI_SCK)))
- | _BV(SPI_SS);
+ PRR1 &= ~_BV(PRTIM4);
+ OCR4A = F_CPU / 1000 - 1; /* Timer4: 1000Hz interval */
+ TCCR4B = (0b00<<WGM42)|(0b001<<CS40); /* Normal Mode, Prescaler 1 */
+ TIMSK4 = _BV(OCIE4A); /* Enable Output Compare A interrupt */