FSTR("Access byond disk size"), /* 04 */
FSTR("Write protect"), /* 05 */
FSTR("No media"), /* 06 */
+ FSTR("R/W address == 0 !!!!"), /* 07 */
};
void msg_cpm_result(uint8_t subf, uint8_t rc, int res)
drv_debug(MIDDLE, PSTR(" T:%4d, S:%2d, cnt:%2d, lba: %.8lx, addr: %.5lx"),
track, sec, secs, pos, addr);
+ if (addr == 0) {
+ return msg_cpm_result(subf, 0x07, res);
+ }
+
if (dowrite && dp->opt & DRV_OPT_RO) {
return msg_cpm_result(subf, 0x05, res);
}
{
fifo_dsc[f].base = addr;
-DBG_P(2, "z80_memfifo_init: %i, %lx\n", f, addr);
if (addr != 0) {
z80_bus_cmd(Request);
fifo_dsc[f].idx_in = z80_read(addr + FIFO_INDEX_IN);
fifo_dsc[f].idx_out = z80_read(addr + FIFO_INDEX_OUT);
z80_bus_cmd(Release);
+
+ if (fifo_dsc[f].idx_in != 0 || fifo_dsc[f].idx_out != 0) {
+ DBG_P(1, "## z80_memfifo_init: %i, %lx, in: %.2x, out: %.2x, mask: %.2x\n",
+ f, addr, fifo_dsc[f].idx_in, fifo_dsc[f].idx_out, fifo_dsc[f].mask);
+ }
}
}