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-rw-r--r--z180/cpuinfo.180129
1 files changed, 52 insertions, 77 deletions
diff --git a/z180/cpuinfo.180 b/z180/cpuinfo.180
index 7d25dc2..372f003 100644
--- a/z180/cpuinfo.180
+++ b/z180/cpuinfo.180
@@ -29,53 +29,34 @@ base equ 0
done: db 0
result: db 0
+cycls: db 0
+wstates:db 0
;-------------------------------------------------------------------------------
-; Read internal register at address in L and IOBASE in H.
-;
-
-reg_in:
- ld a,h
- add a,l
- ld c,a
- ld b,0
- in a,(c)
- ret
-
-;-------------------------------------------------------------------------------
-; Write internal register at address in L and IOBASE in H.
-;
-
-reg_out:
- ld b,a
- ld a,h
- add a,l
- ld c,a
- ld a,b
- ld b,0
- out (c),a
- ret
+cyctab:
+ db 0 ;Unknown CPU
+ db 20 ;8080
+ db 20 ;8085
+ db 21 ;Z80
+ db 19 ;HD64180 or higher
+ db 19 ;HD64180
+ db 19 ;Z80180
+ db 19 ;Z8S180, Z8L180
;-------------------------------------------------------------------------------
; Check if register C exists. D holds mask of bit to test.
-; return nz, if register exists
+; return z, if register exists
chk_reg:
- call reg_in
- cp 0ffh
- ret nz ;
-
+ in a,(c)
+ ld l,a
; check, if register is changeable
-
- xor d ; set bit(s) in register to 0
- call reg_out
- call reg_in ; get it back
- ex af,af'
- ld a,0ffh ; set to register original state
- call reg_out
- ex af,af'
- cpl
- and d
+ xor d ;
+ out (c),a
+ in a,(c) ; get it back
+ xor d
+ out (c),l ; set register to original state
+ cp l
ret
;-------------------------------------------------------------------------------
@@ -142,73 +123,67 @@ chk_z80:
; At least Hitachi HD64180
; Test differences in certain internal registers
; to determine the 180 variant.
- ; First, search the internal register bank.
-
- ld h,00H ; I/O Base
-find_base_loop:
- ld l,icr
- call reg_in
- and 11011111b ; mask I/O Stop bit
- xor h
+
+ ld a,(wstates)
+ out0 (DCNTL),a
+ out0 (RCR),b ;
+ in0 a,(icr)
cp 01FH
- jr nz,nxt_base
+ jr z,icr_ok
;TODO: additional plausibility checks
- jr z,base_found
-nxt_base:
- ld a,h
- add a,040H
- ld h,a
- jr nc,find_base_loop
- ret ;I/O registers not found
+ ret ; I/O registers not found
; Register (base) found.
-base_found:
+icr_ok:
inc e ; HD64180
- ld l,RCR ; Disable Refresh Controller
- xor a ;
- call reg_out ;
- ld l,omcr ; Check, if CPU has OMCR register
+ ld c,omcr ; Check, if CPU has OMCR register
ld d,M_IOC ;
call chk_reg ;
- ret z ; Register does not exist. It's a HD64180
+ ret nz ; Register does not exist. It's a HD64180
inc e ; Z80180
- ld l,cmr ; Check, if CPU has CMR register
+ ld c,cmr ; Check, if CPU has CMR register
ld d,M_LNC ;
call chk_reg ;
- ret z ; register does not exist. It's a Z80180
+ ret nz ; register does not exist. It's a Z80180
inc e ; S180/L180 (class) detected.
-
ret
;-------------------------------------------------------------------------------
start:
ld sp,stack
+ ld hl,done
+ ld b,h
+ ld (hl),b
+ inc hl
+ ld (hl),b
call check
-
- ld hl,result
+ ld hl,cyctab
+ ld d,h
+ add hl,de
+ ld a,(hl)
+ ld hl,cycls
+ ld (hl),a
+ dec hl
ld (hl),e
dec hl
ld (hl),0ffH
out (040H),a
+ ;808x Z80 Z180(0W) Z180(MaxW)
+loop: ;---------------------------------
+ in a,(050h) ;10 11 10 +3*3 19
+ jp loop ;10 10 9 +3*3 18
+ ;---------------------------------
+ ;20 21 19 37
-; ld a,(wstates)
-; out0 (DCNTL),a
- ;Z80 Z180(0W) Z180(MaxW)
-loop: ;--------------------------
- in a,(050h) ;11 10 +3*3 19
- jp loop ;10 9 +3*3 18
- ;--------------------------
- ;21 19 37
-
-; jr loop ;12 8 +2*3 14
+; jr loop ;-- 12 8 +2*3 14
- rept 8
+ rept 4
dw 0
endm
stack: