3 ; NAME AVRCLK ; Change this to no more than 6-char
4 ; name for the REL driver module
6 ;---------------------------------------------------------------------
7 ; Time format (6 bytes packed BCD)
9 ; TIME+0 last 2 digits of year (prefix 19 assumed for 78 to 99, else 20 assumed)
10 ; TIME+1 month [1..12]
13 ; TIME+4 minute [0..59]
14 ; TIME+5 second [0..59]
17 ; This first section contains identification information for the driver
18 ; The information is not placed in the clock driver code section, but are
19 ; located in a different area located by the _CLKID Named Common directive.
23 DESCST: DEFW 0000 ; Add label here if a static year byte
24 ; is used by your clock driver. The
25 ; label should point to the year byte
27 ;123456789012345678901234
28 CLKNAM: DEFB 'AVRCPM Clock ' ; Exactly 24 chars in name
29 DEFB VERS/10+'0','.',VERS MOD 10 +'0',0
31 DESCR: DEFB 'This is the AVRCPM clock',0
34 ;---------------------------------------------------------------------
35 ; This section contains any configurable parameters needed for the
36 ; clock driver. They must be structured in the manner shown in order
37 ; for the loader to properly match and set the values.
38 ; The values in this section are not loaded in the same code section
39 ; as the actual driver code, but are located in another base referenced
40 ; by the _PARM_ Named Common directive.
44 PARBAS: DEFW 0 ; # of parameters (Set to 00 if none)
45 DEFW 0 ; Pointer to STRS (Set to 00 if none)
47 ;------------------------------------------------------------------
48 ; This section should contain the actual Clock Driver code, and all
49 ; entries here are located in the CSEG, or Code Segment.
53 MHZ equ 2 ; Base Processor speed
56 ;-----------------------------------------------------------
57 ; Z S D O S C L O C K H E A D E R
58 ;-----------------------------------------------------------
59 ; Enter: HL points to a 6-byte buffer to Get/Set time
60 ; Exit : A=1 on Success, A=FFH if error
61 ; HL points to last char in buffer
62 ; E contains original seconds (HL+5)
63 ; NOTE: If clock Set is not included, comment these two jumps
64 ; out to save a few bytes. The loader, SETUPZST, uses
65 ; these two jumps to recognize a full ZSDOS clock and
66 ; modify the interface code.
68 PRGBAS: JP GETTIM ; Jump to Read Clock
69 JP WRCLK ; Jump to Set Clock
71 ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
72 ; R e a d T h e C l o c k
73 ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
75 GETTIM: ; The work of reading the clock
76 ; goes here. Values needing to be set
77 ; during installation are referenced as:
95 ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
96 ; S e t T h e C l o c k
97 ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
120 ;-------------------------------------------------------------
121 ; This code installs configurable items into the clock module
122 ; Enter with DE pointing to the physical base address of the
123 ; relocatable module. DE MUST BE USED TO SET VALUES IN
124 ; THE CSEG PORTION OF CODE!
125 ; NOTE: Code in this section is not added to the actual clock
126 ; driver, but placed in a different area referenced to
127 ; the common base _POST_.
131 ; Values in the _PARM_, _POST_ and _PRE_ sections may be loaded
132 ; and saved directly, since their addresses are constant from
133 ; linkage through execution. Setting or reading values in the
134 ; CSEG must be indirect based on the value in the DE register
135 ; pair. The following examples show how to access the various
138 ; LD A,(XYR) ; EXAMPLE - Get byte from _PARM_ directly
139 ; LD HL,YYR ; " - Begin offset into CSEG indirectly
140 ; ADD HL,DE ; " - HL now addresses relocated loc'n
141 ; LD (HL),A ; " - ..so value can be stored
143 ; Likewise, 16-bit values must be accessed indirectly, and may use
144 ; the BC register pair as transfer storage.
146 ; LD BC,(XPORT) ; EXAMPLE - Get word from _PARM_ directly
147 ; LD HL,YPORT1 ; " - Begin offset into CSEG indirectly
148 ; ADD HL,DE ; " - HL now addresses relocated loc'n
149 ; LD (HL),C ; " - ..so value can be saved..
150 ; INC HL ; " - ...a byte..
151 ; LD (HL),B ; " - ....at a time..
153 ; LD (YPORT2),BC ; EXAMPLE - Values can be stored directly into
154 ; " - other sections such as _PRE_
156 RET ; This RETURN MUST be present even if no other
157 ; code is included in this section
160 ;----------------------------------------------------------------
161 ; This module is executed just prior to installing the module to
162 ; insure that a valid clock is present
163 ; Enter with DE pointing to base of relocated clock code segment
164 ;---------------------------------------------------------------
165 ; Read clock and wait for seconds to roll - watchdog protected
166 ; Enter with: DE pointing to relocated clock read routine
167 ; HL pointing to base of high module
171 ; Optional final setup of the clock module may go here. Examples of such
172 ; code would be installation-dependant items such as physical RAM location
173 ; for the driver module. If any code is added here, the DE register pair
174 ; MUST be preserved to properly inter PRECLOCK code (If included).
176 ;YPORT2 EQU $+1 ; EXAMPLE - just to show accessing method
177 ; LD BC,0000 ; " - ..from _POST_ code.
179 INCLUDE PRECLOCK.LIB ; This section of code merely calls the
180 ; clock and waits an arbitrary period of
181 ; time (>> 1 second) to see if the time
182 ; changes. It returns an error if not.
184 TSTRD: JR TSTRD0 ; Jump around address store
186 DEFW TSTRD ; Org location of the code