1 ; Configuration, hardware definition, ...
3 ; Copyright (C) 2010 Sprite_tm
4 ; Copyright (C) 2010,2012,2013 Leo C.
6 ; This file is part of avrcpm.
8 ; avrcpm is free software: you can redistribute it and/or modify it
9 ; under the terms of the GNU General Public License as published by
10 ; the Free Software Foundation, either version 3 of the License, or
11 ; (at your option) any later version.
13 ; avrcpm is distributed in the hope that it will be useful,
14 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ; GNU General Public License for more details.
18 ; You should have received a copy of the GNU General Public License
19 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
24 #define VMAJOR 3 /* Version number */
27 ;-----------------------------------------------------------------------
29 ; Hardware and feature configuration
32 ; Supported MCUs are: atmega328P atmega168 atmega88 atmega8
33 ; Z80 emulation currently needs atmega328P, so this is the default.
36 ; MCU frequency in Hz.
37 ;#define F_CPU 20000000
39 ; Set this to 0, if you have a (one) DRAM chip whith 4 Bit data bus.
42 ; Baudrate of serial port (console).
45 ; I2C_SUPPORT defaults to 1 on 8-bit-ram systems and must be 0 on 4-bit-ram systems.
46 ; Set this do 0, if you don't have I2C peripherals and want to save some flash
47 ; or use the I2C pins for other purposes.
50 ; Emulate Z80 cpu if 1, 8080 otherwise.
54 ; Uncomment and set RAMDISKCOUNT to 1-4 if you want to test the experimental and
55 ; unsupported ramdisk feature . Number depends on actual ram size (256kx4 - 4Mx8)
56 ; and bios dpb/dph definitions.
59 ; Uncomment and set to 0, if you need to save flash (ie. ATmega88).
60 ;#define FAT16_SUPPORT 1
62 ; Uncomment and set to 0, if you don't want to use CP/M partitions.
64 ;#define CPMDSK_SUPPORT 1
66 ; Uncomment and set to 0, if you need to save flash.
67 ;#define MMCBOOTLOADER 1
69 ; Uncomment to disable ADC support
70 ;#define ADC_SUPPORT 0
72 ;-----------------------------------------------------------------------
77 .equ MEMFILL = 1 /* Fill DRAM */
78 .equ SRAM_FILL = 1 /* Fill unused SRAM */
79 .equ MMC_DEBUG = 0 /* Increase for more debugging */
80 .equ MMC_DEBUG_RDW = 0
82 .equ DISK_DEBUG = 0 /* 1 = BOOT/HOME debug, 2 = +R/W debug */
85 .equ FAT16_DBG_FAT = 0
93 ;-----------------------------------------------------------------------
94 ; Z80/8080 Virtual Ports
96 #define UARTDR 1 /* UART Data Register */
97 #define UARTCSR 3 /* UART Control/Status Register */
98 #define UARTRXRDY 0x01 /* RxReady Status Bit Mask */
99 #define UARTTXRDY 0x02 /* TxReady Status Bit Mask */
106 #define TIMERPORT 0x40 /* Base z80 port address for clock access */
107 #define TIMER_CTL TIMERPORT
108 #define TIMER_MSECS TIMERPORT+1
109 #define TIMER_SECS TIMER_MSECS+2
110 #define CLOCKPORT TIMERPORT+7 /* Real time clock BCD (ss,mm,hh,DD,MM,YYYY) */
112 #define starttimercmd 1
113 #define quitTimerCmd 2
114 #define printTimerCmd 15
117 #define DEBUGPORT 0x4F
119 #define startTraceCmd 0x01 /* 'OUT (DEBUGPORT),startTraceCmd' starts tracing */
120 #define stopTraceCmd 0x00
121 #define PrintStackCmd 0x02
123 ; Virtual I2C Interface
131 ; Simple ADC Interface
132 #define ADC80 0x17 /* Read Value from ADC6 Pin, 8 bit */
133 #define ADC81 0x18 /* Read Value from ADC7 Pin, 8 bit */
134 #define ADCTEMP 0x19 /* Read Value from Temp Sensor, 8 bit */
135 #define ADCBGL 0x20 /* Read 1.1V Bandgap, 10 bit */
136 #define ADCBGH 0x21 /* Read 1.1V Bandgap, 10 bit */
139 ; Port-Expander PCF8574
150 ;-----------------------------------------------------------------------
153 #define IPLADDR 0x2000 /* Bootloader load address */
155 #define DRAM_WAITSTATES 1 /* Number of additional clock cycles for dram read access */
156 #define REFR_RATE 64000 /* dram refresh rate in cycles/s. */
157 /* Most drams need 1/15.6µs. */
158 #define RXBUFSIZE 128 /* USART recieve buffer size. Must be power of 2 */
159 #define TXBUFSIZE 32 /* USART transmit buffer size. Must be power of 2 */
161 #define I2C_CLOCK 100000 /* 100kHz */
162 #define I2C_BUFSIZE 17 /* largest message size including address byte (SLA) */
165 #define MMC_SPI2X 1 /* 0 = SPI CLK/4, 1 = SPI CLK/2 */
167 #define MEMFILL_VAL 0x76 /* Fill ram with HALT opcode. */
168 #define DBG_TRACE_BOTTOM 0x01 /* Page boundaries for INS_DEBUG and PRINT_PC */
169 #define DBG_TRACE_TOP 0xdc /* Trace is off, below bottom page and above top page. */
170 #define SRAMFILL_VAL 0x5A /* Fill unused SRAM */
172 ; define PARTID 0x52 /* Partition table id */
173 /* http://www.win.tue.nl/~aeb/partitions/partition_types-1.html */
174 ; Partition Table Structures
182 * (see http://www.win.tue.nl/~aeb/partitions/partition_types-1.html)
184 #define PARTID1_FAT16 0x0E
185 #define PARTID2_FAT16 0x06
186 #define PARTID_CPM 0x52
189 ;-----------------------------------------------------------------------
192 #define DRAM_8BIT 1 /* 1 = 8bit wide data bus to DRAM (ie two 4-bit Chips)*/
193 #endif /* 0 = only one 4 bit wide DRAM chip */
195 #define F_CPU 20000000 /* system clock in Hz; defaults to 20MHz */
198 #define BAUD 115200 /* console baud rate */
201 #define I2C_SUPPORT DRAM_8BIT /* I2C requires 8 bit DRAM */
203 #if I2C_SUPPORT && !DRAM_8BIT
204 #error "I2C_SUPPORT requires 8 bit DRAM (DRAM_8BIT=1)!"
207 #define ADC_SUPPORT 1
211 #define EM_Z80 1 /* Emulate Z80 if true, else 8080 */
214 #ifndef CPMDSK_SUPPORT
215 #define CPMDSK_SUPPORT 1 /* Include Support for CP/M partitions */
218 #ifndef FAT16_SUPPORT
219 #define FAT16_SUPPORT 1 /* Include Support for a FAT16 partition */
220 #endif /* which may contain CP/M image files. */
223 #define RAMDISKCNT 0 /* Number of RAM disks */
225 #define RAMDISKNR 'I'-'A' /* Drive "letter" for first RAM disk */
227 /* MMC/SD Bootloader support. */
228 #define BOOTLDRSIZE 2048 /* Bytes needed for Bootloader (1024 Words Bootsection Size) */
229 #define DEVID_S "ACPM"
230 #ifndef MMCBOOTLOADER
231 #define MMCBOOTLOADER 1
234 #define TESTVERSION 0
237 ;-----------------------------------------------------------------------
240 #if DRAM_8BIT /* Implies software uart */
272 .equ P_MMC_CS = PORTB
289 #else /* 4 bit RAM, hardware uart */
304 .equ P_MMC_CS = PORTD
307 .equ RAM_AH_MASK = (1<<RAM_A8)|(1<<RAM_A7)|(1<<RAM_A6)|(1<<RAM_A5)
308 .equ PD_OUTPUT_MASK = (1<<MMC_CS) | (1<<RAM_OE) | RAM_AH_MASK
325 .equ RAM_AL_MASK = (1<<RAM_A4)|(1<<RAM_A3)|(1<<RAM_A2)|(1<<RAM_A1)|(1<<RAM_A0)
326 .equ PB_OUTPUT_MASK = (1<<RAM_ras) | RAM_AL_MASK
340 .equ RAM_DQ_MASK = (1<<RAM_D3)|(1<<RAM_D2)|(1<<RAM_D1)|(1<<RAM_D0)
341 .equ PC_OUTPUT_MASK = (1<<RAM_CAS)|(1<<RAM_W)
343 #endif /* DRAM_8BIT */
346 ;-----------------------------------------------------------------------
347 ;Register definitions
377 .def intstat = r19 ;interpreter status / interrupt status
392 .equ i_break = 0 ;break detected flag
393 .equ i_trace = 1 ;cpu interpreter trace flag
394 .equ i_halt = 2 ;executing halt instruction
396 #if defined __ATmega8__
399 .equ flags = UBRRL ;UART is unused with 8-Bit RAM
401 .equ flags = TWBR ;TWI is unused with 4-Bit RAM
410 #endif /* __ATmega8__ */
413 .equ hostact = 7 ;host active flag
414 .equ hostwrt = 6 ;host written flag
415 .equ rsflag = 5 ;read sector flag
416 .equ readop = 4 ;1 if read operation
418 .equ prefixfd = 1 ;Opcode prefix DD=0, FD=1
424 #define CPUSTR "8080"
427 #define TESTSTR "Test"
432 #if defined __ATmega8__
447 .equ OC2Aaddr= OC2addr
459 ; vim:set ts=8 noet nowrap