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[avrcpm.git] / avr / Z80int-jmp.asm
1 ; 8080/Z80 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010-2013 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id$
25 ;
26
27 #if EM_Z80
28
29 .dseg
30 z_regs:
31 z_c2:
32 .equ oz_c2 = z_c2 - z_regs
33 .byte 1
34 z_b2:
35 .equ oz_b2 = z_b2 - z_regs
36 .byte 1
37 z_e2:
38 .equ oz_e2 = z_e2 - z_regs
39 .byte 1
40 z_d2:
41 .equ oz_d2 = z_d2 - z_regs
42 .byte 1
43 z_l2:
44 .equ oz_l2 = z_l2 - z_regs
45 .byte 1
46 z_h2:
47 .equ oz_h2 = z_h2 - z_regs
48 .byte 1
49 z_f2:
50 .equ oz_f2 = z_f2 - z_regs
51 .byte 1
52 z_a2:
53 .equ oz_a2 = z_a2 - z_regs
54 .byte 1
55
56 z_xl:
57 .equ oz_xl = z_xl - z_regs
58 .byte 1
59 z_xh:
60 .equ oz_xh = z_xh - z_regs
61 .byte 1
62 z_yl:
63 .equ oz_yl = z_yl - z_regs
64 .byte 1
65 z_yh:
66 .equ oz_yh = z_yh - z_regs
67 .byte 1
68 z_i:
69 .equ oz_i = z_i - z_regs
70 .byte 1
71 z_r:
72 .equ oz_r = z_r - z_regs
73 .byte 1
74
75 z_istat:
76 .equ oz_istat = z_istat - z_regs
77 .byte 1
78
79 .equ IM_MASK = 0x03 ;Mask IM 0..2
80 .equ IM0 = 0
81 .equ IM1 = 1
82 .equ IM2 = 2
83
84 .equ IFF1 = 2 ;IFF1 Flag
85 .equ IFF2 = 3 ;IFF2 Flag
86 #endif
87
88 .cseg
89
90 ;Init z80
91 z80_init:
92 ldiw z_pc,IPLADDR
93 ldiw y,z_regs
94
95 clr intstat
96
97 printnewline
98
99 .if INS_DEBUG
100 sbr intstat,(1<<i_trace)
101 .endif
102
103 printstring "Ok, "CPUSTR"-CPU is live!"
104 printnewline
105
106 main:
107
108 .if PRINT_PC
109 cpi z_pch,DBG_TRACE_BOTTOM
110 brlo noprintpc
111 cpi z_pch,DBG_TRACE_TOP
112 brsh noprintpc
113
114 printnewline
115 printstring "PC="
116 movw temp,z_pcl
117 lcall printhexw
118 printstring " "
119 noprintpc:
120 .endif
121
122 ;TODO: hier kommt die Interruptbehandlung rein
123
124 cpse intstat,_0 ; 2 Fast path if no trace, int, break, ...
125 rjmp int_test
126
127 int_instr:
128 mem_read_ds zl,z_pc ;11 zl = memReadByte(z_pc)
129 adiw z_pcl,1 ; 2 ++z_pc
130 ldi zh,high(opcjmp) ; 1
131 icall ; 3 (+4 ret)
132 rjmp main ; 2
133 ; / 25 cycles minimum (NOP)
134 int_test:
135 sbrs intstat,i_trace
136 rjmp int_notrace
137 sbrc intstat,i_halt
138 rjmp int_notrace
139 cpi z_pch,DBG_TRACE_BOTTOM
140 brlo int_notrace
141 cpi z_pch,DBG_TRACE_TOP
142 brsh int_notrace
143 lcall printregs
144 int_notrace:
145 sbrs intstat,i_break
146 rjmp int_nobreak
147 cbr intstat,(1<<i_break)|(1<<i_halt)
148 printnewline
149 printstring "Break detected! "
150 mov z_pcl,_0
151 mov z_pch,_0
152 int_nobreak:
153
154 rjmp int_instr ;Continue with normal instruction interpretation
155
156
157 ;--------------------------------------------------
158 ; init opcode table
159 ;
160 ; opctable opc_name, pos
161 ;
162
163 .macro opctable
164
165
166 .set opcjmp_table_pos_ = (@1 + 255) & -0x100 ;0xff00
167
168 .ifndef opc_tabnext_
169 .set opc_tabnext_ = opcjmp_table_pos_
170
171 .set opc_tablow_0 = 0
172 .set opc_tablen_0 = 0
173 .set opc_tablow_1 = 0
174 .set opc_tablen_1 = 0
175 .endif
176
177 .if opcjmp_table_pos_ < opc_tabnext_
178 .set opcjmp_table_pos_ = opc_tabnext_
179 .endif
180
181 .if opc_tablow_0 == 0
182 .set opc_tablow_0 = opcjmp_table_pos_
183 .set opc_tablen_0 = 256
184 ;.message "add tab_0"
185 .elif opc_tablow_1 == 0
186 .if (opc_tablow_0 + opc_tablen_0) == opcjmp_table_pos_
187 .set opc_tablen_0 = opc_tablen_0 + 256
188 ;.message " tab_0++"
189 .else
190 .set opc_tablow_1 = opcjmp_table_pos_
191 .set opc_tablen_1 = 256
192 ;.message "add tab_1"
193 .endif
194 .else
195 .if (opc_tablow_1 + opc_tablen_1) == opcjmp_table_pos_
196 .set opc_tablen_1 = opc_tablen_1 + 256
197 ;.message "tab_1++"
198 .else
199 .error "Tab full_"
200 .endif
201 .endif
202
203 .set opc_tabnext_ = opcjmp_table_pos_ + 256
204 .equ @0 = opcjmp_table_pos_
205
206 .endm
207
208 ;--------------------------------------------------
209 ;
210 ; checkspace frompos, size
211 ;
212 .macro checkspace
213
214 .ifdef opc_tablow_0
215 .if @0 <= opc_tablow_0
216 .if (@0 + @1) > opc_tablow_0
217 .org opc_tablow_0 + opc_tablen_0
218 ; .message "skip tab, remove tab_0"
219 .if opc_tablow_1 == 0
220 .set opc_tablow_0 = 0
221 .set opc_tablen_0 = 0
222 .else
223 .set opc_tablow_0 = opc_tablow_1
224 .set opc_tablen_0 = opc_tablen_1
225 .set opc_tablow_1 = 0
226 .set opc_tablen_1 = 0
227 ; .message "remove tab_1"
228 .endif
229 .endif
230 .endif
231 .endif
232 .endm
233
234 ;--------------------------------------------------
235 ; Generate a table entry for one instruction
236 ;
237 ; instr fetch, op, store
238 ;
239 .macro instr
240
241 .set fetch_ = (do_@0 != do_fetch_nop) ; must call or jump to fetch action
242 .set op_ = (do_@1 != do_op_nop) ; must call or jump to op action
243 .set store_ = (do_@2 != do_store_nop) ; must jump to store action
244 .set cnt_ = fetch_ + op_ + store_ ; number of actions for this instruction
245
246
247 .set done_ = 0
248 .set pc_save_ = PC
249
250 .if cnt_ == 0 ; nothing to do (nop)
251 .org opcjmp_table_pos_
252 ret ; go back to main
253 .org pc_save_
254 .set done_ = 1
255 .elif cnt_ == 1 ; jump direct to action
256 .if fetch_
257 .set action_1_ = do_@0
258 .elif op_
259 .set action_1_ = do_@1
260 .else
261 .set action_1_ = do_@2
262 .endif
263 .if (opcjmp_table_pos_ - action_1_) <= 2047
264 .org opcjmp_table_pos_
265 rjmp action_1_ ; do op and return to main
266 .org pc_save_
267 .set done_ = 1
268 .endif
269 .endif
270
271 .if !done_
272
273 .if defined (l_@0_@1_@2)
274
275 .if (opcjmp_table_pos_ - l_@0_@1_@2) <= 2047
276 .org opcjmp_table_pos_
277 rjmp l_@0_@1_@2 ; generate a jump to action table
278 .org pc_save_
279 .else
280 checkspace pc_save_, 2
281 .set pc_save_ = PC
282 .org opcjmp_table_pos_
283 rjmp pc_save_
284 .org pc_save_
285 jmp l_@0_@1_@2
286 .endif
287
288 .else
289
290 checkspace pc_save_, 2*cnt_
291 .set pc_save_ = PC
292
293 .org opcjmp_table_pos_
294 .equ l_@0_@1_@2 = pc_save_ ; make a label
295 rjmp l_@0_@1_@2 ; generate a jump to action table
296
297 .org l_@0_@1_@2
298
299 .if fetch_ ; must fetch
300 .if op_ || store_
301 .if do_@0 == 0
302 m_do_@0
303 .else
304 lcall do_@0 ; fetch and come back here
305 .endif
306 .else
307 .if do_@0 == 0
308 m_do_@0
309 ret
310 .else
311 ljmp do_@0 ; do op and return to main
312 .endif
313 .endif
314 .endif
315 .if op_ ; must exec op
316 .if store_
317 .if do_@1 == 0
318 m_do_@1
319 .else
320 lcall do_@1 ; fetch and come back here
321 .endif
322 .else
323 .if do_@1 == 0
324 m_do_@1
325 ret
326 .else
327 ljmp do_@1 ; do op and return to main
328 .endif
329 .endif
330 .endif
331 .if store_ ; must store
332 .if do_@2 == 0
333 m_do_@2
334 ret
335 .else
336 ljmp do_@2 ; store is allways last
337 .endif
338 .endif
339
340 .endif
341 .endif
342
343 .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
344
345 .endm
346
347
348 do_x_nop:
349 ret
350
351 ; ------------ Fetch phase stuff -----------------
352
353
354 fetch_ops:
355 .equ do_fetch_nop = do_x_nop
356
357 do_fetch_rst:
358 movw x,z_pcl
359 sbiw x,1
360 mem_read_d opl
361 andi opl,0x38
362 ldi oph,0
363 ret
364
365 .macro m_do_fetch_a
366 mov opl,z_a
367 .endm
368
369 .equ do_fetch_a = 0
370 ; mov opl,z_a
371 ; ret
372
373 .macro m_do_fetch_b
374 mov opl,z_b
375 .endm
376
377 .equ do_fetch_b = 0
378 ; mov opl,z_b
379 ; ldd opl,y+oz_b
380 ; ret
381
382 .macro m_do_fetch_c
383 mov opl,z_c
384 .endm
385
386 .equ do_fetch_c = 0
387 ; mov opl,z_c
388 ; ldd opl,y+oz_c
389 ; ret
390
391 .macro m_do_fetch_d
392 mov opl,z_d
393 .endm
394
395 .equ do_fetch_d = 0
396 ; ldd opl,y+oz_d
397 ; ret
398
399 .macro m_do_fetch_e
400 mov opl,z_e
401 .endm
402
403 .equ do_fetch_e = 0
404 ; ldd opl,y+oz_e
405 ; ret
406
407 .macro m_do_fetch_h
408 mov opl,z_h
409 .endm
410
411 .equ do_fetch_h = 0
412 ; mov opl,z_h
413 ; ret
414
415 .macro m_do_fetch_l
416 mov opl,z_l
417 .endm
418
419 .equ do_fetch_l = 0
420 ; mov opl,z_l
421 ; ret
422
423 .macro m_do_fetch_af
424 movw opl,z_flags
425 .endm
426
427 .equ do_fetch_af = 0
428 ; movw opl,z_flags
429 ; ret
430
431 .macro m_do_fetch_bc
432 movw opl,z_c
433 .endm
434
435 .equ do_fetch_bc = 0
436 ; movw opl,z_c
437 ; ret
438
439 .macro m_do_fetch_de
440 movw opl,z_e
441 .endm
442
443 .equ do_fetch_de = 0
444 ; movw opl,z_e
445 ; ret
446
447 .macro m_do_fetch_hl
448 movw opl,z_l
449 .endm
450
451 .equ do_fetch_hl = 0
452 ; movw opl,z_l
453 ; ret
454
455 .macro m_do_fetch_sp
456 movw opl,z_spl
457 .endm
458
459 .equ do_fetch_sp = 0
460 ; movw opl,z_spl
461 ; ret
462
463 do_fetch_mbc:
464 ; movw x,z_c
465 mem_read_ds z_a, z_bc
466 ret
467
468 do_fetch_mde:
469 ; movw x,z_e
470 mem_read_ds z_a, z_de
471 ret
472
473 do_fetch_mhl:
474 ; movw x,z_l
475 mem_read_ds opl, z_hl
476 ret
477
478 do_fetch_msp:
479 movw x,z_spl
480 mem_read_d opl
481 adiw x,1
482 mem_read_d oph
483 ret
484
485 do_fetch_dir8:
486 mem_read_ds opl, z_pc
487 adiw z_pcl,1
488 ret
489
490 do_fetch_dir16:
491 mem_read_ds opl, z_pc
492 adiw z_pcl,1
493 mem_read_ds oph, z_pc
494 adiw z_pcl,1
495 ret
496
497 ; ------------ Store phase stuff -----------------
498
499 store_ops:
500 .equ do_store_nop = do_x_nop
501
502
503 do_store_a:
504 mov z_a,opl
505 ret
506
507 ;.macro m_do_store_b
508 ; std y+oz_b,opl
509 ;.endm
510 ;.equ do_store_b = 0
511 do_store_b:
512 mov z_b,opl
513 ret
514
515 do_store_c:
516 mov z_c,opl
517 ret
518
519 do_store_d:
520 mov z_d,opl
521 ret
522
523 do_store_e:
524 mov z_e,opl
525 ret
526
527 do_store_h:
528 mov z_h,opl
529 ret
530
531 do_store_l:
532 mov z_l,opl
533 ret
534
535 do_store_af:
536 movw z_flags,opl
537 ret
538
539 do_store_bc:
540 movw z_c,opl
541 ret
542
543 do_store_de:
544 movw z_e,opl
545 ; std y+oz_d,oph
546 ; std y+oz_e,opl
547 ret
548
549 do_store_hl:
550 movw z_l,opl
551 ret
552
553 do_store_mbc:
554 ; movw x,z_c
555 mem_write_ds z_bc, z_a
556 ret
557
558 do_store_mde:
559 ; movw x,z_e
560 mem_write_ds z_de, z_a
561 ret
562
563 do_store_mhl:
564 ; movw x,z_l
565 mem_write_ds z_hl, opl
566 ret
567
568 do_store_msp:
569 movw xl,z_spl
570 mem_write_s opl
571 adiw xl,1
572 mem_write_s oph
573 ret
574
575 do_store_sp:
576 movw z_spl,opl
577 ret
578
579 do_store_pc:
580 movw z_pcl,opl
581 ret
582
583 do_store_pcrel: ;add displacement to PC
584 #if EM_Z80
585 clr oph
586 tst opl ;sign extend
587 brpl stpcr1
588 com oph
589 stpcr1:
590 add z_pcl,opl
591 adc z_pch,oph
592 ret
593 #else
594 rjmp do_op_inv
595 #endif
596
597 do_store_ret:
598 movw x,z_spl
599 mem_read_d z_pcl
600 adiw x,1
601 mem_read_d z_pch
602 adiw x,1
603 movw z_spl,x
604
605 .if STACK_DBG
606 printnewline
607 printstring "Stack pop "
608 movw temp,z_pcl
609 rcall printhexw
610 printstring ", SP is now "
611 movw temp,z_spl
612 rcall printhexw
613 printstring ". "
614 .endif
615 ret
616
617 do_store_call:
618 movw xl,z_spl
619 sbiw x,1
620 mem_write_s z_pch
621 sbiw x,1
622 mem_write_s z_pcl
623 movw z_spl,xl
624
625 .if STACK_DBG
626 printnewline
627 printstring "Stack push "
628 movw temp,z_pcl
629 rcall printhexw
630 printstring ", SP is now "
631 movw temp,z_spl
632 rcall printhexw
633 printstring ". "
634 .endif
635 movw z_pcl,opl
636 ret
637
638
639 do_store_am:
640 mem_write_ds op, z_a
641 ret
642
643 ; ------------ Operation phase stuff -----------------
644
645 ;----------------------------------------------------------------
646 ;| |
647 ;| Zilog |
648 ;| |
649 ;| ZZZZZZZ 88888 000 |
650 ;| Z 8 8 0 0 |
651 ;| Z 8 8 0 0 0 |
652 ;| Z 88888 0 0 0 |
653 ;| Z 8 8 0 0 0 |
654 ;| Z 8 8 0 0 |
655 ;| ZZZZZZZ 88888 000 |
656 ;| |
657 ;| Z80 MICROPROCESSOR Instruction Set Summary |
658 ;| |
659 ;----------------------------------------------------------------
660 ;----------------------------------------------------------------
661 ;|Mnemonic |SZHPNC|Description |Notes |
662 ;|----------+------+---------------------+----------------------|
663 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
664 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
665 ;|ADD A,s |***V0*|Add |A=A+s |
666 ;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
667 ;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
668 ;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
669 ;|AND s |**1P00|Logical AND |A=A&s |
670 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
671 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
672 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
673 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
674 ;|CP s |***V1*|Compare |A-s |
675 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
676 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
677 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
678 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
679 ;|CPL |--1-1-|Complement |A=~A |
680 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
681 ;|DEC s |***V1-|Decrement |s=s-1 |
682 ;|DEC xx |------|Decrement |xx=xx-1 |
683 ;|DEC ss |------|Decrement |ss=ss-1 |
684 ;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
685 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
686 ;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
687 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
688 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
689 ;|EX AF,AF' |------|Exchange |AF<->AF' |
690 ;|EX DE,HL |------|Exchange |DE<->HL |
691 ;|EXX |------|Exchange |qq<->qq' (except AF)|
692 ;|HALT |------|Halt | |
693 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
694 ;|IN A,[n] |------|Input |A=[n] |
695 ;|IN r,[C] |***P0-|Input |r=[C] |
696 ;|INC r |***V0-|Increment |r=r+1 |
697 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
698 ;|INC xx |------|Increment |xx=xx+1 |
699 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
700 ;|INC ss |------|Increment |ss=ss+1 |
701 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
702 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
703 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
704 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
705 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
706 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
707 ;|JP nn |------|Unconditional Jump |PC=nn |
708 ;|JP cc,nn |------|Conditional Jump |If cc JP |
709 ;|JR e |------|Unconditional Jump |PC=PC+e |
710 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
711 ;|LD dst,src|------|Load |dst=src |
712 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
713 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
714 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
715 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
716 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
717 ;|NEG |***V1*|Negate |A=-A |
718 ;|NOP |------|No Operation | |
719 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
720 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
721 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
722 ;|OUT [C],r |------|Output |[C]=r |
723 ;|OUT [n],A |------|Output |[n]=A |
724 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
725 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
726 ;|POP xx |------|Pop |xx=[SP]+ |
727 ;|POP qq |------|Pop |qq=[SP]+ |
728 ;|PUSH xx |------|Push |-[SP]=xx |
729 ;|PUSH qq |------|Push |-[SP]=qq |
730 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
731 ;|RET |------|Return |PC=[SP]+ |
732 ;|RET cc |------|Conditional Return |If cc RET |
733 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
734 ;|RETN |------|Return from NMI |PC=[SP]+ |
735 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
736 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
737 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
738 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
739 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
740 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
741 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
742 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
743 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
744 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
745 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
746 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
747 ;|SBC HL,ss |***V1*|Subtract with Carry |HL=HL-ss-CY |
748 ;|SCF |--0-01|Set Carry Flag |CY=1 |
749 ;|SET b,m |------|Set bit |m=mv{2^b} |
750 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
751 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
752 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
753 ;|SUB s |***V1*|Subtract |A=A-s |
754 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
755 ;|----------+------+--------------------------------------------|
756 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
757 ;| S |S |Sign flag (Bit 7) |
758 ;| Z | Z |Zero flag (Bit 6) |
759 ;| HC | H |Half Carry flag (Bit 4) |
760 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
761 ;| N | N |Add/Subtract flag (Bit 1) |
762 ;| CY | C|Carry flag (Bit 0) |
763 ;|-----------------+--------------------------------------------|
764 ;| n |Immediate addressing |
765 ;| nn |Immediate extended addressing |
766 ;| e |Relative addressing (PC=PC+2+offset) |
767 ;| [nn] |Extended addressing |
768 ;| [xx+d] |Indexed addressing |
769 ;| r |Register addressing |
770 ;| [rr] |Register indirect addressing |
771 ;| |Implied addressing |
772 ;| b |Bit addressing |
773 ;| p |Modified page zero addressing (see RST) |
774 ;|-----------------+--------------------------------------------|
775 ;|DEFB n(,...) |Define Byte(s) |
776 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
777 ;|DEFS nn |Define Storage Block |
778 ;|DEFW nn(,...) |Define Word(s) |
779 ;|-----------------+--------------------------------------------|
780 ;| A B C D E |Registers (8-bit) |
781 ;| AF BC DE HL |Register pairs (16-bit) |
782 ;| F |Flag register (8-bit) |
783 ;| I |Interrupt page address register (8-bit) |
784 ;| IX IY |Index registers (16-bit) |
785 ;| PC |Program Counter register (16-bit) |
786 ;| R |Memory Refresh register |
787 ;| SP |Stack Pointer register (16-bit) |
788 ;|-----------------+--------------------------------------------|
789 ;| b |One bit (0 to 7) |
790 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
791 ;| d |One-byte expression (-128 to +127) |
792 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
793 ;| e |One-byte expression (-126 to +129) |
794 ;| m |Any register r, [HL] or [xx+d] |
795 ;| n |One-byte expression (0 to 255) |
796 ;| nn |Two-byte expression (0 to 65535) |
797 ;| pp |Register pair BC, DE, IX or SP |
798 ;| qq |Register pair AF, BC, DE or HL |
799 ;| qq' |Alternative register pair AF, BC, DE or HL |
800 ;| r |Register A, B, C, D, E, H or L |
801 ;| rr |Register pair BC, DE, IY or SP |
802 ;| s |Any register r, value n, [HL] or [xx+d] |
803 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
804 ;| ss |Register pair BC, DE, HL or SP |
805 ;| xx |Index register IX or IY |
806 ;|-----------------+--------------------------------------------|
807 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
808 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
809 ;| <- -> |Rotate left/right |
810 ;| [ ] |Indirect addressing |
811 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
812 ;| { } |Combination of operands |
813 ;| # |Also BC=BC-1,DE=DE-1 |
814 ;| ## |Only lower 4 bits of accumulator A used |
815 ;----------------------------------------------------------------
816
817 ;How the flags are supposed to work:
818 ;7 ZFL_S - Sign flag (=MSBit of result)
819 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
820 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
821 ;2 ZFL_P - Parity/2-complement Overflow
822 ;1 ZFL_N - Subtract - set if last op was a subtract
823 ;0 ZFL_C - Carry
824 ;
825 ;I sure hope I got the mapping between flags and instructions correct...
826
827 .equ ZFL_S = 7
828 .equ ZFL_Z = 6
829 .equ ZFL_H = 4
830 .equ ZFL_P = 2
831 .equ ZFL_N = 1
832 .equ ZFL_C = 0
833
834 .equ AVR_T = SREG_T
835 .equ AVR_H = SREG_H
836 .equ AVR_S = SREG_S
837 .equ AVR_V = SREG_V
838 .equ AVR_N = SREG_N
839 .equ AVR_Z = SREG_Z
840 .equ AVR_C = SREG_C
841
842 ; TODO: check Z80 flag settings
843
844 ;------------------------------------------------;
845 ; Load table value from flash indexed by source reg.
846 ;
847 ; ldpmx dstreg,tablebase,indexreg
848 ;
849 ; (3 words, 5 cycles)
850
851 .macro ldpmx
852 ldi zh,high(@1*2) ; table must be page aligned
853 mov zl,@2
854 lpm @0,z
855 .endm
856
857 .macro do_z80_flags_V
858 #if EM_Z80
859 bmov z_flags, ZFL_P, temp, AVR_V
860 #endif
861 .endm
862
863 .macro do_z80_flags_H
864 #if EM_Z80
865 bmov z_flags, ZFL_H, temp, AVR_H
866 #endif
867 .endm
868
869 .macro do_z80_flags_set_N
870 #if EM_Z80
871 ori z_flags, (1<<ZFL_N) ; Negation auf 1
872 #endif
873 .endm
874
875 .macro do_z80_flags_set_HN
876 #if EM_Z80
877 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
878 #endif
879 .endm
880
881 .macro do_z80_flags_clear_N
882 #if EM_Z80
883 andi z_flags,~(1<<ZFL_N)
884 #endif
885 .endm
886
887 .macro do_z80_flags_clear_HN
888 #if EM_Z80
889 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
890 #endif
891 .endm
892
893
894 .macro do_z80_flags_copy_HC
895 #if EM_Z80
896 bmov z_flags, ZFL_H, z_flags, ZFL_C
897 #endif
898 .endm
899
900 .macro do_z80_flags_op_rotate
901 ; must not change avr carry flag!
902 #if EM_Z80
903 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
904 #else
905 andi z_flags, ~( (1<<ZFL_C) )
906 #endif
907 .endm
908
909 .macro do_z80_flags_op_and
910 #if EM_Z80
911 ori z_flags,(1<<ZFL_H)
912 #endif
913 .endm
914
915 .macro do_z80_flags_op_or
916 #if EM_Z80
917 ;nothing to do
918 #endif
919 .endm
920
921
922 ;----------------------------------------------------------------
923
924 .equ do_op_nop = do_x_nop
925
926 do_op_inv:
927 sbiw z_pcl,1
928 lcall printregs
929 printstring "Invalid opcode! "
930
931 haltinv:
932 rjmp haltinv
933
934
935 ;----------------------------------------------------------------
936 ;|Mnemonic |SZHPNC|Description |Notes |
937 ;----------------------------------------------------------------
938 ;|HALT |------|Halt | |
939
940
941 do_op_HALT:
942 sbiw z_pcl,1
943 sbrc intstat,i_halt
944 ret
945 sbr intstat,(1<<i_halt)
946 lcall printregs
947 printstring "CPU halted! "
948 ret
949
950 ;----------------------------------------------------------------
951 ;|Mnemonic |SZHPNC|Description |Notes |
952 ;----------------------------------------------------------------
953 ;|OUT [n],A |------|Output |[n]=A |
954 ;
955 ;
956 ;Interface with peripherials goes here :)
957 do_op_outa: ; out (opl),a
958 .if PORT_DEBUG
959 printnewline
960 printstring "Port write: "
961 mov temp,z_a
962 lcall printhex
963 printstring " -> ("
964 mov temp,opl
965 lcall printhex
966 printstring ") "
967 .endif
968 mov temp,z_a
969 mov temp2,opl
970 lcall portWrite
971 ret
972
973 ;----------------------------------------------------------------
974 ;|Mnemonic |SZHPNC|Description |Notes |
975 ;----------------------------------------------------------------
976 ;|IN A,[n] |------|Input |A=[n] |
977 ;
978 ;
979 do_op_ina: ; in a,(opl)
980 .if PORT_DEBUG
981 push opl
982 cp opl,_0 ; don't debug port 0 (con stat)
983 breq dbg_op_ina_1
984 printnewline
985 printstring "Port read: ("
986 mov temp,opl
987 lcall printhex
988 printstring ") -> "
989 dbg_op_ina_1:
990 .endif
991
992 mov temp2,opl
993 lcall portRead
994 mov z_a,temp
995
996 .if PORT_DEBUG
997 pop temp
998 cp temp,_0
999 breq dbg_op_ina_2
1000 lcall printhex
1001 printstring " "
1002 dbg_op_ina_2:
1003 .endif
1004 ret
1005
1006 ;----------------------------------------------------------------
1007 ;|Mnemonic |SZHPNC|Description |Notes |
1008 ;----------------------------------------------------------------
1009 ;|INC r |***V0-|Increment |r=r+1 |
1010 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
1011 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
1012 ;|----------|SZHP C|---------- 8080 ----------------------------|
1013 ;|INC r |**-P0-|Increment |r=r+1 |
1014 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
1015 ;
1016
1017 do_op_inc:
1018 #if EM_Z80
1019 #if 1
1020 andi z_flags,(1<<ZFL_C) ; preserve C-, Clear N-flag
1021 subi opl,-1
1022 in temp,sreg
1023 sbrc temp,AVR_N
1024 sbr z_flags,(1<<ZFL_S)
1025 sbrc temp,AVR_Z
1026 sbr z_flags,(1<<ZFL_Z)
1027 sbrs temp,AVR_H
1028 sbr z_flags,(1<<ZFL_H)
1029 sbrc temp,AVR_V
1030 sbr z_flags,(1<<ZFL_P)
1031 #else
1032 andi z_flags,(1<<ZFL_C) ; preserve C-, Clear N-flag
1033 ldi temp,1
1034 add opl,temp
1035 in temp,sreg
1036 bmov z_flags,ZFL_S, temp,AVR_N
1037 bmov z_flags,ZFL_Z, temp,AVR_Z
1038 bmov z_flags,ZFL_H, temp,AVR_H
1039 bmov z_flags,ZFL_P, temp,AVR_V
1040 #endif
1041 #else /* 8080 */
1042 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1043 inc opl
1044 ldpmx temp,sz53p_tab,opl ;S,Z,P flag
1045 or z_flags,temp
1046 #endif
1047 ret
1048
1049 #if 0
1050 bst z_flags,ZFL_C ; save C flag
1051 subi opl,-1
1052 in temp,sreg
1053 ldpmx z_flags,flagmap_tab,temp
1054 bld z_flags,ZFL_C
1055 ret
1056 #endif
1057
1058 do_op_inca:
1059 #if EM_Z80
1060 andi z_flags,(1<<ZFL_C) ; preserve C-, Clear N-flag
1061 subi z_a,-1
1062 in temp,sreg
1063 bmov z_flags,ZFL_S, temp,AVR_N
1064 bmov z_flags,ZFL_Z, temp,AVR_Z
1065 sbrs temp,AVR_H
1066 sbr z_flags,(1<<ZFL_H)
1067 bmov z_flags,ZFL_P, temp,AVR_V
1068 #else /* 8080 */
1069 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1070 inc z_a
1071 ldpmx temp,sz53p_tab,z_a ; S,Z,P flag
1072 or z_flags,temp
1073 #endif
1074 ret
1075
1076 ;----------------------------------------------------------------
1077 ;|Mnemonic |SZHPNC|Description |Notes |
1078 ;----------------------------------------------------------------
1079 ;|DEC r |***V1-|Decrement |s=s-1 |
1080 ;|DEC [HL] |***V1-|Increment |[HL]=[HL]-1 |
1081 ;|DEC [xx+d]|***V1-|Increment |[xx+d]=[xx+d]-1 |
1082 ;|----------|SZHP C|---------- 8080 ----------------------------|
1083 ;|DEC r |**-P -|Increment |r=r-1 |
1084 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]-1 |
1085 ;
1086
1087 do_op_dec:
1088 subi opl,1
1089 #if EM_Z80
1090 in temp,sreg
1091 bmov z_flags,ZFL_S, temp,AVR_N
1092 bmov z_flags,ZFL_Z, temp,AVR_Z
1093 bmov z_flags,ZFL_H, temp,AVR_H
1094 bmov z_flags,ZFL_P, temp,AVR_V
1095 ori z_flags,(1<<ZFL_N) ; Set N-flag
1096 #else /* 8080 */
1097 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1098 ldpmx temp,sz53p_tab,opl ; S,Z,P flag
1099 or z_flags,temp
1100 #endif
1101 ret
1102
1103
1104 do_op_deca:
1105 #if EM_Z80
1106 subi z_a,1
1107 in temp,sreg
1108 bmov z_flags,ZFL_S, temp,AVR_N
1109 bmov z_flags,ZFL_Z, temp,AVR_Z
1110 bmov z_flags,ZFL_H, temp,AVR_H
1111 bmov z_flags,ZFL_P, temp,AVR_V
1112 ori z_flags,(1<<ZFL_N) ; Set N-flag
1113 #else /* 8080 */
1114 dec z_a
1115 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1116 ldpmx temp,sz53p_tab,z_a ; S,Z,P flag
1117 or z_flags,temp
1118 #endif
1119 ret
1120
1121
1122 ;----------------------------------------------------------------
1123 ;|Mnemonic |SZHPNC|Description |Notes |
1124 ;----------------------------------------------------------------
1125 ;|INC xx |------|Increment |xx=xx+1 |
1126 ;|INC ss |------|Increment |ss=ss+1 |
1127 ;
1128 ;
1129 do_op_inc16:
1130 subi opl,low(-1)
1131 sbci oph,high(-1)
1132 ret
1133
1134 do_op_incHL:
1135 sub z_l,_255
1136 sbc z_h,_255
1137 ret
1138
1139 do_op_incDE:
1140 sub z_e,_255
1141 sbc z_d,_255
1142 ret
1143
1144 do_op_incBC:
1145 sub z_c,_255
1146 sbc z_b,_255
1147 ret
1148
1149 ;----------------------------------------------------------------
1150 ;|Mnemonic |SZHPNC|Description |Notes |
1151 ;----------------------------------------------------------------
1152 ;|DEC xx |------|Decrement |xx=xx-1 |
1153 ;|DEC ss |------|Decrement |ss=ss-1 |
1154 ;
1155 ;
1156 do_op_dec16:
1157 subi opl, 1
1158 sbci oph, 0
1159 ret
1160
1161 do_op_decHL:
1162 add z_l,_255
1163 adc z_h,_255
1164 ret
1165
1166 do_op_decDE:
1167 add z_e,_255
1168 adc z_d,_255
1169 ret
1170
1171 do_op_decBC:
1172 add z_c,_255
1173 adc z_b,_255
1174 ret
1175
1176 ;----------------------------------------------------------------
1177 ;|Mnemonic |SZHPNC|Description |Notes |
1178 ;----------------------------------------------------------------
1179 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
1180 ;|----------|SZHP C|---------- 8080 ----------------------------|
1181 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
1182 ;
1183 ;
1184 do_op_rlca:
1185 ;Rotate Left Cyclical. All bits move 1 to the
1186 ;left, the msb becomes c and lsb.
1187 do_z80_flags_op_rotate
1188 lsl z_a
1189 brcc do_op_rlc_noc
1190 ldi temp,1
1191 or z_a,temp
1192 ori z_flags, (1<<ZFL_C)
1193 do_op_rlc_noc:
1194 ret
1195
1196 ;----------------------------------------------------------------
1197 ;|Mnemonic |SZHPNC|Description |Notes |
1198 ;----------------------------------------------------------------
1199 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
1200 ;|----------|SZHP C|---------- 8080 ----------------------------|
1201 ;|RRCA |---- *|Rotate Right Circular|A=->A |
1202 ;
1203 ;
1204 do_op_rrca:
1205 ;Rotate Right Cyclical. All bits move 1 to the
1206 ;right, the lsb becomes c and msb.
1207 do_z80_flags_op_rotate
1208 lsr z_a
1209 brcc do_op_rrc_noc
1210 ldi temp,0x80
1211 or z_a,temp
1212 ori z_flags, (1<<ZFL_C)
1213 do_op_rrc_noc:
1214 ret
1215
1216 ;----------------------------------------------------------------
1217 ;|Mnemonic |SZHPNC|Description |Notes |
1218 ;----------------------------------------------------------------
1219 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
1220 ;|----------|SZHP C|---------- 8080 ----------------------------|
1221 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
1222 ;
1223 ;
1224 do_op_rra:
1225 ;Rotate Right. All bits move 1 to the right, the lsb
1226 ;becomes c, c becomes msb.
1227 clc ; get z80 carry to avr carry
1228 sbrc z_flags,ZFL_C
1229 sec
1230 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
1231 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
1232 ror z_a
1233 ret
1234
1235 ;----------------------------------------------------------------
1236 ;|Mnemonic |SZHPNC|Description |Notes |
1237 ;----------------------------------------------------------------
1238 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
1239 ;|----------|SZHP C|---------- 8080 ----------------------------|
1240 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
1241 ;
1242 ;
1243 do_op_rla:
1244 ;Rotate Left. All bits move 1 to the left, the msb
1245 ;becomes c, c becomes lsb.
1246 clc
1247 sbrc z_flags,ZFL_C
1248 sec
1249 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
1250 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
1251 rol z_a
1252 ret
1253
1254 ;----------------------------------------------------------------
1255 ;|Mnemonic |SZHPNC|Description |Notes |
1256 ;----------------------------------------------------------------
1257 ;|ADD A,s |***V0*|Add |A=A+s |
1258 ;|----------|SZHP C|---------- 8080 ----------------------------|
1259 ;|ADD A,s |***P *|Add |A=A+s |
1260 ;
1261 ;
1262 do_op_adda:
1263 add z_a,opl
1264 in temp,sreg
1265 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
1266 bmov z_flags,ZFL_C, temp,AVR_C
1267 bmov z_flags,ZFL_H, temp,AVR_H
1268 do_z80_flags_V
1269 ret
1270
1271 ;----------------------------------------------------------------
1272 ;|Mnemonic |SZHPNC|Description |Notes |
1273 ;----------------------------------------------------------------
1274 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
1275 ;|----------|SZHP C|---------- 8080 ----------------------------|
1276 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
1277 ;
1278 ;
1279 do_op_adca:
1280 clc
1281 sbrc z_flags,ZFL_C
1282 sec
1283 adc z_a,opl
1284 in temp,sreg
1285 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1286 bmov z_flags,ZFL_C, temp,AVR_C
1287 bmov z_flags,ZFL_H, temp,AVR_H
1288 do_z80_flags_V
1289 ret
1290
1291 ;----------------------------------------------------------------
1292 ;|Mnemonic |SZHPNC|Description |Notes |
1293 ;----------------------------------------------------------------
1294 ;|SUB s |***V1*|Subtract |A=A-s |
1295 ;|----------|SZHP C|---------- 8080 ----------------------------|
1296 ;|SUB s |***P *|Subtract |A=A-s |
1297
1298 ;
1299 do_op_subfa:
1300 sub z_a,opl
1301 in temp,sreg
1302 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1303 bmov z_flags,ZFL_C, temp,AVR_C
1304 bmov z_flags,ZFL_H, temp,AVR_H
1305 do_z80_flags_V
1306 do_z80_flags_set_N
1307 ret
1308
1309 ;----------------------------------------------------------------
1310 ;|Mnemonic |SZHPNC|Description |Notes |
1311 ;----------------------------------------------------------------
1312 ;|CP s |***V1*|Compare |A-s |
1313 ;|----------|SZHP C|---------- 8080 ----------------------------|
1314 ;|CP s |***P *|Compare |A-s |
1315
1316 ;
1317 do_op_cpfa:
1318 mov temp2,z_a
1319 sub temp2,opl
1320 in temp,sreg
1321 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
1322 bmov z_flags,ZFL_C, temp,AVR_C
1323 bmov z_flags,ZFL_H, temp,AVR_H
1324 do_z80_flags_V
1325 do_z80_flags_set_N
1326 ret
1327
1328 ;----------------------------------------------------------------
1329 ;|Mnemonic |SZHPNC|Description |Notes |
1330 ;----------------------------------------------------------------
1331 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1332 ;|----------|SZHP C|---------- 8080 ----------------------------|
1333 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1334 ;
1335 ;
1336 do_op_sbcfa:
1337 clc
1338 sbrc z_flags,ZFL_C
1339 sec
1340 sbc z_a,opl
1341 in temp,sreg
1342 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1343 bmov z_flags,ZFL_C, temp,AVR_C
1344 bmov z_flags,ZFL_H, temp,AVR_H
1345 do_z80_flags_V
1346 do_z80_flags_set_N
1347 ret
1348
1349 ;----------------------------------------------------------------
1350 ;|Mnemonic |SZHPNC|Description |Notes |
1351 ;----------------------------------------------------------------
1352 ;|AND s |**1P00|Logical AND |A=A&s |
1353 ;|----------|SZHP C|---------- 8080 ----------------------------|
1354 ;|AND s |**-P 0|Logical AND |A=A&s |
1355 ;
1356 ;
1357 do_op_anda:
1358 and z_a,opl ;
1359 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1360 do_z80_flags_op_and
1361 ret
1362
1363
1364 ;----------------------------------------------------------------
1365 ;|Mnemonic |SZHPNC|Description |Notes |
1366 ;----------------------------------------------------------------
1367 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1368 ;|----------|SZHP C|---------- 8080 ----------------------------|
1369 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1370 ;
1371 ;
1372 do_op_ora:
1373 or z_a,opl
1374 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1375 do_z80_flags_op_or
1376 ret
1377
1378 ;----------------------------------------------------------------
1379 ;|Mnemonic |SZHPNC|Description |Notes |
1380 ;----------------------------------------------------------------
1381 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1382 ;|----------|SZHP C|---------- 8080 ----------------------------|
1383 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1384 ;
1385 ;
1386 do_op_xora:
1387 eor z_a,opl
1388 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1389 do_z80_flags_op_or
1390 ret
1391
1392 ;----------------------------------------------------------------
1393 ;|Mnemonic |SZHPNC|Description |Notes |
1394 ;----------------------------------------------------------------
1395 ;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
1396 ;|----------|SZHP C|---------- 8080 ----------------------------|
1397 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1398 ;
1399 ;
1400 do_op_addhl:
1401 add z_l,opl
1402 adc z_h,oph
1403 in temp,sreg
1404 bmov z_flags,ZFL_C, temp,AVR_C
1405 do_z80_flags_H
1406 do_z80_flags_clear_N
1407 ret
1408
1409 ;----------------------------------------------------------------
1410 ;|Mnemonic |SZHPNC|Description |Notes |
1411 ;----------------------------------------------------------------
1412 ;|LD dst,src|------|Load |dst=src |
1413 ;
1414 ;
1415 do_op_sthl: ;store hl to mem loc in opl:h
1416 movw xl,opl
1417 mem_write_s z_l
1418 adiw xl,1
1419 mem_write_s z_h
1420 ret
1421
1422 ;----------------------------------------------------------------
1423 ;|Mnemonic |SZHPNC|Description |Notes |
1424 ;----------------------------------------------------------------
1425 ;|LD dst,src|------|Load |dst=src |
1426 ;
1427 ;
1428 do_op_rmem16:
1429 movw xl,opl
1430 mem_read_d opl
1431 adiw x,1
1432 mem_read_d oph
1433 ret
1434
1435 ;----------------------------------------------------------------
1436 ;|Mnemonic |SZHPNC|Description |Notes |
1437 ;----------------------------------------------------------------
1438 ;|LD dst,src|------|Load |dst=src |
1439 ;
1440 ;
1441 do_op_rmem8:
1442 mem_read_ds opl, op
1443 ret
1444
1445 ;----------------------------------------------------------------
1446 ;|Mnemonic |SZHPNC|Description |Notes |
1447 ;----------------------------------------------------------------
1448 ;|DAA |***P-*|Decimal Adjust Acc. | |
1449 ;|----------|SZHP C|---------- 8080 ----------------------------|
1450
1451
1452 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1453 ; This instruction conditionally adjusts the accumulator for BCD addition
1454 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1455 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1456 ;
1457 ; -------------------------------------------------------------------
1458 ; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1459 ; | Oper |Before |upper digit |Before |lower digit| added |After |
1460 ; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1461 ; |-------+-------+------------+-------+-----------+--------+-------|
1462 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1463 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1464 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1465 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1466 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1467 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1468 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1469 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1470 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1471 ; |-------+-------+------------+-------+-----------+--------+-------|
1472 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1473 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1474 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1475 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1476 ; -------------------------------------------------------------------
1477 ;
1478 ; The H flag is affected as follows:
1479 ;
1480 ; ---------------------
1481 ; | N | H | low |H' |
1482 ; | | |nibble | |
1483 ; |---+---+-------+---|
1484 ; | 0 | * | 0-9 | 0 |
1485 ; | 0 | * | a-f | 1 |
1486 ; | 1 | 0 | * | 0 |
1487 ; | 1 | 1 | 6-f | 0 |
1488 ; | 1 | 1 | 0-5 | 1 |
1489 ; ---------------------
1490 ;
1491 ; Ohter flags:
1492 ; N: Unaffected.
1493 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1494 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1495 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1496
1497
1498
1499 #if 0
1500
1501 #if EM_Z80
1502 sbrc z_flags,ZFL_N ;if add-op
1503 rjmp op_da_sub ;then
1504 #endif
1505
1506 do_op_DAA:
1507 op_da_add:
1508 ldi temp2,0 ; new C, H and N flag
1509 sbrc z_flags,ZFL_H ; |
1510 rjmp op_da_a01 ; if (H flag ...
1511 mov temp,opl ; |
1512 andi temp,0x0f ; |
1513 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1514 brlo op_da_a10 ; |
1515 op_da_a01: ; then
1516 ldi oph,0x06 ; add 6 to lower nibble
1517 add opl,oph ;
1518 brhc op_da_02 ; if
1519 ori temp2,(1<<ZFL_H) ; set new H flag
1520 op_da_02: ;
1521 brcc op_da_a10 ; if
1522 ori temp2,(1<<ZFL_C) ; set new H flag
1523 op_da_a10: ; endif
1524 sbrc z_flags,ZFL_C ; |
1525 rjmp op_da_a12 ; if (C flag ...
1526 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1527 brlo op_da_a13 ;
1528 op_da_a12: ;
1529 ldi oph,0x60 ; add 6 to lower nibble
1530 add opl,oph ;
1531 ori temp2,(1<<ZFL_C) ; set new C flag
1532 op_da_a13: ;
1533 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1534 or z_flags,temp2 ; merge new C and H flag
1535 ret
1536
1537 #if EM_Z80
1538
1539 op_da_sub: ;Else (sub-op)
1540 ldi temp2,(1<<ZFL_N) ; new C, H and N flag
1541 sbrc z_flags,ZFL_H ; |
1542 rjmp op_da_s01 ; if (H flag ...
1543 mov temp,opl ; |
1544 andi temp,0x0f ; |
1545 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1546 brlo op_da_s10 ; |
1547 op_da_s01: ; then
1548 ldi oph,0x06 ; add 6 to lower nibble
1549 sub opl,oph ;
1550 brhc PC+2 ; if
1551 ori temp2,(1<<ZFL_H) ; set new H flag
1552 brcc op_da_s10 ; if
1553 ori temp2,(1<<ZFL_C) ; set new C flag
1554 op_da_s10: ; endif
1555 sbrc z_flags,ZFL_C ; |
1556 rjmp op_da_s12 ; if (C flag ...
1557 cpi opl,0x90 ; |... or upper nibble >= 0xA0)
1558 brlo op_da_s13 ;
1559 op_da_s12: ;
1560 ldi oph,0x60 ; add 6 to lower nibble
1561 sub opl,oph ;
1562 ori temp2,(1<<ZFL_C) ; set new C flag
1563 op_da_s13: ;
1564 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1565 or z_flags,temp2 ; merge new C and H flag
1566 ret
1567
1568 #endif
1569
1570 #else
1571
1572 do_op_DAA:
1573 ldi oph,0 ;oph: what to add
1574
1575 #if EM_Z80
1576 sbrc z_flags,ZFL_N ;if add-op
1577 rjmp op_da_sub ;then
1578 #endif
1579
1580 op_da_add:
1581 ldi temp2,0 ; new C, H and N flag
1582 mov temp,opl ; |
1583 andi temp,0x0f ; |
1584 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1585 brlo op_da_a10 ; |
1586 ori oph,0x06 ; add 6
1587 ori temp2,(1<<ZFL_H) ; set new H flag
1588
1589 sbrc z_flags,ZFL_C ; |
1590 rjmp op_da_a02 ; if (C flag ...
1591 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1592 brlo op_da_a03 ; |
1593 op_da_a02:
1594 ori oph,0x60 ; add 0x60
1595 ori temp2,(1<<ZFL_C) ; set new C flag
1596 op_da_a03: ; endif
1597 rjmp op_da_ae
1598 op_da_a10: ; else (lower nibble is 0x09 or lower)
1599 sbrc z_flags,ZFL_C ; |
1600 rjmp op_da_a12 ; if (C flag ...
1601 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1602 brlo op_da_a13 ;
1603 op_da_a12:
1604 ori oph,0x60 ; add 0x60
1605 ori temp2,(1<<ZFL_C) ; set new C flag
1606 op_da_a13:
1607 sbrs z_flags,ZFL_H ; if (H flag)
1608 rjmp op_da_ae ; |
1609 ori oph,0x06 ; add 0x06
1610 mov temp,opl ; |
1611 andi temp,0x0f ; |
1612 cpi temp,0x06 ; if (lower nibble < 0x6)
1613 brsh op_da_ae ; |
1614 ; ori temp2,(1<<ZFL_H) ; set new H flag
1615 ; endif
1616 ; endif
1617 op_da_ae:
1618 add opl,oph
1619 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1620 or z_flags,temp2 ; merge new C and H flag
1621 ret
1622
1623 #if EM_Z80
1624
1625 op_da_sub: ;Else (sub-op)
1626 ldi temp2,(1<<ZFL_N) ; new C, H and N flag
1627 mov temp,opl ; |
1628 andi temp,0x0f ; |
1629 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1630 brlo op_da_s10 ; |
1631 ori oph,0x06 ; sub 6
1632
1633 sbrc z_flags,ZFL_C ; |
1634 rjmp op_da_s02 ; if (C flag ...
1635 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1636 brlo op_da_s03 ; |
1637 op_da_s02:
1638 ori oph,0x60 ; sub 0x60
1639 ori temp2,(1<<ZFL_C) ; set new C flag
1640 op_da_s03: ; endif
1641 rjmp op_da_se
1642 op_da_s10: ; else (lower nibble is 0x09 or lower)
1643 sbrc z_flags,ZFL_C ; |
1644 rjmp op_da_s12 ; if (C flag ...
1645 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1646 brlo op_da_s13 ;
1647 op_da_s12:
1648 ori oph,0x60 ; sub 0x60
1649 ori temp2,(1<<ZFL_C) ; set new C flag
1650 op_da_s13:
1651 sbrs z_flags,ZFL_H ; if (H flag)
1652 rjmp op_da_se ; |
1653 ori oph,0x06 ; sub 0x06
1654 mov temp,opl ; |
1655 andi temp,0x0f ; |
1656 cpi temp,0x06 ; if (lower nibble < 0x06)
1657 brcc op_da_se ; |
1658 ori temp2,(1<<ZFL_H) ; set new H flag
1659 ; endif
1660 ; endif
1661 op_da_se:
1662 sub opl,oph
1663 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1664 or z_flags,temp2 ; merge new C and H flag
1665 ret ;Endif
1666
1667 #endif /* EM_Z80 */
1668 #endif /* alternatives */
1669
1670
1671 ;----------------------------------------------------------------
1672 ;|Mnemonic |SZHPNC|Description |Notes |
1673 ;----------------------------------------------------------------
1674 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1675 ;|----------|SZHP C|---------- 8080 ----------------------------|
1676 ;
1677 ;
1678 do_op_scf:
1679 do_z80_flags_clear_HN
1680 ori z_flags,(1<<ZFL_C)
1681 ret
1682
1683 ;----------------------------------------------------------------
1684 ;|Mnemonic |SZHPNC|Description |Notes |
1685 ;----------------------------------------------------------------
1686 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
1687 ;|----------|SZHP C|---------- 8080 ----------------------------|
1688 ;|CCF |---- 1|Set Carry Flag |CY=1 |
1689 ;
1690 do_op_ccf:
1691 do_z80_flags_clear_N
1692 do_z80_flags_copy_HC
1693 ldi temp,(1<<ZFL_C)
1694 eor z_flags,temp
1695 ret
1696
1697 ;----------------------------------------------------------------
1698 ;|Mnemonic |SZHPNC|Description |Notes |
1699 ;----------------------------------------------------------------
1700 ;|CPL |--1-1-|Complement |A=~A |
1701 ;|----------|SZHP C|---------- 8080 ----------------------------|
1702 ;|CPL |---- -|Complement |A=~A |
1703 ;
1704 ;
1705 do_op_cpl:
1706 com z_a
1707 do_z80_flags_set_HN
1708 ret
1709
1710
1711 ;----------------------------------------------------------------
1712 ;|Mnemonic |SZHPNC|Description |Notes |
1713 ;----------------------------------------------------------------
1714 ;|PUSH xx |------|Push |-[SP]=xx |
1715 ;|PUSH qq |------|Push |-[SP]=qq |
1716 ;
1717 ;
1718 do_op_push16:
1719 movw xl,z_spl
1720 sbiw x,1
1721 mem_write_s oph
1722 sbiw x,1
1723 mem_write_s opl
1724 movw z_spl,xl
1725
1726 .if STACK_DBG
1727 printnewline
1728 printstring "Stack push "
1729 movw temp,opl
1730 rcall printhexw
1731 printstring ", SP is now "
1732 movw temp,z_spl
1733 rcall printhexw
1734 printstring ". "
1735 .endif
1736
1737 ret
1738
1739 ;----------------------------------------------------------------
1740 ;|Mnemonic |SZHPNC|Description |Notes |
1741 ;----------------------------------------------------------------
1742 ;|POP xx |------|Pop |xx=[SP]+ |
1743 ;|POP qq |------|Pop |qq=[SP]+ |
1744 ;
1745 ;
1746 do_op_pop16:
1747 movw x,z_spl
1748 mem_read_d opl
1749 adiw x,1
1750 mem_read_d oph
1751 adiw x,1
1752 movw z_spl,x
1753
1754 .if STACK_DBG
1755 printnewline
1756 printstring "Stack pop "
1757 movw temp,opl
1758 rcall printhexw
1759 printstring ", SP is now "
1760 movw temp,z_spl
1761 rcall printhexw
1762 printstring ". "
1763 .endif
1764 ret
1765
1766 ;----------------------------------------------------------------
1767 ;|Mnemonic |SZHPNC|Description |Notes |
1768 ;----------------------------------------------------------------
1769 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1770 ;|EX DE,HL |------|Exchange |DE<->HL |
1771 ;-----------------------------Z80--------------------------------
1772 ;
1773 do_op_exhl:
1774 movw temp,z_l
1775 movw z_l,opl
1776 movw opl,temp
1777 ret
1778
1779 ;----------------------------------------------------------------
1780 ;|Mnemonic |SZHPNC|Description |Notes |
1781 ;----------------------------------------------------------------
1782 ;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
1783 ;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
1784 ;
1785
1786 do_op_DI:
1787 #if EM_Z80
1788 ldd temp,y+oz_istat
1789 andi temp,~((1<<IFF2) | (1<<IFF1))
1790 std y+oz_istat,temp
1791 #endif
1792 ret
1793
1794 do_op_EI:
1795 #if EM_Z80
1796 ldd temp,y+oz_istat
1797 ori temp,(1<<IFF2) | (1<<IFF1)
1798 std y+oz_istat,temp
1799 #endif
1800 ret
1801
1802 ;----------------------------------------------------------------
1803 ;|Mnemonic |SZHPNC|Description |Notes |
1804 ;----------------------------------------------------------------
1805 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1806 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1807 ;|RET cc |------|Conditional Return |If cc RET |
1808 ;
1809 ;
1810 do_op_ifnz:
1811 sbrs z_flags, ZFL_Z
1812 ret
1813 pop temp ; nix tun
1814 pop temp ; direkt zurueck zu main
1815 ret
1816
1817 ;----------------------------------------------------------------
1818 ;|Mnemonic |SZHPNC|Description |Notes |
1819 ;----------------------------------------------------------------
1820 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1821 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1822 ;|RET cc |------|Conditional Return |If cc RET |
1823 ;
1824 ;
1825 do_op_ifz:
1826 sbrc z_flags, ZFL_Z
1827 ret
1828 pop temp ; nix tun
1829 pop temp ; direkt zurueck zu main
1830 ret
1831
1832 ;----------------------------------------------------------------
1833 ;|Mnemonic |SZHPNC|Description |Notes |
1834 ;----------------------------------------------------------------
1835 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1836 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1837 ;|RET cc |------|Conditional Return |If cc RET |
1838 ;
1839 ;
1840 do_op_ifnc:
1841 sbrs z_flags, ZFL_C
1842 ret
1843 pop temp ; nix tun
1844 pop temp ; direkt zuruech zu main
1845 ret
1846
1847 ;----------------------------------------------------------------
1848 ;|Mnemonic |SZHPNC|Description |Notes |
1849 ;----------------------------------------------------------------
1850 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1851 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1852 ;|RET cc |------|Conditional Return |If cc RET |
1853 ;
1854 ;
1855 do_op_ifc:
1856 sbrc z_flags, ZFL_C
1857 ret
1858 pop temp ; nix tun
1859 pop temp ; direkt zuruech zu main
1860 ret
1861
1862 ;----------------------------------------------------------------
1863 ;|Mnemonic |SZHPNC|Description |Notes |
1864 ;----------------------------------------------------------------
1865 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1866 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1867 ;|RET cc |------|Conditional Return |If cc RET |
1868 ;
1869 ;
1870 do_op_ifpo:
1871 sbrs z_flags, ZFL_P
1872 ret
1873 pop temp ; nix tun
1874 pop temp ; direkt zuruech zu main
1875 ret
1876
1877 ;----------------------------------------------------------------
1878 ;|Mnemonic |SZHPNC|Description |Notes |
1879 ;----------------------------------------------------------------
1880 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1881 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1882 ;|RET cc |------|Conditional Return |If cc RET |
1883 ;
1884 ;
1885 do_op_ifpe:
1886 sbrc z_flags, ZFL_P
1887 ret
1888 pop temp ; nix tun
1889 pop temp ; direkt zuruech zu main
1890 ret
1891
1892 ;----------------------------------------------------------------
1893 ;|Mnemonic |SZHPNC|Description |Notes |
1894 ;----------------------------------------------------------------
1895 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1896 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1897 ;|RET cc |------|Conditional Return |If cc RET |
1898 ;
1899 ;
1900 do_op_ifp: ;sign positive, aka s=0
1901 sbrs z_flags, ZFL_S
1902 ret
1903 pop temp ; nix tun
1904 pop temp ; direkt zuruech zu main
1905 ret
1906
1907 ;----------------------------------------------------------------
1908 ;|Mnemonic |SZHPNC|Description |Notes |
1909 ;----------------------------------------------------------------
1910 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1911 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1912 ;|RET cc |------|Conditional Return |If cc RET |
1913 ;
1914 ;
1915 do_op_ifm: ;sign negative, aka s=1
1916 sbrc z_flags, ZFL_S
1917 ret
1918 pop temp ; nix tun
1919 pop temp ; direkt zuruech zu main
1920 ret
1921
1922 ;----------------------------------------------------------------
1923
1924 #if EM_Z80
1925
1926 ;----------------------------------------------------------------
1927 ;|Mnemonic |SZHPNC|Description |Notes |
1928 ;----------------------------------------------------------------
1929 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
1930 ;
1931 ;The b register is decremented, and if not zero, the signed value e is added to pc.
1932 ;The jump is measured from the start of the instruction opcode.
1933 ;e = Relative addressing (PC=PC+2+offset)
1934
1935 #if 1
1936
1937 ; (Joe G.)
1938 do_op_DJNZ: ; decremt B, jump B=0
1939 dec z_b ; B decrementieren
1940 breq do_op_DJNZ_Z ; bei B=0
1941 subi opl, 0x80 ; z_pc + e im Zweierkomplement
1942 subi z_pcl,0x80
1943 sbc z_pch,_0
1944 add z_pcl,opl
1945 adc z_pch,_0
1946 do_op_DJNZ_Z:
1947 ret
1948
1949 #else
1950
1951 do_op_djnz:
1952 dec z_b
1953 brne opdjnze
1954 pop temp ; nix tun
1955 pop temp ; direkt zurueck zu main
1956 opdjnze:
1957 ret
1958
1959 #endif
1960
1961 ;----------------------------------------------------------------
1962 ;|Mnemonic |SZHPNC|Description |Notes |
1963 ;----------------------------------------------------------------
1964 ;|EX AF,AF' |------|Exchange |AF<->AF' |
1965
1966 do_op_EXAF:
1967 ldd temp,y+oz_f2
1968 ldd temp2,y+oz_a2
1969 std y+oz_f2,z_flags
1970 std y+oz_a2,z_a
1971 mov z_flags,temp
1972 mov z_a,temp2
1973 ret
1974
1975
1976 ;----------------------------------------------------------------
1977 ;|Mnemonic |SZHPNC|Description |Notes |
1978 ;----------------------------------------------------------------
1979 ;|EXX |------|Exchange |qq<->qq' (except AF)|
1980
1981
1982 #if 1
1983
1984 do_op_EXX:
1985 ldd temp ,y+oz_c2
1986 ldd temp2,y+oz_b2
1987 std y+oz_c2,z_c
1988 std y+oz_b2,z_b
1989 movw z_c,temp
1990
1991 ldd temp ,y+oz_e2
1992 ldd temp2,y+oz_d2
1993 std y+oz_e2,z_e
1994 std y+oz_d2,z_d
1995 movw z_e,temp
1996
1997 ldd temp ,y+oz_l2
1998 ldd temp2,y+oz_h2
1999 std y+oz_l2,z_l
2000 std y+oz_h2,z_h
2001 movw z_l,temp
2002 ret
2003 #else
2004
2005 do_op_EXX:
2006 ldiw z,z_b
2007 ldi temp3,6
2008 opexx_loop:
2009 ld temp,z
2010 ldd temp2,z+r2ofs
2011 std z+r2ofs,temp
2012 st z+,temp2
2013 dec temp3
2014 brne opexx_loop
2015 ret
2016
2017 #endif
2018
2019 #else
2020 do_op_djnz:
2021 do_op_EXAF:
2022 do_op_EXX:
2023 ljmp do_op_inv
2024 ret
2025 #endif
2026
2027 #if EM_Z80
2028
2029 do_op_prefixED:
2030 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2031 adiw z_pcl,1 ;++z_pc
2032 ldi zh,high(EDjmp) ;
2033 ijmp
2034
2035
2036 do_op_prefixDD:
2037 cbi flags,prefixfd
2038 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2039 adiw z_pcl,1 ;++z_pc
2040 ldi zh,high(DDFDjmp) ;
2041 ijmp
2042
2043
2044 do_op_prefixFD:
2045 sbi flags,prefixfd
2046 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2047 adiw z_pcl,1 ;++z_pc
2048 ldi zh,high(DDFDjmp) ;
2049 ijmp
2050
2051 do_op_prefixCB:
2052 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2053 adiw z_pcl,1 ;++z_pc
2054 ldi zh,high(CBjmp) ;
2055 ijmp
2056
2057
2058 do_op_prefixDDFDCB:
2059 sbic flags,prefixfd
2060 rjmp opprxcb_fd
2061 ldd xh,y+oz_xh
2062 ldd xl,y+oz_xl
2063 rjmp opprxcb_1
2064 opprxcb_fd:
2065 ldd xh,y+oz_yh
2066 ldd xl,y+oz_yl
2067 opprxcb_1:
2068 mem_read_s z_pc ;get displacement
2069 adiw z_pcl,1 ;++z_pc
2070 clr temp2 ;sign extend
2071 tst temp
2072 brpl PC+2
2073 com temp2
2074 add xl,temp ;add displacement
2075 adc xh,temp2
2076 mem_read_d opl
2077
2078 mem_read_ds zl,z_pc ;zl = opcode
2079 adiw z_pcl,1 ;++z_pc
2080 ldi zh,high(DDFDCBjmp) ;
2081 icall
2082 mem_write_s opl
2083 ret
2084
2085
2086 #else ; TODO: geht das so?
2087
2088 do_op_prefixED:
2089 do_op_prefixDD:
2090 do_op_prefixFD:
2091 do_op_prefixCB:
2092 ljmp do_op_inv
2093 ret
2094 #endif
2095
2096
2097
2098 ; ----------------------- Opcode decoding -------------------------
2099
2100 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
2101 ; operations: fetch, do something, store.
2102 ; The table is made of 256 words.
2103
2104 opctable opcjmp, PC ;+3*256
2105
2106 instr fetch_nop, op_nop, store_nop ;00 ;NOP
2107 instr fetch_DIR16, op_nop, store_BC ;01 nn nn ;LD BC,nn
2108 instr fetch_nop, op_nop, store_MBC ;02 ;LD (BC),A
2109 ;instr fetch_BC, op_INC16, store_BC ;03 ;INC BC
2110 instr fetch_nop, op_INCBC, store_nop ;03 ;INC BC
2111 instr fetch_B, op_INC, store_B ;04 ;INC B
2112 instr fetch_B, op_DEC, store_B ;05 ;DEC B
2113 instr fetch_DIR8, op_nop, store_B ;06 ;LD B,n
2114 instr fetch_nop, op_RLCA, store_nop ;07 ;RLCA
2115 instr fetch_nop, op_EXAF, store_nop ;08 ;EX AF,AF'
2116 instr fetch_BC, op_ADDHL, store_nop ;09 ;ADD HL,BC
2117 instr fetch_MBC, op_nop, store_nop ;0A ;LD A,(BC)
2118 ;instr fetch_BC, op_DEC16, store_BC ;0B ;DEC BC
2119 instr fetch_nop, op_DECBC, store_nop ;0B ;DEC BC
2120 instr fetch_C, op_INC, store_C ;0C ;INC C
2121 instr fetch_C, op_DEC, store_C ;0D ;DEC C
2122 instr fetch_DIR8, op_nop, store_C ;0E nn ;LD C,n
2123 instr fetch_nop, op_RRCA, store_nop ;0F ;RRCA
2124 instr fetch_DIR8, op_DJNZ, store_nop ;10 oo ;DJNZ o
2125 instr fetch_DIR16, op_nop, store_DE ;11 nn nn ;LD DE,nn
2126 instr fetch_nop, op_nop, store_MDE ;12 ;LD (DE),A
2127 ;instr fetch_DE, op_INC16, store_DE ;13 ;INC DE
2128 instr fetch_nop, op_INCDE, store_nop ;13 ;INC DE
2129 instr fetch_D, op_INC, store_D ;14 ;INC D
2130 instr fetch_D, op_DEC, store_D ;15 ;DEC D
2131 instr fetch_DIR8, op_nop, store_D ;16 nn ;LD D,n
2132 instr fetch_nop, op_RLA, store_nop ;17 ;RLA
2133 instr fetch_DIR8, op_nop, store_pcrel ;18 oo ;JR o
2134 instr fetch_DE, op_ADDHL, store_nop ;19 ;ADD HL,DE
2135 instr fetch_MDE, op_nop, store_nop ;1A ;LD A,(DE)
2136 ;instr fetch_DE, op_DEC16, store_DE ;1B ;DEC DE
2137 instr fetch_nop, op_DECDE, store_nop ;1B ;DEC DE
2138 instr fetch_E, op_INC, store_E ;1C ;INC E
2139 instr fetch_E, op_DEC, store_E ;1D ;DEC E
2140 instr fetch_DIR8, op_nop, store_E ;1E nn ;LD E,n
2141 instr fetch_nop, op_RRA, store_nop ;1F ;RRA
2142 instr fetch_DIR8, op_IFNZ, store_pcrel ;20 oo ;JR NZ,o
2143 instr fetch_DIR16, op_nop, store_HL ;21 nn nn ;LD HL,nn
2144 instr fetch_DIR16, op_STHL, store_nop ;22 nn nn ;LD (nn),HL
2145 ;instr fetch_HL, op_INC16, store_HL ;23 ;INC HL
2146 instr fetch_nop, op_INCHL, store_nop ;23 ;INC HL
2147 instr fetch_H, op_INC, store_H ;24 ;INC H
2148 instr fetch_H, op_DEC, store_H ;25 ;DEC H
2149 instr fetch_DIR8, op_nop, store_H ;26 nn ;LD H,n
2150 instr fetch_A, op_DAA, store_A ;27 ;DAA
2151 instr fetch_DIR8, op_IFZ, store_pcrel ;28 oo ;JR Z,o
2152 instr fetch_HL, op_ADDHL, store_nop ;29 ;ADD HL,HL
2153 instr fetch_DIR16, op_RMEM16, store_HL ;2A nn nn ;LD HL,(nn)
2154 ;instr fetch_HL, op_DEC16, store_HL ;2B ;DEC HL
2155 instr fetch_nop, op_DECHL, store_nop ;2B ;DEC HL
2156 instr fetch_L, op_INC, store_L ;2C ;INC L
2157 instr fetch_L, op_DEC, store_L ;2D ;DEC L
2158 instr fetch_DIR8, op_nop, store_L ;2E nn ;LD L,n
2159 instr fetch_nop, op_CPL, store_nop ;2F ;CPL
2160 instr fetch_DIR8, op_IFNC, store_pcrel ;30 oo ;JR NC,o
2161 instr fetch_DIR16, op_nop, store_SP ;31 nn nn ;LD SP,nn
2162 instr fetch_DIR16, op_nop, store_AM ;32 nn nn ;LD (nn),A
2163 instr fetch_SP, op_INC16, store_SP ;33 ;INC SP
2164 instr fetch_MHL, op_INC, store_MHL ;34 ;INC (HL)
2165 instr fetch_MHL, op_DEC, store_MHL ;35 ;DEC (HL)
2166 instr fetch_DIR8, op_nop, store_MHL ;36 nn ;LD (HL),n
2167 instr fetch_nop, op_SCF, store_nop ;37 ;SCF
2168 instr fetch_DIR8, op_IFC, store_pcrel ;38 oo ;JR C,o
2169 instr fetch_SP, op_ADDHL, store_nop ;39 ;ADD HL,SP
2170 instr fetch_DIR16, op_RMEM8, store_A ;3A nn nn ;LD A,(nn)
2171 instr fetch_SP, op_DEC16, store_SP ;3B ;DEC SP
2172 instr fetch_nop, op_INCA, store_nop ;3C ;INC A
2173 instr fetch_nop, op_DECA, store_nop ;3D ;DEC A
2174 instr fetch_DIR8, op_nop, store_A ;3E nn ;LD A,n
2175 instr fetch_nop, op_CCF, store_nop ;3F ;CCF (Complement Carry Flag, gvd)
2176 instr fetch_nop, op_nop, store_nop ;40 ;LD B,B
2177 instr fetch_C, op_nop, store_B ;41 ;LD B,C
2178 instr fetch_D, op_nop, store_B ;42 ;LD B,D
2179 instr fetch_E, op_nop, store_B ;43 ;LD B,E
2180 instr fetch_H, op_nop, store_B ;44 ;LD B,H
2181 instr fetch_L, op_nop, store_B ;45 ;LD B,L
2182 instr fetch_MHL, op_nop, store_B ;46 ;LD B,(HL)
2183 instr fetch_A, op_nop, store_B ;47 ;LD B,A
2184 instr fetch_B, op_nop, store_C ;48 ;LD C,B
2185 instr fetch_nop, op_nop, store_nop ;49 ;LD C,C
2186 instr fetch_D, op_nop, store_C ;4A ;LD C,D
2187 instr fetch_E, op_nop, store_C ;4B ;LD C,E
2188 instr fetch_H, op_nop, store_C ;4C ;LD C,H
2189 instr fetch_L, op_nop, store_C ;4D ;LD C,L
2190 instr fetch_MHL, op_nop, store_C ;4E ;LD C,(HL)
2191 instr fetch_A, op_nop, store_C ;4F ;LD C,A
2192 instr fetch_B, op_nop, store_D ;50 ;LD D,B
2193 instr fetch_C, op_nop, store_D ;51 ;LD D,C
2194 instr fetch_nop, op_nop, store_nop ;52 ;LD D,D
2195 instr fetch_E, op_nop, store_D ;53 ;LD D,E
2196 instr fetch_H, op_nop, store_D ;54 ;LD D,H
2197 instr fetch_L, op_nop, store_D ;55 ;LD D,L
2198 instr fetch_MHL, op_nop, store_D ;56 ;LD D,(HL)
2199 instr fetch_A, op_nop, store_D ;57 ;LD D,A
2200 instr fetch_B, op_nop, store_E ;58 ;LD E,B
2201 instr fetch_C, op_nop, store_E ;59 ;LD E,C
2202 instr fetch_D, op_nop, store_E ;5A ;LD E,D
2203 instr fetch_nop, op_nop, store_nop ;5B ;LD E,E
2204 instr fetch_H, op_nop, store_E ;5C ;LD E,H
2205 instr fetch_L, op_nop, store_E ;5D ;LD E,L
2206 instr fetch_MHL, op_nop, store_E ;5E ;LD E,(HL)
2207 instr fetch_A, op_nop, store_E ;5F ;LD E,A
2208 instr fetch_B, op_nop, store_H ;60 ;LD H,B
2209 instr fetch_C, op_nop, store_H ;61 ;LD H,C
2210 instr fetch_D, op_nop, store_H ;62 ;LD H,D
2211 instr fetch_E, op_nop, store_H ;63 ;LD H,E
2212 instr fetch_nop, op_nop, store_nop ;64 ;LD H,H
2213 instr fetch_L, op_nop, store_H ;65 ;LD H,L
2214 instr fetch_MHL, op_nop, store_H ;66 ;LD H,(HL)
2215 instr fetch_A, op_nop, store_H ;67 ;LD H,A
2216 instr fetch_B, op_nop, store_L ;68 ;LD L,B
2217 instr fetch_C, op_nop, store_L ;69 ;LD L,C
2218 instr fetch_D, op_nop, store_L ;6A ;LD L,D
2219 instr fetch_E, op_nop, store_L ;6B ;LD L,E
2220 instr fetch_H, op_nop, store_L ;6C ;LD L,H
2221 instr fetch_nop, op_nop, store_nop ;6D ;LD L,L
2222 instr fetch_MHL, op_nop, store_L ;6E ;LD L,(HL)
2223 instr fetch_A, op_nop, store_L ;6F ;LD L,A
2224 instr fetch_B, op_nop, store_MHL ;70 ;LD (HL),B
2225 instr fetch_C, op_nop, store_MHL ;71 ;LD (HL),C
2226 instr fetch_D, op_nop, store_MHL ;72 ;LD (HL),D
2227 instr fetch_E, op_nop, store_MHL ;73 ;LD (HL),E
2228 instr fetch_H, op_nop, store_MHL ;74 ;LD (HL),H
2229 instr fetch_L, op_nop, store_MHL ;75 ;LD (HL),L
2230 instr fetch_nop, op_HALT, store_nop ;76 ;HALT
2231 instr fetch_A, op_nop, store_MHL ;77 ;LD (HL),A
2232 instr fetch_B, op_nop, store_A ;78 ;LD A,B
2233 instr fetch_C, op_nop, store_A ;79 ;LD A,C
2234 instr fetch_D, op_nop, store_A ;7A ;LD A,D
2235 instr fetch_E, op_nop, store_A ;7B ;LD A,E
2236 instr fetch_H, op_nop, store_A ;7C ;LD A,H
2237 instr fetch_L, op_nop, store_A ;7D ;LD A,L
2238 instr fetch_MHL, op_nop, store_A ;7E ;LD A,(HL)
2239 instr fetch_nop, op_nop, store_nop ;7F ;LD A,A
2240 instr fetch_B, op_ADDA, store_nop ;80 ;ADD A,B
2241 instr fetch_C, op_ADDA, store_nop ;81 ;ADD A,C
2242 instr fetch_D, op_ADDA, store_nop ;82 ;ADD A,D
2243 instr fetch_E, op_ADDA, store_nop ;83 ;ADD A,E
2244 instr fetch_H, op_ADDA, store_nop ;84 ;ADD A,H
2245 instr fetch_L, op_ADDA, store_nop ;85 ;ADD A,L
2246 instr fetch_MHL, op_ADDA, store_nop ;86 ;ADD A,(HL)
2247 instr fetch_A, op_ADDA, store_nop ;87 ;ADD A,A
2248 instr fetch_B, op_ADCA, store_nop ;88 ;ADC A,B
2249 instr fetch_C, op_ADCA, store_nop ;89 ;ADC A,C
2250 instr fetch_D, op_ADCA, store_nop ;8A ;ADC A,D
2251 instr fetch_E, op_ADCA, store_nop ;8B ;ADC A,E
2252 instr fetch_H, op_ADCA, store_nop ;8C ;ADC A,H
2253 instr fetch_L, op_ADCA, store_nop ;8D ;ADC A,L
2254 instr fetch_MHL, op_ADCA, store_nop ;8E ;ADC A,(HL)
2255 instr fetch_A, op_ADCA, store_nop ;8F ;ADC A,A
2256 instr fetch_B, op_SUBFA, store_nop ;90 ;SUB A,B
2257 instr fetch_C, op_SUBFA, store_nop ;91 ;SUB A,C
2258 instr fetch_D, op_SUBFA, store_nop ;92 ;SUB A,D
2259 instr fetch_E, op_SUBFA, store_nop ;93 ;SUB A,E
2260 instr fetch_H, op_SUBFA, store_nop ;94 ;SUB A,H
2261 instr fetch_L, op_SUBFA, store_nop ;95 ;SUB A,L
2262 instr fetch_MHL, op_SUBFA, store_nop ;96 ;SUB A,(HL)
2263 instr fetch_A, op_SUBFA, store_nop ;97 ;SUB A,A
2264 instr fetch_B, op_SBCFA, store_nop ;98 ;SBC A,B
2265 instr fetch_C, op_SBCFA, store_nop ;99 ;SBC A,C
2266 instr fetch_D, op_SBCFA, store_nop ;9A ;SBC A,D
2267 instr fetch_E, op_SBCFA, store_nop ;9B ;SBC A,E
2268 instr fetch_H, op_SBCFA, store_nop ;9C ;SBC A,H
2269 instr fetch_L, op_SBCFA, store_nop ;9D ;SBC A,L
2270 instr fetch_MHL, op_SBCFA, store_nop ;9E ;SBC A,(HL)
2271 instr fetch_A, op_SBCFA, store_nop ;9F ;SBC A,A
2272 instr fetch_B, op_ANDA, store_nop ;A0 ;AND A,B
2273 instr fetch_C, op_ANDA, store_nop ;A1 ;AND A,C
2274 instr fetch_D, op_ANDA, store_nop ;A2 ;AND A,D
2275 instr fetch_E, op_ANDA, store_nop ;A3 ;AND A,E
2276 instr fetch_H, op_ANDA, store_nop ;A4 ;AND A,H
2277 instr fetch_L, op_ANDA, store_nop ;A5 ;AND A,L
2278 instr fetch_MHL, op_ANDA, store_nop ;A6 ;AND A,(HL)
2279 instr fetch_A, op_ANDA, store_nop ;A7 ;AND A,A
2280 instr fetch_B, op_XORA, store_nop ;A8 ;XOR A,B
2281 instr fetch_C, op_XORA, store_nop ;A9 ;XOR A,C
2282 instr fetch_D, op_XORA, store_nop ;AA ;XOR A,D
2283 instr fetch_E, op_XORA, store_nop ;AB ;XOR A,E
2284 instr fetch_H, op_XORA, store_nop ;AC ;XOR A,H
2285 instr fetch_L, op_XORA, store_nop ;AD ;XOR A,L
2286 instr fetch_MHL, op_XORA, store_nop ;AE ;XOR A,(HL)
2287 instr fetch_A, op_XORA, store_nop ;AF ;XOR A,A
2288 instr fetch_B, op_ORA, store_nop ;B0 ;OR A,B
2289 instr fetch_C, op_ORA, store_nop ;B1 ;OR A,C
2290 instr fetch_D, op_ORA, store_nop ;B2 ;OR A,D
2291 instr fetch_E, op_ORA, store_nop ;B3 ;OR A,E
2292 instr fetch_H, op_ORA, store_nop ;B4 ;OR A,H
2293 instr fetch_L, op_ORA, store_nop ;B5 ;OR A,L
2294 instr fetch_MHL, op_ORA, store_nop ;B6 ;OR A,(HL)
2295 instr fetch_A, op_ORA, store_nop ;B7 ;OR A,A
2296 instr fetch_B, op_CPFA, store_nop ;B8 ;CP A,B
2297 instr fetch_C, op_CPFA, store_nop ;B9 ;CP A,C
2298 instr fetch_D, op_CPFA, store_nop ;BA ;CP A,D
2299 instr fetch_E, op_CPFA, store_nop ;BB ;CP A,E
2300 instr fetch_H, op_CPFA, store_nop ;BC ;CP A,H
2301 instr fetch_L, op_CPFA, store_nop ;BD ;CP A,L
2302 instr fetch_MHL, op_CPFA, store_nop ;BE ;CP A,(HL)
2303 instr fetch_A, op_CPFA, store_nop ;BF ;CP A,A
2304 instr fetch_nop, op_IFNZ, store_RET ;C0 ;RET NZ
2305 instr fetch_nop, op_POP16, store_BC ;C1 ;POP BC
2306 instr fetch_DIR16, op_IFNZ, store_PC ;C2 nn nn ;JP NZ,nn
2307 instr fetch_DIR16, op_nop, store_PC ;C3 nn nn ;JP nn
2308 instr fetch_DIR16, op_IFNZ, store_CALL ;C4 nn nn ;CALL NZ,nn
2309 instr fetch_BC, op_PUSH16, store_nop ;C5 ;PUSH BC
2310 instr fetch_DIR8, op_ADDA, store_nop ;C6 nn ;ADD A,n
2311 instr fetch_RST, op_nop, store_CALL ;C7 ;RST 0
2312 instr fetch_nop, op_IFZ, store_RET ;C8 ;RET Z
2313 instr fetch_nop, op_nop, store_RET ;C9 ;RET
2314 instr fetch_DIR16, op_IFZ, store_PC ;CA nn nn ;JP Z,nn
2315 instr fetch_nop, op_prefixCB, store_nop ;CB ;(CB opcode prefix)
2316 instr fetch_DIR16, op_IFZ, store_CALL ;CC nn nn ;CALL Z,nn
2317 instr fetch_DIR16, op_nop, store_CALL ;CD nn nn ;CALL nn
2318 instr fetch_DIR8, op_ADCA, store_nop ;CE nn ;ADC A,n
2319 instr fetch_RST, op_nop, store_CALL ;CF ;RST 8H
2320 instr fetch_nop, op_IFNC, store_RET ;D0 ;RET NC
2321 instr fetch_nop, op_POP16, store_DE ;D1 ;POP DE
2322 instr fetch_DIR16, op_IFNC, store_PC ;D2 nn nn ;JP NC,nn
2323 instr fetch_DIR8, op_OUTA, store_nop ;D3 nn ;OUT (n),A
2324 instr fetch_DIR16, op_IFNC, store_CALL ;D4 nn nn ;CALL NC,nn
2325 instr fetch_DE, op_PUSH16, store_nop ;D5 ;PUSH DE
2326 instr fetch_DIR8, op_SUBFA, store_nop ;D6 nn ;SUB n
2327 instr fetch_RST, op_nop, store_CALL ;D7 ;RST 10H
2328 instr fetch_nop, op_IFC, store_RET ;D8 ;RET C
2329 instr fetch_nop, op_EXX, store_nop ;D9 ;EXX
2330 instr fetch_DIR16, op_IFC, store_PC ;DA nn nn ;JP C,nn
2331 instr fetch_DIR8, op_INA, store_nop ;DB nn ;IN A,(n)
2332 instr fetch_DIR16, op_IFC, store_CALL ;DC nn nn ;CALL C,nn
2333 instr fetch_nop, op_prefixDD, store_nop ;DD ;(DD opcode prefix)
2334 instr fetch_DIR8, op_SBCFA, store_nop ;DE nn ;SBC A,n
2335 instr fetch_RST, op_nop, store_CALL ;DF ;RST 18H
2336 instr fetch_nop, op_IFPO, store_RET ;E0 ;RET PO
2337 instr fetch_nop, op_POP16, store_HL ;E1 ;POP HL
2338 instr fetch_DIR16, op_IFPO, store_PC ;E2 nn nn ;JP PO,nn
2339 instr fetch_MSP, op_EXHL, store_MSP ;E3 ;EX (SP),HL
2340 instr fetch_DIR16, op_IFPO, store_CALL ;E4 nn nn ;CALL PO,nn
2341 instr fetch_HL, op_PUSH16, store_nop ;E5 ;PUSH HL
2342 instr fetch_DIR8, op_ANDA, store_nop ;E6 nn ;AND n
2343 instr fetch_RST, op_nop, store_CALL ;E7 ;RST 20H
2344 instr fetch_nop, op_IFPE, store_RET ;E8 ;RET PE
2345 instr fetch_HL, op_nop, store_PC ;E9 ;JP HL
2346 instr fetch_DIR16, op_IFPE, store_PC ;EA nn nn ;JP PE,nn
2347 instr fetch_DE, op_EXHL, store_DE ;EB ;EX DE,HL
2348 instr fetch_DIR16, op_IFPE, store_CALL ;EC nn nn ;CALL PE,nn
2349 instr fetch_nop, op_prefixED, store_nop ;ED ;(ED opcode prefix)
2350 instr fetch_DIR8, op_XORA, store_nop ;EE nn ;XOR n
2351 instr fetch_RST, op_nop, store_CALL ;EF ;RST 28H
2352 instr fetch_nop, op_IFP, store_RET ;F0 ;RET P
2353 instr fetch_nop, op_POP16, store_AF ;F1 ;POP AF
2354 instr fetch_DIR16, op_IFP, store_PC ;F2 nn nn ;JP P,nn
2355 instr fetch_nop, op_DI, store_nop ;F3 ;DI
2356 instr fetch_DIR16, op_IFP, store_CALL ;F4 nn nn ;CALL P,nn
2357 instr fetch_AF, op_PUSH16, store_nop ;F5 ;PUSH AF
2358 instr fetch_DIR8, op_ORA, store_nop ;F6 nn ;OR n
2359 instr fetch_RST, op_nop, store_CALL ;F7 ;RST 30H
2360 instr fetch_nop, op_IFM, store_RET ;F8 ;RET M
2361 instr fetch_HL, op_nop, store_SP ;F9 ;LD SP,HL
2362 instr fetch_DIR16, op_IFM, store_PC ;FA nn nn ;JP M,nn
2363 instr fetch_nop, op_EI, store_nop ;FB ;EI
2364 instr fetch_DIR16, op_IFM, store_CALL ;FC nn nn ;CALL M,nn
2365 instr fetch_nop, op_prefixFD, store_nop ;FD ;(FD opcode prefix)
2366 instr fetch_DIR8, op_CPFA, store_nop ;FE nn ;CP n
2367 instr fetch_RST, op_nop, store_CALL ;FF ;RST 38H
2368
2369
2370 #if EM_Z80
2371
2372
2373
2374 checkspace PC, 2
2375
2376 do_op_noni:
2377 sbiw z_pcl,1 ;--z_pc
2378 ret
2379
2380 checkspace PC, 16
2381
2382 do_fetch_dir8_2:
2383 movw xl,z_pcl
2384 adiw xl,1
2385 mem_read_d opl
2386 ret
2387
2388 checkspace PC, 5
2389
2390 do_fetch_xh:
2391 sbis flags,prefixfd
2392 ldd opl,y+oz_xh
2393 sbic flags,prefixfd
2394 ldd opl,y+oz_yh
2395 ret
2396
2397 checkspace PC, 5
2398
2399 do_fetch_xl:
2400 sbis flags,prefixfd
2401 ldd opl,y+oz_xl
2402 sbic flags,prefixfd
2403 ldd opl,y+oz_yl
2404 ret
2405
2406
2407 checkspace PC, 41
2408
2409 do_fetch_mxx:
2410 sbic flags,prefixfd
2411 rjmp fetchmxx_fd
2412 ldd xh,y+oz_xh
2413 ldd xl,y+oz_xl
2414 rjmp fetchmxx1
2415 fetchmxx_fd:
2416 ldd xh,y+oz_yh
2417 ldd xl,y+oz_yl
2418 fetchmxx1:
2419 mem_read_ds opl, z_pc ;get displacement
2420 adiw z_pcl,1
2421 clr oph ;sign extend
2422 tst opl
2423 brpl fetchmxx2
2424 com oph
2425 fetchmxx2:
2426 add xl,opl ;add displacement
2427 adc xh,oph
2428 mem_read_d opl ;get operand
2429 ret ;(Ix+d) still in xl,xh
2430
2431
2432 checkspace PC, 8
2433
2434 do_fetch_xx:
2435 sbic flags,prefixfd
2436 rjmp fetchxx_fd
2437 ldd opl,y+oz_xl
2438 ldd oph,y+oz_xh
2439 ret
2440 fetchxx_fd:
2441 ldd opl,y+oz_yl
2442 ldd oph,y+oz_yh
2443 ret
2444
2445 checkspace PC, 5
2446
2447 do_store_xh:
2448 sbis flags,prefixfd
2449 std y+oz_xh,opl
2450 sbic flags,prefixfd
2451 std y+oz_yh,opl
2452 ret
2453
2454 checkspace PC, 5
2455
2456 do_store_xl:
2457 sbis flags,prefixfd
2458 std y+oz_xl,opl
2459 sbic flags,prefixfd
2460 std y+oz_yl,opl
2461 ret
2462
2463 checkspace PC, 37
2464
2465 do_store_mxx:
2466 sbic flags,prefixfd
2467 rjmp storemxx_fd
2468 ldd xh,y+oz_xh
2469 ldd xl,y+oz_xl
2470 rjmp storemxx1
2471 storemxx_fd:
2472 ldd xh,y+oz_yh
2473 ldd xl,y+oz_yl
2474 storemxx1:
2475 mem_read_s z_pc ;get displacement
2476 adiw z_pcl,1
2477 clr temp2 ;sign extend
2478 tst temp
2479 brpl storemxx2
2480 com temp2
2481 storemxx2:
2482 add xl,temp ;add displacement
2483 adc xh,temp2
2484 mem_write_s opl ;store operand
2485 ret
2486
2487 checkspace PC, 10
2488
2489 do_store_mxx_0:
2490 mem_write_s opl ;store operand
2491 ret
2492
2493 checkspace PC, 38
2494
2495 do_store_mxx_2:
2496 sbic flags,prefixfd
2497 rjmp storemxx2_fd
2498 ldd xh,y+oz_xh
2499 ldd xl,y+oz_xl
2500 rjmp storemxx21
2501 storemxx2_fd:
2502 ldd xh,y+oz_yh
2503 ldd xl,y+oz_yl
2504 storemxx21:
2505 mem_read_s z_pc ;get displacement
2506 adiw z_pcl,1
2507 adiw z_pcl,1
2508 clr temp2 ;sign extend
2509 tst temp
2510 brpl storemxx22
2511 com temp2
2512 storemxx22:
2513 add xl,temp ;add displacement
2514 adc xh,temp2
2515 mem_write_s opl ;store operand
2516 ret
2517
2518 checkspace PC, 8
2519
2520 do_store_xx:
2521 sbic flags,prefixfd
2522 rjmp storexx_fd
2523 std y+oz_xl,opl
2524 std y+oz_xh,oph
2525 ret
2526 storexx_fd:
2527 std y+oz_yl,opl
2528 std y+oz_yh,oph
2529 ret
2530
2531 ;----------------------------------------------------------------
2532 ;|Mnemonic |SZHPNC|Description |Notes |
2533 ;----------------------------------------------------------------
2534 ;|LD dst,src|------|Load |dst=src |
2535 ;
2536
2537 checkspace PC, 30
2538
2539 do_op_stxx: ;store xx to mem loc in opl:h
2540
2541 movw xl,opl
2542 sbis flags,prefixfd
2543 ldd temp,y+oz_xl
2544 sbic flags,prefixfd
2545 ldd temp,y+oz_yl
2546 mem_write
2547 adiw xl,1
2548 sbis flags,prefixfd
2549 ldd temp,y+oz_xh
2550 sbic flags,prefixfd
2551 ldd temp,y+oz_yh
2552 mem_write
2553 ret
2554
2555
2556 ;----------------------------------------------------------------
2557 ;|Mnemonic |SZHPNC|Description |Notes |
2558 ;----------------------------------------------------------------
2559 ;|EX [SP],IX|------|Exchange |[SP]<->IX |
2560 ;|EX [SP],IY|------|Exchange |[SP]<->IY |
2561 ;
2562 checkspace PC, 13
2563
2564 do_op_EXxx:
2565 sbic flags,prefixfd
2566 rjmp opexxx_fd
2567 ldd temp,y+oz_xl
2568 ldd temp2,y+oz_xh
2569 std y+oz_xl,opl
2570 std y+oz_xh,oph
2571 rjmp opexxxe
2572 opexxx_fd:
2573 ldd temp,y+oz_yl
2574 ldd temp2,y+oz_yh
2575 std y+oz_yl,opl
2576 std y+oz_yh,oph
2577 opexxxe:
2578 movw opl,temp
2579 ret
2580
2581 ;----------------------------------------------------------------
2582 ;|Mnemonic |SZHPNC|Description |Notes |
2583 ;----------------------------------------------------------------
2584 ;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
2585 ;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
2586 ;
2587
2588 checkspace PC, 25
2589
2590 do_op_addxx:
2591 sbic flags,prefixfd
2592 rjmp opadx_fd
2593 ldd temp,y+oz_xl
2594 ldd temp2,y+oz_xh
2595 add opl,temp
2596 adc oph,temp2
2597 std y+oz_xl,opl
2598 std y+oz_xh,oph
2599 rjmp opadx_e
2600 opadx_fd:
2601 ldd temp,y+oz_yl
2602 ldd temp2,y+oz_yh
2603 add opl,temp
2604 adc oph,temp2
2605 std y+oz_yl,opl
2606 std y+oz_yh,oph
2607 opadx_e:
2608 in temp,sreg
2609 bmov z_flags,ZFL_C, temp,AVR_C
2610 do_z80_flags_H
2611 do_z80_flags_clear_N
2612 ret
2613
2614
2615 opctable DDFDjmp, PC ;+256
2616
2617 instr fetch_nop, op_noni, store_nop ;00 ;
2618 instr fetch_nop, op_noni, store_nop ;01 ;
2619 instr fetch_nop, op_noni, store_nop ;02 ;
2620 instr fetch_nop, op_noni, store_nop ;03 ;
2621 instr fetch_nop, op_noni, store_nop ;04 ;
2622 instr fetch_nop, op_noni, store_nop ;05 ;
2623 instr fetch_nop, op_noni, store_nop ;06 ;
2624 instr fetch_nop, op_noni, store_nop ;07 ;
2625 instr fetch_nop, op_noni, store_nop ;08 ;
2626 instr fetch_BC, op_ADDxx, store_nop ;09 ;ADD xx,BC
2627 instr fetch_nop, op_noni, store_nop ;0A ;
2628 instr fetch_nop, op_noni, store_nop ;0B ;
2629 instr fetch_nop, op_noni, store_nop ;0C ;
2630 instr fetch_nop, op_noni, store_nop ;0D ;
2631 instr fetch_nop, op_noni, store_nop ;0E ;
2632 instr fetch_nop, op_noni, store_nop ;0F ;
2633 instr fetch_nop, op_noni, store_nop ;10 ;
2634 instr fetch_nop, op_noni, store_nop ;11 ;
2635 instr fetch_nop, op_noni, store_nop ;12 ;
2636 instr fetch_nop, op_noni, store_nop ;13 ;
2637 instr fetch_nop, op_noni, store_nop ;14 ;
2638 instr fetch_nop, op_noni, store_nop ;15 ;
2639 instr fetch_nop, op_noni, store_nop ;16 ;
2640 instr fetch_nop, op_noni, store_nop ;17 ;
2641 instr fetch_nop, op_noni, store_nop ;18 ;
2642 instr fetch_DE, op_ADDxx, store_nop ;19 ;ADD xx,DE
2643 instr fetch_nop, op_noni, store_nop ;1A ;
2644 instr fetch_nop, op_noni, store_nop ;1B ;
2645 instr fetch_nop, op_noni, store_nop ;1C ;
2646 instr fetch_nop, op_noni, store_nop ;1D ;
2647 instr fetch_nop, op_noni, store_nop ;1E ;
2648 instr fetch_nop, op_noni, store_nop ;1F ;
2649 instr fetch_nop, op_noni, store_nop ;20 ;
2650 instr fetch_DIR16, op_nop, store_xx ;21 ;LD xx,nn
2651 instr fetch_DIR16, op_STxx, store_nop ;22 ;LD (nn),xx
2652 instr fetch_xx, op_INC16, store_xx ;23 ;INC xx
2653 instr fetch_xH, op_INC, store_xH ;24 ;INC xh
2654 instr fetch_xH, op_DEC, store_xH ;25 ;DEC xh
2655 instr fetch_DIR8, op_nop, store_xH ;26 ;LD xh,n
2656 instr fetch_nop, op_noni, store_nop ;27 ;
2657 instr fetch_nop, op_noni, store_nop ;28 ;
2658 instr fetch_xx, op_ADDxx, store_nop ;29 ;ADD xx,xx
2659 instr fetch_DIR16, op_RMEM16, store_xx ;2A ;LD xx,(nn)
2660 instr fetch_xx, op_DEC16, store_xx ;2B ;DEC xx
2661 instr fetch_xL, op_INC, store_xL ;2C ;INC xl
2662 instr fetch_xL, op_DEC, store_xL ;2D ;DEC xl
2663 instr fetch_DIR8, op_nop, store_xL ;2E ;LD xl,n
2664 instr fetch_nop, op_noni, store_nop ;2F ;
2665 instr fetch_nop, op_noni, store_nop ;30 ;
2666 instr fetch_nop, op_noni, store_nop ;31 ;
2667 instr fetch_nop, op_noni, store_nop ;32 ;
2668 instr fetch_nop, op_noni, store_nop ;33 ;
2669 instr fetch_MXX, op_INC, store_MXX_0 ;34 ;INC (xx+d)
2670 instr fetch_MXX, op_DEC, store_MXX_0 ;35 ;DEC (xx+d)
2671 instr fetch_DIR8_2, op_nop, store_MXX_2 ;36 ;LD (xx+d),n
2672 instr fetch_nop, op_noni, store_nop ;37 ;
2673 instr fetch_nop, op_noni, store_nop ;38 ;
2674 instr fetch_SP, op_ADDxx, store_nop ;39 ;ADD xx,SP
2675 instr fetch_nop, op_noni, store_nop ;3A ;
2676 instr fetch_nop, op_noni, store_nop ;3B ;
2677 instr fetch_nop, op_noni, store_nop ;3C ;
2678 instr fetch_nop, op_noni, store_nop ;3D ;
2679 instr fetch_nop, op_noni, store_nop ;3E ;
2680 instr fetch_nop, op_noni, store_nop ;3F ;
2681 instr fetch_nop, op_noni, store_nop ;40 ;
2682 instr fetch_nop, op_noni, store_nop ;41 ;
2683 instr fetch_nop, op_noni, store_nop ;42 ;
2684 instr fetch_nop, op_noni, store_nop ;43 ;
2685 instr fetch_xH, op_nop, store_B ;44 ;LD B,xh
2686 instr fetch_xL, op_nop, store_B ;45 ;LD B,xl
2687 instr fetch_MXX, op_nop, store_B ;46 ;LD B,(xx+d)
2688 instr fetch_nop, op_noni, store_nop ;47 ;
2689 instr fetch_nop, op_noni, store_nop ;48 ;
2690 instr fetch_nop, op_noni, store_nop ;49 ;
2691 instr fetch_nop, op_noni, store_nop ;4A ;
2692 instr fetch_nop, op_noni, store_nop ;4B ;
2693 instr fetch_xH, op_nop, store_C ;4C ;LD C,xh
2694 instr fetch_xL, op_nop, store_C ;4D ;LD C,xl
2695 instr fetch_MXX, op_nop, store_C ;4E ;LD C,(xx+d)
2696 instr fetch_nop, op_noni, store_nop ;4F ;
2697 instr fetch_nop, op_noni, store_nop ;50 ;
2698 instr fetch_nop, op_noni, store_nop ;51 ;
2699 instr fetch_nop, op_noni, store_nop ;52 ;
2700 instr fetch_nop, op_noni, store_nop ;53 ;
2701 instr fetch_xH, op_nop, store_D ;54 ;LD D,xh
2702 instr fetch_xL, op_nop, store_D ;55 ;LD D,xl
2703 instr fetch_MXX, op_nop, store_D ;56 ;LD D,(xx+d)
2704 instr fetch_nop, op_noni, store_nop ;57 ;
2705 instr fetch_nop, op_noni, store_nop ;58 ;
2706 instr fetch_nop, op_noni, store_nop ;59 ;
2707 instr fetch_nop, op_noni, store_nop ;5A ;
2708 instr fetch_nop, op_noni, store_nop ;5B ;
2709 instr fetch_xH, op_nop, store_E ;5C ;LD E,xh
2710 instr fetch_xL, op_nop, store_E ;5D ;LD E,xl
2711 instr fetch_MXX, op_nop, store_E ;5E ;LD E,(xx+d)
2712 instr fetch_nop, op_noni, store_nop ;5F ;
2713 instr fetch_B, op_nop, store_xH ;60 ;LD xh,B
2714 instr fetch_C, op_nop, store_xH ;61 ;LD xh,C
2715 instr fetch_D, op_nop, store_xH ;62 ;LD xh,D
2716 instr fetch_E, op_nop, store_xH ;63 ;LD xh,E
2717 instr fetch_nop, op_noni, store_nop ;64 ;LD xh,xh
2718 instr fetch_xL, op_nop, store_xH ;65 ;LD xh,xl
2719 instr fetch_MXX, op_nop, store_H ;66 ;LD H,(xx+d)
2720 instr fetch_A, op_nop, store_xH ;67 ;LD xh,A
2721 instr fetch_B, op_nop, store_xL ;68 ;LD xl,B
2722 instr fetch_C, op_nop, store_xL ;69 ;LD xl,C
2723 instr fetch_D, op_nop, store_xL ;6A ;LD xl,D
2724 instr fetch_E, op_nop, store_xL ;6B ;LD xl,E
2725 instr fetch_xH, op_nop, store_xL ;6C ;LD xl,xh
2726 instr fetch_nop, op_noni, store_nop ;6D ;LD xl,xl
2727 instr fetch_MXX, op_nop, store_L ;6E ;LD L,(xx+d)
2728 instr fetch_A, op_nop, store_xL ;6F ;LD xl,A
2729 instr fetch_B, op_nop, store_MXX ;70 ;LD (xx+d),B
2730 instr fetch_C, op_nop, store_MXX ;71 ;LD (xx+d),C
2731 instr fetch_D, op_nop, store_MXX ;72 ;LD (xx+d),D
2732 instr fetch_E, op_nop, store_MXX ;73 ;LD (xx+d),E
2733 instr fetch_H, op_nop, store_MXX ;74 ;LD (xx+d),H
2734 instr fetch_L, op_nop, store_MXX ;75 ;LD (xx+d),L
2735 instr fetch_nop, op_noni, store_nop ;76 ;
2736 instr fetch_A, op_nop, store_MXX ;77 ;LD (xx+d),A
2737 instr fetch_nop, op_noni, store_nop ;78 ;
2738 instr fetch_nop, op_noni, store_nop ;79 ;
2739 instr fetch_nop, op_noni, store_nop ;7A ;
2740 instr fetch_nop, op_noni, store_nop ;7B ;
2741 instr fetch_xH, op_nop, store_A ;7C ;LD A,xh
2742 instr fetch_xL, op_nop, store_A ;7D ;LD A,xl
2743 instr fetch_MXX, op_nop, store_A ;7E ;LD A,(xx+d)
2744 instr fetch_nop, op_noni, store_nop ;7F ;
2745 instr fetch_nop, op_noni, store_nop ;80 ;
2746 instr fetch_nop, op_noni, store_nop ;81 ;
2747 instr fetch_nop, op_noni, store_nop ;82 ;
2748 instr fetch_nop, op_noni, store_nop ;83 ;
2749 instr fetch_xH, op_ADDA, store_nop ;84 ;ADD A,xh
2750 instr fetch_xL, op_ADDA, store_nop ;85 ;ADD A,xl
2751 instr fetch_MXX, op_ADDA, store_nop ;86 ;ADD A,(xx)
2752 instr fetch_nop, op_noni, store_nop ;87 ;
2753 instr fetch_nop, op_noni, store_nop ;88 ;
2754 instr fetch_nop, op_noni, store_nop ;89 ;
2755 instr fetch_nop, op_noni, store_nop ;8A ;
2756 instr fetch_nop, op_noni, store_nop ;8B ;
2757 instr fetch_xH, op_ADCA, store_nop ;8C ;ADC A,xh
2758 instr fetch_xL, op_ADCA, store_nop ;8D ;ADC A,xl
2759 instr fetch_MXX, op_ADCA, store_nop ;8E ;ADC A,(xx)
2760 instr fetch_nop, op_noni, store_nop ;8F ;
2761 instr fetch_nop, op_noni, store_nop ;90 ;
2762 instr fetch_nop, op_noni, store_nop ;91 ;
2763 instr fetch_nop, op_noni, store_nop ;92 ;
2764 instr fetch_nop, op_noni, store_nop ;93 ;
2765 instr fetch_xH, op_SUBFA, store_nop ;94 ;SUB A,xh
2766 instr fetch_xL, op_SUBFA, store_nop ;95 ;SUB A,xl
2767 instr fetch_MXX, op_SUBFA, store_nop ;96 ;SUB A,(xx)
2768 instr fetch_nop, op_noni, store_nop ;97 ;
2769 instr fetch_nop, op_noni, store_nop ;98 ;
2770 instr fetch_nop, op_noni, store_nop ;99 ;
2771 instr fetch_nop, op_noni, store_nop ;9A ;
2772 instr fetch_nop, op_noni, store_nop ;9B ;
2773 instr fetch_xH, op_SBCFA, store_nop ;9C ;SBC A,xh
2774 instr fetch_xL, op_SBCFA, store_nop ;9D ;SBC A,xl
2775 instr fetch_MXX, op_SBCFA, store_nop ;9E ;SBC A,(xx)
2776 instr fetch_nop, op_noni, store_nop ;9F ;
2777 instr fetch_nop, op_noni, store_nop ;A0 ;
2778 instr fetch_nop, op_noni, store_nop ;A1 ;
2779 instr fetch_nop, op_noni, store_nop ;A2 ;
2780 instr fetch_nop, op_noni, store_nop ;A3 ;
2781 instr fetch_xH, op_ANDA, store_nop ;A4 ;AND A,xh
2782 instr fetch_xL, op_ANDA, store_nop ;A5 ;AND A,xl
2783 instr fetch_MXX, op_ANDA, store_nop ;A6 ;AND A,(xx)
2784 instr fetch_nop, op_noni, store_nop ;A7 ;
2785 instr fetch_nop, op_noni, store_nop ;A8 ;
2786 instr fetch_nop, op_noni, store_nop ;A9 ;
2787 instr fetch_nop, op_noni, store_nop ;AA ;
2788 instr fetch_nop, op_noni, store_nop ;AB ;
2789 instr fetch_xH, op_XORA, store_nop ;AC ;XOR A,xh
2790 instr fetch_xL, op_XORA, store_nop ;AD ;XOR A,xl
2791 instr fetch_MXX, op_XORA, store_nop ;AE ;XOR A,(xx)
2792 instr fetch_nop, op_noni, store_nop ;AF ;
2793 instr fetch_nop, op_noni, store_nop ;B0 ;
2794 instr fetch_nop, op_noni, store_nop ;B1 ;
2795 instr fetch_nop, op_noni, store_nop ;B2 ;
2796 instr fetch_nop, op_noni, store_nop ;B3 ;
2797 instr fetch_xH, op_ORA, store_nop ;B4 ;OR A,xh
2798 instr fetch_xL, op_ORA, store_nop ;B5 ;OR A,xl
2799 instr fetch_MXX, op_ORA, store_nop ;B6 ;OR A,(xx)
2800 instr fetch_nop, op_noni, store_nop ;B7 ;
2801 instr fetch_nop, op_noni, store_nop ;B8 ;
2802 instr fetch_nop, op_noni, store_nop ;B9 ;
2803 instr fetch_nop, op_noni, store_nop ;BA ;
2804 instr fetch_nop, op_noni, store_nop ;BB ;
2805 instr fetch_xH, op_CPFA, store_nop ;BC ;CP A,xh
2806 instr fetch_xL, op_CPFA, store_nop ;BD ;CP A,xl
2807 instr fetch_MXX, op_CPFA, store_nop ;BE ;CP A,(xx)
2808 instr fetch_nop, op_noni, store_nop ;BF ;
2809 instr fetch_nop, op_noni, store_nop ;C0 ;
2810 instr fetch_nop, op_noni, store_nop ;C1 ;
2811 instr fetch_nop, op_noni, store_nop ;C2 ;
2812 instr fetch_nop, op_noni, store_nop ;C3 ;
2813 instr fetch_nop, op_noni, store_nop ;C4 ;
2814 instr fetch_nop, op_noni, store_nop ;C5 ;
2815 instr fetch_nop, op_noni, store_nop ;C6 ;
2816 instr fetch_nop, op_noni, store_nop ;C7 ;
2817 instr fetch_nop, op_noni, store_nop ;C8 ;
2818 instr fetch_nop, op_noni, store_nop ;C9 ;
2819 instr fetch_nop, op_noni, store_nop ;CA ;
2820 instr fetch_nop, op_prefixDDFDCB,store_nop ;CB ;
2821 instr fetch_nop, op_noni, store_nop ;CC ;
2822 instr fetch_nop, op_noni, store_nop ;CD ;
2823 instr fetch_nop, op_noni, store_nop ;CE ;
2824 instr fetch_nop, op_noni, store_nop ;CF ;
2825 instr fetch_nop, op_noni, store_nop ;D0 ;
2826 instr fetch_nop, op_noni, store_nop ;D1 ;
2827 instr fetch_nop, op_noni, store_nop ;D2 ;
2828 instr fetch_nop, op_noni, store_nop ;D3 ;
2829 instr fetch_nop, op_noni, store_nop ;D4 ;
2830 instr fetch_nop, op_noni, store_nop ;D5 ;
2831 instr fetch_nop, op_noni, store_nop ;D6 ;
2832 instr fetch_nop, op_noni, store_nop ;D7 ;
2833 instr fetch_nop, op_noni, store_nop ;D8 ;
2834 instr fetch_nop, op_noni, store_nop ;D9 ;
2835 instr fetch_nop, op_noni, store_nop ;DA ;
2836 instr fetch_nop, op_noni, store_nop ;DB ;
2837 instr fetch_nop, op_noni, store_nop ;DC ;
2838 instr fetch_nop, op_noni, store_nop ;DD ;
2839 instr fetch_nop, op_noni, store_nop ;DE ;
2840 instr fetch_nop, op_noni, store_nop ;DF ;
2841 instr fetch_nop, op_noni, store_nop ;E0 ;
2842 instr fetch_nop, op_POP16, store_xx ;E1 ;POP xx
2843 instr fetch_nop, op_noni, store_nop ;E2 ;
2844 instr fetch_MSP, op_EXxx, store_MSP ;E3 ;EX (SP),xx
2845 instr fetch_nop, op_noni, store_nop ;E4 ;
2846 instr fetch_xx, op_PUSH16, store_nop ;E5 ;PUSH xx
2847 instr fetch_nop, op_noni, store_nop ;E6 ;
2848 instr fetch_nop, op_noni, store_nop ;E7 ;
2849 instr fetch_nop, op_noni, store_nop ;E8 ;
2850 instr fetch_xx, op_nop, store_PC ;E9 ;JP xx
2851 instr fetch_nop, op_noni, store_nop ;EA ;
2852 instr fetch_nop, op_noni, store_nop ;EB ;
2853 instr fetch_nop, op_noni, store_nop ;EC ;
2854 instr fetch_nop, op_noni, store_nop ;ED ;
2855 instr fetch_nop, op_noni, store_nop ;EE ;
2856 instr fetch_nop, op_noni, store_nop ;EF ;
2857 instr fetch_nop, op_noni, store_nop ;F0 ;
2858 instr fetch_nop, op_noni, store_nop ;F1 ;
2859 instr fetch_nop, op_noni, store_nop ;F2 ;
2860 instr fetch_nop, op_noni, store_nop ;F3 ;
2861 instr fetch_nop, op_noni, store_nop ;F4 ;
2862 instr fetch_nop, op_noni, store_nop ;F5 ;
2863 instr fetch_nop, op_noni, store_nop ;F6 ;
2864 instr fetch_nop, op_noni, store_nop ;F7 ;
2865 instr fetch_nop, op_noni, store_nop ;F8 ;
2866 instr fetch_xx, op_nop, store_SP ;F9 ;LD SP,xx
2867 instr fetch_nop, op_noni, store_nop ;FA ;
2868 instr fetch_nop, op_noni, store_nop ;FB ;
2869 instr fetch_nop, op_noni, store_nop ;FC ;
2870 instr fetch_nop, op_noni, store_nop ;FD ;
2871 instr fetch_nop, op_noni, store_nop ;FE ;
2872 instr fetch_nop, op_noni, store_nop ;FF ;
2873
2874
2875
2876 ;----------------------------------------------------------------
2877 ;|Mnemonic |SZHPNC|Description |Notes |
2878 ;----------------------------------------------------------------
2879 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
2880 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
2881 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
2882 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
2883 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
2884 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
2885 ;|SLL m |**0P0*|Shift Right Logical |
2886 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
2887
2888
2889 checkspace PC, 9
2890
2891 do_op_rlc:
2892 ;Rotate Left Cyclical. All bits move 1 to the
2893 ;left, the msb becomes c and lsb.
2894 clr temp
2895 lsl opl
2896 adc temp,_0
2897 or opl,temp
2898 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2899 or z_flags,temp
2900 ret
2901
2902 checkspace PC, 9
2903
2904 do_op_rrc:
2905 ;Rotate Right Cyclical. All bits move 1 to the
2906 ;right, the lsb becomes c and msb.
2907 lsr opl
2908 brcc PC+2
2909 ori opl,0x80
2910 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2911 bmov z_flags,ZFL_C, opl,7
2912 ret
2913
2914
2915 checkspace PC, 11
2916
2917 do_op_rl:
2918 ;Rotate Left. All bits move 1 to the left, the msb
2919 ;becomes c, c becomes lsb.
2920 clc
2921 sbrc z_flags,ZFL_C
2922 sec
2923 rol opl
2924 in temp,sreg
2925 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2926 bmov z_flags,ZFL_C, temp,AVR_C
2927 ret
2928
2929
2930 checkspace PC, 10
2931
2932 do_op_rr:
2933 ;Rotate Right. All bits move 1 to the right, the lsb
2934 ;becomes c, c becomes msb.
2935
2936 ror opl
2937 in temp,sreg ;CY
2938 bmov opl,7, z_flags,ZFL_C ;old CY --> Bit 7
2939 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2940 bmov z_flags,ZFL_C, temp,AVR_C ;
2941 ret
2942
2943 checkspace PC, 9
2944
2945 do_op_sla:
2946 lsl opl
2947 in temp,sreg
2948 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2949 bmov z_flags,ZFL_C, temp,AVR_C ;
2950 ret
2951
2952 checkspace PC, 11
2953
2954 do_op_sra:
2955 lsr opl
2956 in temp,sreg
2957 bmov opl,7, opl,6 ;old CY --> Bit 7
2958 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2959 bmov z_flags,ZFL_C, temp,AVR_C ;
2960 ret
2961
2962 checkspace PC, 9
2963
2964 do_op_sll:
2965 sec
2966 rol opl
2967 in temp,sreg
2968 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2969 bmov z_flags,ZFL_C, temp,AVR_C ;
2970 ret
2971
2972 checkspace PC, 8
2973
2974 do_op_srl:
2975 lsr opl
2976 in temp,sreg
2977 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2978 bmov z_flags,ZFL_C, temp,AVR_C ;
2979 ret
2980
2981 ;----------------------------------------------------------------
2982 ;|Mnemonic |SZHPNC|Description |Notes |
2983 ;----------------------------------------------------------------
2984 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
2985 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
2986 ;|SET b,m |------|Set bit |m=mv{2^b} |
2987
2988
2989 checkspace PC, 2
2990 do_op_BIT7:
2991 ldi temp,0x80
2992 rjmp opbit
2993 checkspace PC, 2
2994 do_op_BIT6:
2995 ldi temp,0x40
2996 rjmp opbit
2997 checkspace PC, 2
2998 do_op_BIT5:
2999 ldi temp,0x20
3000 rjmp opbit
3001 checkspace PC, 2
3002 do_op_BIT4:
3003 ldi temp,0x10
3004 rjmp opbit
3005 checkspace PC, 2
3006 do_op_BIT3:
3007 ldi temp,0x08
3008 rjmp opbit
3009 checkspace PC, 2
3010 do_op_BIT2:
3011 ldi temp,0x04
3012 rjmp opbit
3013 checkspace PC, 2
3014 do_op_BIT1:
3015 ldi temp,0x02
3016 rjmp opbit
3017
3018 checkspace PC, 7
3019 do_op_BIT0:
3020 ldi temp,0x01
3021 opbit:
3022 andi z_flags,~((1<<ZFL_N)|(1<<ZFL_Z))
3023 ori z_flags,(1<<ZFL_H)
3024 and temp,opl
3025 brne opbite
3026 ori z_flags,(1<<ZFL_Z)
3027 opbite:
3028 ret
3029
3030
3031 .macro m_do_op_RES7
3032 andi opl,~0x80
3033 .endm
3034 .equ do_op_RES7 = 0
3035 ; andi opl,~0x80
3036 ; ret
3037
3038 .macro m_do_op_RES6
3039 andi opl,~0x40
3040 .endm
3041 .equ do_op_RES6 = 0
3042 ; andi opl,~0x40
3043 ; ret
3044
3045 .macro m_do_op_RES5
3046 andi opl,~0x20
3047 .endm
3048 .equ do_op_RES5 = 0
3049 ; andi opl,~0x20
3050 ; ret
3051
3052 .macro m_do_op_RES4
3053 andi opl,~0x10
3054 .endm
3055 .equ do_op_RES4 = 0
3056 ; andi opl,~0x10
3057 ; ret
3058
3059 .macro m_do_op_RES3
3060 andi opl,~0x08
3061 .endm
3062 .equ do_op_RES3 = 0
3063 ; andi opl,~0x08
3064 ; ret
3065
3066 .macro m_do_op_RES2
3067 andi opl,~0x04
3068 .endm
3069 .equ do_op_RES2 = 0
3070 ; andi opl,~0x04
3071 ; ret
3072
3073 .macro m_do_op_RES1
3074 andi opl,~0x02
3075 .endm
3076 .equ do_op_RES1 = 0
3077 ; andi opl,~0x02
3078 ; ret
3079
3080 .macro m_do_op_RES0
3081 andi opl,~0x01
3082 .endm
3083 .equ do_op_RES0 = 0
3084 ; andi opl,~0x01
3085 ; ret
3086
3087 .macro m_do_op_SET7
3088 ori opl,0x80
3089 .endm
3090 .equ do_op_SET7 = 0
3091 ; ori opl,0x80
3092 ; ret
3093
3094 .macro m_do_op_SET6
3095 ori opl,0x40
3096 .endm
3097 .equ do_op_SET6 = 0
3098 ; ori opl,0x40
3099 ; ret
3100
3101 .macro m_do_op_SET5
3102 ori opl,0x20
3103 .endm
3104 .equ do_op_SET5 = 0
3105 ; ori opl,0x20
3106 ; ret
3107
3108 .macro m_do_op_SET4
3109 ori opl,0x10
3110 .endm
3111 .equ do_op_SET4 = 0
3112 ; ori opl,0x10
3113 ; ret
3114
3115 .macro m_do_op_SET3
3116 ori opl,0x08
3117 .endm
3118 .equ do_op_SET3 = 0
3119 ; ori opl,0x08
3120 ; ret
3121
3122 .macro m_do_op_SET2
3123 ori opl,0x04
3124 .endm
3125 .equ do_op_SET2 = 0
3126 ; ori opl,0x04
3127 ; ret
3128
3129 .macro m_do_op_SET1
3130 ori opl,0x02
3131 .endm
3132 .equ do_op_SET1 = 0
3133 ; ori opl,0x02
3134 ; ret
3135
3136 .macro m_do_op_SET0
3137 ori opl,0x01
3138 .endm
3139 .equ do_op_SET0 = 0
3140 ; ori opl,0x01
3141 ; ret
3142
3143
3144 ;.macro m_do_store_b
3145 ; std y+oz_b,opl
3146 ;.endm
3147 ;.equ do_store_b = 0
3148 checkspace PC, 2
3149 do_store2_b:
3150 mov z_b,opl
3151 ret
3152
3153 checkspace PC, 2
3154 do_store2_c:
3155 mov z_c,opl
3156 ret
3157
3158 checkspace PC, 2
3159 do_store2_d:
3160 mov z_d,opl
3161 ret
3162
3163 checkspace PC, 2
3164 do_store2_e:
3165 mov z_e,opl
3166 ret
3167
3168 checkspace PC, 2
3169 do_store2_h:
3170 mov z_h,opl
3171 ret
3172
3173 checkspace PC, 2
3174 do_store2_l:
3175 mov z_l,opl
3176 ret
3177
3178 checkspace PC, 2
3179 do_store2_a:
3180 mov z_a,opl
3181 ret
3182
3183 checkspace PC, 4
3184 do_fetch2_mhl:
3185 ; movw x,z_l
3186 mem_read_ds opl, z_hl
3187 ret
3188
3189 opctable CBjmp, PC ;+256
3190
3191 instr fetch_B, op_RLC, store2_B ;00 ;RLC B
3192 instr fetch_C, op_RLC, store2_C ;01 ;RLC C
3193 instr fetch_D, op_RLC, store2_D ;02 ;RLC D
3194 instr fetch_E, op_RLC, store2_E ;03 ;RLC E
3195 instr fetch_H, op_RLC, store2_H ;04 ;RLC H
3196 instr fetch_L, op_RLC, store2_L ;05 ;RLC L
3197 instr fetch2_mhl, op_RLC, store_MHL ;06 ;RLC (HL)
3198 instr fetch_A, op_RLC, store2_A ;07 ;RLC A
3199 instr fetch_B, op_RRC, store2_B ;08 ;RRC B
3200 instr fetch_C, op_RRC, store2_C ;09 ;RRC C
3201 instr fetch_D, op_RRC, store2_D ;0A ;RRC D
3202 instr fetch_E, op_RRC, store2_E ;0B ;RRC E
3203 instr fetch_H, op_RRC, store2_H ;0C ;RRC H
3204 instr fetch_L, op_RRC, store2_L ;0D ;RRC L
3205 instr fetch2_mhl, op_RRC, store_MHL ;0E ;RRC (HL)
3206 instr fetch_A, op_RRC, store2_A ;0F ;RRC A
3207 instr fetch_B, op_RL, store2_B ;10 ;RL B
3208 instr fetch_C, op_RL, store2_C ;11 ;RL C
3209 instr fetch_D, op_RL, store2_D ;12 ;RL D
3210 instr fetch_E, op_RL, store2_E ;13 ;RL E
3211 instr fetch_H, op_RL, store2_H ;14 ;RL H
3212 instr fetch_L, op_RL, store2_L ;15 ;RL L
3213 instr fetch2_mhl, op_RL, store_MHL ;16 ;RL (HL)
3214 instr fetch_A, op_RL, store2_A ;17 ;RL A
3215 instr fetch_B, op_RR, store2_B ;18 ;RR B
3216 instr fetch_C, op_RR, store2_C ;19 ;RR C
3217 instr fetch_D, op_RR, store2_D ;1A ;RR D
3218 instr fetch_E, op_RR, store2_E ;1B ;RR E
3219 instr fetch_H, op_RR, store2_H ;1C ;RR H
3220 instr fetch_L, op_RR, store2_L ;1D ;RR L
3221 instr fetch2_mhl, op_RR, store_MHL ;1E ;RR (HL)
3222 instr fetch_A, op_RR, store2_A ;1F ;RR A
3223 instr fetch_B, op_SLA, store2_B ;20 ;SLA B
3224 instr fetch_C, op_SLA, store2_C ;21 ;SLA C
3225 instr fetch_D, op_SLA, store2_D ;22 ;SLA D
3226 instr fetch_E, op_SLA, store2_E ;23 ;SLA E
3227 instr fetch_H, op_SLA, store2_H ;24 ;SLA H
3228 instr fetch_L, op_SLA, store2_L ;25 ;SLA L
3229 instr fetch2_mhl, op_SLA, store_MHL ;26 ;SLA (HL)
3230 instr fetch_A, op_SLA, store2_A ;27 ;SLA A
3231 instr fetch_B, op_SRA, store2_B ;28 ;SRA B
3232 instr fetch_C, op_SRA, store2_C ;29 ;SRA C
3233 instr fetch_D, op_SRA, store2_D ;2A ;SRA D
3234 instr fetch_E, op_SRA, store2_E ;2B ;SRA E
3235 instr fetch_H, op_SRA, store2_H ;2C ;SRA H
3236 instr fetch_L, op_SRA, store2_L ;2D ;SRA L
3237 instr fetch2_mhl, op_SRA, store_MHL ;2E ;SRA (HL)
3238 instr fetch_A, op_SRA, store2_A ;2F ;SRA A
3239 instr fetch_B, op_SLL, store2_B ;30 ;SLL B
3240 instr fetch_C, op_SLL, store2_C ;31 ;SLL C
3241 instr fetch_D, op_SLL, store2_D ;32 ;SLL D
3242 instr fetch_E, op_SLL, store2_E ;33 ;SLL E
3243 instr fetch_H, op_SLL, store2_H ;34 ;SLL H
3244 instr fetch_L, op_SLL, store2_L ;35 ;SLL L
3245 instr fetch2_mhl, op_SLL, store_MHL ;36 ;SLL (HL)
3246 instr fetch_A, op_SLL, store2_A ;37 ;SLL A
3247 instr fetch_B, op_SRL, store2_B ;38 ;SRL B
3248 instr fetch_C, op_SRL, store2_C ;39 ;SRL C
3249 instr fetch_D, op_SRL, store2_D ;3A ;SRL D
3250 instr fetch_E, op_SRL, store2_E ;3B ;SRL E
3251 instr fetch_H, op_SRL, store2_H ;3C ;SRL H
3252 instr fetch_L, op_SRL, store2_L ;3D ;SRL L
3253 instr fetch2_mhl, op_SRL, store_MHL ;3E ;SRL (HL)
3254 instr fetch_A, op_SRL, store2_A ;3F ;SRL A
3255 instr fetch_B, op_BIT0, store_nop ;40 ;BIT 0,B
3256 instr fetch_C, op_BIT0, store_nop ;41 ;BIT 0,C
3257 instr fetch_D, op_BIT0, store_nop ;42 ;BIT 0,D
3258 instr fetch_E, op_BIT0, store_nop ;43 ;BIT 0,E
3259 instr fetch_H, op_BIT0, store_nop ;44 ;BIT 0,H
3260 instr fetch_L, op_BIT0, store_nop ;45 ;BIT 0,L
3261 instr fetch2_mhl, op_BIT0, store_nop ;46 ;BIT 0,(HL)
3262 instr fetch_A, op_BIT0, store_nop ;47 ;BIT 0,A
3263 instr fetch_B, op_BIT1, store_nop ;48 ;BIT 1,B
3264 instr fetch_C, op_BIT1, store_nop ;49 ;BIT 1,C
3265 instr fetch_D, op_BIT1, store_nop ;4A ;BIT 1,D
3266 instr fetch_E, op_BIT1, store_nop ;4B ;BIT 1,E
3267 instr fetch_H, op_BIT1, store_nop ;4C ;BIT 1,H
3268 instr fetch_L, op_BIT1, store_nop ;4D ;BIT 1,L
3269 instr fetch2_mhl, op_BIT1, store_nop ;4E ;BIT 1,(HL)
3270 instr fetch_A, op_BIT1, store_nop ;4F ;BIT 1,A
3271 instr fetch_B, op_BIT2, store_nop ;50 ;BIT 2,B
3272 instr fetch_C, op_BIT2, store_nop ;51 ;BIT 2,C
3273 instr fetch_D, op_BIT2, store_nop ;52 ;BIT 2,D
3274 instr fetch_E, op_BIT2, store_nop ;53 ;BIT 2,E
3275 instr fetch_H, op_BIT2, store_nop ;54 ;BIT 2,H
3276 instr fetch_L, op_BIT2, store_nop ;55 ;BIT 2,L
3277 instr fetch2_mhl, op_BIT2, store_nop ;56 ;BIT 2,(HL)
3278 instr fetch_A, op_BIT2, store_nop ;57 ;BIT 2,A
3279 instr fetch_B, op_BIT3, store_nop ;58 ;BIT 3,B
3280 instr fetch_C, op_BIT3, store_nop ;59 ;BIT 3,C
3281 instr fetch_D, op_BIT3, store_nop ;5A ;BIT 3,D
3282 instr fetch_E, op_BIT3, store_nop ;5B ;BIT 3,E
3283 instr fetch_H, op_BIT3, store_nop ;5C ;BIT 3,H
3284 instr fetch_L, op_BIT3, store_nop ;5D ;BIT 3,L
3285 instr fetch2_mhl, op_BIT3, store_nop ;5E ;BIT 3,(HL)
3286 instr fetch_A, op_BIT3, store_nop ;5F ;BIT 3,A
3287 instr fetch_B, op_BIT4, store_nop ;60 ;BIT 4,B
3288 instr fetch_C, op_BIT4, store_nop ;61 ;BIT 4,C
3289 instr fetch_D, op_BIT4, store_nop ;62 ;BIT 4,D
3290 instr fetch_E, op_BIT4, store_nop ;63 ;BIT 4,E
3291 instr fetch_H, op_BIT4, store_nop ;64 ;BIT 4,H
3292 instr fetch_L, op_BIT4, store_nop ;65 ;BIT 4,L
3293 instr fetch2_mhl, op_BIT4, store_nop ;66 ;BIT 4,(HL)
3294 instr fetch_A, op_BIT4, store_nop ;67 ;BIT 4,A
3295 instr fetch_B, op_BIT5, store_nop ;68 ;BIT 5,B
3296 instr fetch_C, op_BIT5, store_nop ;69 ;BIT 5,C
3297 instr fetch_D, op_BIT5, store_nop ;6A ;BIT 5,D
3298 instr fetch_E, op_BIT5, store_nop ;6B ;BIT 5,E
3299 instr fetch_H, op_BIT5, store_nop ;6C ;BIT 5,H
3300 instr fetch_L, op_BIT5, store_nop ;6D ;BIT 5,L
3301 instr fetch2_mhl, op_BIT5, store_nop ;6E ;BIT 5,(HL)
3302 instr fetch_A, op_BIT5, store_nop ;6F ;BIT 5,A
3303 instr fetch_B, op_BIT6, store_nop ;70 ;BIT 6,B
3304 instr fetch_C, op_BIT6, store_nop ;71 ;BIT 6,C
3305 instr fetch_D, op_BIT6, store_nop ;72 ;BIT 6,D
3306 instr fetch_E, op_BIT6, store_nop ;73 ;BIT 6,E
3307 instr fetch_H, op_BIT6, store_nop ;74 ;BIT 6,H
3308 instr fetch_L, op_BIT6, store_nop ;75 ;BIT 6,L
3309 instr fetch2_mhl, op_BIT6, store_nop ;76 ;BIT 6,(HL)
3310 instr fetch_A, op_BIT6, store_nop ;77 ;BIT 6,A
3311 instr fetch_B, op_BIT7, store_nop ;78 ;BIT 7,B
3312 instr fetch_C, op_BIT7, store_nop ;79 ;BIT 7,C
3313 instr fetch_D, op_BIT7, store_nop ;7A ;BIT 7,D
3314 instr fetch_E, op_BIT7, store_nop ;7B ;BIT 7,E
3315 instr fetch_H, op_BIT7, store_nop ;7C ;BIT 7,H
3316 instr fetch_L, op_BIT7, store_nop ;7D ;BIT 7,L
3317 instr fetch2_mhl, op_BIT7, store_nop ;7E ;BIT 7,(HL)
3318 instr fetch_A, op_BIT7, store_nop ;7F ;BIT 7,A
3319 instr fetch_B, op_RES0, store2_B ;80 ;RES 0,B
3320 instr fetch_C, op_RES0, store2_C ;81 ;RES 0,C
3321 instr fetch_D, op_RES0, store2_D ;82 ;RES 0,D
3322 instr fetch_E, op_RES0, store2_E ;83 ;RES 0,E
3323 instr fetch_H, op_RES0, store2_H ;84 ;RES 0,H
3324 instr fetch_L, op_RES0, store2_L ;85 ;RES 0,L
3325 instr fetch2_mhl, op_RES0, store_MHL ;86 ;RES 0,(HL)
3326 instr fetch_A, op_RES0, store2_A ;87 ;RES 0,A
3327 instr fetch_B, op_RES1, store2_B ;88 ;RES 1,B
3328 instr fetch_C, op_RES1, store2_C ;89 ;RES 1,C
3329 instr fetch_D, op_RES1, store2_D ;8A ;RES 1,D
3330 instr fetch_E, op_RES1, store2_E ;8B ;RES 1,E
3331 instr fetch_H, op_RES1, store2_H ;8C ;RES 1,H
3332 instr fetch_L, op_RES1, store2_L ;8D ;RES 1,L
3333 instr fetch2_mhl, op_RES1, store_MHL ;8E ;RES 1,(HL)
3334 instr fetch_A, op_RES1, store2_A ;8F ;RES 1,A
3335 instr fetch_B, op_RES2, store2_B ;90 ;RES 2,B
3336 instr fetch_C, op_RES2, store2_C ;91 ;RES 2,C
3337 instr fetch_D, op_RES2, store2_D ;92 ;RES 2,D
3338 instr fetch_E, op_RES2, store2_E ;93 ;RES 2,E
3339 instr fetch_H, op_RES2, store2_H ;94 ;RES 2,H
3340 instr fetch_L, op_RES2, store2_L ;95 ;RES 2,L
3341 instr fetch2_mhl, op_RES2, store_MHL ;96 ;RES 2,(HL)
3342 instr fetch_A, op_RES2, store2_A ;97 ;RES 2,A
3343 instr fetch_B, op_RES3, store2_B ;98 ;RES 3,B
3344 instr fetch_C, op_RES3, store2_C ;99 ;RES 3,C
3345 instr fetch_D, op_RES3, store2_D ;9A ;RES 3,D
3346 instr fetch_E, op_RES3, store2_E ;9B ;RES 3,E
3347 instr fetch_H, op_RES3, store2_H ;9C ;RES 3,H
3348 instr fetch_L, op_RES3, store2_L ;9D ;RES 3,L
3349 instr fetch2_mhl, op_RES3, store_MHL ;9E ;RES 3,(HL)
3350 instr fetch_A, op_RES3, store2_A ;9F ;RES 3,A
3351 instr fetch_B, op_RES4, store2_B ;A0 ;RES 4,B
3352 instr fetch_C, op_RES4, store2_C ;A1 ;RES 4,C
3353 instr fetch_D, op_RES4, store2_D ;A2 ;RES 4,D
3354 instr fetch_E, op_RES4, store2_E ;A3 ;RES 4,E
3355 instr fetch_H, op_RES4, store2_H ;A4 ;RES 4,H
3356 instr fetch_L, op_RES4, store2_L ;A5 ;RES 4,L
3357 instr fetch2_mhl, op_RES4, store_MHL ;A6 ;RES 4,(HL)
3358 instr fetch_A, op_RES4, store2_A ;A7 ;RES 4,A
3359 instr fetch_B, op_RES5, store2_B ;A8 ;RES 5,B
3360 instr fetch_C, op_RES5, store2_C ;A9 ;RES 5,C
3361 instr fetch_D, op_RES5, store2_D ;AA ;RES 5,D
3362 instr fetch_E, op_RES5, store2_E ;AB ;RES 5,E
3363 instr fetch_H, op_RES5, store2_H ;AC ;RES 5,H
3364 instr fetch_L, op_RES5, store2_L ;AD ;RES 5,L
3365 instr fetch2_mhl, op_RES5, store_MHL ;AE ;RES 5,(HL)
3366 instr fetch_A, op_RES5, store2_A ;AF ;RES 5,A
3367 instr fetch_B, op_RES6, store2_B ;B0 ;RES 6,B
3368 instr fetch_C, op_RES6, store2_C ;B1 ;RES 6,C
3369 instr fetch_D, op_RES6, store2_D ;B2 ;RES 6,D
3370 instr fetch_E, op_RES6, store2_E ;B3 ;RES 6,E
3371 instr fetch_H, op_RES6, store2_H ;B4 ;RES 6,H
3372 instr fetch_L, op_RES6, store2_L ;B5 ;RES 6,L
3373 instr fetch2_mhl, op_RES6, store_MHL ;B6 ;RES 6,(HL)
3374 instr fetch_A, op_RES6, store2_A ;B7 ;RES 6,A
3375 instr fetch_B, op_RES7, store2_B ;B8 ;RES 7,B
3376 instr fetch_C, op_RES7, store2_C ;B9 ;RES 7,C
3377 instr fetch_D, op_RES7, store2_D ;BA ;RES 7,D
3378 instr fetch_E, op_RES7, store2_E ;BB ;RES 7,E
3379 instr fetch_H, op_RES7, store2_H ;BC ;RES 7,H
3380 instr fetch_L, op_RES7, store2_L ;BD ;RES 7,L
3381 instr fetch2_mhl, op_RES7, store_MHL ;BE ;RES 7,(HL)
3382 instr fetch_A, op_RES7, store2_A ;BF ;RES 7,A
3383 instr fetch_B, op_SET0, store2_B ;C0 ;SET 0,B
3384 instr fetch_C, op_SET0, store2_C ;C1 ;SET 0,C
3385 instr fetch_D, op_SET0, store2_D ;C2 ;SET 0,D
3386 instr fetch_E, op_SET0, store2_E ;C3 ;SET 0,E
3387 instr fetch_H, op_SET0, store2_H ;C4 ;SET 0,H
3388 instr fetch_L, op_SET0, store2_L ;C5 ;SET 0,L
3389 instr fetch2_mhl, op_SET0, store_MHL ;C6 ;SET 0,(HL)
3390 instr fetch_A, op_SET0, store2_A ;C7 ;SET 0,A
3391 instr fetch_B, op_SET1, store2_B ;C8 ;SET 1,B
3392 instr fetch_C, op_SET1, store2_C ;C9 ;SET 1,C
3393 instr fetch_D, op_SET1, store2_D ;CA ;SET 1,D
3394 instr fetch_E, op_SET1, store2_E ;CB ;SET 1,E
3395 instr fetch_H, op_SET1, store2_H ;CC ;SET 1,H
3396 instr fetch_L, op_SET1, store2_L ;CD ;SET 1,L
3397 instr fetch2_mhl, op_SET1, store_MHL ;CE ;SET 1,(HL)
3398 instr fetch_A, op_SET1, store2_A ;CF ;SET 1,A
3399 instr fetch_B, op_SET2, store2_B ;D0 ;SET 2,B
3400 instr fetch_C, op_SET2, store2_C ;D1 ;SET 2,C
3401 instr fetch_D, op_SET2, store2_D ;D2 ;SET 2,D
3402 instr fetch_E, op_SET2, store2_E ;D3 ;SET 2,E
3403 instr fetch_H, op_SET2, store2_H ;D4 ;SET 2,H
3404 instr fetch_L, op_SET2, store2_L ;D5 ;SET 2,L
3405 instr fetch2_mhl, op_SET2, store_MHL ;D6 ;SET 2,(HL)
3406 instr fetch_A, op_SET2, store2_A ;D7 ;SET 2,A
3407 instr fetch_B, op_SET3, store2_B ;D8 ;SET 3,B
3408 instr fetch_C, op_SET3, store2_C ;D9 ;SET 3,C
3409 instr fetch_D, op_SET3, store2_D ;DA ;SET 3,D
3410 instr fetch_E, op_SET3, store2_E ;DB ;SET 3,E
3411 instr fetch_H, op_SET3, store2_H ;DC ;SET 3,H
3412 instr fetch_L, op_SET3, store2_L ;DD ;SET 3,L
3413 instr fetch2_mhl, op_SET3, store_MHL ;DE ;SET 3,(HL)
3414 instr fetch_A, op_SET3, store2_A ;DF ;SET 3,A
3415 instr fetch_B, op_SET4, store2_B ;E0 ;SET 4,B
3416 instr fetch_C, op_SET4, store2_C ;E1 ;SET 4,C
3417 instr fetch_D, op_SET4, store2_D ;E2 ;SET 4,D
3418 instr fetch_E, op_SET4, store2_E ;E3 ;SET 4,E
3419 instr fetch_H, op_SET4, store2_H ;E4 ;SET 4,H
3420 instr fetch_L, op_SET4, store2_L ;E5 ;SET 4,L
3421 instr fetch2_mhl, op_SET4, store_MHL ;E6 ;SET 4,(HL)
3422 instr fetch_A, op_SET4, store2_A ;E7 ;SET 4,A
3423 instr fetch_B, op_SET5, store2_B ;E8 ;SET 5,B
3424 instr fetch_C, op_SET5, store2_C ;E9 ;SET 5,C
3425 instr fetch_D, op_SET5, store2_D ;EA ;SET 5,D
3426 instr fetch_E, op_SET5, store2_E ;EB ;SET 5,E
3427 instr fetch_H, op_SET5, store2_H ;EC ;SET 5,H
3428 instr fetch_L, op_SET5, store2_L ;ED ;SET 5,L
3429 instr fetch2_mhl, op_SET5, store_MHL ;EE ;SET 5,(HL)
3430 instr fetch_A, op_SET5, store2_A ;EF ;SET 5,A
3431 instr fetch_B, op_SET6, store2_B ;F0 ;SET 6,B
3432 instr fetch_C, op_SET6, store2_C ;F1 ;SET 6,C
3433 instr fetch_D, op_SET6, store2_D ;F2 ;SET 6,D
3434 instr fetch_E, op_SET6, store2_E ;F3 ;SET 6,E
3435 instr fetch_H, op_SET6, store2_H ;F4 ;SET 6,H
3436 instr fetch_L, op_SET6, store2_L ;F5 ;SET 6,L
3437 instr fetch2_mhl, op_SET6, store_MHL ;F6 ;SET 6,(HL)
3438 instr fetch_A, op_SET6, store2_A ;F7 ;SET 6,A
3439 instr fetch_B, op_SET7, store2_B ;F8 ;SET 7,B
3440 instr fetch_C, op_SET7, store2_C ;F9 ;SET 7,C
3441 instr fetch_D, op_SET7, store2_D ;FA ;SET 7,D
3442 instr fetch_E, op_SET7, store2_E ;FB ;SET 7,E
3443 instr fetch_H, op_SET7, store2_H ;FC ;SET 7,H
3444 instr fetch_L, op_SET7, store2_L ;FD ;SET 7,L
3445 instr fetch2_mhl, op_SET7, store_MHL ;FE ;SET 7,(HL)
3446 instr fetch_A, op_SET7, store2_A ;FF ;SET 7,A
3447
3448
3449 opctable DDFDCBjmp, PC ;+256
3450
3451 instr fetch_nop, op_RLC, store2_B ;00 ;RLC (Ix+d),B
3452 instr fetch_nop, op_RLC, store2_C ;01 ;RLC (Ix+d),C
3453 instr fetch_nop, op_RLC, store2_D ;02 ;RLC (Ix+d),D
3454 instr fetch_nop, op_RLC, store2_E ;03 ;RLC (Ix+d),E
3455 instr fetch_nop, op_RLC, store2_H ;04 ;RLC (Ix+d),H
3456 instr fetch_nop, op_RLC, store2_L ;05 ;RLC (Ix+d),L
3457 instr fetch_nop, op_RLC, store_nop ;06 ;RLC (Ix+d)
3458 instr fetch_nop, op_RLC, store2_A ;07 ;RLC (Ix+d),A
3459 instr fetch_nop, op_RRC, store2_B ;08 ;RRC (Ix+d),B
3460 instr fetch_nop, op_RRC, store2_C ;09 ;RRC (Ix+d),C
3461 instr fetch_nop, op_RRC, store2_D ;0A ;RRC (Ix+d),D
3462 instr fetch_nop, op_RRC, store2_E ;0B ;RRC (Ix+d),E
3463 instr fetch_nop, op_RRC, store2_H ;0C ;RRC (Ix+d),H
3464 instr fetch_nop, op_RRC, store2_L ;0D ;RRC (Ix+d),L
3465 instr fetch_nop, op_RRC, store_nop ;0E ;RRC (Ix+d)
3466 instr fetch_nop, op_RRC, store2_A ;0F ;RRC (Ix+d),A
3467 instr fetch_nop, op_RL, store2_B ;10 ;RL (Ix+d),B
3468 instr fetch_nop, op_RL, store2_C ;11 ;RL (Ix+d),C
3469 instr fetch_nop, op_RL, store2_D ;12 ;RL (Ix+d),D
3470 instr fetch_nop, op_RL, store2_E ;13 ;RL (Ix+d),E
3471 instr fetch_nop, op_RL, store2_H ;14 ;RL (Ix+d),H
3472 instr fetch_nop, op_RL, store2_L ;15 ;RL (Ix+d),L
3473 instr fetch_nop, op_RL, store_nop ;16 ;RL (Ix+d)
3474 instr fetch_nop, op_RL, store2_A ;17 ;RL (Ix+d),A
3475 instr fetch_nop, op_RR, store2_B ;18 ;RR (Ix+d),B
3476 instr fetch_nop, op_RR, store2_C ;19 ;RR (Ix+d),C
3477 instr fetch_nop, op_RR, store2_D ;1A ;RR (Ix+d),D
3478 instr fetch_nop, op_RR, store2_E ;1B ;RR (Ix+d),E
3479 instr fetch_nop, op_RR, store2_H ;1C ;RR (Ix+d),H
3480 instr fetch_nop, op_RR, store2_L ;1D ;RR (Ix+d),L
3481 instr fetch_nop, op_RR, store_nop ;1E ;RR (Ix+d)
3482 instr fetch_nop, op_RR, store2_A ;1F ;RR (Ix+d),A
3483 instr fetch_nop, op_SLA, store2_B ;20 ;SLA (Ix+d),B
3484 instr fetch_nop, op_SLA, store2_C ;21 ;SLA (Ix+d),C
3485 instr fetch_nop, op_SLA, store2_D ;22 ;SLA (Ix+d),D
3486 instr fetch_nop, op_SLA, store2_E ;23 ;SLA (Ix+d),E
3487 instr fetch_nop, op_SLA, store2_H ;24 ;SLA (Ix+d),H
3488 instr fetch_nop, op_SLA, store2_L ;25 ;SLA (Ix+d),L
3489 instr fetch_nop, op_SLA, store_nop ;26 ;SLA (Ix+d)
3490 instr fetch_nop, op_SLA, store2_A ;27 ;SLA (Ix+d),A
3491 instr fetch_nop, op_SRA, store2_B ;28 ;SRA (Ix+d),B
3492 instr fetch_nop, op_SRA, store2_C ;29 ;SRA (Ix+d),C
3493 instr fetch_nop, op_SRA, store2_D ;2A ;SRA (Ix+d),D
3494 instr fetch_nop, op_SRA, store2_E ;2B ;SRA (Ix+d),E
3495 instr fetch_nop, op_SRA, store2_H ;2C ;SRA (Ix+d),H
3496 instr fetch_nop, op_SRA, store2_L ;2D ;SRA (Ix+d),L
3497 instr fetch_nop, op_SRA, store_nop ;2E ;SRA (Ix+d)
3498 instr fetch_nop, op_SRA, store2_A ;2F ;SRA (Ix+d),A
3499 instr fetch_nop, op_SLL, store2_B ;30 ;SLL (Ix+d),B
3500 instr fetch_nop, op_SLL, store2_C ;31 ;SLL (Ix+d),C
3501 instr fetch_nop, op_SLL, store2_D ;32 ;SLL (Ix+d),D
3502 instr fetch_nop, op_SLL, store2_E ;33 ;SLL (Ix+d),E
3503 instr fetch_nop, op_SLL, store2_H ;34 ;SLL (Ix+d),H
3504 instr fetch_nop, op_SLL, store2_L ;35 ;SLL (Ix+d),L
3505 instr fetch_nop, op_SLL, store_nop ;36 ;SLL (Ix+d)
3506 instr fetch_nop, op_SLL, store2_A ;37 ;SLL (Ix+d),A
3507 instr fetch_nop, op_SRL, store2_B ;38 ;SRL (Ix+d),B
3508 instr fetch_nop, op_SRL, store2_C ;39 ;SRL (Ix+d),C
3509 instr fetch_nop, op_SRL, store2_D ;3A ;SRL (Ix+d),D
3510 instr fetch_nop, op_SRL, store2_E ;3B ;SRL (Ix+d),E
3511 instr fetch_nop, op_SRL, store2_H ;3C ;SRL (Ix+d),H
3512 instr fetch_nop, op_SRL, store2_L ;3D ;SRL (Ix+d),L
3513 instr fetch_nop, op_SRL, store_nop ;3E ;SRL (Ix+d)
3514 instr fetch_nop, op_SRL, store2_A ;3F ;SRL (Ix+d),A
3515 instr fetch_nop, op_BIT0, store_nop ;40 ;BIT 0,(Ix+d),B
3516 instr fetch_nop, op_BIT0, store_nop ;41 ;BIT 0,(Ix+d),C
3517 instr fetch_nop, op_BIT0, store_nop ;42 ;BIT 0,(Ix+d),D
3518 instr fetch_nop, op_BIT0, store_nop ;43 ;BIT 0,(Ix+d),E
3519 instr fetch_nop, op_BIT0, store_nop ;44 ;BIT 0,(Ix+d),H
3520 instr fetch_nop, op_BIT0, store_nop ;45 ;BIT 0,(Ix+d),L
3521 instr fetch_nop, op_BIT0, store_nop ;46 ;BIT 0,(Ix+d)
3522 instr fetch_nop, op_BIT0, store_nop ;47 ;BIT 0,(Ix+d),A
3523 instr fetch_nop, op_BIT1, store_nop ;48 ;BIT 1,(Ix+d),B
3524 instr fetch_nop, op_BIT1, store_nop ;49 ;BIT 1,(Ix+d),C
3525 instr fetch_nop, op_BIT1, store_nop ;4A ;BIT 1,(Ix+d),D
3526 instr fetch_nop, op_BIT1, store_nop ;4B ;BIT 1,(Ix+d),E
3527 instr fetch_nop, op_BIT1, store_nop ;4C ;BIT 1,(Ix+d),H
3528 instr fetch_nop, op_BIT1, store_nop ;4D ;BIT 1,(Ix+d),L
3529 instr fetch_nop, op_BIT1, store_nop ;4E ;BIT 1,(Ix+d)
3530 instr fetch_nop, op_BIT1, store_nop ;4F ;BIT 1,(Ix+d),A
3531 instr fetch_nop, op_BIT2, store_nop ;50 ;BIT 2,(Ix+d),B
3532 instr fetch_nop, op_BIT2, store_nop ;51 ;BIT 2,(Ix+d),C
3533 instr fetch_nop, op_BIT2, store_nop ;52 ;BIT 2,(Ix+d),D
3534 instr fetch_nop, op_BIT2, store_nop ;53 ;BIT 2,(Ix+d),E
3535 instr fetch_nop, op_BIT2, store_nop ;54 ;BIT 2,(Ix+d),H
3536 instr fetch_nop, op_BIT2, store_nop ;55 ;BIT 2,(Ix+d),L
3537 instr fetch_nop, op_BIT2, store_nop ;56 ;BIT 2,(Ix+d)
3538 instr fetch_nop, op_BIT2, store_nop ;57 ;BIT 2,(Ix+d),A
3539 instr fetch_nop, op_BIT3, store_nop ;58 ;BIT 3,(Ix+d),B
3540 instr fetch_nop, op_BIT3, store_nop ;59 ;BIT 3,(Ix+d),C
3541 instr fetch_nop, op_BIT3, store_nop ;5A ;BIT 3,(Ix+d),D
3542 instr fetch_nop, op_BIT3, store_nop ;5B ;BIT 3,(Ix+d),E
3543 instr fetch_nop, op_BIT3, store_nop ;5C ;BIT 3,(Ix+d),H
3544 instr fetch_nop, op_BIT3, store_nop ;5D ;BIT 3,(Ix+d),L
3545 instr fetch_nop, op_BIT3, store_nop ;5E ;BIT 3,(Ix+d)
3546 instr fetch_nop, op_BIT3, store_nop ;5F ;BIT 3,(Ix+d),A
3547 instr fetch_nop, op_BIT4, store_nop ;60 ;BIT 4,(Ix+d),B
3548 instr fetch_nop, op_BIT4, store_nop ;61 ;BIT 4,(Ix+d),C
3549 instr fetch_nop, op_BIT4, store_nop ;62 ;BIT 4,(Ix+d),D
3550 instr fetch_nop, op_BIT4, store_nop ;63 ;BIT 4,(Ix+d),E
3551 instr fetch_nop, op_BIT4, store_nop ;64 ;BIT 4,(Ix+d),H
3552 instr fetch_nop, op_BIT4, store_nop ;65 ;BIT 4,(Ix+d),L
3553 instr fetch_nop, op_BIT4, store_nop ;66 ;BIT 4,(Ix+d)
3554 instr fetch_nop, op_BIT4, store_nop ;67 ;BIT 4,(Ix+d),A
3555 instr fetch_nop, op_BIT5, store_nop ;68 ;BIT 5,(Ix+d),B
3556 instr fetch_nop, op_BIT5, store_nop ;69 ;BIT 5,(Ix+d),C
3557 instr fetch_nop, op_BIT5, store_nop ;6A ;BIT 5,(Ix+d),D
3558 instr fetch_nop, op_BIT5, store_nop ;6B ;BIT 5,(Ix+d),E
3559 instr fetch_nop, op_BIT5, store_nop ;6C ;BIT 5,(Ix+d),H
3560 instr fetch_nop, op_BIT5, store_nop ;6D ;BIT 5,(Ix+d),L
3561 instr fetch_nop, op_BIT5, store_nop ;6E ;BIT 5,(Ix+d)
3562 instr fetch_nop, op_BIT5, store_nop ;6F ;BIT 5,(Ix+d),A
3563 instr fetch_nop, op_BIT6, store_nop ;70 ;BIT 6,(Ix+d),B
3564 instr fetch_nop, op_BIT6, store_nop ;71 ;BIT 6,(Ix+d),C
3565 instr fetch_nop, op_BIT6, store_nop ;72 ;BIT 6,(Ix+d),D
3566 instr fetch_nop, op_BIT6, store_nop ;73 ;BIT 6,(Ix+d),E
3567 instr fetch_nop, op_BIT6, store_nop ;74 ;BIT 6,(Ix+d),H
3568 instr fetch_nop, op_BIT6, store_nop ;75 ;BIT 6,(Ix+d),L
3569 instr fetch_nop, op_BIT6, store_nop ;76 ;BIT 6,(Ix+d)
3570 instr fetch_nop, op_BIT6, store_nop ;77 ;BIT 6,(Ix+d),A
3571 instr fetch_nop, op_BIT7, store_nop ;78 ;BIT 7,(Ix+d),B
3572 instr fetch_nop, op_BIT7, store_nop ;79 ;BIT 7,(Ix+d),C
3573 instr fetch_nop, op_BIT7, store_nop ;7A ;BIT 7,(Ix+d),D
3574 instr fetch_nop, op_BIT7, store_nop ;7B ;BIT 7,(Ix+d),E
3575 instr fetch_nop, op_BIT7, store_nop ;7C ;BIT 7,(Ix+d),H
3576 instr fetch_nop, op_BIT7, store_nop ;7D ;BIT 7,(Ix+d),L
3577 instr fetch_nop, op_BIT7, store_nop ;7E ;BIT 7,(Ix+d)
3578 instr fetch_nop, op_BIT7, store_nop ;7F ;BIT 7,(Ix+d),A
3579 instr fetch_nop, op_RES0, store2_B ;80 ;RES 0,(Ix+d),B
3580 instr fetch_nop, op_RES0, store2_C ;81 ;RES 0,(Ix+d),C
3581 instr fetch_nop, op_RES0, store2_D ;82 ;RES 0,(Ix+d),D
3582 instr fetch_nop, op_RES0, store2_E ;83 ;RES 0,(Ix+d),E
3583 instr fetch_nop, op_RES0, store2_H ;84 ;RES 0,(Ix+d),H
3584 instr fetch_nop, op_RES0, store2_L ;85 ;RES 0,(Ix+d),L
3585 instr fetch_nop, op_RES0, store_nop ;86 ;RES 0,(Ix+d)
3586 instr fetch_nop, op_RES0, store2_A ;87 ;RES 0,(Ix+d),A
3587 instr fetch_nop, op_RES1, store2_B ;88 ;RES 1,(Ix+d),B
3588 instr fetch_nop, op_RES1, store2_C ;89 ;RES 1,(Ix+d),C
3589 instr fetch_nop, op_RES1, store2_D ;8A ;RES 1,(Ix+d),D
3590 instr fetch_nop, op_RES1, store2_E ;8B ;RES 1,(Ix+d),E
3591 instr fetch_nop, op_RES1, store2_H ;8C ;RES 1,(Ix+d),H
3592 instr fetch_nop, op_RES1, store2_L ;8D ;RES 1,(Ix+d),L
3593 instr fetch_nop, op_RES1, store_nop ;8E ;RES 1,(Ix+d)
3594 instr fetch_nop, op_RES1, store2_A ;8F ;RES 1,(Ix+d),A
3595 instr fetch_nop, op_RES2, store2_B ;90 ;RES 2,(Ix+d),B
3596 instr fetch_nop, op_RES2, store2_C ;91 ;RES 2,(Ix+d),C
3597 instr fetch_nop, op_RES2, store2_D ;92 ;RES 2,(Ix+d),D
3598 instr fetch_nop, op_RES2, store2_E ;93 ;RES 2,(Ix+d),E
3599 instr fetch_nop, op_RES2, store2_H ;94 ;RES 2,(Ix+d),H
3600 instr fetch_nop, op_RES2, store2_L ;95 ;RES 2,(Ix+d),L
3601 instr fetch_nop, op_RES2, store_nop ;96 ;RES 2,(Ix+d)
3602 instr fetch_nop, op_RES2, store2_A ;97 ;RES 2,(Ix+d),A
3603 instr fetch_nop, op_RES3, store2_B ;98 ;RES 3,(Ix+d),B
3604 instr fetch_nop, op_RES3, store2_C ;99 ;RES 3,(Ix+d),C
3605 instr fetch_nop, op_RES3, store2_D ;9A ;RES 3,(Ix+d),D
3606 instr fetch_nop, op_RES3, store2_E ;9B ;RES 3,(Ix+d),E
3607 instr fetch_nop, op_RES3, store2_H ;9C ;RES 3,(Ix+d),H
3608 instr fetch_nop, op_RES3, store2_L ;9D ;RES 3,(Ix+d),L
3609 instr fetch_nop, op_RES3, store_nop ;9E ;RES 3,(Ix+d)
3610 instr fetch_nop, op_RES3, store2_A ;9F ;RES 3,(Ix+d),A
3611 instr fetch_nop, op_RES4, store2_B ;A0 ;RES 4,(Ix+d),B
3612 instr fetch_nop, op_RES4, store2_C ;A1 ;RES 4,(Ix+d),C
3613 instr fetch_nop, op_RES4, store2_D ;A2 ;RES 4,(Ix+d),D
3614 instr fetch_nop, op_RES4, store2_E ;A3 ;RES 4,(Ix+d),E
3615 instr fetch_nop, op_RES4, store2_H ;A4 ;RES 4,(Ix+d),H
3616 instr fetch_nop, op_RES4, store2_L ;A5 ;RES 4,(Ix+d),L
3617 instr fetch_nop, op_RES4, store_nop ;A6 ;RES 4,(Ix+d)
3618 instr fetch_nop, op_RES4, store2_A ;A7 ;RES 4,(Ix+d),A
3619 instr fetch_nop, op_RES5, store2_B ;A8 ;RES 5,(Ix+d),B
3620 instr fetch_nop, op_RES5, store2_C ;A9 ;RES 5,(Ix+d),C
3621 instr fetch_nop, op_RES5, store2_D ;AA ;RES 5,(Ix+d),D
3622 instr fetch_nop, op_RES5, store2_E ;AB ;RES 5,(Ix+d),E
3623 instr fetch_nop, op_RES5, store2_H ;AC ;RES 5,(Ix+d),H
3624 instr fetch_nop, op_RES5, store2_L ;AD ;RES 5,(Ix+d),L
3625 instr fetch_nop, op_RES5, store_nop ;AE ;RES 5,(Ix+d)
3626 instr fetch_nop, op_RES5, store2_A ;AF ;RES 5,(Ix+d),A
3627 instr fetch_nop, op_RES6, store2_B ;B0 ;RES 6,(Ix+d),B
3628 instr fetch_nop, op_RES6, store2_C ;B1 ;RES 6,(Ix+d),C
3629 instr fetch_nop, op_RES6, store2_D ;B2 ;RES 6,(Ix+d),D
3630 instr fetch_nop, op_RES6, store2_E ;B3 ;RES 6,(Ix+d),E
3631 instr fetch_nop, op_RES6, store2_H ;B4 ;RES 6,(Ix+d),H
3632 instr fetch_nop, op_RES6, store2_L ;B5 ;RES 6,(Ix+d),L
3633 instr fetch_nop, op_RES6, store_nop ;B6 ;RES 6,(Ix+d)
3634 instr fetch_nop, op_RES6, store2_A ;B7 ;RES 6,(Ix+d),A
3635 instr fetch_nop, op_RES7, store2_B ;B8 ;RES 7,(Ix+d),B
3636 instr fetch_nop, op_RES7, store2_C ;B9 ;RES 7,(Ix+d),C
3637 instr fetch_nop, op_RES7, store2_D ;BA ;RES 7,(Ix+d),D
3638 instr fetch_nop, op_RES7, store2_E ;BB ;RES 7,(Ix+d),E
3639 instr fetch_nop, op_RES7, store2_H ;BC ;RES 7,(Ix+d),H
3640 instr fetch_nop, op_RES7, store2_L ;BD ;RES 7,(Ix+d),L
3641 instr fetch_nop, op_RES7, store_nop ;BE ;RES 7,(Ix+d)
3642 instr fetch_nop, op_RES7, store2_A ;BF ;RES 7,(Ix+d),A
3643 instr fetch_nop, op_SET0, store2_B ;C0 ;SET 0,(Ix+d),B
3644 instr fetch_nop, op_SET0, store2_C ;C1 ;SET 0,(Ix+d),C
3645 instr fetch_nop, op_SET0, store2_D ;C2 ;SET 0,(Ix+d),D
3646 instr fetch_nop, op_SET0, store2_E ;C3 ;SET 0,(Ix+d),E
3647 instr fetch_nop, op_SET0, store2_H ;C4 ;SET 0,(Ix+d),H
3648 instr fetch_nop, op_SET0, store2_L ;C5 ;SET 0,(Ix+d),L
3649 instr fetch_nop, op_SET0, store_nop ;C6 ;SET 0,(Ix+d)
3650 instr fetch_nop, op_SET0, store2_A ;C7 ;SET 0,(Ix+d),A
3651 instr fetch_nop, op_SET1, store2_B ;C8 ;SET 1,(Ix+d),B
3652 instr fetch_nop, op_SET1, store2_C ;C9 ;SET 1,(Ix+d),C
3653 instr fetch_nop, op_SET1, store2_D ;CA ;SET 1,(Ix+d),D
3654 instr fetch_nop, op_SET1, store2_E ;CB ;SET 1,(Ix+d),E
3655 instr fetch_nop, op_SET1, store2_H ;CC ;SET 1,(Ix+d),H
3656 instr fetch_nop, op_SET1, store2_L ;CD ;SET 1,(Ix+d),L
3657 instr fetch_nop, op_SET1, store_nop ;CE ;SET 1,(Ix+d)
3658 instr fetch_nop, op_SET1, store2_A ;CF ;SET 1,(Ix+d),A
3659 instr fetch_nop, op_SET2, store2_B ;D0 ;SET 2,(Ix+d),B
3660 instr fetch_nop, op_SET2, store2_C ;D1 ;SET 2,(Ix+d),C
3661 instr fetch_nop, op_SET2, store2_D ;D2 ;SET 2,(Ix+d),D
3662 instr fetch_nop, op_SET2, store2_E ;D3 ;SET 2,(Ix+d),E
3663 instr fetch_nop, op_SET2, store2_H ;D4 ;SET 2,(Ix+d),H
3664 instr fetch_nop, op_SET2, store2_L ;D5 ;SET 2,(Ix+d),L
3665 instr fetch_nop, op_SET2, store_nop ;D6 ;SET 2,(Ix+d)
3666 instr fetch_nop, op_SET2, store2_A ;D7 ;SET 2,(Ix+d),A
3667 instr fetch_nop, op_SET3, store2_B ;D8 ;SET 3,(Ix+d),B
3668 instr fetch_nop, op_SET3, store2_C ;D9 ;SET 3,(Ix+d),C
3669 instr fetch_nop, op_SET3, store2_D ;DA ;SET 3,(Ix+d),D
3670 instr fetch_nop, op_SET3, store2_E ;DB ;SET 3,(Ix+d),E
3671 instr fetch_nop, op_SET3, store2_H ;DC ;SET 3,(Ix+d),H
3672 instr fetch_nop, op_SET3, store2_L ;DD ;SET 3,(Ix+d),L
3673 instr fetch_nop, op_SET3, store_nop ;DE ;SET 3,(Ix+d)
3674 instr fetch_nop, op_SET3, store2_A ;DF ;SET 3,(Ix+d),A
3675 instr fetch_nop, op_SET4, store2_B ;E0 ;SET 4,(Ix+d),B
3676 instr fetch_nop, op_SET4, store2_C ;E1 ;SET 4,(Ix+d),C
3677 instr fetch_nop, op_SET4, store2_D ;E2 ;SET 4,(Ix+d),D
3678 instr fetch_nop, op_SET4, store2_E ;E3 ;SET 4,(Ix+d),E
3679 instr fetch_nop, op_SET4, store2_H ;E4 ;SET 4,(Ix+d),H
3680 instr fetch_nop, op_SET4, store2_L ;E5 ;SET 4,(Ix+d),L
3681 instr fetch_nop, op_SET4, store_nop ;E6 ;SET 4,(Ix+d)
3682 instr fetch_nop, op_SET4, store2_A ;E7 ;SET 4,(Ix+d),A
3683 instr fetch_nop, op_SET5, store2_B ;E8 ;SET 5,(Ix+d),B
3684 instr fetch_nop, op_SET5, store2_C ;E9 ;SET 5,(Ix+d),C
3685 instr fetch_nop, op_SET5, store2_D ;EA ;SET 5,(Ix+d),D
3686 instr fetch_nop, op_SET5, store2_E ;EB ;SET 5,(Ix+d),E
3687 instr fetch_nop, op_SET5, store2_H ;EC ;SET 5,(Ix+d),H
3688 instr fetch_nop, op_SET5, store2_L ;ED ;SET 5,(Ix+d),L
3689 instr fetch_nop, op_SET5, store_nop ;EE ;SET 5,(Ix+d)
3690 instr fetch_nop, op_SET5, store2_A ;EF ;SET 5,(Ix+d),A
3691 instr fetch_nop, op_SET6, store2_B ;F0 ;SET 6,(Ix+d),B
3692 instr fetch_nop, op_SET6, store2_C ;F1 ;SET 6,(Ix+d),C
3693 instr fetch_nop, op_SET6, store2_D ;F2 ;SET 6,(Ix+d),D
3694 instr fetch_nop, op_SET6, store2_E ;F3 ;SET 6,(Ix+d),E
3695 instr fetch_nop, op_SET6, store2_H ;F4 ;SET 6,(Ix+d),H
3696 instr fetch_nop, op_SET6, store2_L ;F5 ;SET 6,(Ix+d),L
3697 instr fetch_nop, op_SET6, store_nop ;F6 ;SET 6,(Ix+d)
3698 instr fetch_nop, op_SET6, store2_A ;F7 ;SET 6,(Ix+d),A
3699 instr fetch_nop, op_SET7, store2_B ;F8 ;SET 7,(Ix+d),B
3700 instr fetch_nop, op_SET7, store2_C ;F9 ;SET 7,(Ix+d),C
3701 instr fetch_nop, op_SET7, store2_D ;FA ;SET 7,(Ix+d),D
3702 instr fetch_nop, op_SET7, store2_E ;FB ;SET 7,(Ix+d),E
3703 instr fetch_nop, op_SET7, store2_H ;FC ;SET 7,(Ix+d),H
3704 instr fetch_nop, op_SET7, store2_L ;FD ;SET 7,(Ix+d),L
3705 instr fetch_nop, op_SET7, store_nop ;FE ;SET 7,(Ix+d)
3706 instr fetch_nop, op_SET7, store2_A ;FF ;SET 7,(Ix+d),A
3707
3708 .macro m_do_fetch_0
3709 ldi opl,0
3710 .endm
3711 .equ do_fetch_0 = 0
3712 ; ldi opl,0
3713 ; ret
3714
3715 ;----------------------------------------------------------------
3716 ;|Mnemonic |SZHPNC|Description |Notes |
3717 ;----------------------------------------------------------------
3718 ;|IN r,[C] |***P0-|Input |r=[C] |
3719 ;
3720
3721 do_op_in: ; in opl,(opl)
3722 .if PORT_DEBUG
3723 push opl
3724 cp opl,_0 ; don't debug port 0 (con stat)
3725 breq dbg_op_in_1
3726 printnewline
3727 printstring "Port read: ("
3728 mov temp,opl
3729 lcall printhex
3730 printstring ") -> "
3731 dbg_op_in_1:
3732 .endif
3733
3734 mov temp2,opl
3735 lcall portRead
3736 mov opl,temp
3737 bst z_flags,ZFL_C ;save Carry
3738 ldpmx z_flags,sz53p_tab,temp ;S,Z,P
3739 bld z_flags,ZFL_C
3740
3741 .if PORT_DEBUG
3742 pop temp
3743 cp temp,_0
3744 breq dbg_op_in_2
3745 lcall printhex
3746 printstring " "
3747 dbg_op_in_2:
3748 .endif
3749 ret
3750
3751 ;----------------------------------------------------------------
3752 ;|Mnemonic |SZHPNC|Description |Notes |
3753 ;----------------------------------------------------------------
3754 ;|OUT [C],r |------|Output |[C]=r |
3755 ;
3756
3757 do_op_out: ; out (c),opl
3758 .if PORT_DEBUG
3759 printnewline
3760 printstring "Port write: "
3761 mov temp,opl
3762 lcall printhex
3763 printstring " -> ("
3764 mov temp,z_c
3765 lcall printhex
3766 printstring ") "
3767 .endif
3768 mov temp,opl
3769 mov temp2,z_c
3770 lcall portWrite
3771 ret
3772
3773 ;----------------------------------------------------------------
3774 ;|Mnemonic |SZHPNC|Description |Notes |
3775 ;----------------------------------------------------------------
3776 ;|LD dst,src|------|Load |dst=src |
3777 ;
3778
3779 do_op_stbc: ;store bc to mem loc in opl:h
3780 movw xl,opl
3781 mem_write_s z_c
3782 adiw xl,1
3783 mem_write_s z_b
3784 ret
3785
3786 ;----------------------------------------------------------------
3787 ;|Mnemonic |SZHPNC|Description |Notes |
3788 ;----------------------------------------------------------------
3789 ;|LD dst,src|------|Load |dst=src |
3790 ;
3791 ;
3792 do_op_stde: ;store de to mem loc in opl:h
3793 movw xl,opl
3794 mem_write_s z_e
3795 adiw xl,1
3796 mem_write_s z_d
3797 ret
3798
3799 ;----------------------------------------------------------------
3800 ;|Mnemonic |SZHPNC|Description |Notes |
3801 ;----------------------------------------------------------------
3802 ;|LD dst,src|------|Load |dst=src |
3803 ;
3804 ;
3805 do_op_stsp: ;store sp to mem loc in opl:h
3806 movw xl,opl
3807 mem_write_s z_spl
3808 adiw xl,1
3809 mem_write_s z_sph
3810 ret
3811
3812 ;----------------------------------------------------------------
3813 ;|Mnemonic |SZHPNC|Description |Notes |
3814 ;----------------------------------------------------------------
3815 ;|ADC HL,ss |***V0*|Add with Carry |HL=HL+ss+CY |
3816 ;
3817
3818 do_op_ADCHL:
3819 lsr z_flags ; ZFL_C --> Carry
3820 ldi z_flags,0 ; clear N
3821 adc z_l,opl
3822 in temp,sreg ; save lower Z
3823 adc z_h,oph
3824 in temp2,sreg
3825
3826 and temp,temp2 ; 16bit Z
3827 bmov z_flags,ZFL_C, temp2,AVR_C
3828 bmov z_flags,ZFL_P, temp2,AVR_V
3829 bmov z_flags,ZFL_H, temp2,AVR_H
3830 bmov z_flags,ZFL_Z, temp,AVR_Z
3831 bmov z_flags,ZFL_S, temp2,AVR_N
3832 ret
3833
3834 ;----------------------------------------------------------------
3835 ;|Mnemonic |SZHPNC|Description |Notes |
3836 ;----------------------------------------------------------------
3837 ;|SBC HL,ss |***V1*|Subtract with carry |HL=HL-ss-CY |
3838 ;
3839
3840 checkspace PC, 24
3841
3842 do_op_sbchl:
3843 lsr z_flags ; get Z80 carry
3844 sez ; set z
3845 sbc z_l,opl
3846 sbc z_h,oph
3847 in temp,sreg
3848 ldi z_flags,(1<<ZFL_N) ; set N
3849 bmov z_flags,ZFL_C, temp,AVR_C
3850 bmov z_flags,ZFL_P, temp,AVR_V
3851 bmov z_flags,ZFL_H, temp,AVR_H
3852 bmov z_flags,ZFL_Z, temp,AVR_Z
3853 bmov z_flags,ZFL_S, temp,AVR_N
3854 ret
3855
3856 ;----------------------------------------------------------------
3857 ;|Mnemonic |SZHPNC|Description |Notes |
3858 ;----------------------------------------------------------------
3859 ;|NEG |***V1*|Negate A |A=0-A |
3860
3861 ;
3862 do_op_NEG:
3863 ldi temp,0
3864 sub temp,z_a
3865 mov z_a,temp
3866 in temp,sreg
3867 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
3868 bmov z_flags,ZFL_C, temp,AVR_C
3869 bmov z_flags,ZFL_H, temp,AVR_H
3870 do_z80_flags_V
3871 do_z80_flags_set_N
3872 ret
3873
3874 ;----------------------------------------------------------------
3875 ;|Mnemonic |SZHPNC|Description |Notes |
3876 ;----------------------------------------------------------------
3877 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
3878 ;|RETN |------|Return from NMI | Copy IFF2 to IFF1 |
3879
3880
3881 do_op_RETI:
3882 do_op_RETN:
3883 ldd temp,y+oz_istat
3884 bmov temp,IFF1, temp,IFF2
3885 std y+oz_istat,temp
3886 ljmp do_store_ret
3887
3888
3889 ;----------------------------------------------------------------
3890 ;|Mnemonic |SZHPNC|Description |Notes |
3891 ;----------------------------------------------------------------
3892 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
3893
3894 do_op_IM0:
3895 ldd temp,y+oz_istat
3896 andi temp, ~IM_MASK
3897 std y+oz_istat,temp
3898 ret
3899
3900 do_op_IM1:
3901 ldd temp,y+oz_istat
3902 andi temp,~IM_MASK
3903 ori temp,IM1
3904 std y+oz_istat,temp
3905 ret
3906
3907 do_op_IM2:
3908 ldd temp,y+oz_istat
3909 andi temp, ~IM_MASK
3910 ori temp,IM2
3911 std y+oz_istat,temp
3912 ret
3913
3914 ;----------------------------------------------------------------
3915 ;|Mnemonic |SZHPNC|Description |Notes |
3916 ;----------------------------------------------------------------
3917 ;|LD A,i |**0*0-|Load |(i=I,R) IFF2 --> P |
3918 ;|LD i,A |------|Load |(i=I,R) |
3919
3920 do_op_ldai:
3921 ldd z_a,y+oz_i
3922 rjmp op_ldar1
3923
3924 do_op_ldar:
3925 ldd z_a,y+oz_r
3926 op_ldar1:
3927 bst z_flags,ZFL_C ;save C
3928 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
3929 bld z_flags,ZFL_C ;
3930 ldd temp,y+oz_istat
3931 bmov z_flags,ZFL_P, temp,IFF2
3932 ret
3933
3934 do_op_ldia:
3935 std y+oz_i,z_a
3936 ret
3937
3938 do_op_ldra:
3939 std y+oz_r,z_a
3940 ret
3941
3942 ;----------------------------------------------------------------
3943 ;|Mnemonic |SZHPNC|Description |Notes |
3944 ;----------------------------------------------------------------
3945 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
3946 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
3947
3948 do_op_rld:
3949 swap opl
3950 mov oph,opl
3951 andi opl,0xf0
3952 andi oph,0x0f
3953 mov temp,z_a
3954 andi temp,0x0f
3955 or opl,temp
3956 mov temp,z_a
3957 andi temp,0xf0
3958 or temp,oph
3959 mov z_a,temp
3960 bst z_flags,ZFL_C ;save C
3961 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
3962 bld z_flags,ZFL_C ;
3963 ret
3964
3965 do_op_rrd:
3966 mov oph,opl
3967 andi opl,0xf0
3968 andi oph,0x0f
3969 mov temp,z_a
3970 andi temp,0x0f
3971 or opl,temp
3972 swap opl
3973 mov temp,z_a
3974 andi temp,0xf0
3975 or temp,oph
3976 mov z_a,temp
3977 bst z_flags,ZFL_C ;save C
3978 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
3979 bld z_flags,ZFL_C ;
3980 ret
3981
3982
3983 ;----------------------------------------------------------------
3984 ;|Mnemonic |SZHPNC|Description |Notes |
3985 ;----------------------------------------------------------------
3986 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
3987 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
3988 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
3989 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
3990 ;
3991
3992 checkspace PC, 13
3993
3994 op_LDxx_common:
3995 ; movw x,z_l ;
3996 ; lcall dram_read ; temp = (HL)
3997 mem_read_ds temp, z_hl
3998 ; movw x,z_e ;
3999 ; lcall dram_write ; (DE) = temp
4000 mem_write_ds z_de, temp
4001
4002 cbr z_flags,(1<<ZFL_H) | (1<<ZFL_P) | (1<<ZFL_N)
4003
4004 movw x,z_c
4005 sbiw x,1 ;BC--
4006 movw z_c,x
4007 breq PC+2
4008 sbr z_flags,(1<<ZFL_P)
4009 ret
4010
4011 checkspace PC, 6
4012
4013 do_op_LDI:
4014 rcall op_LDxx_common
4015 sub z_e,_255 ;-low(-1) DE++
4016 sbc z_d,_255 ;-high(-1)
4017 sub z_l,_255 ;-low(-1) HL++
4018 sbc z_h,_255 ;-high(-1)
4019 ret
4020
4021 checkspace PC, 6
4022
4023 do_op_LDD:
4024 rcall op_LDxx_common
4025 add z_e,_255 ;+low(-1) DE--
4026 adc z_d,_255 ;+high(-1)
4027 add z_l,_255 ;+low(-1) HL--
4028 adc z_h,_255 ;+high(-1)
4029 ret
4030
4031 checkspace PC, 5
4032
4033 do_op_LDIR:
4034 rcall do_op_LDI
4035 #if 1
4036 sbrc z_flags,ZFL_P
4037 rjmp do_op_LDIR
4038 ret
4039 #else
4040 sbrs z_flags,ZFL_P
4041 ret
4042 sbiw z_pcl,2
4043 ret
4044 #endif
4045
4046 checkspace PC, 5
4047
4048 do_op_LDDR:
4049 rcall do_op_LDD
4050 #if 1
4051 sbrc z_flags,ZFL_P
4052 rjmp do_op_LDDR
4053 ret
4054 #else
4055 sbrs z_flags,ZFL_P
4056 ret
4057 sbiw z_pcl,2
4058 ret
4059 #endif
4060
4061 ;----------------------------------------------------------------
4062 ;|Mnemonic |SZHPNC|Description |Notes |
4063 ;----------------------------------------------------------------
4064 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
4065 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
4066 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
4067 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
4068
4069
4070 checkspace PC, 21
4071
4072 op_CPxx_common:
4073 movw x,z_l ; HL
4074
4075 movw z,z_c ;BC
4076
4077 cbr z_flags,(1<<ZFL_S)|(1<<ZFL_Z)|(1<<ZFL_H)|(1<<ZFL_P)
4078 sbr z_flags,(1<<ZFL_N)
4079 lcall dram_read ; temp = (HL)
4080
4081 cp z_a,temp ; A - (HL)
4082
4083 brpl PC+2
4084 sbr z_flags,(1<<ZFL_S)
4085 brne PC+2
4086 sbr z_flags,(1<<ZFL_Z)
4087 brhc PC+2
4088 sbr z_flags,(1<<ZFL_H)
4089
4090 sbiw z,1 ; BC--
4091 breq PC+2
4092 sbr z_flags,(1<<ZFL_P)
4093 movw z_c,z ;BC
4094 ret
4095
4096 checkspace PC, 5
4097
4098 do_op_CPI:
4099 rcall op_CPxx_common
4100 adiw x,1 ; HL++
4101 movw z_l,x ; HL
4102 ret
4103
4104
4105 checkspace PC, 5
4106
4107 do_op_CPD:
4108 rcall op_CPxx_common
4109 sbiw x,1 ; HL--
4110 movw z_l,x ; HL
4111 ret
4112
4113 checkspace PC, 7
4114
4115 do_op_CPIR:
4116 rcall do_op_CPI
4117 sbrc z_flags,ZFL_Z
4118 ret
4119 sbrs z_flags,ZFL_P
4120 ret
4121 sbiw z_pcl,2
4122 ret
4123
4124 checkspace PC, 7
4125
4126 do_op_CPDR:
4127 rcall do_op_CPD
4128 sbrc z_flags,ZFL_Z
4129 ret
4130 sbrs z_flags,ZFL_P
4131 ret
4132 sbiw z_pcl,2
4133 ret
4134
4135 ;----------------------------------------------------------------
4136 ;|Mnemonic |SZHPNC|Description |Notes |
4137 ;----------------------------------------------------------------
4138 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
4139 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
4140 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
4141 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
4142
4143 checkspace PC, 12
4144
4145 op_INxx_common:
4146 cbr z_flags,(1<<ZFL_Z)
4147 sbr z_flags,(1<<ZFL_N)
4148 mov temp2,z_c ;C
4149 lcall portRead
4150 movw x,z_l ;HL
4151 lcall dram_write
4152 dec z_b ;B
4153 brne PC+2
4154 sbr z_flags,(1<<ZFL_Z)
4155 ret
4156
4157 checkspace PC, 4
4158
4159 do_op_INI:
4160 rcall op_INxx_common
4161 adiw x,1
4162 movw z_l,x ;HL
4163 ret
4164
4165 checkspace PC, 4
4166
4167 do_op_IND:
4168 rcall op_INxx_common
4169 sbiw x,1
4170 movw z_l,x ;HL
4171 ret
4172
4173 checkspace PC, 5
4174
4175 do_op_INIR:
4176 rcall do_op_INI
4177 sbrc z_flags,ZFL_Z
4178 ret
4179 sbiw z_pcl,2
4180 ret
4181
4182 checkspace PC, 5
4183
4184 do_op_INDR:
4185 rcall do_op_IND
4186 sbrc z_flags,ZFL_Z
4187 ret
4188 sbiw z_pcl,2
4189 ret
4190
4191 ;----------------------------------------------------------------
4192 ;|Mnemonic |SZHPNC|Description |Notes |
4193 ;----------------------------------------------------------------
4194 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
4195 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
4196 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
4197 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
4198
4199 checkspace PC, 12
4200
4201 op_OUTxx_common:
4202 movw x,z_l ;HL
4203 lcall dram_read ;temp = (z)
4204 mov temp2,z_c ;C
4205 lcall portWrite
4206 cbr z_flags,(1<<ZFL_Z)
4207 sbr z_flags,(1<<ZFL_N)
4208 dec z_b ;B
4209 brne PC+2
4210 sbr z_flags,(1<<ZFL_Z)
4211 ret
4212
4213 checkspace PC, 4
4214
4215 do_op_OUTI:
4216 rcall op_OUTxx_common
4217 sub z_l,_255 ;-low(-1)
4218 sbc z_h,_255 ;-high(-1)
4219 ret
4220
4221 checkspace PC, 4
4222
4223 do_op_OUTD:
4224 rcall op_OUTxx_common
4225 add z_l,_255 ;+low(-1)
4226 adc z_h,_255 ;+high(-1)
4227 ret
4228
4229 checkspace PC, 5
4230
4231 do_op_OTIR:
4232 rcall do_op_OUTI
4233 sbrc z_flags,ZFL_Z
4234 ret
4235 sbiw z_pcl,2
4236 ret
4237
4238 checkspace PC, 5
4239
4240 do_op_OTDR:
4241 rcall do_op_OUTD
4242 sbrc z_flags,ZFL_Z
4243 ret
4244 sbiw z_pcl,2
4245 ret
4246
4247 #if 1
4248 opctable EDjmp, PC ;+ 2*256
4249
4250 instr fetch_nop, op_nop, store_nop ;00 ;NOP
4251 instr fetch_nop, op_nop, store_nop ;01 ;NOP
4252 instr fetch_nop, op_nop, store_nop ;02 ;NOP
4253 instr fetch_nop, op_nop, store_nop ;03 ;NOP
4254 instr fetch_nop, op_nop, store_nop ;04 ;NOP
4255 instr fetch_nop, op_nop, store_nop ;05 ;NOP
4256 instr fetch_nop, op_nop, store_nop ;06 ;NOP
4257 instr fetch_nop, op_nop, store_nop ;07 ;NOP
4258 instr fetch_nop, op_nop, store_nop ;08 ;NOP
4259 instr fetch_nop, op_nop, store_nop ;09 ;NOP
4260 instr fetch_nop, op_nop, store_nop ;0A ;NOP
4261 instr fetch_nop, op_nop, store_nop ;0B ;NOP
4262 instr fetch_nop, op_nop, store_nop ;0C ;NOP
4263 instr fetch_nop, op_nop, store_nop ;0D ;NOP
4264 instr fetch_nop, op_nop, store_nop ;0E ;NOP
4265 instr fetch_nop, op_nop, store_nop ;0F ;NOP
4266 instr fetch_nop, op_nop, store_nop ;10 ;NOP
4267 instr fetch_nop, op_nop, store_nop ;11 ;NOP
4268 instr fetch_nop, op_nop, store_nop ;12 ;NOP
4269 instr fetch_nop, op_nop, store_nop ;13 ;NOP
4270 instr fetch_nop, op_nop, store_nop ;14 ;NOP
4271 instr fetch_nop, op_nop, store_nop ;15 ;NOP
4272 instr fetch_nop, op_nop, store_nop ;16 ;NOP
4273 instr fetch_nop, op_nop, store_nop ;17 ;NOP
4274 instr fetch_nop, op_nop, store_nop ;18 ;NOP
4275 instr fetch_nop, op_nop, store_nop ;19 ;NOP
4276 instr fetch_nop, op_nop, store_nop ;1A ;NOP
4277 instr fetch_nop, op_nop, store_nop ;1B ;NOP
4278 instr fetch_nop, op_nop, store_nop ;1C ;NOP
4279 instr fetch_nop, op_nop, store_nop ;1D ;NOP
4280 instr fetch_nop, op_nop, store_nop ;1E ;NOP
4281 instr fetch_nop, op_nop, store_nop ;1F ;NOP
4282 instr fetch_nop, op_nop, store_nop ;20 ;NOP
4283 instr fetch_nop, op_nop, store_nop ;21 ;NOP
4284 instr fetch_nop, op_nop, store_nop ;22 ;NOP
4285 instr fetch_nop, op_nop, store_nop ;23 ;NOP
4286 instr fetch_nop, op_nop, store_nop ;24 ;NOP
4287 instr fetch_nop, op_nop, store_nop ;25 ;NOP
4288 instr fetch_nop, op_nop, store_nop ;26 ;NOP
4289 instr fetch_nop, op_nop, store_nop ;27 ;NOP
4290 instr fetch_nop, op_nop, store_nop ;28 ;NOP
4291 instr fetch_nop, op_nop, store_nop ;29 ;NOP
4292 instr fetch_nop, op_nop, store_nop ;2A ;NOP
4293 instr fetch_nop, op_nop, store_nop ;2B ;NOP
4294 instr fetch_nop, op_nop, store_nop ;2C ;NOP
4295 instr fetch_nop, op_nop, store_nop ;2D ;NOP
4296 instr fetch_nop, op_nop, store_nop ;2E ;NOP
4297 instr fetch_nop, op_nop, store_nop ;2F ;NOP
4298 instr fetch_nop, op_nop, store_nop ;30 ;NOP
4299 instr fetch_nop, op_nop, store_nop ;31 ;NOP
4300 instr fetch_nop, op_nop, store_nop ;32 ;NOP
4301 instr fetch_nop, op_nop, store_nop ;33 ;NOP
4302 instr fetch_nop, op_nop, store_nop ;34 ;NOP
4303 instr fetch_nop, op_nop, store_nop ;35 ;NOP
4304 instr fetch_nop, op_nop, store_nop ;36 ;NOP
4305 instr fetch_nop, op_nop, store_nop ;37 ;NOP
4306 instr fetch_nop, op_nop, store_nop ;38 ;NOP
4307 instr fetch_nop, op_nop, store_nop ;39 ;NOP
4308 instr fetch_nop, op_nop, store_nop ;3A ;NOP
4309 instr fetch_nop, op_nop, store_nop ;3B ;NOP
4310 instr fetch_nop, op_nop, store_nop ;3C ;NOP
4311 instr fetch_nop, op_nop, store_nop ;3D ;NOP
4312 instr fetch_nop, op_nop, store_nop ;3E ;NOP
4313 instr fetch_nop, op_nop, store_nop ;3F ;NOP
4314 instr fetch_C, op_IN, store2_B ;40 ;IN B,(C)
4315 instr fetch_B, op_OUT, store_nop ;41 ;OUT (C),B
4316 instr fetch_BC, op_SBCHL, store_nop ;42 ;SBC HL,BC
4317 instr fetch_DIR16, op_STBC, store_nop ;43 ;LD (nn),BC
4318 instr fetch_nop, op_NEG, store_nop ;44 ;NEG
4319 instr fetch_nop, op_RETN, store_nop ;45 ;RETN
4320 instr fetch_nop, op_IM0, store_nop ;46 ;IM 0
4321 instr fetch_nop, op_ldia, store_nop ;47 ;LD I,A
4322 instr fetch_C, op_IN, store2_C ;48 ;IN C,(C)
4323 instr fetch_C, op_OUT, store_nop ;49 ;OUT (C),C
4324 instr fetch_BC, op_ADCHL, store_nop ;4A ;ADC HL,BC
4325 instr fetch_DIR16, op_RMEM16, store_BC ;4B nn nn ;LD BC,(nn)
4326 instr fetch_nop, op_NEG, store_nop ;4C ;NEG
4327 instr fetch_nop, op_RETI, store_nop ;4D ;RETI
4328 instr fetch_nop, op_IM0, store_nop ;4E ;IM 0
4329 instr fetch_nop, op_ldra, store_nop ;4F ;LD R,A
4330 instr fetch_C, op_IN, store2_D ;50 ;IN D,(C)
4331 instr fetch_D, op_OUT, store_nop ;51 ;OUT (C),D
4332 instr fetch_DE, op_SBCHL, store_nop ;52 ;SBC HL,DE
4333 instr fetch_DIR16, op_STDE, store_nop ;53 nn nn ;LD (nn),DE
4334 instr fetch_nop, op_NEG, store_nop ;54 ;NEG
4335 instr fetch_nop, op_RETN, store_nop ;55 ;RETN
4336 instr fetch_nop, op_IM1, store_nop ;56 ;IM 1
4337 instr fetch_nop, op_ldai, store_nop ;57 ;LD A,I
4338 instr fetch_C, op_IN, store2_E ;58 ;IN E,(C)
4339 instr fetch_E, op_OUT, store_nop ;59 ;OUT (C),E
4340 instr fetch_DE, op_ADCHL, store_nop ;5A ;ADC HL,DE
4341 instr fetch_DIR16, op_RMEM16, store_DE ;5B nn nn ;LD DE,(nn)
4342 instr fetch_nop, op_NEG, store_nop ;5C ;NEG
4343 instr fetch_nop, op_RETN, store_nop ;5D ;RETN
4344 instr fetch_nop, op_IM2, store_nop ;5E ;IM 2
4345 instr fetch_nop, op_ldar, store_nop ;5F ;LD A,R
4346 instr fetch_C, op_IN, store2_H ;60 ;IN H,(C)
4347 instr fetch_H, op_OUT, store_nop ;61 ;OUT (C),H
4348 instr fetch_HL, op_SBCHL, store_nop ;62 ;SBC HL,HL
4349 instr fetch_DIR16, op_STHL, store_nop ;63 nn nn ;LD (nn),HL
4350 instr fetch_nop, op_NEG, store_nop ;64 ;NEG
4351 instr fetch_nop, op_RETN, store_nop ;65 ;RETN
4352 instr fetch_nop, op_IM0, store_nop ;66 ;IM 0
4353 instr fetch2_mhl, op_RRD, store_mhl ;67 ;RRD
4354 instr fetch_C, op_IN, store2_L ;68 ;IN L,(C)
4355 instr fetch_L, op_OUT, store_nop ;69 ;OUT (C),L
4356 instr fetch_HL, op_ADCHL, store_nop ;6A ;ADC HL,HL
4357 instr fetch_DIR16, op_RMEM16, store_HL ;6B nn nn ;LD HL,(nn)
4358 instr fetch_nop, op_NEG, store_nop ;6C ;NEG
4359 instr fetch_nop, op_RETN, store_nop ;6D ;RETN
4360 instr fetch_nop, op_IM0, store_nop ;6E ;IM 0
4361 instr fetch2_mhl, op_RLD, store_mhl ;6F ;RLD
4362 instr fetch_C, op_IN, store_nop ;70 ;IN (C)
4363 instr fetch_0, op_OUT, store_nop ;71 ;OUT (C),0
4364 instr fetch_SP, op_SBCHL, store_nop ;72 ;SBC HL,SP
4365 instr fetch_DIR16, op_STSP, store_nop ;73 nn nn ;LD (nn),SP
4366 instr fetch_nop, op_NEG, store_nop ;74 ;NEG
4367 instr fetch_nop, op_RETN, store_nop ;75 ;RETN
4368 instr fetch_nop, op_IM1, store_nop ;76 ;IM 1
4369 instr fetch_nop, op_nop, store_nop ;77 ;NOP
4370 instr fetch_C, op_IN, store2_A ;78 ;IN A,(C)
4371 instr fetch_A, op_OUT, store_nop ;79 ;OUT (C),A
4372 instr fetch_SP, op_ADCHL, store_nop ;7A ;ADC HL,SP
4373 instr fetch_DIR16, op_RMEM16, store_SP ;7B nn nn ;LD SP,(nn)
4374 instr fetch_nop, op_NEG, store_nop ;7C ;NEG
4375 instr fetch_nop, op_RETN, store_nop ;7D ;RETN
4376 instr fetch_nop, op_IM2, store_nop ;7E ;IM 2
4377 instr fetch_nop, op_nop, store_nop ;7F ;NOP
4378 instr fetch_nop, op_nop, store_nop ;80 ;NOP
4379 instr fetch_nop, op_nop, store_nop ;81 ;NOP
4380 instr fetch_nop, op_nop, store_nop ;82 ;NOP
4381 instr fetch_nop, op_nop, store_nop ;83 ;NOP
4382 instr fetch_nop, op_nop, store_nop ;84 ;NOP
4383 instr fetch_nop, op_nop, store_nop ;85 ;NOP
4384 instr fetch_nop, op_nop, store_nop ;86 ;NOP
4385 instr fetch_nop, op_nop, store_nop ;87 ;NOP
4386 instr fetch_nop, op_nop, store_nop ;88 ;NOP
4387 instr fetch_nop, op_nop, store_nop ;89 ;NOP
4388 instr fetch_nop, op_nop, store_nop ;8A ;NOP
4389 instr fetch_nop, op_nop, store_nop ;8B ;NOP
4390 instr fetch_nop, op_nop, store_nop ;8C ;NOP
4391 instr fetch_nop, op_nop, store_nop ;8D ;NOP
4392 instr fetch_nop, op_nop, store_nop ;8E ;NOP
4393 instr fetch_nop, op_nop, store_nop ;8F ;NOP
4394 instr fetch_nop, op_nop, store_nop ;90 ;NOP
4395 instr fetch_nop, op_nop, store_nop ;91 ;NOP
4396 instr fetch_nop, op_nop, store_nop ;92 ;NOP
4397 instr fetch_nop, op_nop, store_nop ;93 ;NOP
4398 instr fetch_nop, op_nop, store_nop ;94 ;NOP
4399 instr fetch_nop, op_nop, store_nop ;95 ;NOP
4400 instr fetch_nop, op_nop, store_nop ;96 ;NOP
4401 instr fetch_nop, op_nop, store_nop ;97 ;NOP
4402 instr fetch_nop, op_nop, store_nop ;98 ;NOP
4403 instr fetch_nop, op_nop, store_nop ;99 ;NOP
4404 instr fetch_nop, op_nop, store_nop ;9A ;NOP
4405 instr fetch_nop, op_nop, store_nop ;9B ;NOP
4406 instr fetch_nop, op_nop, store_nop ;9C ;NOP
4407 instr fetch_nop, op_nop, store_nop ;9D ;NOP
4408 instr fetch_nop, op_nop, store_nop ;9E ;NOP
4409 instr fetch_nop, op_nop, store_nop ;9F ;NOP
4410 instr fetch_nop, op_LDI, store_nop ;A0 ;LDI
4411 instr fetch_nop, op_CPI, store_nop ;A1 ;CPI
4412 instr fetch_nop, op_INI, store_nop ;A2 ;INI
4413 instr fetch_nop, op_OUTI, store_nop ;A3 ;OUTI
4414 instr fetch_nop, op_nop, store_nop ;A4 ;NOP
4415 instr fetch_nop, op_nop, store_nop ;A5 ;NOP
4416 instr fetch_nop, op_nop, store_nop ;A6 ;NOP
4417 instr fetch_nop, op_nop, store_nop ;A7 ;NOP
4418 instr fetch_nop, op_LDD, store_nop ;A8 ;LDD
4419 instr fetch_nop, op_CPD, store_nop ;A9 ;CPD
4420 instr fetch_nop, op_IND, store_nop ;AA ;IND
4421 instr fetch_nop, op_OUTD, store_nop ;AB ;OUTD
4422 instr fetch_nop, op_nop, store_nop ;AC ;NOP
4423 instr fetch_nop, op_nop, store_nop ;AD ;NOP
4424 instr fetch_nop, op_nop, store_nop ;AE ;NOP
4425 instr fetch_nop, op_nop, store_nop ;AF ;NOP
4426 instr fetch_nop, op_LDIR, store_nop ;B0 ;LDIR
4427 instr fetch_nop, op_CPIR, store_nop ;B1 ;CPIR
4428 instr fetch_nop, op_INIR, store_nop ;B2 ;INIR
4429 instr fetch_nop, op_OTIR, store_nop ;B3 ;OTIR
4430 instr fetch_nop, op_nop, store_nop ;B4 ;NOP
4431 instr fetch_nop, op_nop, store_nop ;B5 ;NOP
4432 instr fetch_nop, op_nop, store_nop ;B6 ;NOP
4433 instr fetch_nop, op_nop, store_nop ;B7 ;NOP
4434 instr fetch_nop, op_LDDR, store_nop ;B8 ;LDDR
4435 instr fetch_nop, op_CPDR, store_nop ;B9 ;CPDR
4436 instr fetch_nop, op_INDR, store_nop ;BA ;INDR
4437 instr fetch_nop, op_OTDR, store_nop ;BB ;OTDR
4438 instr fetch_nop, op_nop, store_nop ;BC ;NOP
4439 instr fetch_nop, op_nop, store_nop ;BD ;NOP
4440 instr fetch_nop, op_nop, store_nop ;BE ;NOP
4441 instr fetch_nop, op_nop, store_nop ;BF ;NOP
4442 instr fetch_nop, op_nop, store_nop ;C0 ;NOP
4443 instr fetch_nop, op_nop, store_nop ;C1 ;NOP
4444 instr fetch_nop, op_nop, store_nop ;C2 ;NOP
4445 instr fetch_nop, op_nop, store_nop ;C3 ;NOP
4446 instr fetch_nop, op_nop, store_nop ;C4 ;NOP
4447 instr fetch_nop, op_nop, store_nop ;C5 ;NOP
4448 instr fetch_nop, op_nop, store_nop ;C6 ;NOP
4449 instr fetch_nop, op_nop, store_nop ;C7 ;NOP
4450 instr fetch_nop, op_nop, store_nop ;C8 ;NOP
4451 instr fetch_nop, op_nop, store_nop ;C9 ;NOP
4452 instr fetch_nop, op_nop, store_nop ;CA ;NOP
4453 instr fetch_nop, op_nop, store_nop ;CB ;NOP
4454 instr fetch_nop, op_nop, store_nop ;CC ;NOP
4455 instr fetch_nop, op_nop, store_nop ;CD ;NOP
4456 instr fetch_nop, op_nop, store_nop ;CE ;NOP
4457 instr fetch_nop, op_nop, store_nop ;CF ;NOP
4458 instr fetch_nop, op_nop, store_nop ;D0 ;NOP
4459 instr fetch_nop, op_nop, store_nop ;D1 ;NOP
4460 instr fetch_nop, op_nop, store_nop ;D2 ;NOP
4461 instr fetch_nop, op_nop, store_nop ;D3 ;NOP
4462 instr fetch_nop, op_nop, store_nop ;D4 ;NOP
4463 instr fetch_nop, op_nop, store_nop ;D5 ;NOP
4464 instr fetch_nop, op_nop, store_nop ;D6 ;NOP
4465 instr fetch_nop, op_nop, store_nop ;D7 ;NOP
4466 instr fetch_nop, op_nop, store_nop ;D8 ;NOP
4467 instr fetch_nop, op_nop, store_nop ;D9 ;NOP
4468 instr fetch_nop, op_nop, store_nop ;DA ;NOP
4469 instr fetch_nop, op_nop, store_nop ;DB ;NOP
4470 instr fetch_nop, op_nop, store_nop ;DC ;NOP
4471 instr fetch_nop, op_nop, store_nop ;DD ;NOP
4472 instr fetch_nop, op_nop, store_nop ;DE ;NOP
4473 instr fetch_nop, op_nop, store_nop ;DF ;NOP
4474 instr fetch_nop, op_nop, store_nop ;E0 ;NOP
4475 instr fetch_nop, op_nop, store_nop ;E1 ;NOP
4476 instr fetch_nop, op_nop, store_nop ;E2 ;NOP
4477 instr fetch_nop, op_nop, store_nop ;E3 ;NOP
4478 instr fetch_nop, op_nop, store_nop ;E4 ;NOP
4479 instr fetch_nop, op_nop, store_nop ;E5 ;NOP
4480 instr fetch_nop, op_nop, store_nop ;E6 ;NOP
4481 instr fetch_nop, op_nop, store_nop ;E7 ;NOP
4482 instr fetch_nop, op_nop, store_nop ;E8 ;NOP
4483 instr fetch_nop, op_nop, store_nop ;E9 ;NOP
4484 instr fetch_nop, op_nop, store_nop ;EA ;NOP
4485 instr fetch_nop, op_nop, store_nop ;EB ;NOP
4486 instr fetch_nop, op_nop, store_nop ;EC ;NOP
4487 instr fetch_nop, op_nop, store_nop ;ED ;NOP
4488 instr fetch_nop, op_nop, store_nop ;EE ;NOP
4489 instr fetch_nop, op_nop, store_nop ;EF ;NOP
4490 instr fetch_nop, op_nop, store_nop ;F0 ;NOP
4491 instr fetch_nop, op_nop, store_nop ;F1 ;NOP
4492 instr fetch_nop, op_nop, store_nop ;F2 ;NOP
4493 instr fetch_nop, op_nop, store_nop ;F3 ;NOP
4494 instr fetch_nop, op_nop, store_nop ;F4 ;NOP
4495 instr fetch_nop, op_nop, store_nop ;F5 ;NOP
4496 instr fetch_nop, op_nop, store_nop ;F6 ;NOP
4497 instr fetch_nop, op_nop, store_nop ;F7 ;NOP
4498 instr fetch_nop, op_nop, store_nop ;F8 ;NOP
4499 instr fetch_nop, op_nop, store_nop ;F9 ;NOP
4500 instr fetch_nop, op_nop, store_nop ;FA ;NOP
4501 instr fetch_nop, op_nop, store_nop ;FB ;NOP
4502 instr fetch_nop, op_nop, store_nop ;FC ;NOP
4503 instr fetch_nop, op_nop, store_nop ;FD ;NOP
4504 instr fetch_nop, op_nop, store_nop ;FE ;NOP
4505 instr fetch_nop, op_nop, store_nop ;FF ;NOP
4506 #endif
4507
4508 #endif
4509
4510 ;----------------------------------------------------------------
4511 ; Lookup table, stolen from z80ex, Z80 emulation library.
4512 ; http://z80ex.sourceforge.net/
4513
4514 ; The S, Z, 5 and 3 bits and the parity of the lookup value
4515
4516 checkspace PC, 256
4517
4518 .org (PC+255) & 0xff00
4519 ; .org opcjmp + 256
4520 ; .org FLASHEND & 0xff00
4521
4522 sz53p_tab:
4523 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
4524 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
4525 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
4526 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
4527 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
4528 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
4529 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
4530 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
4531 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
4532 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
4533 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
4534 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
4535 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
4536 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
4537 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
4538 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
4539 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
4540 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
4541 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
4542 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
4543 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
4544 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
4545 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
4546 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
4547 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
4548 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
4549 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
4550 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
4551 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
4552 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
4553 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
4554 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
4555
4556 ; vim:set ts=8 noet nowrap
4557
CP/M on an AVR