- The INTERRUPT macro inserts the right jump instruction (rjmp/jmp) in the interrupt vector table.
* new functions: dram_read[w]_pp, dram_write[w]_pp
- read/write byte/word with address autoincrement.
* Affected files:
- avr/macros.inc
- avr/hw-uart.asm
- avr/sw-uart.asm
- avr/remainders.asm
- avr/init.asm
- avr/dram-8bit.asm
- avr/dram-8bit.asm
- avr/avrcpm.asm
- avr/config.inc
git-svn-id: svn://cu.loc/avr-cpm/trunk@108
57430480-672e-4586-8877-
bcf8adbbf3b7
.include "hw-uart.asm"
.include "dram-4bit.asm"
#endif
+; .include "heap.asm"
.include "remainders.asm"
; >>>-------------------------------------- Virtual Devices
; <<<-------------------------------------- File System Management
; .include "z80int.asm" ;Old 8080 interpreter.
; .include "8080int.asm" ;New 8080 interpreter.
-; .include "8080int-t3.asm"
-; .include "8080int-t3-jmp.asm"
- .include "8080int-jmp.asm"
+; .include "8080int-t3.asm" ;Another 8080 interpreter
+; .include "8080int-t3-jmp.asm" ;Can't get enough
+ .include "8080int-jmp.asm" ;
.dseg
.equ MEMFILL = 1
.equ STACK_DBG = 0
.equ PRINT_PC = 0
+.equ HEAP_DEBUG = 1
#define MMC_SPI2X 1 /* 0 = SPI CLK/4, 1 = SPI CLK/2 */
; sei
ret
+; -------------------------------------------------------------------
+
+dram_readw_pp:
+ rcall dram_read
+ adiw x,1
+ push temp
+ rcall dram_read
+ adiw x,1
+ mov temp2,temp
+ pop temp
+ ret
+
+dram_read_pp:
+ rcall dram_read
+ adiw x,1
+ ret
+
+; -------------------------------------------------------------------
+
+dram_writew_pp:
+ push temp2
+ rcall dram_write
+ adiw x,1
+ pop temp
+dram_write_pp:
+ rcall dram_write
+ adiw x,1
+ ret
+
+; -------------------------------------------------------------------
; vim:set ts=8 noet nowrap
sei
ret
+; -------------------------------------------------------------------
+
+dram_readw_pp:
+ rcall dram_read
+ adiw x,1
+ push temp
+ rcall dram_read
+ adiw x,1
+ mov temp2,temp
+ pop temp
+ ret
+
+dram_read_pp:
+ rcall dram_read
+ adiw x,1
+ ret
+
+; -------------------------------------------------------------------
+
+dram_writew_pp:
+ rcall dram_write
+ adiw x,1
+ mov temp,temp2
+dram_write_pp:
+ rcall dram_write
+ adiw x,1
+ ret
+
+
+; -------------------------------------------------------------------
+; vim:set ts=8 noet nowrap
; Save received character in a circular buffer. Do nothing if buffer overflows.
-rxint:
- .org URXCaddr
- rjmp rxint ; USART receive int.
+; USART receive interrupt
+
+ INTERRUPT URXCaddr
- .org rxint
push temp
in temp,sreg
push temp
pop zh
ret
-txint:
- .org UDREaddr
- rjmp txint ; USART transmit int.
+; USART transmit interrupt
+
+ INTERRUPT UDREaddr
- .org txint
push temp
in temp,sreg
push temp
; Various functions: init, (RAM) disk, mmc, timer
-; This file needs to get split up.
;
; Copyright (C) 2010 Sprite_tm
; Copyright (C) 2010 Leo C.
.if BOOTWAIT
ldi temp,10
- rcall delay_ms
+ call delay_ms
.endif
ramtestw:
mov temp,xh
eor temp,xl
- mem_write
- adiw xl,1
+ rcall dram_write_pp
brcc ramtestw
printstring "wait..."
ldi temp2,8
ramtestwl:
ldi temp,255
- rcall delay_ms
+ call delay_ms
dec temp2
brne ramtestwl
ldiw x,0
ramfillw:
ldi temp,MEMFILL_VAL
- mem_write
- adiw xl,1
+ rcall dram_write_pp
brcc ramfillw
.endif
printnewline
printstring "Partinit done."
- rcall dsk_cboot ;init (de)blocking buffer\r
+ rcall dsk_cboot ;init (de)blocking buffer
-; Read first sector of first CP/M partition
+; Read first sector of first CP/M partition (ipl)
lds xl,hostparttbl+1
lds xh,hostparttbl+2
lds yh,hostparttbl+4
rcall mmcReadSect
- rcall dsk_cboot ;init (de)blocking buffer
+; rcall dsk_cboot ;init (de)blocking buffer
;First sector of disk or first CP/M partition is in hostbuf.
ldiw x,IPLADDR
iplwriteloop:
ld temp,z+
- mem_write
- adiw xl,1
+ rcall dram_write_pp
cpi zl,low(hostbuf+128)
brne iplwriteloop
cpi zh,high(hostbuf+128)
sbci @0h, high(-@1)
.endm
+;------------------------------------------------
+; sub 16 bit constant from register pair
+
+.macro subiw
+ subi @0l, low(@1)
+ sbci @0h, high(@1)
+.endm
+
;------------------------------------------------
; Move single bit between two registers
;
bld @0,@1
.endm
+;------------------------------------------------
+;
+;
+;
+.macro INTERRUPT
+ .set pos_ = PC
+ .org @0 ; vector address
+ .if abs(pos_ - PC) > 2048
+ jmp pos_
+ .else
+ rjmp pos_ ; jump to handler
+ .endif
+ .org pos_ ; restore PC
+.endm
+
;------------------------------------------------
; Print string.
; printstring "String"
; ------------------- DRAM Refresh Interrupt --------------------
.cseg
-; refresh interupt; exec 2 cbr cycles
-refrint: ;4
- .org OC2Aaddr
- rjmp refrint ; tim2cmpa
- .org refrint
+; Refresh interupt; exec 2 cbr cycles
+
+ INTERRUPT OC2Aaddr
+
sbis P_RAS,ram_ras ;2
reti
; CAS RAS
pop zl
pop zh
ret
-\r
- .dseg\r
+
+ .dseg
.cseg
-
+
; ****************************************************************************
.cseg
-sysclockint:
- .org OC1Baddr ; Timer/Counter1 Compare Match B
- rjmp sysclockint ; 1ms system timer
- .org sysclockint
+; Timer/Counter1 Compare Match B interrupt
+
+ INTERRUPT OC1Baddr
+
push zl
in zl,SREG
push zl
;------------------------------------------------------------------
.cseg
-srxint:
- .org ICP1addr ; Timer/Counter1 Input Capture
- rjmp srxint ; Soft UART: RX
- .org srxint
+; Timer/Counter1 Input Capture interrupt
+
+ INTERRUPT ICP1addr
push temp
in temp,sreg
;----------------------------------------------------------------------
.cseg
-stxint:
- .org OC1Aaddr ; Timer/Counter1 Compare Match A
- rjmp stxint ; Soft UART: TX
- .org stxint
+; Timer/Counter1 Compare Match A interrupt
+
+ INTERRUPT OC1Aaddr
push temp
in temp,sreg