Add iobyte and console i/o drivers. WIP; Make CP/M or standalone version

diff --git a/Makefile b/Makefile
index 0bf356d936f9e98cf7ebf1a9af27493915784e5f..0d11916b6a756f670ceb3e69c725be0cf9208857 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,17 +1,23 @@
 # Build ddt180.com from ddt180.z80
 
 # Build ddt180.com from ddt180.z80
 

+CPM    := 0
+

 PROG   := ddt180
 PROG   := ddt180

+OBJ    := $(PROG).rel

 
 

-SRC    := $(PROG).z80
+ifneq ($(CPM),0)
+  SUFFIX := z80
+else
+  SUFFIX := 180
+endif

 
 EXTRA_DIST := autorevision.cache version.inc
 
 
 EXTRA_DIST := autorevision.cache version.inc
 

-OBJ    := $(SRC:.z80=.rel)

 
 DIST_NAME = $(PROG)_$(VERS).zip
 PREFIX = $(PROG)_$(VERS)
 
 
 DIST_NAME = $(PROG)_$(VERS).zip
 PREFIX = $(PROG)_$(VERS)
 

-ASM    := zxcc slrz80.com
+ASM    := zxcc slr$(SUFFIX).com

 LINK   := zxcc link80.com
 CP     := cp
 RM     := rm -f
 LINK   := zxcc link80.com
 CP     := cp
 RM     := rm -f


@@ -23,7 +29,10 @@ AS_OPT       := MFSX
 .phony: all
 all: $(PROG).com
 
 .phony: all
 all: $(PROG).com
 

+.intermediate: $(PROG).180

 
 

+$(PROG).180: $(PROG).z80
+       cp $< $@

 
 $(PROG).com: $(PROG).prl Makefile
        @# Remove the PRL header record (256 bytes)
 
 $(PROG).com: $(PROG).prl Makefile
        @# Remove the PRL header record (256 bytes)


@@ -32,7 +41,7 @@ $(PROG).com: $(PROG).prl Makefile
 $(PROG).prl: $(OBJ)
        $(LINK) -'$(PROG)[op]'
 
 $(PROG).prl: $(OBJ)
        $(LINK) -'$(PROG)[op]'
 

-$(PROG).rel: version.inc
+$(PROG).rel: config.inc version.inc

 
 $(foreach X,$(subst =,:=,$(subst ",,$(filter VCS_%,\
        $(shell autorevision -t sh -o $(CURDIR)/autorevision.cache)))),$(eval $X))
 
 $(foreach X,$(subst =,:=,$(subst ",,$(filter VCS_%,\
        $(shell autorevision -t sh -o $(CURDIR)/autorevision.cache)))),$(eval $X))


@@ -57,6 +66,11 @@ version.inc: autorevision.cache
                db      '$(VERS)'\r\n\
                endm\r\n\032" > $@
 
                db      '$(VERS)'\r\n\
                endm\r\n\032" > $@
 

+config.inc: Makefile
+       @printf "\
+       CPM     equ     $(CPM)\r\n\
+       \032" > $@
+

 .phony: dist
 dist: $(PROG).com version.inc
        $(GIT) archive --format=zip --prefix=$(PREFIX)/ -9 -o $(DIST_NAME) HEAD^{tree}
 .phony: dist
 dist: $(PROG).com version.inc
        $(GIT) archive --format=zip --prefix=$(PREFIX)/ -9 -o $(DIST_NAME) HEAD^{tree}


@@ -67,10 +81,10 @@ dist: $(PROG).com version.inc
 
 .phony: clean
 clean:
 
 .phony: clean
 clean:

-       rm -f $(PROG).com *.rel *.lst *.prl
+       rm -f $(PROG).com $(PROG).180 *.rel *.lst *.prl

 
 .SUFFIXES:
 
 .SUFFIXES:

-.SUFFIXES: .z80 .rel .prl
+.SUFFIXES: .z80 .180 .rel .prl

 
 
 define cpm-asm =
 
 
 define cpm-asm =


@@ -83,5 +97,5 @@ else awk -f filter-unref.awk ddt180.lst; fi ; \
 exit $${ERROR}
 endef
 
 exit $${ERROR}
 endef
 

-%.rel %lst: %.z80
+%.rel %lst: %.$(SUFFIX)

        @$(cpm-asm)
        @$(cpm-asm)

diff --git a/ddt180.z80 b/ddt180.z80
index 6f701ff512c9b60a7b8aed872e2fe13d44a185da..ef1dd6c6138961eb2618ad3178f07b053e4f8258 100644 (file)
--- a/ddt180.z80
+++ b/ddt180.z80
@@ -7,6 +7,8 @@
 ;   - Cut the .PRL header (first 256 byte) end rename the result to DDTZ.COM.\r
 \r
 \r
 ;   - Cut the .PRL header (first 256 byte) end rename the result to DDTZ.COM.\r
 \r
 \r

+       maclib  config.inc\r
+\r

 ; Some greneral definitions\r
 \r
 BS             equ     08h\r
 ; Some greneral definitions\r
 \r
 BS             equ     08h\r


@@ -43,11 +45,6 @@ di_or_ei:                    ;ints enabled/disabled while ddtz is running
        nop\r
        ret\r
 \r
        nop\r
        ret\r
 \r

-convec:\r
-const: jp      cist            ; return console input status\r
-conin: jp      ci              ; return console input character\r
-conout:        jp      co              ; send console output character\r
-\r

 ;-------------------------------------------------------------------------------\r
 \r
 signon:\r
 ;-------------------------------------------------------------------------------\r
 \r
 signon:\r


@@ -142,6 +139,8 @@ reloc_next:
 init::\r
        LD      SP,stack\r
 \r
 init::\r
        LD      SP,stack\r
 \r

+    if CPM\r
+\r

        ld      hl,(1)          ;wboot addr\r
        ld      de,convec\r
        ex      de,hl\r
        ld      hl,(1)          ;wboot addr\r
        ld      de,convec\r
        ex      de,hl\r


@@ -156,7 +155,26 @@ vini_l:
        ld      (hl),d\r
        inc     hl\r
        djnz    vini_l\r
        ld      (hl),d\r
        inc     hl\r
        djnz    vini_l\r

+    else\r
+       xor     a\r
+       dec     a\r
+       daa                     ; Z80: 099H, x180+: 0F9H\r
+       cp      99h             ; Result on 180 type cpus is F9 here. Thanks Hitachi\r
+       jr      z,ini_z80\r

 \r
 \r

+       xor     a\r
+       call    cinit\r
+       ld      a,1\r
+       call    cinit\r
+       jr      ini_sign\r
+ini_z80:\r
+;      if ...\r
+;      .printx Error: Not yet implemented!\r
+;      db "Stop\r
+;      endif\r
+    endif      ; CPM\r
+\r
+ini_sign:\r

        ld      hl,signon\r
        call    pstr\r
        ld      hl,ddtz_base\r
        ld      hl,signon\r
        call    pstr\r
        ld      hl,ddtz_base\r


@@ -185,11 +203,224 @@ l0093h:
 \r
 ;-------------------------------------------------------------------------------\r
 \r
 \r
 ;-------------------------------------------------------------------------------\r
 \r

-cist:\r
-ci:\r
-co:\r
+    if CPM\r
+\r
+convec:\r
+const: jp      0               ; return console input status\r
+conin: jp      0               ; return console input character\r
+conout:        jp      0               ; send console output character\r
+\r
+    else\r
+\r
+       include z180reg.inc\r
+\r
+iobyte equ     3\r
+\r
+max_device     equ 3\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+; init device\r
+cinit:                         ; a = device\r
+       call    vector_io_0\r
+       dw      as0init\r
+       dw      rret\r
+       dw      rret\r
+       dw      rret\r
+\r
+; character input status\r
+const:                         ; return a != 0 if character waiting\r
+       call    vector_io\r
+       dw      as0ista\r
+       dw      null$status\r
+       dw      csio_ista\r
+       dw      null$status\r
+\r
+; character input\r
+conin:                         ; return a = input char\r
+       call    vector_io\r
+       dw      as0inp\r
+       dw      null$input\r
+       dw      csio_inp\r
+       dw      null$input\r
+\r
+; character output\r
+conout:                                ; c = output char\r
+       call    vector_io\r
+       dw      as0out\r
+       dw      rret\r
+       dw      csio_out\r
+       dw      rret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+vector_io:\r
+       ld      a,(iobyte)\r
+vector_io_0:\r
+       pop     hl\r
+       cp      max_device\r
+       jr      c,exist\r
+       ld      a,max_device    ; use null device if a >= max$device\r
+exist:\r
+       call    add_hl_a2\r
+       ld      a,(hl)\r
+       inc     hl\r
+       ld      h,(hl)\r
+       ld      l,a\r
+       jp      (hl)\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+null$input:\r
+       ld      a,1Ah\r
+rret:\r
+       ret\r
+ret$true:\r
+       or      0FFh\r
+       ret\r
+\r
+null$status:\r
+       xor     a\r
+       ret\r
+\r
+;-------------------------------------------------------------------------------\r
+;\r
+; TC = (f PHI /(2*baudrate*Clock_mode)) - 2\r
+;\r
+; TC = (f PHI / (32 * baudrate)) - 2\r
+;\r
+; Init Serial I/O for console input and output (ASCI1)\r
+;\r
+\r
+\r
+\r
+as0init:\r
+       ld      hl,initab0\r
+       jp      ioiniml\r
+\r
+as1init:\r
+       ld      hl,initab1\r
+       jp      ioiniml\r
+\r
+\r
+       ld      a,M_MPBT\r
+       out0    (cntlb1),a\r
+       ld      a,M_RE + M_TE + M_MOD2  ;Rx/Tx enable\r
+       out0    (cntla1),a\r
+       ld      a,M_RIE\r
+       out0    (stat1),a       ;Enable rx interrupts\r
+\r
+       ret                     ;\r
+\r
+\r
+initab0:\r
+       db      1,stat0,0               ;Disable rx/tx interrupts\r
+                                       ;Enable baud rate generator\r
+       db      1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS\r
+       db      2,astc0l,low 28, high 28\r
+       db      1,cntlb0,M_MPBT         ;No MP Mode, X16\r
+       db      1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+       db      0\r
+\r
+initab1:\r
+       db      1,stat1,0               ;Disable rx/tx ints, disable CTS1\r
+       db      1,asext1,M_BRGMOD       ;Enable baud rate generator\r
+       db      2,astc1l,low 3, high 3\r
+       db      1,cntlb1,M_MPBT         ;No MP Mode, X16\r
+       db      1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+       db      0\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ioiniml:\r
+       push    bc\r
+       xor     a\r
+ioml_lp:\r
+       ld      b,(hl)\r
+       inc     hl\r
+       cp      b\r
+       jr      z,ioml_e\r
+\r
+       ld      c,(hl)\r
+       inc     hl\r
+       otimr\r
+       jr      ioml_lp\r
+ioml_e:\r
+       pop     bc\r
+       ret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+as0ista:\r
+       in0     a,(stat0)\r
+       rlca\r
+       sbc     a,a\r
+       ret\r
+\r
+as1ista:\r
+       in0     a,(stat1)\r
+       rlca\r
+       sbc     a,a\r
+       ret\r
+\r
+as0inp:\r
+       in0     a,(stat0)\r
+       rlca\r
+       jr      nc,as0inp\r
+       in0     a,rdr0\r
+       ret\r
+\r
+as1inp:\r
+       in0     a,(stat1)\r
+       rlca\r
+       jr      nc,as1inp\r
+       in0     a,rdr1\r
+       ret\r
+\r
+as0out:\r
+       in0     a,(stat0)\r
+       and     M_TDRE\r
+       jr      z,as0out\r
+       out0    (tdr0),c\r
+       ld      a,c\r
+       ret\r
+\r
+as1out:\r
+       in0     a,(stat1)\r
+       and     M_TDRE\r
+       jr      z,as1out\r
+       out0    (tdr1),c\r
+       ld      a,c\r
+       ret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+csio_ista:\r
+csio_inp:\r
+csio_out:\r
+       xor     a\r
+       ret\r
+\r
+\r
+       ld      a,0ffh\r
+do_csio:\r
+       push    af\r
+       call    csio_wait_te\r
+       pop     af\r
+       out0    (trdr),a\r
+       ld      a,M_CSIO_TE\r
+       out0    (cntr),a\r
+       call    csio_wait_te\r
+       in0     a,(trdr)\r
+       ret\r
+\r
+csio_wait_te:\r
+       in0     a,(cntr)\r
+       and     M_CSIO_TE\r
+       jr      nz,csio_wait_te\r

        ret\r
 \r
        ret\r
 \r

+    endif ; CPM\r

 \r
 ;-------------------------------------------------------------------------------\r
 \r
 \r
 ;-------------------------------------------------------------------------------\r
 \r

diff --git a/filter-unref.awk b/filter-unref.awk
index 3188f4a81b16d51c17cf6a8b41854dc55abc0991..3fe784f98f041de2a1603ce89d3f7adff9a848e3 100644 (file)
--- a/filter-unref.awk
+++ b/filter-unref.awk
@@ -83,6 +83,225 @@ BEGIN       {
                        ign["I_TST"] = 1
                        ign["I_TSTIO"] = 1
                        ign["I_XOR"] = 1
                        ign["I_TST"] = 1
                        ign["I_TSTIO"] = 1
                        ign["I_XOR"] = 1

+
+                       ign["ALTC"] = 1
+                       ign["ALTE"] = 1
+                       ign["ASTC0H"] = 1
+                       ign["ASTC1H"] = 1
+                       ign["BBR"] = 1
+                       ign["BCR0H"] = 1
+                       ign["BCR0L"] = 1
+                       ign["BCR1H"] = 1
+                       ign["BCR1L"] = 1
+                       ign["BREAK"] = 1
+                       ign["BREAKEN"] = 1
+                       ign["BRGMOD"] = 1
+                       ign["CBAR"] = 1
+                       ign["CBR"] = 1
+                       ign["CCR"] = 1
+                       ign["CKA1D"] = 1
+                       ign["CMR"] = 1
+                       ign["CSIO_EF"] = 1
+                       ign["CSIO_EIE"] = 1
+                       ign["CSIO_RE"] = 1
+                       ign["CSIO_SS0"] = 1
+                       ign["CSIO_SS1"] = 1
+                       ign["CSIO_SS2"] = 1
+                       ign["CSIO_TE"] = 1
+                       ign["CTS"] = 1
+                       ign["CTS0DIS"] = 1
+                       ign["CTS1E"] = 1
+                       ign["CYC0"] = 1
+                       ign["CYC1"] = 1
+                       ign["DAR0B"] = 1
+                       ign["DAR0H"] = 1
+                       ign["DAR0L"] = 1
+                       ign["DCD0"] = 1
+                       ign["DCD0DIS"] = 1
+                       ign["DCNTL"] = 1
+                       ign["DE0"] = 1
+                       ign["DE1"] = 1
+                       ign["DIE0"] = 1
+                       ign["DIE1"] = 1
+                       ign["DIM0"] = 1
+                       ign["DIM1"] = 1
+                       ign["DM0"] = 1
+                       ign["DM1"] = 1
+                       ign["DME"] = 1
+                       ign["DMODE"] = 1
+                       ign["DMS0"] = 1
+                       ign["DMS1"] = 1
+                       ign["DR"] = 1
+                       ign["DSTAT"] = 1
+                       ign["EFR"] = 1
+                       ign["FE"] = 1
+                       ign["FRC"] = 1
+                       ign["IAR1B"] = 1
+                       ign["IAR1H"] = 1
+                       ign["IAR1L"] = 1
+                       ign["ICR"] = 1
+                       ign["IL"] = 1
+                       ign["IOC"] = 1
+                       ign["IOSTP"] = 1
+                       ign["ITC"] = 1
+                       ign["ITE0"] = 1
+                       ign["ITE1"] = 1
+                       ign["ITE2"] = 1
+                       ign["IV$ASCI0"] = 1
+                       ign["IV$ASCI1"] = 1
+                       ign["IV$CSIO"] = 1
+                       ign["IV$DMA0"] = 1
+                       ign["IV$DMA1"] = 1
+                       ign["IV$INT1"] = 1
+                       ign["IV$INT2"] = 1
+                       ign["IV$PRT0"] = 1
+                       ign["IV$PRT1"] = 1
+                       ign["IWI0"] = 1
+                       ign["IWI1"] = 1
+                       ign["LNC"] = 1
+                       ign["M1E"] = 1
+                       ign["M1TE"] = 1
+                       ign["MAR1B"] = 1
+                       ign["MAR1H"] = 1
+                       ign["MAR1L"] = 1
+                       ign["MMOD"] = 1
+                       ign["MOD0"] = 1
+                       ign["MOD1"] = 1
+                       ign["MOD2"] = 1
+                       ign["MP"] = 1
+                       ign["MPBR"] = 1
+                       ign["MPBT"] = 1
+                       ign["MPE"] = 1
+                       ign["MWI0"] = 1
+                       ign["MWI1"] = 1
+                       ign["M_ALTC"] = 1
+                       ign["M_ALTE"] = 1
+                       ign["M_BREAK"] = 1
+                       ign["M_BREAKEN"] = 1
+                       ign["M_CKA1D"] = 1
+                       ign["M_CSIO_EF"] = 1
+                       ign["M_CSIO_EIE"] = 1
+                       ign["M_CSIO_RE"] = 1
+                       ign["M_CSIO_SS0"] = 1
+                       ign["M_CSIO_SS1"] = 1
+                       ign["M_CSIO_SS2"] = 1
+                       ign["M_CTS"] = 1
+                       ign["M_CTS1E"] = 1
+                       ign["M_CYC0"] = 1
+                       ign["M_CYC1"] = 1
+                       ign["M_DCD0"] = 1
+                       ign["M_DE0"] = 1
+                       ign["M_DE1"] = 1
+                       ign["M_DIE0"] = 1
+                       ign["M_DIE1"] = 1
+                       ign["M_DIM0"] = 1
+                       ign["M_DIM1"] = 1
+                       ign["M_DM0"] = 1
+                       ign["M_DM1"] = 1
+                       ign["M_DME"] = 1
+                       ign["M_DMS0"] = 1
+                       ign["M_DMS1"] = 1
+                       ign["M_DR"] = 1
+                       ign["M_EFR"] = 1
+                       ign["M_FE"] = 1
+                       ign["M_IOC"] = 1
+                       ign["M_IOSTP"] = 1
+                       ign["M_ITE0"] = 1
+                       ign["M_ITE1"] = 1
+                       ign["M_ITE2"] = 1
+                       ign["M_IWI"] = 1
+                       ign["M_LNC"] = 1
+                       ign["M_M1E"] = 1
+                       ign["M_M1TE"] = 1
+                       ign["M_MMOD"] = 1
+                       ign["M_MOD0"] = 1
+                       ign["M_MOD1"] = 1
+                       ign["M_MP"] = 1
+                       ign["M_MPBR"] = 1
+                       ign["M_MPE"] = 1
+                       ign["M_MWI"] = 1
+                       ign["M_NCD"] = 1
+                       ign["M_NDWE0"] = 1
+                       ign["M_NDWE1"] = 1
+                       ign["M_OVRN"] = 1
+                       ign["M_PEO"] = 1
+                       ign["M_PERR"] = 1
+                       ign["M_PS"] = 1
+                       ign["M_RDRF"] = 1
+                       ign["M_REFE"] = 1
+                       ign["M_REFW"] = 1
+                       ign["M_REQ1SEL0"] = 1
+                       ign["M_REQ1SEL1"] = 1
+                       ign["M_REQ1SEL2"] = 1
+                       ign["M_RTS0"] = 1
+                       ign["M_SENDBREAK"] = 1
+                       ign["M_SM0"] = 1
+                       ign["M_SM1"] = 1
+                       ign["M_SS"] = 1
+                       ign["M_TDE0"] = 1
+                       ign["M_TDE1"] = 1
+                       ign["M_TIE"] = 1
+                       ign["M_TIE0"] = 1
+                       ign["M_TIE1"] = 1
+                       ign["M_TIF0"] = 1
+                       ign["M_TIF1"] = 1
+                       ign["M_TOC0"] = 1
+                       ign["M_TOC1"] = 1
+                       ign["M_TRAP"] = 1
+                       ign["M_UFO"] = 1
+                       ign["M_X1"] = 1
+                       ign["M_X2CM"] = 1
+                       ign["NCD"] = 1
+                       ign["NDWE0"] = 1
+                       ign["NDWE1"] = 1
+                       ign["OMCR"] = 1
+                       ign["OVRN"] = 1
+                       ign["PEO"] = 1
+                       ign["PERR"] = 1
+                       ign["PS"] = 1
+                       ign["RCR"] = 1
+                       ign["RDRF"] = 1
+                       ign["RE"] = 1
+                       ign["REFE"] = 1
+                       ign["REFW"] = 1
+                       ign["REQ1SEL0"] = 1
+                       ign["REQ1SEL1"] = 1
+                       ign["REQ1SEL2"] = 1
+                       ign["RIE"] = 1
+                       ign["RLDR0H"] = 1
+                       ign["RLDR0L"] = 1
+                       ign["RLDR1H"] = 1
+                       ign["RLDR1L"] = 1
+                       ign["RTS0"] = 1
+                       ign["SAR0B"] = 1
+                       ign["SAR0H"] = 1
+                       ign["SAR0L"] = 1
+                       ign["SENDBREAK"] = 1
+                       ign["SM0"] = 1
+                       ign["SM1"] = 1
+                       ign["SS0"] = 1
+                       ign["SS1"] = 1
+                       ign["SS2"] = 1
+                       ign["TCR"] = 1
+                       ign["TDE0"] = 1
+                       ign["TDE1"] = 1
+                       ign["TDRE"] = 1
+                       ign["TE"] = 1
+                       ign["TIE"] = 1
+                       ign["TIE0"] = 1
+                       ign["TIE1"] = 1
+                       ign["TIF0"] = 1
+                       ign["TIF1"] = 1
+                       ign["TMDR0H"] = 1
+                       ign["TMDR0L"] = 1
+                       ign["TMDR1H"] = 1
+                       ign["TMDR1L"] = 1
+                       ign["TOC0"] = 1
+                       ign["TOC1"] = 1
+                       ign["TRAP"] = 1
+                       ign["UFO"] = 1
+                       ign["X1"] = 1
+                       ign["X2CM"] = 1

                }
 
 /\x1A/ { exit }
                }
 
 /\x1A/ { exit }