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Version 2.3.5: added A1TVBOX protocol.
[irmp.git] / irsnd.c
CommitLineData
4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
08f2dd9d 4 * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
7644ac04 6 * Supported mikrocontrollers:\r
7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
10 * ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
775fabfa 16 * $Id: irsnd.c,v 1.64 2012/12/06 08:49:33 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
08f2dd9d 36#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7\r
37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
46#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
47# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 48# define IRSND_PORT_LETTER B\r
49# define IRSND_BIT_NUMBER 0\r
08f2dd9d 50# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 51# define IRSND_PORT_LETTER B\r
52# define IRSND_BIT_NUMBER 1\r
08f2dd9d 53# else\r
54# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
55# endif // IRSND_OCx\r
21a4e0ee 56#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 57# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 58# define IRSND_PORT_LETTER A\r
59# define IRSND_BIT_NUMBER 2\r
90387f65 60# else\r
61# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
62# endif // IRSND_OCx\r
08f2dd9d 63#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
64# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 65# define IRSND_PORT_LETTER B\r
66# define IRSND_BIT_NUMBER 3\r
08f2dd9d 67# else\r
68# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
69# endif // IRSND_OCx\r
70#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
71# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 72# define IRSND_PORT_LETTER D\r
73# define IRSND_BIT_NUMBER 7\r
08f2dd9d 74# else\r
75# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
76# endif // IRSND_OCx\r
77#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
78# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 79# define IRSND_PORT_LETTER B\r
80# define IRSND_BIT_NUMBER 1\r
08f2dd9d 81# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 82# define IRSND_PORT_LETTER B\r
83# define IRSND_BIT_NUMBER 0\r
08f2dd9d 84# else\r
85# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
86# endif // IRSND_OCx\r
f50e01e7 87#elif defined (__AVR_ATmega164__) \\r
88 || defined (__AVR_ATmega324__) \\r
89 || defined (__AVR_ATmega644__) \\r
90 || defined (__AVR_ATmega644P__) \\r
0f700c8e 91 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
93# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 94# define IRSND_PORT_LETTER D\r
95# define IRSND_BIT_NUMBER 7\r
08f2dd9d 96# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 97# define IRSND_PORT_LETTER D\r
98# define IRSND_BIT_NUMBER 6\r
08f2dd9d 99# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 100# define IRSND_PORT_LETTER B\r
101# define IRSND_BIT_NUMBER 3\r
08f2dd9d 102# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 103# define IRSND_PORT_LETTER B\r
104# define IRSND_BIT_NUMBER 4\r
08f2dd9d 105# else\r
106# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
107# endif // IRSND_OCx\r
f50e01e7 108#elif defined (__AVR_ATmega48__) \\r
109 || defined (__AVR_ATmega88__) \\r
7644ac04 110 || defined (__AVR_ATmega88P__) \\r
f50e01e7 111 || defined (__AVR_ATmega168__) \\r
1f54e86c 112 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
114# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 115# define IRSND_PORT_LETTER B\r
116# define IRSND_BIT_NUMBER 3\r
08f2dd9d 117# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 118# define IRSND_PORT_LETTER D\r
119# define IRSND_BIT_NUMBER 3\r
08f2dd9d 120# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 121# define IRSND_PORT_LETTER D\r
122# define IRSND_BIT_NUMBER 6\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 5\r
08f2dd9d 126# else\r
127# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
128# endif // IRSND_OCx\r
f874da09 129#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 130# if IRSND_OCx == IRSND_OC0 \r
f874da09 131# define IRSND_PORT_LETTER B\r
132# define IRSND_BIT_NUMBER 0\r
08f2dd9d 133# elif IRSND_OCx == IRSND_OC1A \r
f874da09 134# define IRSND_PORT_LETTER D\r
135# define IRSND_BIT_NUMBER 5\r
08f2dd9d 136# elif IRSND_OCx == IRSND_OC1B \r
f874da09 137# define IRSND_PORT_LETTER E\r
138# define IRSND_BIT_NUMBER 2\r
08f2dd9d 139# else\r
140# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
141# endif // IRSND_OCx\r
9c86ff1a 142#elif defined (PIC_C18) //Microchip C18 compiler\r
143 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 144#elif defined (ARM_STM32) //STM32\r
145 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 146#else\r
08f2dd9d 147# if !defined (unix) && !defined (WIN32)\r
148# error mikrocontroller not defined, please fill in definitions here.\r
149# endif // unix, WIN32\r
f50e01e7 150#endif // __AVR...\r
151\r
f874da09 152#if defined(ATMEL_AVR)\r
153# define _CONCAT(a,b) a##b\r
154# define CONCAT(a,b) _CONCAT(a,b)\r
155# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
156# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
157# define IRSND_BIT IRSND_BIT_NUMBER\r
158#endif\r
159\r
9405f84a 160#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 161 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 162#else\r
9c86ff1a 163 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 164#endif\r
165\r
f50e01e7 166/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
167 * IR timings\r
168 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
169 */\r
4225a882 170#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
171#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
172#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
173#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
174#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
a7054daf 175#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
176#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 177\r
178#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
179#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 180#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 181#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
182#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
183#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
a7054daf 184#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 185\r
186#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
187#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
188#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
189#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
190#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
a7054daf 191#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 192\r
a7054daf 193#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
194#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 195\r
4225a882 196#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
197#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
198#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
199#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
200#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
a7054daf 201#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 202\r
770a1a9d 203#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
204#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
205#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
206#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
207#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
208#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
209#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
210\r
4225a882 211#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
212#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
213#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
214#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
215#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
a7054daf 216#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 217\r
218#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
219#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
a7054daf 220#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 221\r
222#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
223#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
224#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
225#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
a7054daf 226#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 227\r
228#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
229#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
230#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
a7054daf 231#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
232#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 233\r
beda975f 234#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
235#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
236#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
237#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
238#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
239\r
4225a882 240#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
241#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
242#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
243#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
244#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
a7054daf 245#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 246\r
247#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
248#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
249#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
250#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
251#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
252#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
a7054daf 253#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
254#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 255\r
5481e9cd 256#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
257#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
258#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
259#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
260#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
261#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
262#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
263#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
264#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
265#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
266#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
a7054daf 267#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 268\r
9c86ff1a 269#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
270#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
a7054daf 271#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
272#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 273#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 274\r
a48187fa 275#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
276\r
02ccdb69 277#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
278#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
279#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 280\r
9c86ff1a 281\r
08f2dd9d 282#ifdef PIC_C18 // PIC C18\r
283# define IRSND_FREQ_TYPE uint8_t\r
284# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
285# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
286# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
287# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
288# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
289# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
290# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
291#elif defined (ARM_STM32) // STM32\r
292# define IRSND_FREQ_TYPE uint32_t\r
293# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
294# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
295# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
296# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
297# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
298# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
299# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
300#else // AVR\r
a03ad359 301# if F_CPU >= 16000000L\r
302# define AVR_PRESCALER 8\r
303# else\r
304# define AVR_PRESCALER 1\r
305# endif\r
08f2dd9d 306# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 307# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
308# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
309# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
310# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
311# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
312# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
313# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 314#endif\r
4225a882 315\r
48664931 316#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
317#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
318#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
319#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
320#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
321#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 322\r
c7c9a4a1 323#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
324#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
325#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
326#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
327#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
328#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
329\r
c7a47e89 330#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
331#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
332#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
333#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
334#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
335#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
336#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
337\r
9405f84a 338#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
339#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
340#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
341#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
342#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
343#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 344#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
345\r
346#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
347#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
348#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
349#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
350#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
351#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
352#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 353\r
9c86ff1a 354static volatile uint8_t irsnd_busy = 0;\r
355static volatile uint8_t irsnd_protocol = 0;\r
356static volatile uint8_t irsnd_buffer[6] = {0};\r
357static volatile uint8_t irsnd_repeat = 0;\r
4225a882 358static volatile uint8_t irsnd_is_on = FALSE;\r
359\r
f50e01e7 360#if IRSND_USE_CALLBACK == 1\r
361static void (*irsnd_callback_ptr) (uint8_t);\r
362#endif // IRSND_USE_CALLBACK == 1\r
363\r
4225a882 364/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
365 * Switch PWM on\r
4225a882 366 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
367 */\r
368static void\r
369irsnd_on (void)\r
370{\r
371 if (! irsnd_is_on)\r
372 {\r
373#ifndef DEBUG\r
08f2dd9d 374# if defined(PIC_C18) // PIC C18\r
9c86ff1a 375 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
08f2dd9d 376# elif defined (ARM_STM32) // STM32\r
acd29fb9 377 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
378 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
379 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
08f2dd9d 380# else // AVR\r
381# if IRSND_OCx == IRSND_OC2 // use OC2\r
1f54e86c 382 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 383# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
f50e01e7 384 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 385# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
f50e01e7 386 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 387# elif IRSND_OCx == IRSND_OC0 // use OC0\r
1f54e86c 388 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 389# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
1f54e86c 390 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 391# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
1f54e86c 392 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 393# else\r
394# error wrong value of IRSND_OCx\r
395# endif // IRSND_OCx\r
396# endif // C18\r
4225a882 397#endif // DEBUG\r
f50e01e7 398\r
399#if IRSND_USE_CALLBACK == 1\r
400 if (irsnd_callback_ptr)\r
401 {\r
402 (*irsnd_callback_ptr) (TRUE);\r
403 }\r
404#endif // IRSND_USE_CALLBACK == 1\r
405\r
4225a882 406 irsnd_is_on = TRUE;\r
407 }\r
408}\r
409\r
410/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
411 * Switch PWM off\r
412 * @details Switches PWM off\r
413 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
414 */\r
415static void\r
416irsnd_off (void)\r
417{\r
418 if (irsnd_is_on)\r
419 {\r
420#ifndef DEBUG\r
9c86ff1a 421 \r
08f2dd9d 422# if defined(PIC_C18) // PIC C18\r
9c86ff1a 423 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
08f2dd9d 424# elif defined (ARM_STM32) // STM32\r
acd29fb9 425 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
426 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
427 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
428 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
08f2dd9d 429# else //AVR\r
9c86ff1a 430\r
08f2dd9d 431# if IRSND_OCx == IRSND_OC2 // use OC2\r
f50e01e7 432 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 433# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
f50e01e7 434 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 435# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
f50e01e7 436 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 437# elif IRSND_OCx == IRSND_OC0 // use OC0\r
1f54e86c 438 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 439# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
1f54e86c 440 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 441# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
1f54e86c 442 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 443# else\r
444# error wrong value of IRSND_OCx\r
445# endif // IRSND_OCx\r
f50e01e7 446 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 447# endif //C18\r
4225a882 448#endif // DEBUG\r
f50e01e7 449\r
450#if IRSND_USE_CALLBACK == 1\r
451 if (irsnd_callback_ptr)\r
452 {\r
453 (*irsnd_callback_ptr) (FALSE);\r
454 }\r
455#endif // IRSND_USE_CALLBACK == 1\r
456\r
4225a882 457 irsnd_is_on = FALSE;\r
458 }\r
459}\r
460\r
461/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
462 * Set PWM frequency\r
463 * @details sets pwm frequency\r
464 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
465 */\r
466static void\r
08f2dd9d 467irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 468{\r
469#ifndef DEBUG\r
08f2dd9d 470# if defined(PIC_C18) // PIC C18\r
471 OpenPWM(freq); \r
472 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
473# elif defined (ARM_STM32) // STM32\r
37b29f94 474 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 475\r
476 if (TimeBaseFreq == 0)\r
477 {\r
478 RCC_ClocksTypeDef RCC_ClocksStructure;\r
479 /* Get system clocks and store timer clock in variable */\r
480 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
481# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
37b29f94 482 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
483 {\r
484 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
485 }\r
486 else\r
487 {\r
488 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
489 }\r
08f2dd9d 490# else\r
37b29f94 491 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
492 {\r
493 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
494 }\r
495 else\r
496 {\r
497 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
498 }\r
08f2dd9d 499# endif\r
500 }\r
501\r
502 freq = TimeBaseFreq/freq;\r
503\r
37b29f94 504 /* Set frequency */\r
acd29fb9 505 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
37b29f94 506 /* Set duty cycle */\r
507 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
08f2dd9d 508# else // AVR\r
509\r
510# if IRSND_OCx == IRSND_OC2\r
511 OCR2 = freq; // use register OCR2 for OC2\r
512# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
513 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
514# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
515 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
516# elif IRSND_OCx == IRSND_OC0 // use OC0\r
517 OCR0 = freq; // use register OCR2 for OC2\r
518# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
519 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
520# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
521 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
522# else\r
523# error wrong value of IRSND_OCx\r
524# endif\r
525# endif //PIC_C18\r
4225a882 526#endif // DEBUG\r
527}\r
528\r
529/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
530 * Initialize the PWM\r
531 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
532 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
533 */\r
534void\r
535irsnd_init (void)\r
536{\r
537#ifndef DEBUG\r
08f2dd9d 538# if defined(PIC_C18) // PIC C18\r
539 OpenTimer;\r
540 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
541 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
542# elif defined (ARM_STM32) // STM32\r
37b29f94 543 GPIO_InitTypeDef GPIO_InitStructure;\r
544 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
545 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 546\r
547 /* GPIOx clock enable */\r
548# if defined (ARM_STM32L1XX)\r
549 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
550# elif defined (ARM_STM32F10X)\r
551 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
552# elif defined (ARM_STM32F4XX)\r
553 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
554# endif\r
555\r
556 /* GPIO Configuration */\r
557 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
558# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
559 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
560 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
561 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
562 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
563 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
564 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
565# elif defined (ARM_STM32F10X)\r
566 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
567 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
568 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
569 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
570# endif\r
571\r
572 /* TIMx clock enable */\r
573# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
574 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
575# else\r
576 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
577# endif\r
08f2dd9d 578\r
37b29f94 579 /* Time base configuration */\r
acd29fb9 580 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
37b29f94 581 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
582 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
583 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
584 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
585\r
586 /* PWM1 Mode configuration */\r
587 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
588 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
acd29fb9 589 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
37b29f94 590 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
591 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
592\r
593 /* Preload configuration */\r
08f2dd9d 594 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
acd29fb9 595 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
37b29f94 596\r
acd29fb9 597 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
08f2dd9d 598# else // AVR\r
599 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
600 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
601\r
602# if IRSND_OCx == IRSND_OC2 // use OC2\r
603 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 604# if AVR_PRESCALER == 8\r
605 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
606# else\r
607 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
608# endif\r
08f2dd9d 609# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
610 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 611# if AVR_PRESCALER == 8\r
4038f021 612 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 613# else\r
4038f021 614 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 615# endif\r
08f2dd9d 616# elif IRSND_OCx == IRSND_OC0 // use OC0\r
617 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 618# if AVR_PRESCALER == 8\r
619 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
620# else\r
621 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
622# endif\r
08f2dd9d 623# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
624 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 625# if AVR_PRESCALER == 8\r
4038f021 626 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 627# else\r
4038f021 628 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 629# endif\r
08f2dd9d 630# else\r
631# error wrong value of IRSND_OCx\r
632# endif\r
633 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
634# endif //PIC_C18\r
4225a882 635#endif // DEBUG\r
636}\r
637\r
f50e01e7 638#if IRSND_USE_CALLBACK == 1\r
639void\r
640irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
641{\r
642 irsnd_callback_ptr = cb;\r
643}\r
644#endif // IRSND_USE_CALLBACK == 1\r
645\r
4225a882 646uint8_t\r
647irsnd_is_busy (void)\r
648{\r
649 return irsnd_busy;\r
650}\r
651\r
652static uint16_t\r
653bitsrevervse (uint16_t x, uint8_t len)\r
654{\r
655 uint16_t xx = 0;\r
656\r
657 while(len)\r
658 {\r
659 xx <<= 1;\r
660 if (x & 1)\r
661 {\r
662 xx |= 1;\r
663 }\r
664 x >>= 1;\r
665 len--;\r
666 }\r
667 return xx;\r
668}\r
669\r
670\r
9547ee89 671#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
672static uint8_t sircs_additional_bitlen;\r
673#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
674\r
4225a882 675uint8_t\r
879b06c2 676irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 677{\r
678#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
679 static uint8_t toggle_bit_recs80;\r
680#endif\r
681#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
682 static uint8_t toggle_bit_recs80ext;\r
683#endif\r
684#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
685 static uint8_t toggle_bit_rc5;\r
9547ee89 686#endif\r
779fbc81 687#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 688 static uint8_t toggle_bit_rc6;\r
beda975f 689#endif\r
690#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
691 static uint8_t toggle_bit_thomson;\r
4225a882 692#endif\r
693 uint16_t address;\r
694 uint16_t command;\r
695\r
879b06c2 696 if (do_wait)\r
4225a882 697 {\r
879b06c2 698 while (irsnd_busy)\r
699 {\r
700 // do nothing;\r
701 }\r
702 }\r
703 else if (irsnd_busy)\r
704 {\r
705 return (FALSE);\r
4225a882 706 }\r
707\r
708 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 709 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 710\r
711 switch (irsnd_protocol)\r
712 {\r
713#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
714 case IRMP_SIRCS_PROTOCOL:\r
715 {\r
08f2dd9d 716 // uint8_t sircs_additional_command_len;\r
9547ee89 717 uint8_t sircs_additional_address_len;\r
718\r
719 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
720\r
721 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
722 {\r
08f2dd9d 723 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
9547ee89 724 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
725 }\r
726 else\r
727 {\r
08f2dd9d 728 // sircs_additional_command_len = sircs_additional_bitlen;\r
9547ee89 729 sircs_additional_address_len = 0;\r
730 }\r
4225a882 731\r
9547ee89 732 command = bitsrevervse (irmp_data_p->command, 15);\r
733\r
734 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
735 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
736\r
737 if (sircs_additional_address_len > 0)\r
738 {\r
739 address = bitsrevervse (irmp_data_p->address, 5);\r
740 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
741 irsnd_buffer[2] = (address & 0x000F) << 4;\r
742 }\r
4225a882 743 irsnd_busy = TRUE;\r
744 break;\r
745 }\r
746#endif\r
747#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
46dd89b7 748 case IRMP_APPLE_PROTOCOL:\r
c7a47e89 749 {\r
750 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
751 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
752\r
753 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
754 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
755\r
756 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
757\r
7644ac04 758 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
759 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
760 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
761 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
c7a47e89 762 irsnd_busy = TRUE;\r
763 break;\r
764 }\r
765 case IRMP_NEC_PROTOCOL:\r
4225a882 766 {\r
767 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
768 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
769\r
4225a882 770 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
771 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
772 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
7644ac04 773 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
774 irsnd_busy = TRUE;\r
775 break;\r
776 }\r
777#endif\r
778#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
779 case IRMP_NEC16_PROTOCOL:\r
780 {\r
781 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
782 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 783\r
7644ac04 784 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
785 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
786 irsnd_busy = TRUE;\r
787 break;\r
788 }\r
789#endif\r
790#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
791 case IRMP_NEC42_PROTOCOL:\r
792 {\r
793 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
794 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
795\r
796 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
a48187fa 797 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
7644ac04 798 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
799 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
800 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
801 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
4225a882 802 irsnd_busy = TRUE;\r
803 break;\r
804 }\r
805#endif\r
806#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
807 case IRMP_SAMSUNG_PROTOCOL:\r
808 {\r
809 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
810 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
811\r
4225a882 812 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
813 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
814 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
815 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
816 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
817 irsnd_busy = TRUE;\r
818 break;\r
819 }\r
820 case IRMP_SAMSUNG32_PROTOCOL:\r
821 {\r
822 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
823 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
824\r
4225a882 825 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
826 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
827 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
828 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
829 irsnd_busy = TRUE;\r
830 break;\r
831 }\r
832#endif\r
833#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
834 case IRMP_MATSUSHITA_PROTOCOL:\r
835 {\r
836 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
837 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
838\r
4225a882 839 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
840 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
841 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
842 irsnd_busy = TRUE;\r
843 break;\r
844 }\r
845#endif\r
770a1a9d 846#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
847 case IRMP_KASEIKYO_PROTOCOL:\r
848 {\r
a03ad359 849 uint8_t xor_value;\r
0f700c8e 850 uint16_t genre2;\r
770a1a9d 851\r
852 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
853 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
0f700c8e 854 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 855\r
a03ad359 856 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 857\r
858 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
859 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
a03ad359 860 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
0f700c8e 861 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
770a1a9d 862 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
863\r
a03ad359 864 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 865\r
a03ad359 866 irsnd_buffer[5] = xor_value;\r
770a1a9d 867 irsnd_busy = TRUE;\r
868 break;\r
869 }\r
870#endif\r
4225a882 871#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
872 case IRMP_RECS80_PROTOCOL:\r
873 {\r
874 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
875\r
4225a882 876 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
877 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
878 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
879 irsnd_busy = TRUE;\r
880 break;\r
881 }\r
882#endif\r
883#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
884 case IRMP_RECS80EXT_PROTOCOL:\r
885 {\r
886 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
887\r
4225a882 888 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
889 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
890 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
891 irsnd_busy = TRUE;\r
892 break;\r
893 }\r
894#endif\r
895#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
896 case IRMP_RC5_PROTOCOL:\r
897 {\r
898 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
899\r
4225a882 900 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
901 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
902 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
903 irsnd_busy = TRUE;\r
904 break;\r
905 }\r
906#endif\r
9547ee89 907#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
908 case IRMP_RC6_PROTOCOL:\r
909 {\r
910 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
911\r
912 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
913 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
914 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
915 irsnd_busy = TRUE;\r
916 break;\r
917 }\r
918#endif\r
919#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
920 case IRMP_RC6A_PROTOCOL:\r
921 {\r
922 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
923\r
924 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
925 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
926 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
927 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
928 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
929 irsnd_busy = TRUE;\r
930 break;\r
931 }\r
932#endif\r
4225a882 933#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
934 case IRMP_DENON_PROTOCOL:\r
935 {\r
d155e9ab 936 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
937 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
08f2dd9d 938 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
939 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
4225a882 940 irsnd_busy = TRUE;\r
941 break;\r
942 }\r
943#endif\r
beda975f 944#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
945 case IRMP_THOMSON_PROTOCOL:\r
946 {\r
947 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
948\r
949 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
950 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
951 irsnd_busy = TRUE;\r
952 break;\r
953 }\r
954#endif\r
4225a882 955#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
956 case IRMP_NUBERT_PROTOCOL:\r
957 {\r
4225a882 958 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
959 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
960 irsnd_busy = TRUE;\r
961 break;\r
962 }\r
5481e9cd 963#endif\r
964#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
965 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
966 {\r
5481e9cd 967 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
968 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
969 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
970 irsnd_busy = TRUE;\r
971 break;\r
972 }\r
4225a882 973#endif\r
5b437ff6 974#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
975 case IRMP_GRUNDIG_PROTOCOL:\r
976 {\r
977 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r
978\r
d155e9ab 979 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
980 irsnd_buffer[1] = 0xC0; // 11\r
981 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
982 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
983\r
984 irsnd_busy = TRUE;\r
985 break;\r
986 }\r
987#endif\r
a48187fa 988#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
989 case IRMP_IR60_PROTOCOL:\r
990 {\r
991 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 992#if 0\r
a48187fa 993 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
994 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 995#else\r
996 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
997 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
998#endif\r
a48187fa 999\r
1000 irsnd_busy = TRUE;\r
1001 break;\r
1002 }\r
1003#endif\r
d155e9ab 1004#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1005 case IRMP_NOKIA_PROTOCOL:\r
1006 {\r
1007 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1008 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1009\r
1010 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1011 irsnd_buffer[1] = 0xFF; // 11111111\r
1012 irsnd_buffer[2] = 0x80; // 1\r
1013 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1014 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1015 irsnd_buffer[5] = (address << 7); // A\r
5b437ff6 1016\r
1017 irsnd_busy = TRUE;\r
1018 break;\r
1019 }\r
1020#endif\r
a7054daf 1021#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
1022 case IRMP_SIEMENS_PROTOCOL:\r
1023 {\r
1024 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r
1025 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r
9405f84a 1026 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
1027\r
a7054daf 1028 irsnd_busy = TRUE;\r
1029 break;\r
1030 }\r
b5ea7869 1031#endif\r
48664931 1032#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
1033 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1034 {\r
48664931 1035 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1036 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
b5ea7869 1037\r
c7c9a4a1 1038 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1039 irsnd_buffer[1] = 0; // 00000000\r
1040 irsnd_buffer[2] = 0; // 0000RRRR\r
1041 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1042 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1043 irsnd_busy = TRUE;\r
1044 break;\r
1045 }\r
1046#endif\r
1047#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1048 case IRMP_RCCAR_PROTOCOL:\r
1049 {\r
1050 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1051 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1052\r
1053 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1054 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1055 \r
b5ea7869 1056 irsnd_busy = TRUE;\r
1057 break;\r
1058 }\r
a7054daf 1059#endif\r
c7a47e89 1060#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1061 case IRMP_JVC_PROTOCOL:\r
1062 {\r
1063 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1064 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
1065\r
1066 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1067 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
1068\r
1069 irsnd_busy = TRUE;\r
1070 break;\r
1071 }\r
1072#endif\r
9405f84a 1073#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1074 case IRMP_NIKON_PROTOCOL:\r
1075 {\r
1076 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1077 irsnd_busy = TRUE;\r
1078 break;\r
1079 }\r
f50e01e7 1080#endif\r
1081#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1082 case IRMP_LEGO_PROTOCOL:\r
1083 {\r
1084 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
1085\r
1086 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1087 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1088\r
1089 irsnd_protocol = IRMP_LEGO_PROTOCOL;\r
1090 irsnd_busy = TRUE;\r
1091 break;\r
1092 }\r
9405f84a 1093#endif\r
4225a882 1094 default:\r
1095 {\r
1096 break;\r
1097 }\r
1098 }\r
1099\r
1100 return irsnd_busy;\r
1101}\r
1102\r
beda975f 1103void\r
1104irsnd_stop (void)\r
1105{\r
acf7fb44 1106 irsnd_repeat = 0;\r
beda975f 1107}\r
1108\r
4225a882 1109/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1110 * ISR routine\r
1111 * @details ISR routine, called 10000 times per second\r
1112 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1113 */\r
1114uint8_t\r
1115irsnd_ISR (void)\r
1116{\r
a48187fa 1117 static uint8_t send_trailer = FALSE;\r
1118 static uint8_t current_bit = 0xFF;\r
1119 static uint8_t pulse_counter = 0;\r
1120 static IRSND_PAUSE_LEN pause_counter = 0;\r
1121 static uint8_t startbit_pulse_len = 0;\r
1122 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1123 static uint8_t pulse_1_len = 0;\r
1124 static uint8_t pause_1_len = 0;\r
1125 static uint8_t pulse_0_len = 0;\r
1126 static uint8_t pause_0_len = 0;\r
1127 static uint8_t has_stop_bit = 0;\r
1128 static uint8_t new_frame = TRUE;\r
1129 static uint8_t complete_data_len = 0;\r
1130 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1131 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1132 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1133 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1134 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1135 static uint8_t repeat_counter = 0; // repeat counter\r
1136 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1137 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1138#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1139 static uint8_t last_bit_value;\r
5481e9cd 1140#endif\r
a48187fa 1141 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1142 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1143\r
1144 if (irsnd_busy)\r
1145 {\r
1146 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1147 {\r
a7054daf 1148 if (auto_repetition_counter > 0)\r
4225a882 1149 {\r
a7054daf 1150 auto_repetition_pause_counter++;\r
4225a882 1151\r
08f2dd9d 1152#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1153 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1154 {\r
1155 repeat_frame_pause_len--;\r
1156 }\r
1157#endif\r
1158\r
a7054daf 1159 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
4225a882 1160 {\r
a7054daf 1161 auto_repetition_pause_counter = 0;\r
4225a882 1162\r
08f2dd9d 1163#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
a48187fa 1164 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
4225a882 1165 {\r
1166 current_bit = 16;\r
1167 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1168 }\r
08f2dd9d 1169 else\r
1170#endif\r
1171#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
1172 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
5b437ff6 1173 {\r
1174 current_bit = 15;\r
1175 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1176 }\r
08f2dd9d 1177 else\r
1178#endif\r
1179#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
1180 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
a48187fa 1181 {\r
1182 current_bit = 7;\r
1183 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1184 }\r
08f2dd9d 1185 else\r
1186#endif\r
1187#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1188 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
d155e9ab 1189 {\r
a7054daf 1190 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
d155e9ab 1191 {\r
1192 current_bit = 23;\r
1193 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1194 }\r
a7054daf 1195 else // nokia stop frame\r
d155e9ab 1196 {\r
1197 current_bit = 0xFF;\r
1198 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1199 }\r
1200 }\r
08f2dd9d 1201 else\r
1202#endif\r
1203 {\r
1204 ;\r
1205 }\r
4225a882 1206 }\r
1207 else\r
1208 {\r
1209#ifdef DEBUG\r
1210 if (irsnd_is_on)\r
1211 {\r
1212 putchar ('0');\r
1213 }\r
1214 else\r
1215 {\r
1216 putchar ('1');\r
1217 }\r
1218#endif\r
1219 return irsnd_busy;\r
1220 }\r
1221 }\r
beda975f 1222#if 0\r
a7054daf 1223 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1224#else\r
1225 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
1226#endif\r
a7054daf 1227 {\r
1228 packet_repeat_pause_counter++;\r
1229\r
1230#ifdef DEBUG\r
1231 if (irsnd_is_on)\r
1232 {\r
1233 putchar ('0');\r
1234 }\r
1235 else\r
1236 {\r
1237 putchar ('1');\r
1238 }\r
1239#endif\r
1240 return irsnd_busy;\r
1241 }\r
4225a882 1242 else\r
1243 {\r
0f700c8e 1244 if (send_trailer)\r
1245 {\r
1246 irsnd_busy = FALSE;\r
6ab7d63c 1247 send_trailer = FALSE;\r
0f700c8e 1248 return irsnd_busy;\r
1249 }\r
9c86ff1a 1250 \r
a7054daf 1251 n_repeat_frames = irsnd_repeat;\r
beda975f 1252\r
1253 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1254 {\r
1255 n_repeat_frames = 255;\r
1256 }\r
1257\r
a7054daf 1258 packet_repeat_pause_counter = 0;\r
1259 pulse_counter = 0;\r
1260 pause_counter = 0;\r
5481e9cd 1261\r
4225a882 1262 switch (irsnd_protocol)\r
1263 {\r
1264#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
1265 case IRMP_SIRCS_PROTOCOL:\r
1266 {\r
a7054daf 1267 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
53c11f07 1268 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1269 pulse_1_len = SIRCS_1_PULSE_LEN;\r
53c11f07 1270 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
a7054daf 1271 pulse_0_len = SIRCS_0_PULSE_LEN;\r
53c11f07 1272 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
a7054daf 1273 has_stop_bit = SIRCS_STOP_BIT;\r
9547ee89 1274 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
a7054daf 1275 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1276 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1277 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1278 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1279 break;\r
1280 }\r
1281#endif\r
1282#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
1283 case IRMP_NEC_PROTOCOL:\r
1284 {\r
a7054daf 1285 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1286\r
1287 if (repeat_counter > 0)\r
1288 {\r
53c11f07 1289 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1290 complete_data_len = 0;\r
1291 }\r
1292 else\r
1293 {\r
53c11f07 1294 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1295 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1296 }\r
1297\r
1298 pulse_1_len = NEC_PULSE_LEN;\r
53c11f07 1299 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
a7054daf 1300 pulse_0_len = NEC_PULSE_LEN;\r
53c11f07 1301 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
a7054daf 1302 has_stop_bit = NEC_STOP_BIT;\r
1303 n_auto_repetitions = 1; // 1 frame\r
1304 auto_repetition_pause_len = 0;\r
1305 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1306 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1307 break;\r
1308 }\r
1309#endif\r
7644ac04 1310#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1311 case IRMP_NEC16_PROTOCOL:\r
1312 {\r
1313 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1314 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1315 pulse_1_len = NEC_PULSE_LEN;\r
1316 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1317 pulse_0_len = NEC_PULSE_LEN;\r
1318 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1319 has_stop_bit = NEC_STOP_BIT;\r
1320 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1321 n_auto_repetitions = 1; // 1 frame\r
1322 auto_repetition_pause_len = 0;\r
1323 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1324 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1325 break;\r
1326 }\r
1327#endif\r
1328#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
1329 case IRMP_NEC42_PROTOCOL:\r
1330 {\r
1331 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1332 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1333 pulse_1_len = NEC_PULSE_LEN;\r
1334 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1335 pulse_0_len = NEC_PULSE_LEN;\r
1336 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1337 has_stop_bit = NEC_STOP_BIT;\r
1338 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1339 n_auto_repetitions = 1; // 1 frame\r
1340 auto_repetition_pause_len = 0;\r
1341 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1342 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1343 break;\r
1344 }\r
1345#endif\r
4225a882 1346#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1347 case IRMP_SAMSUNG_PROTOCOL:\r
1348 {\r
a7054daf 1349 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
53c11f07 1350 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1351 pulse_1_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1352 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
a7054daf 1353 pulse_0_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1354 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
a7054daf 1355 has_stop_bit = SAMSUNG_STOP_BIT;\r
1356 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1357 n_auto_repetitions = 1; // 1 frame\r
1358 auto_repetition_pause_len = 0;\r
1359 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1360 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1361 break;\r
1362 }\r
1363\r
1364 case IRMP_SAMSUNG32_PROTOCOL:\r
1365 {\r
a7054daf 1366 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
53c11f07 1367 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1368 pulse_1_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1369 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
a7054daf 1370 pulse_0_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1371 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
a7054daf 1372 has_stop_bit = SAMSUNG_STOP_BIT;\r
1373 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
1374 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r
1375 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1376 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1377 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1378 break;\r
1379 }\r
1380#endif\r
1381#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
1382 case IRMP_MATSUSHITA_PROTOCOL:\r
1383 {\r
a7054daf 1384 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
53c11f07 1385 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1386 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
53c11f07 1387 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
a7054daf 1388 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
53c11f07 1389 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
a7054daf 1390 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1391 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1392 n_auto_repetitions = 1; // 1 frame\r
1393 auto_repetition_pause_len = 0;\r
1394 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1395 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1396 break;\r
1397 }\r
1398#endif\r
770a1a9d 1399#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
1400 case IRMP_KASEIKYO_PROTOCOL:\r
1401 {\r
1402 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
53c11f07 1403 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
770a1a9d 1404 pulse_1_len = KASEIKYO_PULSE_LEN;\r
53c11f07 1405 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
770a1a9d 1406 pulse_0_len = KASEIKYO_PULSE_LEN;\r
53c11f07 1407 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
770a1a9d 1408 has_stop_bit = KASEIKYO_STOP_BIT;\r
1409 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1410 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1411 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1412 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1413 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1414 break;\r
1415 }\r
1416#endif\r
4225a882 1417#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
1418 case IRMP_RECS80_PROTOCOL:\r
1419 {\r
a7054daf 1420 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
53c11f07 1421 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1422 pulse_1_len = RECS80_PULSE_LEN;\r
53c11f07 1423 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
a7054daf 1424 pulse_0_len = RECS80_PULSE_LEN;\r
53c11f07 1425 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
a7054daf 1426 has_stop_bit = RECS80_STOP_BIT;\r
1427 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1428 n_auto_repetitions = 1; // 1 frame\r
1429 auto_repetition_pause_len = 0;\r
1430 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1431 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1432 break;\r
1433 }\r
1434#endif\r
1435#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
1436 case IRMP_RECS80EXT_PROTOCOL:\r
1437 {\r
a7054daf 1438 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
53c11f07 1439 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1440 pulse_1_len = RECS80EXT_PULSE_LEN;\r
53c11f07 1441 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
a7054daf 1442 pulse_0_len = RECS80EXT_PULSE_LEN;\r
53c11f07 1443 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
a7054daf 1444 has_stop_bit = RECS80EXT_STOP_BIT;\r
1445 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1446 n_auto_repetitions = 1; // 1 frame\r
1447 auto_repetition_pause_len = 0;\r
1448 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1449 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1450 break;\r
1451 }\r
1452#endif\r
1453#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
1454 case IRMP_RC5_PROTOCOL:\r
1455 {\r
a7054daf 1456 startbit_pulse_len = RC5_BIT_LEN;\r
1457 startbit_pause_len = RC5_BIT_LEN;\r
1458 pulse_len = RC5_BIT_LEN;\r
1459 pause_len = RC5_BIT_LEN;\r
1460 has_stop_bit = RC5_STOP_BIT;\r
1461 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1462 n_auto_repetitions = 1; // 1 frame\r
1463 auto_repetition_pause_len = 0;\r
1464 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1465 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1466 break;\r
1467 }\r
1468#endif\r
9547ee89 1469#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
1470 case IRMP_RC6_PROTOCOL:\r
1471 {\r
1472 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
53c11f07 1473 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
9547ee89 1474 pulse_len = RC6_BIT_LEN;\r
1475 pause_len = RC6_BIT_LEN;\r
1476 has_stop_bit = RC6_STOP_BIT;\r
1477 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1478 n_auto_repetitions = 1; // 1 frame\r
1479 auto_repetition_pause_len = 0;\r
1480 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1481 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1482 break;\r
1483 }\r
1484#endif\r
1485#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
1486 case IRMP_RC6A_PROTOCOL:\r
1487 {\r
1488 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
53c11f07 1489 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
9547ee89 1490 pulse_len = RC6_BIT_LEN;\r
1491 pause_len = RC6_BIT_LEN;\r
1492 has_stop_bit = RC6_STOP_BIT;\r
1493 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1494 n_auto_repetitions = 1; // 1 frame\r
1495 auto_repetition_pause_len = 0;\r
1496 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1497 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1498 break;\r
1499 }\r
1500#endif\r
4225a882 1501#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1502 case IRMP_DENON_PROTOCOL:\r
1503 {\r
a7054daf 1504 startbit_pulse_len = 0x00;\r
1505 startbit_pause_len = 0x00;\r
1506 pulse_1_len = DENON_PULSE_LEN;\r
53c11f07 1507 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
a7054daf 1508 pulse_0_len = DENON_PULSE_LEN;\r
53c11f07 1509 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
a7054daf 1510 has_stop_bit = DENON_STOP_BIT;\r
1511 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1512 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1513 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1514 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
779fbc81 1515 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
4225a882 1516 break;\r
1517 }\r
1518#endif\r
beda975f 1519#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
1520 case IRMP_THOMSON_PROTOCOL:\r
1521 {\r
1522 startbit_pulse_len = 0x00;\r
1523 startbit_pause_len = 0x00;\r
1524 pulse_1_len = THOMSON_PULSE_LEN;\r
1525 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1526 pulse_0_len = THOMSON_PULSE_LEN;\r
1527 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1528 has_stop_bit = THOMSON_STOP_BIT;\r
1529 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1530 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1531 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1532 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1533 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1534 break;\r
1535 }\r
1536#endif\r
4225a882 1537#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
1538 case IRMP_NUBERT_PROTOCOL:\r
1539 {\r
a7054daf 1540 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
53c11f07 1541 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1542 pulse_1_len = NUBERT_1_PULSE_LEN;\r
53c11f07 1543 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
a7054daf 1544 pulse_0_len = NUBERT_0_PULSE_LEN;\r
53c11f07 1545 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
a7054daf 1546 has_stop_bit = NUBERT_STOP_BIT;\r
1547 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1548 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1549 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1550 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1551 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1552 break;\r
1553 }\r
5481e9cd 1554#endif\r
1555#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1556 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1557 {\r
a7054daf 1558 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
53c11f07 1559 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
a7054daf 1560 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1561 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
a7054daf 1562 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1563 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
a7054daf 1564 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1565 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1566 n_auto_repetitions = 1; // 1 frame\r
1567 auto_repetition_pause_len = 0;\r
1568 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1569 last_bit_value = 0;\r
5481e9cd 1570 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1571 break;\r
1572 }\r
5b437ff6 1573#endif\r
1574#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
1575 case IRMP_GRUNDIG_PROTOCOL:\r
1576 {\r
89e8cafb 1577 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1578 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1579 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1580 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1581 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
a7054daf 1582 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1583 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1584 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
a48187fa 1585 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
d155e9ab 1586 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
a48187fa 1587 break;\r
1588 }\r
1589#endif\r
1590#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
1591 case IRMP_IR60_PROTOCOL:\r
1592 {\r
1593 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1594 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1595 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1596 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1597 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1598 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1599 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1600 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1601 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1602 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
d155e9ab 1603 break;\r
1604 }\r
1605#endif\r
1606#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1607 case IRMP_NOKIA_PROTOCOL:\r
1608 {\r
89e8cafb 1609 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1610 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1611 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1612 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1613 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
a7054daf 1614 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
08f2dd9d 1615 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1616 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1617 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
d155e9ab 1618 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
5b437ff6 1619 break;\r
1620 }\r
a7054daf 1621#endif\r
1622#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
1623 case IRMP_SIEMENS_PROTOCOL:\r
1624 {\r
1625 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1626 startbit_pause_len = SIEMENS_BIT_LEN;\r
1627 pulse_len = SIEMENS_BIT_LEN;\r
1628 pause_len = SIEMENS_BIT_LEN;\r
02ccdb69 1629 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
a7054daf 1630 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r
1631 n_auto_repetitions = 1; // 1 frame\r
1632 auto_repetition_pause_len = 0;\r
1633 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1634 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1635 break;\r
1636 }\r
b5ea7869 1637#endif\r
48664931 1638#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
1639 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1640 {\r
48664931 1641 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
53c11f07 1642 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
48664931 1643 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
1644 pulse_1_len = FDC_PULSE_LEN;\r
53c11f07 1645 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
48664931 1646 pulse_0_len = FDC_PULSE_LEN;\r
53c11f07 1647 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
48664931 1648 has_stop_bit = FDC_STOP_BIT;\r
b5ea7869 1649 n_auto_repetitions = 1; // 1 frame\r
1650 auto_repetition_pause_len = 0;\r
48664931 1651 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
b5ea7869 1652 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1653 break;\r
1654 }\r
c7c9a4a1 1655#endif\r
1656#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1657 case IRMP_RCCAR_PROTOCOL:\r
1658 {\r
1659 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
53c11f07 1660 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
c7c9a4a1 1661 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
1662 pulse_1_len = RCCAR_PULSE_LEN;\r
53c11f07 1663 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
c7c9a4a1 1664 pulse_0_len = RCCAR_PULSE_LEN;\r
53c11f07 1665 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
c7c9a4a1 1666 has_stop_bit = RCCAR_STOP_BIT;\r
1667 n_auto_repetitions = 1; // 1 frame\r
1668 auto_repetition_pause_len = 0;\r
1669 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
1670 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1671 break;\r
1672 }\r
4225a882 1673#endif\r
c7a47e89 1674#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1675 case IRMP_JVC_PROTOCOL:\r
1676 {\r
1677 if (repeat_counter != 0) // skip start bit if repetition frame\r
1678 {\r
1679 current_bit = 0;\r
1680 }\r
1681\r
1682 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
53c11f07 1683 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
c7a47e89 1684 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
1685 pulse_1_len = JVC_PULSE_LEN;\r
53c11f07 1686 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
c7a47e89 1687 pulse_0_len = JVC_PULSE_LEN;\r
53c11f07 1688 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
c7a47e89 1689 has_stop_bit = JVC_STOP_BIT;\r
1690 n_auto_repetitions = 1; // 1 frame\r
1691 auto_repetition_pause_len = 0;\r
1692 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
1693 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
c7a47e89 1694 break;\r
1695 }\r
1696#endif\r
9405f84a 1697#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1698 case IRMP_NIKON_PROTOCOL:\r
1699 {\r
1700 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
775fabfa 1701 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
9405f84a 1702 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
1703 pulse_1_len = NIKON_PULSE_LEN;\r
53c11f07 1704 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
9405f84a 1705 pulse_0_len = NIKON_PULSE_LEN;\r
53c11f07 1706 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
9405f84a 1707 has_stop_bit = NIKON_STOP_BIT;\r
1708 n_auto_repetitions = 1; // 1 frame\r
1709 auto_repetition_pause_len = 0;\r
1710 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
1711 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
9405f84a 1712 break;\r
1713 }\r
1714#endif\r
f50e01e7 1715#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1716 case IRMP_LEGO_PROTOCOL:\r
1717 {\r
1718 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
1719 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
1720 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
1721 pulse_1_len = LEGO_PULSE_LEN;\r
1722 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
1723 pulse_0_len = LEGO_PULSE_LEN;\r
1724 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
1725 has_stop_bit = LEGO_STOP_BIT;\r
1726 n_auto_repetitions = 1; // 1 frame\r
1727 auto_repetition_pause_len = 0;\r
1728 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
1729 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1730 break;\r
1731 }\r
1732#endif\r
4225a882 1733 default:\r
1734 {\r
1735 irsnd_busy = FALSE;\r
1736 break;\r
1737 }\r
1738 }\r
1739 }\r
1740 }\r
1741\r
1742 if (irsnd_busy)\r
1743 {\r
1744 new_frame = FALSE;\r
a7054daf 1745\r
4225a882 1746 switch (irsnd_protocol)\r
1747 {\r
1748#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
1749 case IRMP_SIRCS_PROTOCOL:\r
1750#endif\r
1751#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
1752 case IRMP_NEC_PROTOCOL:\r
1753#endif\r
7644ac04 1754#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1755 case IRMP_NEC16_PROTOCOL:\r
1756#endif\r
1757#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
1758 case IRMP_NEC42_PROTOCOL:\r
1759#endif\r
4225a882 1760#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1761 case IRMP_SAMSUNG_PROTOCOL:\r
1762 case IRMP_SAMSUNG32_PROTOCOL:\r
1763#endif\r
1764#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
1765 case IRMP_MATSUSHITA_PROTOCOL:\r
1766#endif\r
770a1a9d 1767#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
1768 case IRMP_KASEIKYO_PROTOCOL:\r
1769#endif\r
4225a882 1770#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
1771 case IRMP_RECS80_PROTOCOL:\r
1772#endif\r
1773#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
1774 case IRMP_RECS80EXT_PROTOCOL:\r
1775#endif\r
1776#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1777 case IRMP_DENON_PROTOCOL:\r
1778#endif\r
beda975f 1779#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
1780 case IRMP_THOMSON_PROTOCOL:\r
1781#endif\r
4225a882 1782#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
1783 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 1784#endif\r
1785#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1786 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 1787#endif\r
c7c9a4a1 1788#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
48664931 1789 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1790#endif\r
c7c9a4a1 1791#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1792 case IRMP_RCCAR_PROTOCOL:\r
1793#endif\r
c7a47e89 1794#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1795 case IRMP_JVC_PROTOCOL:\r
1796#endif\r
9405f84a 1797#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1798 case IRMP_NIKON_PROTOCOL:\r
1799#endif\r
f50e01e7 1800#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1801 case IRMP_LEGO_PROTOCOL:\r
1802#endif\r
a7054daf 1803\r
1804\r
7644ac04 1805#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
1806 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 1807 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
c7a47e89 1808 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
beda975f 1809 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r
4225a882 1810 {\r
08f2dd9d 1811#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1812 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
1813 {\r
1814 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
1815 {\r
1816 auto_repetition_pause_len--;\r
1817 }\r
1818\r
1819 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1820 {\r
1821 repeat_frame_pause_len--;\r
1822 }\r
1823 }\r
1824#endif\r
1825\r
5481e9cd 1826 if (pulse_counter == 0)\r
4225a882 1827 {\r
5481e9cd 1828 if (current_bit == 0xFF) // send start bit\r
1829 {\r
1830 pulse_len = startbit_pulse_len;\r
1831 pause_len = startbit_pause_len;\r
1832 }\r
1833 else if (current_bit < complete_data_len) // send n'th bit\r
4225a882 1834 {\r
5481e9cd 1835#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1836 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
4225a882 1837 {\r
5481e9cd 1838 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
1839 {\r
1840 pulse_len = SAMSUNG_PULSE_LEN;\r
1841 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
53c11f07 1842 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
5481e9cd 1843 }\r
1844 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
1845 {\r
1846 pulse_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1847 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
5481e9cd 1848 }\r
1849 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
1850 {\r
1851 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1852\r
1853 pulse_len = SAMSUNG_PULSE_LEN;\r
1854 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
53c11f07 1855 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
5481e9cd 1856 }\r
4225a882 1857 }\r
5481e9cd 1858 else\r
1859#endif\r
1860\r
7644ac04 1861#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1862 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
1863 {\r
1864 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
1865 {\r
1866 pulse_len = NEC_PULSE_LEN;\r
1867 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1868 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1869 }\r
1870 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
1871 {\r
1872 pulse_len = NEC_PULSE_LEN;\r
1873 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1874 }\r
1875 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
1876 {\r
1877 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1878\r
1879 pulse_len = NEC_PULSE_LEN;\r
1880 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1881 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1882 }\r
1883 }\r
1884 else\r
1885#endif\r
1886\r
5481e9cd 1887#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1888 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
4225a882 1889 {\r
5481e9cd 1890 if (current_bit == 0) // send 2nd start bit\r
1891 {\r
1892 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
53c11f07 1893 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
5481e9cd 1894 }\r
1895 else if (current_bit == 1) // send 3rd start bit\r
1896 {\r
1897 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
53c11f07 1898 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
5481e9cd 1899 }\r
1900 else if (current_bit == 2) // send 4th start bit\r
1901 {\r
1902 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
53c11f07 1903 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
5481e9cd 1904 }\r
1905 else if (current_bit == 19) // send trailer bit\r
1906 {\r
1907 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1908 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
5481e9cd 1909 }\r
1910 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
1911 {\r
1912 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r
1913 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
1914\r
1915 if (cur_bit_value == last_bit_value)\r
1916 {\r
53c11f07 1917 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
5481e9cd 1918 }\r
1919 else\r
1920 {\r
53c11f07 1921 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
5481e9cd 1922 last_bit_value = cur_bit_value;\r
1923 }\r
1924 }\r
4225a882 1925 }\r
5481e9cd 1926 else\r
1927#endif\r
1928 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r
4225a882 1929 {\r
5481e9cd 1930 pulse_len = pulse_1_len;\r
1931 pause_len = pause_1_len;\r
1932 }\r
1933 else\r
1934 {\r
1935 pulse_len = pulse_0_len;\r
1936 pause_len = pause_0_len;\r
4225a882 1937 }\r
1938 }\r
5481e9cd 1939 else if (has_stop_bit) // send stop bit\r
4225a882 1940 {\r
1941 pulse_len = pulse_0_len;\r
4225a882 1942\r
a7054daf 1943 if (auto_repetition_counter < n_auto_repetitions)\r
5481e9cd 1944 {\r
1945 pause_len = pause_0_len;\r
1946 }\r
1947 else\r
1948 {\r
1949 pause_len = 255; // last frame: pause of 255\r
1950 }\r
4225a882 1951 }\r
1952 }\r
1953\r
1954 if (pulse_counter < pulse_len)\r
1955 {\r
1956 if (pulse_counter == 0)\r
1957 {\r
1958 irsnd_on ();\r
1959 }\r
1960 pulse_counter++;\r
1961 }\r
1962 else if (pause_counter < pause_len)\r
1963 {\r
1964 if (pause_counter == 0)\r
1965 {\r
1966 irsnd_off ();\r
1967 }\r
1968 pause_counter++;\r
1969 }\r
1970 else\r
1971 {\r
1972 current_bit++;\r
1973\r
1974 if (current_bit >= complete_data_len + has_stop_bit)\r
1975 {\r
1976 current_bit = 0xFF;\r
a7054daf 1977 auto_repetition_counter++;\r
4225a882 1978\r
a7054daf 1979 if (auto_repetition_counter == n_auto_repetitions)\r
4225a882 1980 {\r
1981 irsnd_busy = FALSE;\r
a7054daf 1982 auto_repetition_counter = 0;\r
4225a882 1983 }\r
1984 new_frame = TRUE;\r
1985 }\r
1986\r
1987 pulse_counter = 0;\r
1988 pause_counter = 0;\r
1989 }\r
1990 break;\r
1991 }\r
a7054daf 1992#endif\r
1993\r
4225a882 1994#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
1995 case IRMP_RC5_PROTOCOL:\r
a7054daf 1996#endif\r
9547ee89 1997#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
1998 case IRMP_RC6_PROTOCOL:\r
1999#endif\r
2000#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
2001 case IRMP_RC6A_PROTOCOL:\r
2002#endif\r
a7054daf 2003#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
2004 case IRMP_SIEMENS_PROTOCOL:\r
2005#endif\r
2006#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
2007 case IRMP_GRUNDIG_PROTOCOL:\r
2008#endif\r
a48187fa 2009#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
2010 case IRMP_IR60_PROTOCOL:\r
2011#endif\r
a7054daf 2012#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
2013 case IRMP_NOKIA_PROTOCOL:\r
2014#endif\r
4225a882 2015\r
9547ee89 2016#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
a48187fa 2017 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
a7054daf 2018 {\r
2019 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
4225a882 2020 {\r
a7054daf 2021 current_bit++;\r
4225a882 2022\r
a7054daf 2023 if (current_bit >= complete_data_len)\r
4225a882 2024 {\r
a7054daf 2025 current_bit = 0xFF;\r
2026\r
a48187fa 2027#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
2028 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
4225a882 2029 {\r
a7054daf 2030 auto_repetition_counter++;\r
2031\r
2032 if (repeat_counter > 0)\r
2033 { // set 117 msec pause time\r
89e8cafb 2034 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
a7054daf 2035 }\r
2036\r
2037 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2038 {\r
2039 n_auto_repetitions++; // increment number of auto repetitions\r
2040 repeat_counter++;\r
2041 }\r
2042 else if (auto_repetition_counter == n_auto_repetitions)\r
2043 {\r
2044 irsnd_busy = FALSE;\r
2045 auto_repetition_counter = 0;\r
2046 }\r
4225a882 2047 }\r
a7054daf 2048 else\r
2049#endif\r
4225a882 2050 {\r
a7054daf 2051 irsnd_busy = FALSE;\r
4225a882 2052 }\r
4225a882 2053\r
4225a882 2054 new_frame = TRUE;\r
2055 irsnd_off ();\r
2056 }\r
2057\r
2058 pulse_counter = 0;\r
2059 pause_counter = 0;\r
2060 }\r
5b437ff6 2061\r
a7054daf 2062 if (! new_frame)\r
5b437ff6 2063 {\r
a7054daf 2064 uint8_t first_pulse;\r
5b437ff6 2065\r
a48187fa 2066#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
2067 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
5b437ff6 2068 {\r
a7054daf 2069 if (current_bit == 0xFF || // start bit of start-frame\r
2070 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
a48187fa 2071 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
a7054daf 2072 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
5b437ff6 2073 {\r
a7054daf 2074 pulse_len = startbit_pulse_len;\r
2075 pause_len = startbit_pause_len;\r
2076 first_pulse = TRUE;\r
5b437ff6 2077 }\r
a7054daf 2078 else // send n'th bit\r
5b437ff6 2079 {\r
89e8cafb 2080 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2081 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
a7054daf 2082 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
5b437ff6 2083 }\r
5b437ff6 2084 }\r
9547ee89 2085 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
2086 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r
a7054daf 2087#endif\r
5b437ff6 2088 {\r
a7054daf 2089 if (current_bit == 0xFF) // 1 start bit\r
2090 {\r
9547ee89 2091#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
2092 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2093 {\r
2094 pulse_len = startbit_pulse_len;\r
2095 pause_len = startbit_pause_len;\r
2096 }\r
2097#endif\r
a7054daf 2098 first_pulse = TRUE;\r
2099 }\r
2100 else // send n'th bit\r
2101 {\r
9547ee89 2102#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
2103 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2104 {\r
2105 pulse_len = RC6_BIT_LEN;\r
2106 pause_len = RC6_BIT_LEN;\r
2107\r
2108 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2109 {\r
2110 if (current_bit == 4) // toggle bit (double len)\r
2111 {\r
2112 pulse_len = 2 * RC6_BIT_LEN;\r
2113 pause_len = 2 * RC6_BIT_LEN;\r
2114 }\r
2115 }\r
2116 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2117 {\r
2118 if (current_bit == 4) // toggle bit (double len)\r
2119 {\r
2120 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2121 pause_len = 2 * RC6_BIT_LEN;\r
2122 }\r
2123 else if (current_bit == 5) // toggle bit (double len)\r
2124 {\r
2125 pause_len = 2 * RC6_BIT_LEN;\r
2126 }\r
2127 }\r
2128 }\r
2129#endif\r
a7054daf 2130 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2131 }\r
5b437ff6 2132\r
a7054daf 2133 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2134 {\r
2135 first_pulse = first_pulse ? FALSE : TRUE;\r
2136 }\r
2137 }\r
5b437ff6 2138\r
2139 if (first_pulse)\r
2140 {\r
a7054daf 2141 if (pulse_counter < pulse_len)\r
5b437ff6 2142 {\r
2143 if (pulse_counter == 0)\r
2144 {\r
2145 irsnd_on ();\r
2146 }\r
2147 pulse_counter++;\r
2148 }\r
a7054daf 2149 else // if (pause_counter < pause_len)\r
5b437ff6 2150 {\r
2151 if (pause_counter == 0)\r
2152 {\r
2153 irsnd_off ();\r
2154 }\r
2155 pause_counter++;\r
2156 }\r
5b437ff6 2157 }\r
2158 else\r
2159 {\r
a03ad359 2160 // printf ("current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2161\r
a7054daf 2162 if (pause_counter < pause_len)\r
5b437ff6 2163 {\r
2164 if (pause_counter == 0)\r
2165 {\r
2166 irsnd_off ();\r
2167 }\r
2168 pause_counter++;\r
2169 }\r
a7054daf 2170 else // if (pulse_counter < pulse_len)\r
5b437ff6 2171 {\r
2172 if (pulse_counter == 0)\r
2173 {\r
2174 irsnd_on ();\r
2175 }\r
2176 pulse_counter++;\r
2177 }\r
5b437ff6 2178 }\r
2179 }\r
2180 break;\r
2181 }\r
9547ee89 2182#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
a48187fa 2183 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2184\r
4225a882 2185 default:\r
2186 {\r
2187 irsnd_busy = FALSE;\r
2188 break;\r
2189 }\r
2190 }\r
2191 }\r
a7054daf 2192\r
2193 if (! irsnd_busy)\r
2194 {\r
2195 if (repeat_counter < n_repeat_frames)\r
2196 {\r
c7c9a4a1 2197#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
2198 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2199 {\r
2200 irsnd_buffer[2] |= 0x0F;\r
2201 }\r
2202#endif\r
a7054daf 2203 repeat_counter++;\r
2204 irsnd_busy = TRUE;\r
2205 }\r
2206 else\r
2207 {\r
9c86ff1a 2208 irsnd_busy = TRUE; //Rainer\r
0f700c8e 2209 send_trailer = TRUE;\r
a7054daf 2210 n_repeat_frames = 0;\r
2211 repeat_counter = 0;\r
2212 }\r
2213 }\r
4225a882 2214 }\r
2215\r
2216#ifdef DEBUG\r
2217 if (irsnd_is_on)\r
2218 {\r
2219 putchar ('0');\r
2220 }\r
2221 else\r
2222 {\r
2223 putchar ('1');\r
2224 }\r
2225#endif\r
2226\r
2227 return irsnd_busy;\r
2228}\r
2229\r
2230#ifdef DEBUG\r
2231\r
2232// main function - for unix/linux + windows only!\r
2233// AVR: see main.c!\r
2234// Compile it under linux with:\r
2235// cc irsnd.c -o irsnd\r
2236//\r
2237// usage: ./irsnd protocol hex-address hex-command >filename\r
2238\r
2239int\r
2240main (int argc, char ** argv)\r
2241{\r
4225a882 2242 int protocol;\r
2243 int address;\r
2244 int command;\r
4225a882 2245 IRMP_DATA irmp_data;\r
2246\r
a7054daf 2247 if (argc != 4 && argc != 5)\r
4225a882 2248 {\r
a7054daf 2249 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
4225a882 2250 return 1;\r
2251 }\r
2252\r
2253 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
2254 sscanf (argv[2], "%x", &address) == 1 &&\r
2255 sscanf (argv[3], "%x", &command) == 1)\r
2256 {\r
2257 irmp_data.protocol = protocol;\r
2258 irmp_data.address = address;\r
2259 irmp_data.command = command;\r
2260\r
a7054daf 2261 if (argc == 5)\r
2262 {\r
2263 irmp_data.flags = atoi (argv[4]);\r
2264 }\r
2265 else\r
2266 {\r
2267 irmp_data.flags = 0;\r
2268 }\r
2269\r
4225a882 2270 irsnd_init ();\r
2271\r
879b06c2 2272 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2273\r
a7054daf 2274 while (irsnd_busy)\r
2275 {\r
2276 irsnd_ISR ();\r
2277 }\r
beda975f 2278\r
4225a882 2279 putchar ('\n');\r
a03ad359 2280\r
f874da09 2281#if 1 // enable here to send twice\r
a03ad359 2282 (void) irsnd_send_data (&irmp_data, TRUE);\r
2283\r
2284 while (irsnd_busy)\r
2285 {\r
2286 irsnd_ISR ();\r
2287 }\r
2288\r
2289 putchar ('\n');\r
f874da09 2290#endif\r
4225a882 2291 }\r
2292 else\r
2293 {\r
2294 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2295 return 1;\r
2296 }\r
2297 return 0;\r
2298}\r
2299\r
2300#endif // DEBUG\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)